BR112023012725A2 - Dispositivo de memória tridimensional, sistema e método para formar um dispositivo de memória tridimensional - Google Patents

Dispositivo de memória tridimensional, sistema e método para formar um dispositivo de memória tridimensional

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Publication number
BR112023012725A2
BR112023012725A2 BR112023012725A BR112023012725A BR112023012725A2 BR 112023012725 A2 BR112023012725 A2 BR 112023012725A2 BR 112023012725 A BR112023012725 A BR 112023012725A BR 112023012725 A BR112023012725 A BR 112023012725A BR 112023012725 A2 BR112023012725 A2 BR 112023012725A2
Authority
BR
Brazil
Prior art keywords
memory device
dimensional memory
forming
semiconductor structure
dimensional
Prior art date
Application number
BR112023012725A
Other languages
English (en)
Inventor
Chao Sun
Lei Xue
Liang Chen
Ning Jiang
Wei Liu
Wenshan Xu
Wu Tian
Original Assignee
Yangtze Memory Tech Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yangtze Memory Tech Co Ltd filed Critical Yangtze Memory Tech Co Ltd
Priority claimed from PCT/CN2021/103677 external-priority patent/WO2022236944A1/en
Publication of BR112023012725A2 publication Critical patent/BR112023012725A2/pt

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    • H—ELECTRICITY
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    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/07—Structure, shape, material or disposition of the bonding areas after the connecting process
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    • G11C5/04—Supports for storage elements, e.g. memory modules; Mounting or fixing of storage elements on such supports
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  • Engineering & Computer Science (AREA)
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  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Element Separation (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

dispositivo de memória tridimensional, sistema e método para formar um dispositivo de memória tridimensional. a presente invenção refere-se a dispositivos de memória tridimensionais (3d) que inclui uma primeira estrutura semicondutora que inclui uma matriz de células de memória, uma segunda estrutura semicondutora que inclui um circuito de periférico, e uma interface de ligação entre a primeira estrutura semicondutora e a segunda estrutura semicondutora. o circuito de periférico inclui um transistor 3d. a matriz de células de memória é acoplada ao circuito de periférico através da interface de ligação.
BR112023012725A 2021-05-12 2021-06-30 Dispositivo de memória tridimensional, sistema e método para formar um dispositivo de memória tridimensional BR112023012725A2 (pt)

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