BR112019003959A2 - plataforma estendida com slots de módulo de memória adicionais por soquete cpu - Google Patents

plataforma estendida com slots de módulo de memória adicionais por soquete cpu

Info

Publication number
BR112019003959A2
BR112019003959A2 BR112019003959-7A BR112019003959A BR112019003959A2 BR 112019003959 A2 BR112019003959 A2 BR 112019003959A2 BR 112019003959 A BR112019003959 A BR 112019003959A BR 112019003959 A2 BR112019003959 A2 BR 112019003959A2
Authority
BR
Brazil
Prior art keywords
row
elements
memory module
cpu socket
module slots
Prior art date
Application number
BR112019003959-7A
Other languages
English (en)
Inventor
Querbach Bruce
D. Vogt Pete
Original Assignee
Intel Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corporation filed Critical Intel Corporation
Publication of BR112019003959A2 publication Critical patent/BR112019003959A2/pt

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/06Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16Constructional details or arrangements
    • G06F1/18Packaging or power distribution
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16Constructional details or arrangements
    • G06F1/18Packaging or power distribution
    • G06F1/183Internal mounting support structures, e.g. for printed circuit boards, internal connecting means
    • G06F1/185Mounting of expansion boards
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/02Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/04Supports for storage elements, e.g. memory modules; Mounting or fixing of storage elements on such supports
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/06Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/06Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/066Means for reducing external access-lines for a semiconductor memory clip, e.g. by multiplexing at least address and data signals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01RELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R12/00Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
    • H01R12/70Coupling devices
    • H01R12/71Coupling devices for rigid printing circuits or like structures
    • H01R12/712Coupling devices for rigid printing circuits or like structures co-operating with the surface of the printed circuit or with a coupling device exclusively provided on the surface of the printed circuit
    • H01R12/716Coupling device provided on the PCB
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/141One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0286Programmable, customizable or modifiable circuits
    • H05K1/0295Programmable, customizable or modifiable circuits adapted for choosing between different types or different locations of mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/09409Multiple rows of pads, lands, terminals or dummy patterns; Multiple rows of mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007Types of components
    • H05K2201/10159Memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Combinations Of Printed Boards (AREA)
  • Memory System (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

a presente invenção refere-se a dispositivos eletrônicos e métodos incluindo uma placa de circuito impresso configurada para aceitar cpus e módulos de memória. um aparelho inclui uma placa de circuito impresso que inclui uma primeira fila de elementos incluindo uma primeira cpu posicionada entre o primeiro e segundo grupos de módulos de memória em linha dupla (dimms). a placa de circuito impresso inclui igualmente uma segunda fila de elementos incluindo uma segunda cpu posicionada entre o terceiro e quarto grupos de dimms. o aparelho inclui igualmente uma terceira fila de elementos, incluindo um quinto grupo de dimms, em que a segunda fila de elementos se encontra posicionada entre a primeira fila de elementos e a terceira fila de elementos. outras modalidades são descritas e reivindicadas.
BR112019003959-7A 2016-09-30 2017-09-28 plataforma estendida com slots de módulo de memória adicionais por soquete cpu BR112019003959A2 (pt)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/283,167 US9818457B1 (en) 2016-09-30 2016-09-30 Extended platform with additional memory module slots per CPU socket
US15/283,167 2016-09-30
PCT/US2017/054186 WO2018064421A1 (en) 2016-09-30 2017-09-28 Extended platform with additional memory module slots per cpu socket

Publications (1)

Publication Number Publication Date
BR112019003959A2 true BR112019003959A2 (pt) 2019-05-21

Family

ID=60255753

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112019003959-7A BR112019003959A2 (pt) 2016-09-30 2017-09-28 plataforma estendida com slots de módulo de memória adicionais por soquete cpu

Country Status (7)

Country Link
US (2) US9818457B1 (pt)
JP (1) JP7200466B2 (pt)
KR (1) KR20190050772A (pt)
CN (1) CN109643562B (pt)
BR (1) BR112019003959A2 (pt)
DE (1) DE112017004965T5 (pt)
WO (1) WO2018064421A1 (pt)

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US10216657B2 (en) 2016-09-30 2019-02-26 Intel Corporation Extended platform with additional memory module slots per CPU socket and configured for increased performance
US9818457B1 (en) 2016-09-30 2017-11-14 Intel Corporation Extended platform with additional memory module slots per CPU socket
US10849223B2 (en) * 2019-03-06 2020-11-24 Cisco Technology, Inc. Multi-socket server assembly
US11004476B2 (en) * 2019-04-30 2021-05-11 Cisco Technology, Inc. Multi-column interleaved DIMM placement and routing topology
TWI763103B (zh) * 2020-10-28 2022-05-01 宜鼎國際股份有限公司 記憶體插槽的扣環裝置
TWI793757B (zh) * 2021-09-09 2023-02-21 緯創資通股份有限公司 浸沒式冷卻系統及冷卻裝置

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Also Published As

Publication number Publication date
US10242717B2 (en) 2019-03-26
CN109643562B (zh) 2023-08-15
DE112017004965T5 (de) 2019-06-13
JP7200466B2 (ja) 2023-01-10
WO2018064421A1 (en) 2018-04-05
US20180130505A1 (en) 2018-05-10
US9818457B1 (en) 2017-11-14
JP2019537186A (ja) 2019-12-19
CN109643562A (zh) 2019-04-16
KR20190050772A (ko) 2019-05-13

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Legal Events

Date Code Title Description
B350 Update of information on the portal [chapter 15.35 patent gazette]
B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE A 5A ANUIDADE.

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: EM VIRTUDE DO ARQUIVAMENTO PUBLICADO NA RPI 2689 DE 19-07-2022 E CONSIDERANDO AUSENCIA DE MANIFESTACAO DENTRO DOS PRAZOS LEGAIS, INFORMO QUE CABE SER MANTIDO O ARQUIVAMENTO DO PEDIDO DE PATENTE, CONFORME O DISPOSTO NO ARTIGO 12, DA RESOLUCAO 113/2013.