BR112019023179A2 - método de processamento de informação e aparelho de comunicações - Google Patents
método de processamento de informação e aparelho de comunicações Download PDFInfo
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- BR112019023179A2 BR112019023179A2 BR112019023179A BR112019023179A BR112019023179A2 BR 112019023179 A2 BR112019023179 A2 BR 112019023179A2 BR 112019023179 A BR112019023179 A BR 112019023179A BR 112019023179 A BR112019023179 A BR 112019023179A BR 112019023179 A2 BR112019023179 A2 BR 112019023179A2
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
- H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/033—Theoretical methods to calculate these checking codes
- H03M13/036—Heuristic code construction methods, i.e. code construction or code search based on using trial-and-error
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/615—Use of computational or mathematical techniques
- H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/618—Shortening and extension of codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6362—Error control coding in combination with rate matching by puncturing
- H03M13/6368—Error control coding in combination with rate matching by puncturing using rate compatible puncturing or complementary puncturing
- H03M13/6393—Rate compatible low-density parity check [LDPC] codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6502—Reduction of hardware complexity or efficient processing
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
- H03M13/6516—Support of multiple code parameters, e.g. generalized Reed-Solomon decoder for a variety of generator polynomials or Galois fields
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- General Physics & Mathematics (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Algebra (AREA)
- Computing Systems (AREA)
- Error Detection And Correction (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Abstract
a presente invenção refere-se a um método de codificação, um aparelho, um dispositivo de comunicações, e um sistema de comunicações. o método compreende: codificar uma sequência de bits de entrada pela utilização de uma matriz de baixa densidade e verificação de paridade, ldpc, onde um gráfico de base da matriz ldpc é representado como uma matriz de m fileiras e n colunas, m sendo um inteiro maior que ou igual a 5, e n sendo um inteiro maior que ou igual a 27; o gráfico de base compreende pelo menos uma submatriz a e uma submatriz b; a submatriz a é uma matriz de cinco fileiras e vinte e duas colunas; e a submatriz b é uma matriz de cinco fileiras e cinco colunas, e a submatriz b compreende uma coluna cujo peso é igual a 3, e uma submatriz b' com uma estrutura bidiagonal. de acordo com o método de codificação, o aparelho, o dispositivo de comunicações e o sistema de comunicações desse pedido suporta as exigências de codificação de sequências de bits de informação dentre uma pluralidade de comprimentos.
Applications Claiming Priority (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710314217 | 2017-05-05 | ||
| CN201710381396.2A CN108809328B (zh) | 2017-05-05 | 2017-05-25 | 信息处理的方法、通信装置 |
| PCT/CN2017/086227 WO2018201540A1 (zh) | 2017-05-05 | 2017-05-26 | 信息处理的方法、通信装置 |
| PCT/CN2017/087073 WO2018201547A1 (zh) | 2017-05-05 | 2017-06-02 | 信息处理的方法、通信装置 |
| PCT/CN2017/087830 WO2018201553A1 (zh) | 2017-05-05 | 2017-06-09 | 信息处理的方法、通信装置 |
| PCT/CN2017/087943 WO2018201554A1 (zh) | 2017-05-05 | 2017-06-12 | 信息处理的方法、通信装置 |
| PCT/CN2017/090417 WO2018201597A1 (zh) | 2017-05-05 | 2017-06-27 | 信息处理的方法、通信装置 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| BR112019023179A2 true BR112019023179A2 (pt) | 2020-05-19 |
Family
ID=64094520
Family Applications (3)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| BR112019023243A BR112019023243A2 (pt) | 2017-05-05 | 2017-05-26 | método de processamento de informação, aparelho de comunicações, dispositivo de comunicação, terminal, estação base, sistema de comunicações, meio de armazenamento legível por computador e produto de programa de computador |
| BR112019023179A BR112019023179A2 (pt) | 2017-05-05 | 2017-06-27 | método de processamento de informação e aparelho de comunicações |
| BR112019018329A BR112019018329B8 (pt) | 2017-05-05 | 2017-07-13 | Método para processamento de informação e aparelho em um dispositivo de comunicações |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| BR112019023243A BR112019023243A2 (pt) | 2017-05-05 | 2017-05-26 | método de processamento de informação, aparelho de comunicações, dispositivo de comunicação, terminal, estação base, sistema de comunicações, meio de armazenamento legível por computador e produto de programa de computador |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| BR112019018329A BR112019018329B8 (pt) | 2017-05-05 | 2017-07-13 | Método para processamento de informação e aparelho em um dispositivo de comunicações |
Country Status (13)
| Country | Link |
|---|---|
| US (5) | US10432219B2 (pt) |
| EP (1) | EP3540948A4 (pt) |
| JP (2) | JP7171590B2 (pt) |
| KR (1) | KR102205936B1 (pt) |
| CN (4) | CN110535474B (pt) |
| AU (1) | AU2017413002B2 (pt) |
| BR (3) | BR112019023243A2 (pt) |
| CA (1) | CA3051761C (pt) |
| DE (1) | DE202017007614U1 (pt) |
| MX (1) | MX2019010697A (pt) |
| MY (1) | MY195263A (pt) |
| RU (1) | RU2740151C1 (pt) |
| ZA (1) | ZA201905493B (pt) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10784901B2 (en) | 2015-11-12 | 2020-09-22 | Qualcomm Incorporated | Puncturing for structured low density parity check (LDPC) codes |
| US10291354B2 (en) | 2016-06-14 | 2019-05-14 | Qualcomm Incorporated | High performance, flexible, and compact low-density parity-check (LDPC) code |
| US10340949B2 (en) * | 2017-02-06 | 2019-07-02 | Qualcomm Incorporated | Multiple low density parity check (LDPC) base graph design |
| US10312939B2 (en) | 2017-06-10 | 2019-06-04 | Qualcomm Incorporated | Communication techniques involving pairwise orthogonality of adjacent rows in LPDC code |
| WO2018227681A1 (zh) | 2017-06-15 | 2018-12-20 | 华为技术有限公司 | 信息处理的方法和通信装置 |
| CN109150197B (zh) | 2017-06-27 | 2024-05-14 | 华为技术有限公司 | 信息处理的方法、装置和通信设备 |
| CN109150196B (zh) | 2017-06-27 | 2024-06-18 | 华为技术有限公司 | 信息处理的方法、装置和通信设备 |
| JP7114689B2 (ja) * | 2017-08-24 | 2022-08-08 | テレフオンアクチーボラゲット エルエム エリクソン（パブル） | ３ｇｐｐニューラジオのベースグラフ選択 |
| CN111327330B (zh) * | 2018-12-14 | 2022-04-08 | 深圳市中兴微电子技术有限公司 | 一种信息处理方法、设备及计算机存储介质 |
| CN112751571A (zh) | 2019-10-30 | 2021-05-04 | 华为技术有限公司 | 一种ldpc的编码方法及装置 |
| CN114696840A (zh) * | 2020-12-31 | 2022-07-01 | 华为技术有限公司 | 一种编码方法及装置 |
| CN112787762B (zh) * | 2021-04-12 | 2021-07-23 | 南京创芯慧联技术有限公司 | 信道编码后数据的速率匹配方法及其速率匹配装置 |
| CN115499017B (zh) * | 2022-11-14 | 2023-03-24 | 北京得瑞领新科技有限公司 | 闪存编解码方法及装置、介质、固态硬盘 |
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| US20160173132A1 (en) * | 2014-12-10 | 2016-06-16 | Alcatel-Lucent Usa Inc. | Construction of Structured LDPC Convolutional Codes |
| US10291354B2 (en) * | 2016-06-14 | 2019-05-14 | Qualcomm Incorporated | High performance, flexible, and compact low-density parity-check (LDPC) code |
| WO2018084735A1 (en) | 2016-11-03 | 2018-05-11 | Huawei Technologies Co., Ltd. | Efficiently decodable qc-ldpc code |
| CN108173621B (zh) | 2016-12-07 | 2022-06-14 | 华为技术有限公司 | 数据传输的方法、发送设备、接收设备和通信系统 |
| WO2018173162A1 (ja) * | 2017-03-22 | 2018-09-27 | 株式会社Ｎｔｔドコモ | ユーザ端末及び無線通信方法 |
| US10608665B2 (en) * | 2017-03-24 | 2020-03-31 | Mediatek Inc. | Method and apparatus for error correction coding in communication |
| US10659079B2 (en) * | 2017-05-05 | 2020-05-19 | Mediatek Inc. | QC-LDPC codes |
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