BR0002574A - Sistema com fase de relógio adc ajustável - Google Patents
Sistema com fase de relógio adc ajustávelInfo
- Publication number
- BR0002574A BR0002574A BR0002574-7A BR0002574A BR0002574A BR 0002574 A BR0002574 A BR 0002574A BR 0002574 A BR0002574 A BR 0002574A BR 0002574 A BR0002574 A BR 0002574A
- Authority
- BR
- Brazil
- Prior art keywords
- clock phase
- adc clock
- clock
- phases
- selection circuit
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/08—Continuously compensating for, or preventing, undesired influence of physical parameters of noise
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/08—Continuously compensating for, or preventing, undesired influence of physical parameters of noise
- H03M1/0818—Continuously compensating for, or preventing, undesired influence of physical parameters of noise of clock feed-through
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
"SISTEMA COM FASE DE RELóGIO ADC AJUSTáVEL" Conversores analógicos para digitais (80) com desempenho aperfeiçoado na presença de interferência por barulho de relógio são configurados com um circuito de seleção de fase de relógio de amostragem (85) a fim de possibilitar a operação do conversor a intervalos de tempo de amostragem ótimos com relação ao barulho de interferência. O circuito de seleção inclui o aparelho para a geração de uma pluralidade de fases de relógio de amostragem, e um multiplexador acoplado à pluralidade de fases de modo a selecionar a fase de relógio ótima.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/327,088 US6310570B1 (en) | 1999-06-04 | 1999-06-04 | System with adjustable ADC clock phase |
Publications (1)
Publication Number | Publication Date |
---|---|
BR0002574A true BR0002574A (pt) | 2001-01-02 |
Family
ID=23275112
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BR0002574-7A BR0002574A (pt) | 1999-06-04 | 2000-06-02 | Sistema com fase de relógio adc ajustável |
Country Status (10)
Country | Link |
---|---|
US (1) | US6310570B1 (pt) |
EP (2) | EP1058387B1 (pt) |
JP (2) | JP2001053609A (pt) |
KR (1) | KR101054855B1 (pt) |
CN (2) | CN1187900C (pt) |
BR (1) | BR0002574A (pt) |
DE (2) | DE60035456T2 (pt) |
HK (1) | HK1070756A1 (pt) |
MX (1) | MXPA00005503A (pt) |
MY (1) | MY123664A (pt) |
Families Citing this family (30)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6420989B1 (en) * | 2001-01-22 | 2002-07-16 | Credence Systems Corporation | Programmable non-uniform clock signal generator |
US7805628B2 (en) * | 2001-04-02 | 2010-09-28 | Credence Systems Corporation | High resolution clock signal generator |
MXPA03000152A (es) * | 2001-04-09 | 2003-05-27 | Matsushita Electric Ind Co Ltd | Aparato de deteccion de sincronizacion. |
US7224759B2 (en) * | 2002-07-11 | 2007-05-29 | Honeywell International Inc. | Methods and apparatus for delay free phase shifting in correcting PLL phase offset |
KR101113305B1 (ko) * | 2002-08-14 | 2012-03-13 | 오아시스 실리콘 시스템즈 | 위상 고정 루프, 샘플율 변환, 또는 네트워크 프레임율로부터 생성된 동기 클럭을 사용하여 네트워크 프레임율로 네트워크로 데이터를 송신하고 네트워크로부터 데이터를 수신하기 위한 통신 시스템 |
JP2004260669A (ja) * | 2003-02-27 | 2004-09-16 | Leader Electronics Corp | シリアル・デジタル信号に内在するタイミング基準ビット列に同期するワード・クロック発生器 |
KR100538226B1 (ko) * | 2003-07-18 | 2005-12-21 | 삼성전자주식회사 | 복수의 아날로그 입력 신호를 고속으로 처리하는아날로그/디지털 변환 장치 및 이를 이용한 디스플레이 장치 |
US7209061B2 (en) * | 2005-03-30 | 2007-04-24 | Silicon Laboratories, Inc. | Method and system for sampling a signal |
JP2008544620A (ja) * | 2005-06-14 | 2008-12-04 | エヌエックスピー ビー ヴィ | 干渉補償による信号処理 |
US8331512B2 (en) * | 2006-04-04 | 2012-12-11 | Rambus Inc. | Phase control block for managing multiple clock domains in systems with frequency offsets |
KR100835682B1 (ko) * | 2006-07-18 | 2008-06-09 | 고려대학교 산학협력단 | 노이즈에 따라 샘플링 주기를 제어하는 아날로그 디지털변환 장치, 이를 이용한 오디오 기록 장치 및 심박 조율장치 |
US7612595B2 (en) * | 2006-09-19 | 2009-11-03 | Melexis Tessenderlo Nv | Sequence independent non-overlapping digital signal generator with programmable delay |
US7928884B2 (en) * | 2007-01-11 | 2011-04-19 | Siflare, Inc. | Analog-to-digital converter with a balanced output |
US7940202B1 (en) * | 2008-07-31 | 2011-05-10 | Cypress Semiconductor Corporation | Clocking analog components operating in a digital system |
EP2226963B1 (en) * | 2009-03-04 | 2013-05-08 | Sony Corporation | Receiving apparatus and method with non-oversampling analog to digital conversion |
JP5221446B2 (ja) | 2009-05-19 | 2013-06-26 | 株式会社東芝 | 干渉除去装置および通信装置 |
US8279100B2 (en) * | 2010-09-30 | 2012-10-02 | Lockheed Martin Corporation | Complex analog to digital converter (CADC) system on chip double rate architecture |
CN101977057B (zh) * | 2010-11-04 | 2013-05-22 | 青岛海信移动通信技术股份有限公司 | 一种模数转换电路 |
JP5547765B2 (ja) * | 2012-03-23 | 2014-07-16 | 旭化成エレクトロニクス株式会社 | D/a変換器、ジッタ周波数制御回路 |
JP5547767B2 (ja) * | 2012-03-28 | 2014-07-16 | 旭化成エレクトロニクス株式会社 | サンプリング回路、a/d変換器、d/a変換器、codec |
DE102012208281A1 (de) * | 2012-05-16 | 2013-11-21 | Robert Bosch Gmbh | Verfahren zur Entstörung eines Abtastprozesses sowie eine Vorrichtung zur Durchführung des Verfahrens |
US9000809B2 (en) * | 2012-05-30 | 2015-04-07 | Infineon Technologies Austria Ag | Method and device for sampling an input signal |
CN104158542B (zh) * | 2014-08-25 | 2017-04-05 | 东南大学 | 一种基于欠采样技术锁相环长周期抖动片上测量电路 |
US9496887B1 (en) * | 2015-05-12 | 2016-11-15 | Microchip Technology Incorporated | Analog to digital converter with internal timer |
US9312875B1 (en) * | 2015-06-26 | 2016-04-12 | Intel IP Corporation | Signal processing apparatus and method for processing a signal |
CN108345554B (zh) * | 2017-01-22 | 2020-08-21 | 联发科技股份有限公司 | 决定出取样时脉信号的取样相位的方法及相关的电子装置 |
EP3591433B1 (en) * | 2018-07-02 | 2023-06-14 | NXP USA, Inc. | Communication unit, integrated circuits and method for clock and data synchronization |
CN113237501B (zh) * | 2021-04-19 | 2022-06-17 | 上海季丰电子股份有限公司 | 一种高精度的多通道信号校准方法及装置 |
CN114389607B (zh) * | 2021-12-24 | 2024-06-04 | 莱弗利科技(苏州)有限公司 | 一种低噪声干扰的数模混合芯片 |
CN117411466A (zh) * | 2023-11-07 | 2024-01-16 | 上海芯炽科技集团有限公司 | 一种基于数字相位发生器和选择器的cdr电路 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4633226A (en) | 1984-12-17 | 1986-12-30 | Black Jr William C | Multiple channel analog-to-digital converters |
US4791488A (en) * | 1987-08-12 | 1988-12-13 | Rca Licensing Corporation | Line-locked clock signal generation system |
JP2805776B2 (ja) * | 1988-11-18 | 1998-09-30 | 日本電気株式会社 | A/d変換器 |
SE463584B (sv) * | 1989-04-20 | 1990-12-10 | Ericsson Telefon Ab L M | Saett och anordning foer noggrann digital maetning av tids- eller faslaeget i ett signalpulstaag |
JPH0375976A (ja) | 1989-08-18 | 1991-03-29 | Fujitsu Ltd | 半導体集積回路装置 |
US5022056A (en) * | 1989-10-23 | 1991-06-04 | National Semiconductor Corporation | Method and structure for digital phase synchronization |
US5319679A (en) * | 1992-12-09 | 1994-06-07 | Datum Systems | Method and apparatus for recovering data from a radio signal |
US5533072A (en) * | 1993-11-12 | 1996-07-02 | International Business Machines Corporation | Digital phase alignment and integrated multichannel transceiver employing same |
KR100322690B1 (ko) * | 1994-06-30 | 2002-06-20 | 윤종용 | 디지탈타이밍복원회로 |
US5596765A (en) * | 1994-10-19 | 1997-01-21 | Advanced Micro Devices, Inc. | Integrated processor including a device for multiplexing external pin signals |
JP3622270B2 (ja) * | 1995-06-16 | 2005-02-23 | セイコーエプソン株式会社 | 映像信号処理装置、情報処理システム及び映像信号処理方法 |
JPH1049248A (ja) * | 1996-07-29 | 1998-02-20 | Sharp Corp | マイクロコンピュータ |
JPH10228733A (ja) * | 1997-02-17 | 1998-08-25 | Matsushita Electric Ind Co Ltd | データ復号装置 |
-
1999
- 1999-06-04 US US09/327,088 patent/US6310570B1/en not_active Expired - Lifetime
-
2000
- 2000-05-30 EP EP00401516A patent/EP1058387B1/en not_active Expired - Lifetime
- 2000-05-30 EP EP06121705A patent/EP1758252B1/en not_active Expired - Lifetime
- 2000-05-30 DE DE60035456T patent/DE60035456T2/de not_active Expired - Lifetime
- 2000-05-30 DE DE60044271T patent/DE60044271D1/de not_active Expired - Lifetime
- 2000-06-02 MX MXPA00005503A patent/MXPA00005503A/es active IP Right Grant
- 2000-06-02 MY MYPI20002485 patent/MY123664A/en unknown
- 2000-06-02 KR KR1020000030299A patent/KR101054855B1/ko active IP Right Grant
- 2000-06-02 BR BR0002574-7A patent/BR0002574A/pt not_active Application Discontinuation
- 2000-06-04 CN CNB001217038A patent/CN1187900C/zh not_active Expired - Lifetime
- 2000-06-04 CN CNB2004100686690A patent/CN100361394C/zh not_active Expired - Lifetime
- 2000-06-05 JP JP2000168139A patent/JP2001053609A/ja active Pending
-
2005
- 2005-04-21 HK HK05103432A patent/HK1070756A1/xx not_active IP Right Cessation
-
2011
- 2011-04-25 JP JP2011097513A patent/JP2011223589A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
DE60035456T2 (de) | 2008-03-13 |
CN1187900C (zh) | 2005-02-02 |
US6310570B1 (en) | 2001-10-30 |
DE60044271D1 (de) | 2010-06-02 |
CN100361394C (zh) | 2008-01-09 |
EP1758252B1 (en) | 2010-04-21 |
KR20010007195A (ko) | 2001-01-26 |
MXPA00005503A (es) | 2004-06-07 |
EP1058387B1 (en) | 2007-07-11 |
EP1058387A3 (en) | 2003-10-29 |
HK1070756A1 (en) | 2005-06-24 |
JP2011223589A (ja) | 2011-11-04 |
JP2001053609A (ja) | 2001-02-23 |
CN1277492A (zh) | 2000-12-20 |
MY123664A (en) | 2006-05-31 |
DE60035456D1 (de) | 2007-08-23 |
KR101054855B1 (ko) | 2011-08-05 |
EP1058387A2 (en) | 2000-12-06 |
EP1758252A1 (en) | 2007-02-28 |
CN1578153A (zh) | 2005-02-09 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
B07A | Application suspended after technical examination (opinion) [chapter 7.1 patent gazette] | ||
B09B | Patent application refused [chapter 9.2 patent gazette] |
Free format text: INDEFIRO O PEDIDO DE ACORDO COM O ARTIGO 8O COMBINADO COM O ARTIGO 13 DA LPI |
|
B09B | Patent application refused [chapter 9.2 patent gazette] |
Free format text: MANTIDO O INDEFERIMENTO UMA VEZ QUE NAO FOI APRESENTADO RECURSO DENTRO DO PRAZO LEGAL. |