BE895843A - Memoire a semiconducteur a deux niveaux de conducteurs - Google Patents

Memoire a semiconducteur a deux niveaux de conducteurs

Info

Publication number
BE895843A
BE895843A BE0/210068A BE210068A BE895843A BE 895843 A BE895843 A BE 895843A BE 0/210068 A BE0/210068 A BE 0/210068A BE 210068 A BE210068 A BE 210068A BE 895843 A BE895843 A BE 895843A
Authority
BE
Belgium
Prior art keywords
conductors
levels
semiconductor memory
semiconductor
memory
Prior art date
Application number
BE0/210068A
Other languages
English (en)
Inventor
G T Cheney
H C Kirsch
J T Nelson
J H Stefany
Original Assignee
Western Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co filed Critical Western Electric Co
Publication of BE895843A publication Critical patent/BE895843A/fr

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
BE0/210068A 1982-02-09 1983-02-08 Memoire a semiconducteur a deux niveaux de conducteurs BE895843A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US34730982A 1982-02-09 1982-02-09

Publications (1)

Publication Number Publication Date
BE895843A true BE895843A (fr) 1983-05-30

Family

ID=23363185

Family Applications (1)

Application Number Title Priority Date Filing Date
BE0/210068A BE895843A (fr) 1982-02-09 1983-02-08 Memoire a semiconducteur a deux niveaux de conducteurs

Country Status (5)

Country Link
JP (1) JPS58147147A (fr)
BE (1) BE895843A (fr)
DE (1) DE3303762A1 (fr)
FR (1) FR2521335B1 (fr)
GB (1) GB2114814B (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0616549B2 (ja) * 1984-04-17 1994-03-02 三菱電機株式会社 半導体集積回路装置
JPS6286755A (ja) * 1985-10-11 1987-04-21 Mitsubishi Electric Corp 半導体メモリ
KR900002474B1 (ko) * 1985-11-22 1990-04-16 미쓰비시 뎅기 가부시끼가이샤 반도체 메모리
KR900003028B1 (ko) * 1985-12-13 1990-05-04 미쓰비시 뎅기 가부시끼가이샤 반도체 집적회로장치
US5334547A (en) * 1988-12-27 1994-08-02 Nec Corporation Method of manufacturing a semiconductor memory having an increased cell capacitance in a restricted cell area

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5696854A (en) * 1979-12-29 1981-08-05 Fujitsu Ltd Semiconductor memory device
GB2067352A (en) * 1980-01-11 1981-07-22 Mostek Corp One transistor - one capacitor memory cell

Also Published As

Publication number Publication date
FR2521335B1 (fr) 1989-03-24
GB2114814B (en) 1986-01-29
FR2521335A1 (fr) 1983-08-12
GB2114814A (en) 1983-08-24
GB8303003D0 (en) 1983-03-09
DE3303762A1 (de) 1983-08-18
JPS58147147A (ja) 1983-09-01

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Legal Events

Date Code Title Description
RE Patent lapsed

Owner name: WESTERN ELECTRIC CY INC.

Effective date: 20010228