AU6109300A - Method and apparatus for reducing stress across capacitors used in integrated circuits - Google Patents

Method and apparatus for reducing stress across capacitors used in integrated circuits

Info

Publication number
AU6109300A
AU6109300A AU61093/00A AU6109300A AU6109300A AU 6109300 A AU6109300 A AU 6109300A AU 61093/00 A AU61093/00 A AU 61093/00A AU 6109300 A AU6109300 A AU 6109300A AU 6109300 A AU6109300 A AU 6109300A
Authority
AU
Australia
Prior art keywords
integrated circuits
reducing stress
capacitors used
capacitors
stress
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU61093/00A
Other languages
English (en)
Inventor
Ramkarthik Ganesan
Owen W. Jungroth
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of AU6109300A publication Critical patent/AU6109300A/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/06—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/06—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
    • H02M3/073—Charge pumps of the Schenkel-type

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)
  • Semiconductor Integrated Circuits (AREA)
AU61093/00A 1999-09-27 2000-07-18 Method and apparatus for reducing stress across capacitors used in integrated circuits Abandoned AU6109300A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09405977 1999-09-27
US09/405,977 US6297974B1 (en) 1999-09-27 1999-09-27 Method and apparatus for reducing stress across capacitors used in integrated circuits
PCT/US2000/019623 WO2001024348A1 (en) 1999-09-27 2000-07-18 Method and apparatus for reducing stress across capacitors used in integrated circuits

Publications (1)

Publication Number Publication Date
AU6109300A true AU6109300A (en) 2001-04-30

Family

ID=23606020

Family Applications (1)

Application Number Title Priority Date Filing Date
AU61093/00A Abandoned AU6109300A (en) 1999-09-27 2000-07-18 Method and apparatus for reducing stress across capacitors used in integrated circuits

Country Status (7)

Country Link
US (2) US6297974B1 (enExample)
JP (1) JP2003511003A (enExample)
KR (1) KR100438371B1 (enExample)
CN (1) CN1187884C (enExample)
AU (1) AU6109300A (enExample)
TW (1) TW473786B (enExample)
WO (1) WO2001024348A1 (enExample)

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US8053812B2 (en) 2005-03-17 2011-11-08 Spansion Israel Ltd Contact in planar NROM technology
US8400841B2 (en) 2005-06-15 2013-03-19 Spansion Israel Ltd. Device to program adjacent storage cells of different NROM cells
US7184313B2 (en) 2005-06-17 2007-02-27 Saifun Semiconductors Ltd. Method circuit and system for compensating for temperature induced margin loss in non-volatile memory cells
EP1746645A3 (en) 2005-07-18 2009-01-21 Saifun Semiconductors Ltd. Memory array with sub-minimum feature size word line spacing and method of fabrication
US7668017B2 (en) 2005-08-17 2010-02-23 Saifun Semiconductors Ltd. Method of erasing non-volatile memory cells
US7221138B2 (en) 2005-09-27 2007-05-22 Saifun Semiconductors Ltd Method and apparatus for measuring charge pump output current
US7352627B2 (en) 2006-01-03 2008-04-01 Saifon Semiconductors Ltd. Method, system, and circuit for operating a non-volatile memory array
US7808818B2 (en) 2006-01-12 2010-10-05 Saifun Semiconductors Ltd. Secondary injection for NROM
US7692961B2 (en) 2006-02-21 2010-04-06 Saifun Semiconductors Ltd. Method, circuit and device for disturb-control of programming nonvolatile memory cells by hot-hole injection (HHI) and by channel hot-electron (CHE) injection
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US8228175B1 (en) 2008-04-07 2012-07-24 Impinj, Inc. RFID tag chips and tags with alternative behaviors and methods
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US8326256B1 (en) 2008-07-15 2012-12-04 Impinj, Inc. RFID tag with MOS bipolar hybrid rectifier
KR200452404Y1 (ko) * 2008-08-11 2011-02-28 (주) 케이.아이.씨.에이 플러그의 착탈이 용이한 어댑터
IT1404156B1 (it) * 2010-12-30 2013-11-15 St Microelectronics Srl Moltiplicatore di tensione
US9214924B2 (en) 2011-03-25 2015-12-15 Freescale Semiconductor, Inc. Integrated circuit and method for reducing an impact of electrical stress in an integrated circuit
CN103138248B (zh) * 2011-12-02 2016-02-24 赛普拉斯半导体公司 用于从负载电容电路释放电压的系统和方法
US9013938B1 (en) * 2011-12-02 2015-04-21 Cypress Semiconductor Corporation Systems and methods for discharging load capacitance circuits
CN103364712A (zh) * 2012-04-09 2013-10-23 快捷半导体(苏州)有限公司 Evs测试电路、evs测试系统和evs测试方法
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CN103715883B (zh) * 2014-01-07 2016-08-17 上海华虹宏力半导体制造有限公司 一种电荷泵电路
US11611276B2 (en) * 2014-12-04 2023-03-21 Taiwan Semiconductor Manufacturing Company, Ltd. Charge pump circuit
US9491151B2 (en) * 2015-01-07 2016-11-08 Ememory Technology Inc. Memory apparatus, charge pump circuit and voltage pumping method thereof
CN106817021B (zh) * 2015-12-01 2019-09-13 台湾积体电路制造股份有限公司 电荷泵电路
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US12088216B2 (en) 2022-04-11 2024-09-10 Hamilton Sundstrand Corporation DC to AC converter with magnitude based on duty ratio
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Also Published As

Publication number Publication date
USRE41217E1 (en) 2010-04-13
CN1187884C (zh) 2005-02-02
WO2001024348A1 (en) 2001-04-05
JP2003511003A (ja) 2003-03-18
US6297974B1 (en) 2001-10-02
KR20020038773A (ko) 2002-05-23
CN1399811A (zh) 2003-02-26
KR100438371B1 (ko) 2004-07-02
TW473786B (en) 2002-01-21

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase