AU2001235279A1 - Method and apparatus for balanced electronic operations - Google Patents

Method and apparatus for balanced electronic operations

Info

Publication number
AU2001235279A1
AU2001235279A1 AU2001235279A AU3527901A AU2001235279A1 AU 2001235279 A1 AU2001235279 A1 AU 2001235279A1 AU 2001235279 A AU2001235279 A AU 2001235279A AU 3527901 A AU3527901 A AU 3527901A AU 2001235279 A1 AU2001235279 A1 AU 2001235279A1
Authority
AU
Australia
Prior art keywords
electronic operations
balanced electronic
balanced
operations
electronic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001235279A
Inventor
Stanley T. Chow
Harold J. Johnson
James Zhengchu Xiao
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Cloakware Corp
Original Assignee
Cloakware Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cloakware Corp filed Critical Cloakware Corp
Publication of AU2001235279A1 publication Critical patent/AU2001235279A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
    • H04L9/0625—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation with splitting of the data block into left and right halves, e.g. Feistel based algorithms, DES, FEAL, IDEA or KASUMI
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
    • G06K19/07309—Means for preventing undesired reading or writing from or onto record carriers
    • G06K19/07363—Means for preventing undesired reading or writing from or onto record carriers by preventing analysis of the circuit, e.g. dynamic or static power analysis or current analysis
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
    • G06Q20/00—Payment architectures, schemes or protocols
    • G06Q20/30—Payment architectures, schemes or protocols characterised by the use of specific devices or networks
    • G06Q20/34—Payment architectures, schemes or protocols characterised by the use of specific devices or networks using cards, e.g. integrated circuit [IC] cards or magnetic cards
    • G06Q20/341—Active cards, i.e. cards including their own processing means, e.g. including an IC or chip
    • G—PHYSICS
    • G07—CHECKING-DEVICES
    • G07F—COIN-FREED OR LIKE APPARATUS
    • G07F7/00—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus
    • G07F7/08—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means
    • G07F7/0806—Details of the card
    • G07F7/0813—Specific details related to card security
    • G07F7/082—Features insuring the integrity of the data on or in the card
    • G—PHYSICS
    • G07—CHECKING-DEVICES
    • G07F—COIN-FREED OR LIKE APPARATUS
    • G07F7/00—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus
    • G07F7/08—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means
    • G07F7/10—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means together with a coded signal, e.g. in the form of personal identification information, like personal identification number [PIN] or biometric data
    • G07F7/1008—Active credit-cards provided with means to personalise their use, e.g. with PIN-introduction/comparison system
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/002—Countermeasures against attacks on cryptographic mechanisms
    • H04L9/003—Countermeasures against attacks on cryptographic mechanisms for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
    • G06F2207/7219—Countermeasures against side channel or fault attacks
AU2001235279A 2000-02-18 2001-02-19 Method and apparatus for balanced electronic operations Abandoned AU2001235279A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
CA002298990A CA2298990A1 (en) 2000-02-18 2000-02-18 Method and system for resistance to power analysis
CA2,298,990 2000-02-18
PCT/CA2001/000199 WO2001061914A2 (en) 2000-02-18 2001-02-19 Method and apparatus for balanced electronic operations

Publications (1)

Publication Number Publication Date
AU2001235279A1 true AU2001235279A1 (en) 2001-08-27

Family

ID=4165351

Family Applications (3)

Application Number Title Priority Date Filing Date
AU2001235280A Abandoned AU2001235280A1 (en) 2000-02-18 2001-02-19 Method and system for resistance to statistical power analysis
AU2001235281A Abandoned AU2001235281A1 (en) 2000-02-18 2001-02-19 Encoding method and system resistant to power analysis
AU2001235279A Abandoned AU2001235279A1 (en) 2000-02-18 2001-02-19 Method and apparatus for balanced electronic operations

Family Applications Before (2)

Application Number Title Priority Date Filing Date
AU2001235280A Abandoned AU2001235280A1 (en) 2000-02-18 2001-02-19 Method and system for resistance to statistical power analysis
AU2001235281A Abandoned AU2001235281A1 (en) 2000-02-18 2001-02-19 Encoding method and system resistant to power analysis

Country Status (5)

Country Link
US (3) US20040025032A1 (en)
EP (3) EP1256202A2 (en)
AU (3) AU2001235280A1 (en)
CA (1) CA2298990A1 (en)
WO (3) WO2001061914A2 (en)

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Also Published As

Publication number Publication date
WO2001061916A3 (en) 2002-03-28
EP1256203A2 (en) 2002-11-13
AU2001235281A1 (en) 2001-08-27
CA2298990A1 (en) 2001-08-18
WO2001061916A2 (en) 2001-08-23
WO2001061915A2 (en) 2001-08-23
WO2001061915A3 (en) 2001-12-27
US20040025032A1 (en) 2004-02-05
WO2001061914A2 (en) 2001-08-23
US20040030905A1 (en) 2004-02-12
EP1256202A2 (en) 2002-11-13
EP1256201A2 (en) 2002-11-13
US20040078588A1 (en) 2004-04-22
WO2001061914A3 (en) 2002-08-01
AU2001235280A1 (en) 2001-08-27

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