ATE898T1 - Bipolarer transistor und verfahren zu seiner herstellung. - Google Patents
Bipolarer transistor und verfahren zu seiner herstellung.Info
- Publication number
- ATE898T1 ATE898T1 AT80103474T AT80103474T ATE898T1 AT E898 T1 ATE898 T1 AT E898T1 AT 80103474 T AT80103474 T AT 80103474T AT 80103474 T AT80103474 T AT 80103474T AT E898 T1 ATE898 T1 AT E898T1
- Authority
- AT
- Austria
- Prior art keywords
- discs
- plates
- chips
- doped
- bipolar transistor
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 238000000034 method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 abstract 2
- 239000000463 material Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/185—Joining of semiconductor bodies for junction formation
- H01L21/187—Joining of semiconductor bodies for junction formation by direct bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
- H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/40—Vertical BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/177—Base regions of bipolar transistors, e.g. BJTs or IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D64/281—Base electrodes for bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/71—Means for bonding not being attached to, or not being formed on, the surface to be connected
- H01L2224/72—Detachable connecting means consisting of mechanical auxiliary parts connecting the device, e.g. pressure contacts using springs or clips
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Bipolar Transistors (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE2926785A DE2926785C2 (de) | 1979-07-03 | 1979-07-03 | Bipolarer Transistor und Verfahren zu seiner Herstellung |
| EP80103474A EP0022204B1 (de) | 1979-07-03 | 1980-06-21 | Bipolarer Transistor und Verfahren zu seiner Herstellung |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE898T1 true ATE898T1 (de) | 1982-05-15 |
Family
ID=6074781
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT80103474T ATE898T1 (de) | 1979-07-03 | 1980-06-21 | Bipolarer transistor und verfahren zu seiner herstellung. |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US4451843A (de) |
| EP (1) | EP0022204B1 (de) |
| JP (1) | JPS5613764A (de) |
| AT (1) | ATE898T1 (de) |
| DE (1) | DE2926785C2 (de) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4549196A (en) * | 1982-08-04 | 1985-10-22 | Westinghouse Electric Corp. | Lateral bipolar transistor |
| US5273918A (en) * | 1984-01-26 | 1993-12-28 | Temic Telefunken Microelectronic Gmbh | Process for the manufacture of a junction field effect transistor |
| DE3402517A1 (de) * | 1984-01-26 | 1985-08-01 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Verfahren zum herstellen eines sperrschicht-feldeffekttransistors |
| JPH0770474B2 (ja) * | 1985-02-08 | 1995-07-31 | 株式会社東芝 | 化合物半導体装置の製造方法 |
| GB2237929A (en) * | 1989-10-23 | 1991-05-15 | Philips Electronic Associated | A method of manufacturing a semiconductor device |
| AU2305399A (en) * | 1997-11-10 | 1999-05-31 | Don L. Kendall | Quantum ridges and tips |
| US6525335B1 (en) | 2000-11-06 | 2003-02-25 | Lumileds Lighting, U.S., Llc | Light emitting semiconductor devices including wafer bonded heterostructures |
| US6762094B2 (en) * | 2002-09-27 | 2004-07-13 | Hewlett-Packard Development Company, L.P. | Nanometer-scale semiconductor devices and method of making |
| US20070034909A1 (en) * | 2003-09-22 | 2007-02-15 | James Stasiak | Nanometer-scale semiconductor devices and method of making |
Family Cites Families (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US2618690A (en) * | 1949-10-06 | 1952-11-18 | Otmar M Stuetzer | Transconductor employing line type field controlled semiconductor |
| BE500302A (de) * | 1949-11-30 | |||
| US2728034A (en) * | 1950-09-08 | 1955-12-20 | Rca Corp | Semi-conductor devices with opposite conductivity zones |
| US2641638A (en) * | 1952-03-27 | 1953-06-09 | Rca Corp | Line-contact transistor |
| US2663830A (en) * | 1952-10-22 | 1953-12-22 | Bell Telephone Labor Inc | Semiconductor signal translating device |
| US2717342A (en) * | 1952-10-28 | 1955-09-06 | Bell Telephone Labor Inc | Semiconductor translating devices |
| DE1073111B (de) * | 1954-12-02 | 1960-01-14 | Siemens Schuckertwerke Aktiengesellschaft Berlin und Erlangen | Verfahren zur Herstellung eines Flachentransistors mit einer Oberflachenschicht erhöhter Storstellenkonzentration an den freien Stellen zwischen den Elektroden an einem einkristallmen Halbleiterkörper |
| US2911539A (en) * | 1957-12-18 | 1959-11-03 | Bell Telephone Labor Inc | Photocell array |
| US3166448A (en) * | 1961-04-07 | 1965-01-19 | Clevite Corp | Method for producing rib transistor |
| GB1053069A (de) * | 1963-06-28 | |||
| DE1514727A1 (de) * | 1965-09-30 | 1969-06-19 | Schaefer Dipl Phys Siegfried | Herstellung von pn-UEbergaengen durch plastische Verformung von Halbleitern |
| DE1283970B (de) * | 1966-03-19 | 1968-11-28 | Siemens Ag | Metallischer Kontakt an einem Halbleiterbauelement |
| US3525910A (en) * | 1968-05-31 | 1970-08-25 | Westinghouse Electric Corp | Contact system for intricate geometry devices |
| DE1916555A1 (de) * | 1969-04-01 | 1971-03-04 | Semikron Gleichrichterbau | Halbleiter-Gleichrichter-Anordnung und Verfahren zu ihrer Herstellung |
| GB1297046A (de) * | 1969-08-25 | 1972-11-22 | ||
| DE2244062A1 (de) * | 1972-09-08 | 1974-03-28 | Licentia Gmbh | Ohmscher anschlusskontakt fuer ein silizium-halbleiterbauelement |
| US4127863A (en) * | 1975-10-01 | 1978-11-28 | Tokyo Shibaura Electric Co., Ltd. | Gate turn-off type thyristor with separate semiconductor resistive wafer providing emitter ballast |
| DE2547262C3 (de) * | 1975-10-22 | 1981-07-16 | Reinhard Dr. 7101 Flein Dahlberg | Thermoelektrische Anordnung mit großen Temperaturgradienten und Verwendung |
| US4034469A (en) * | 1976-09-03 | 1977-07-12 | Ibm Corporation | Method of making conduction-cooled circuit package |
| DE2837394A1 (de) * | 1978-08-26 | 1980-03-20 | Semikron Gleichrichterbau | Halbleiter-brueckengleichrichteranordnung und verfahren zu ihrer herstellung |
-
1979
- 1979-07-03 DE DE2926785A patent/DE2926785C2/de not_active Expired
-
1980
- 1980-06-21 EP EP80103474A patent/EP0022204B1/de not_active Expired
- 1980-06-21 AT AT80103474T patent/ATE898T1/de not_active IP Right Cessation
- 1980-06-30 US US06/164,560 patent/US4451843A/en not_active Expired - Lifetime
- 1980-07-02 JP JP8927880A patent/JPS5613764A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| DE2926785A1 (de) | 1981-01-15 |
| DE2926785C2 (de) | 1985-12-12 |
| EP0022204A1 (de) | 1981-01-14 |
| EP0022204B1 (de) | 1982-04-21 |
| JPS5613764A (en) | 1981-02-10 |
| US4451843A (en) | 1984-05-29 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| REN | Ceased due to non-payment of the annual fee |