ATE533159T1 - Verfahren zur aktualisierung von inhalten eines multibit-flash-speicher - Google Patents

Verfahren zur aktualisierung von inhalten eines multibit-flash-speicher

Info

Publication number
ATE533159T1
ATE533159T1 AT09011429T AT09011429T ATE533159T1 AT E533159 T1 ATE533159 T1 AT E533159T1 AT 09011429 T AT09011429 T AT 09011429T AT 09011429 T AT09011429 T AT 09011429T AT E533159 T1 ATE533159 T1 AT E533159T1
Authority
AT
Austria
Prior art keywords
data
blocks
multibit
flash memory
unit
Prior art date
Application number
AT09011429T
Other languages
English (en)
Inventor
Shinichi Kanno
Shigehiro Asano
Kazuya Kitsunai
Hirokuni Yano
Toshikatsu Hida
Original Assignee
Toshiba Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Kk filed Critical Toshiba Kk
Application granted granted Critical
Publication of ATE533159T1 publication Critical patent/ATE533159T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/102—External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
    • G11C16/105—Circuits or methods for updating contents of nonvolatile memory, especially with 'security' features to ensure reliable replacement, i.e. preventing that old data is lost before new data is reliably written
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
    • G11C2216/12—Reading and writing aspects of erasable programmable read-only memories
    • G11C2216/14—Circuits or methods to write a page or sector of information simultaneously into a nonvolatile memory, typically a complete row or word line in flash memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System (AREA)
AT09011429T 2008-12-22 2009-09-07 Verfahren zur aktualisierung von inhalten eines multibit-flash-speicher ATE533159T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008325632A JP4551958B2 (ja) 2008-12-22 2008-12-22 半導体記憶装置および半導体記憶装置の制御方法

Publications (1)

Publication Number Publication Date
ATE533159T1 true ATE533159T1 (de) 2011-11-15

Family

ID=41343350

Family Applications (1)

Application Number Title Priority Date Filing Date
AT09011429T ATE533159T1 (de) 2008-12-22 2009-09-07 Verfahren zur aktualisierung von inhalten eines multibit-flash-speicher

Country Status (7)

Country Link
US (1) US20100161885A1 (de)
EP (2) EP2309517A1 (de)
JP (1) JP4551958B2 (de)
KR (1) KR101121698B1 (de)
CN (2) CN101763894B (de)
AT (1) ATE533159T1 (de)
TW (1) TWI440042B (de)

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JP4533968B2 (ja) 2007-12-28 2010-09-01 株式会社東芝 半導体記憶装置及びその制御方法、コントローラ、情報処理装置
JP4461170B2 (ja) 2007-12-28 2010-05-12 株式会社東芝 メモリシステム
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US8261158B2 (en) * 2009-03-13 2012-09-04 Fusion-Io, Inc. Apparatus, system, and method for using multi-level cell solid-state storage as single level cell solid-state storage
US8489804B1 (en) 2009-09-14 2013-07-16 Marvell International Ltd. System for using dynamic random access memory to reduce the effect of write amplification in flash memory
JP5397167B2 (ja) * 2009-11-05 2014-01-22 富士通株式会社 タイムスロット割り当て方法、プログラム及び装置
JP2011128998A (ja) 2009-12-18 2011-06-30 Toshiba Corp 半導体記憶装置
US8854882B2 (en) 2010-01-27 2014-10-07 Intelligent Intellectual Property Holdings 2 Llc Configuring storage cells
US8661184B2 (en) 2010-01-27 2014-02-25 Fusion-Io, Inc. Managing non-volatile media
TWI446349B (zh) * 2010-03-04 2014-07-21 Phison Electronics Corp 非揮發性記憶體存取方法、系統，與非揮發性記憶體控制器
US9245653B2 (en) 2010-03-15 2016-01-26 Intelligent Intellectual Property Holdings 2 Llc Reduced level cell mode for non-volatile memory
JP5404483B2 (ja) 2010-03-17 2014-01-29 株式会社東芝 メモリシステム
JP5066209B2 (ja) 2010-03-18 2012-11-07 株式会社東芝 コントローラ、データ記憶装置、及びプログラム
JP2012008651A (ja) 2010-06-22 2012-01-12 Toshiba Corp 半導体記憶装置、その制御方法および情報処理装置
US8417877B2 (en) * 2010-08-31 2013-04-09 Micron Technology, Inc Stripe-based non-volatile multilevel memory operation
JP2012128643A (ja) 2010-12-15 2012-07-05 Toshiba Corp メモリシステム
JP2012128644A (ja) 2010-12-15 2012-07-05 Toshiba Corp メモリシステム
JP2012128645A (ja) 2010-12-15 2012-07-05 Toshiba Corp メモリシステム
JP5651457B2 (ja) 2010-12-15 2015-01-14 株式会社東芝 半導体記憶装置
JP5535128B2 (ja) 2010-12-16 2014-07-02 株式会社東芝 メモリシステム
JP2012128816A (ja) * 2010-12-17 2012-07-05 Toshiba Corp メモリシステム
JP2012221251A (ja) 2011-04-08 2012-11-12 Toshiba Corp メモリシステムの制御方法、情報処理装置、及びプログラム
US8924636B2 (en) 2012-02-23 2014-12-30 Kabushiki Kaisha Toshiba Management information generating method, logical block constructing method, and semiconductor memory device
US9251055B2 (en) 2012-02-23 2016-02-02 Kabushiki Kaisha Toshiba Memory system and control method of memory system
JP5687648B2 (ja) 2012-03-15 2015-03-18 株式会社東芝 半導体記憶装置およびプログラム
JP5813589B2 (ja) * 2012-07-13 2015-11-17 株式会社東芝 メモリシステムおよびその制御方法
US9117530B2 (en) 2013-03-14 2015-08-25 Sandisk Technologies Inc. Preserving data from adjacent word lines while programming binary non-volatile storage elements
US9009568B2 (en) 2013-08-09 2015-04-14 Sandisk Technologies Inc. Sensing parameter management in non-volatile memory storage system to compensate for broken word lines
JP6121857B2 (ja) 2013-09-20 2017-04-26 株式会社東芝 メモリシステム
JP6517549B2 (ja) * 2015-03-13 2019-05-22 東芝メモリ株式会社 メモリコントローラ、記憶装置、データ転送システム、データ転送方法、及びデータ転送プログラム
JP2018041204A (ja) 2016-09-06 2018-03-15 東芝メモリ株式会社 メモリ装置及び情報処理システム
JP7030463B2 (ja) 2017-09-22 2022-03-07 キオクシア株式会社 メモリシステム
KR102492033B1 (ko) * 2018-03-26 2023-01-26 에스케이하이닉스 주식회사 메모리 장치 및 이를 포함하는 메모리 시스템
CN111949199B (zh) * 2019-05-16 2024-04-26 兆易创新科技集团股份有限公司 一种存储设备的数据写入方法、装置及存储设备

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JPWO2007000862A1 (ja) * 2005-06-24 2009-01-22 パナソニック株式会社 メモリコントローラ、不揮発性記憶装置、不揮発性記憶システム、及びデータ書き込み方法
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JP4660353B2 (ja) * 2005-11-01 2011-03-30 株式会社東芝 記憶媒体再生装置
JP4575288B2 (ja) * 2005-12-05 2010-11-04 株式会社東芝 記憶媒体、記憶媒体再生装置、記憶媒体再生方法および記憶媒体再生プログラム
US20070143561A1 (en) * 2005-12-21 2007-06-21 Gorobets Sergey A Methods for adaptive file data handling in non-volatile memories with a directly mapped file storage system
KR100706808B1 (ko) * 2006-02-03 2007-04-12 삼성전자주식회사 쓰기 버퍼로서 동작하는 불 휘발성 메모리를 구비한 데이터저장 장치 및 그것의 블록 회수 방법
JP2008217857A (ja) * 2007-02-28 2008-09-18 Toshiba Corp メモリコントローラ及び半導体装置
JP4564520B2 (ja) * 2007-08-31 2010-10-20 株式会社東芝 半導体記憶装置およびその制御方法
JP4538034B2 (ja) * 2007-09-26 2010-09-08 株式会社東芝 半導体記憶装置、及びその制御方法
JP4653817B2 (ja) * 2008-03-01 2011-03-16 株式会社東芝 メモリシステム

Also Published As

Publication number Publication date
KR20100073971A (ko) 2010-07-01
TW201027555A (en) 2010-07-16
JP2010146469A (ja) 2010-07-01
JP4551958B2 (ja) 2010-09-29
US20100161885A1 (en) 2010-06-24
TWI440042B (zh) 2014-06-01
CN101763894A (zh) 2010-06-30
EP2200045B1 (de) 2011-11-09
EP2200045A1 (de) 2010-06-23
CN103151073A (zh) 2013-06-12
CN101763894B (zh) 2013-05-01
KR101121698B1 (ko) 2012-02-28
EP2309517A1 (de) 2011-04-13

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