ATE532183T1 - Erhöhter lesedurchsatz bei einem nichtflüchtigen speicher - Google Patents
Erhöhter lesedurchsatz bei einem nichtflüchtigen speicherInfo
- Publication number
- ATE532183T1 ATE532183T1 AT09754332T AT09754332T ATE532183T1 AT E532183 T1 ATE532183 T1 AT E532183T1 AT 09754332 T AT09754332 T AT 09754332T AT 09754332 T AT09754332 T AT 09754332T AT E532183 T1 ATE532183 T1 AT E532183T1
- Authority
- AT
- Austria
- Prior art keywords
- storage elements
- interest
- sensing
- volatile memory
- data
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5642—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/32—Timing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
- G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/562—Multilevel memory programming aspects
- G11C2211/5621—Multilevel programming verification
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/127,136 US7952928B2 (en) | 2008-05-27 | 2008-05-27 | Increasing read throughput in non-volatile memory |
| PCT/IL2009/000514 WO2009144713A1 (en) | 2008-05-27 | 2009-05-24 | Increasing read throughput in non-volatile memory |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE532183T1 true ATE532183T1 (de) | 2011-11-15 |
Family
ID=40942813
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT09754332T ATE532183T1 (de) | 2008-05-27 | 2009-05-24 | Erhöhter lesedurchsatz bei einem nichtflüchtigen speicher |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US7952928B2 (de) |
| EP (1) | EP2291848B1 (de) |
| JP (1) | JP5250103B2 (de) |
| KR (1) | KR101518437B1 (de) |
| CN (1) | CN102067238B (de) |
| AT (1) | ATE532183T1 (de) |
| TW (1) | TW200951962A (de) |
| WO (1) | WO2009144713A1 (de) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI399644B (zh) * | 2009-12-24 | 2013-06-21 | Univ Nat Taiwan | 非揮發記憶體區塊管理方法 |
| JP5385435B1 (ja) * | 2012-07-18 | 2014-01-08 | 力晶科技股▲ふん▼有限公司 | 不揮発性半導体記憶装置とその読み出し方法 |
| KR102090677B1 (ko) | 2013-09-16 | 2020-03-18 | 삼성전자주식회사 | 비휘발성 메모리 장치 및 그것의 동작 방법 |
| US9671818B2 (en) * | 2014-03-12 | 2017-06-06 | Kabushiki Kaisha Toshiba | Memory device |
| US9595345B2 (en) * | 2014-08-07 | 2017-03-14 | Sandisk Technologies Llc | Adaptive selective bit line pre-charge for current savings and fast programming |
| KR102530327B1 (ko) * | 2018-06-01 | 2023-05-08 | 삼성전자주식회사 | 비휘발성 메모리 장치 및 그 동작 방법 |
| US10726922B2 (en) * | 2018-06-05 | 2020-07-28 | Sandisk Technologies Llc | Memory device with connected word lines for fast programming |
| US10983724B2 (en) * | 2018-09-14 | 2021-04-20 | Micron Technology, Inc. | Controller with distributed sequencer components |
| KR102599046B1 (ko) | 2018-11-16 | 2023-11-06 | 삼성전자주식회사 | 리커버리 동작을 수행하는 메모리 컨트롤러, 이의 동작 방법 및 이를 포함하는 메모리 시스템 |
| US20200243121A1 (en) * | 2019-01-30 | 2020-07-30 | Macronix International Co., Ltd. | Non-volatile memory and program method thereof |
Family Cites Families (45)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4425633A (en) | 1980-10-06 | 1984-01-10 | Mostek Corporation | Variable delay circuit for emulating word line delay |
| KR960002006B1 (ko) | 1991-03-12 | 1996-02-09 | 가부시끼가이샤 도시바 | 2개의 기준 레벨을 사용하는 기록 검증 제어기를 갖는 전기적으로 소거 가능하고 프로그램 가능한 불휘발성 메모리 장치 |
| US6222762B1 (en) | 1992-01-14 | 2001-04-24 | Sandisk Corporation | Multi-state memory |
| US5555204A (en) | 1993-06-29 | 1996-09-10 | Kabushiki Kaisha Toshiba | Non-volatile semiconductor memory device |
| KR0169267B1 (ko) | 1993-09-21 | 1999-02-01 | 사토 후미오 | 불휘발성 반도체 기억장치 |
| US5903495A (en) | 1996-03-18 | 1999-05-11 | Kabushiki Kaisha Toshiba | Semiconductor device and memory system |
| JPH09282889A (ja) | 1996-04-09 | 1997-10-31 | Toshiba Corp | 半導体装置 |
| US5901092A (en) | 1997-08-22 | 1999-05-04 | Micron Technology, Inc. | Memory device having pipelined access and method for pipelining data access |
| JPH11177071A (ja) | 1997-12-11 | 1999-07-02 | Toshiba Corp | 不揮発性半導体記憶装置 |
| US6201757B1 (en) | 1998-08-20 | 2001-03-13 | Texas Instruments Incorporated | Self-timed memory reset circuitry |
| US6038169A (en) | 1999-03-18 | 2000-03-14 | Halo Lsi Design & Device Technology, Inc. | Read reference scheme for flash memory |
| US6434736B1 (en) * | 1999-07-08 | 2002-08-13 | Intel Corporation | Location based timing scheme in memory design |
| JP4492897B2 (ja) | 2000-06-15 | 2010-06-30 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
| IT1318158B1 (it) | 2000-07-13 | 2003-07-23 | St Microelectronics Srl | Dispositivo circuitale per effettuare una decodifica gerarchica diriga in dispositivi di memoria non-volatile. |
| JP2002074970A (ja) * | 2000-08-31 | 2002-03-15 | Matsushita Electric Ind Co Ltd | 半導体記憶装置 |
| US6522580B2 (en) | 2001-06-27 | 2003-02-18 | Sandisk Corporation | Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states |
| US6456528B1 (en) | 2001-09-17 | 2002-09-24 | Sandisk Corporation | Selective operation of a multi-state non-volatile memory system in a binary mode |
| US6501695B1 (en) | 2002-01-11 | 2002-12-31 | Lsi Logic Corporation | Technique for the reduction of memory access time variation |
| JP2004087002A (ja) * | 2002-08-27 | 2004-03-18 | Fujitsu Ltd | Ａｃセンス方式のメモリ回路 |
| US6859397B2 (en) | 2003-03-05 | 2005-02-22 | Sandisk Corporation | Source side self boosting technique for non-volatile memory |
| KR100543448B1 (ko) | 2003-04-03 | 2006-01-23 | 삼성전자주식회사 | 버스트 읽기 동작 모드를 갖는 플래시 메모리 장치 |
| US7237074B2 (en) | 2003-06-13 | 2007-06-26 | Sandisk Corporation | Tracking cells for a memory system |
| US6917542B2 (en) | 2003-07-29 | 2005-07-12 | Sandisk Corporation | Detecting over programmed memory |
| JP3984209B2 (ja) | 2003-07-31 | 2007-10-03 | 株式会社東芝 | 半導体記憶装置 |
| JP4157065B2 (ja) | 2004-03-29 | 2008-09-24 | 株式会社東芝 | 半導体記憶装置 |
| US7190614B2 (en) * | 2004-06-17 | 2007-03-13 | Macronix International Co., Ltd. | Operation scheme for programming charge trapping non-volatile memory |
| JP4189395B2 (ja) | 2004-07-28 | 2008-12-03 | シャープ株式会社 | 不揮発性半導体記憶装置及び読み出し方法 |
| US7064981B2 (en) | 2004-08-04 | 2006-06-20 | Micron Technology, Inc. | NAND string wordline delay reduction |
| US7251160B2 (en) | 2005-03-16 | 2007-07-31 | Sandisk Corporation | Non-volatile memory and method with power-saving read and program-verify operations |
| US7295472B2 (en) * | 2005-04-11 | 2007-11-13 | Stmicroelectronics S.R.L. | Integrated electronic non-volatile memory device having nand structure |
| US7158442B1 (en) | 2005-05-23 | 2007-01-02 | Spansion Llc | Flexible latency in flash memory |
| US7366040B2 (en) | 2005-10-28 | 2008-04-29 | Elite Semicondutor Memory Technology, Inc. | Method of reducing settling time in flash memories and improved flash memory |
| EP1788575B1 (de) * | 2005-11-18 | 2010-01-20 | STMicroelectronics S.r.l. | Zugriffsverfahren beim Lesen, Schreiben und Löschen eines nicht flüchtigen NAND Speichers |
| KR100669349B1 (ko) | 2005-12-02 | 2007-01-16 | 삼성전자주식회사 | 플래시 메모리 장치 및 그것의 읽기 방법 |
| KR100706816B1 (ko) | 2006-03-10 | 2007-04-12 | 삼성전자주식회사 | 프로그램 속도를 향상시킬 수 있는 불휘발성 메모리 장치및 그것의 프로그램 방법 |
| JP4302117B2 (ja) * | 2006-04-17 | 2009-07-22 | 株式会社東芝 | 不揮発性半導体記憶装置 |
| US7684243B2 (en) * | 2006-08-31 | 2010-03-23 | Micron Technology, Inc. | Reducing read failure in a memory device |
| US7734861B2 (en) * | 2006-09-08 | 2010-06-08 | Sandisk Corporation | Pseudo random and command driven bit compensation for the cycling effects in flash memory |
| US7705387B2 (en) * | 2006-09-28 | 2010-04-27 | Sandisk Corporation | Non-volatile memory with local boosting control implant |
| US7696035B2 (en) * | 2006-11-13 | 2010-04-13 | Sandisk Corporation | Method for fabricating non-volatile memory with boost structures |
| US7623387B2 (en) * | 2006-12-12 | 2009-11-24 | Sandisk Corporation | Non-volatile storage with early source-side boosting for reducing program disturb |
| US7616506B2 (en) * | 2006-12-28 | 2009-11-10 | Sandisk Corporation | Systems for complete word line look ahead with efficient data latch assignment in non-volatile memory read operations |
| US7606071B2 (en) * | 2007-04-24 | 2009-10-20 | Sandisk Corporation | Compensating source voltage drop in non-volatile storage |
| US7606079B2 (en) * | 2007-04-25 | 2009-10-20 | Sandisk Corporation | Reducing power consumption during read operations in non-volatile storage |
| US7613045B2 (en) * | 2007-11-26 | 2009-11-03 | Sandisk Il, Ltd. | Operation sequence and commands for measuring threshold voltage distribution in memory |
-
2008
- 2008-05-27 US US12/127,136 patent/US7952928B2/en active Active
-
2009
- 2009-05-24 WO PCT/IL2009/000514 patent/WO2009144713A1/en active Application Filing
- 2009-05-24 JP JP2011511159A patent/JP5250103B2/ja not_active Expired - Fee Related
- 2009-05-24 EP EP09754332A patent/EP2291848B1/de not_active Not-in-force
- 2009-05-24 AT AT09754332T patent/ATE532183T1/de active
- 2009-05-24 CN CN2009801191431A patent/CN102067238B/zh active Active
- 2009-05-24 KR KR1020107029189A patent/KR101518437B1/ko not_active IP Right Cessation
- 2009-05-25 TW TW098117323A patent/TW200951962A/zh unknown
Also Published As
| Publication number | Publication date |
|---|---|
| WO2009144713A1 (en) | 2009-12-03 |
| EP2291848B1 (de) | 2011-11-02 |
| JP2011522346A (ja) | 2011-07-28 |
| KR101518437B1 (ko) | 2015-05-11 |
| EP2291848A1 (de) | 2011-03-09 |
| CN102067238B (zh) | 2013-11-06 |
| TW200951962A (en) | 2009-12-16 |
| KR20110037970A (ko) | 2011-04-13 |
| US20090296487A1 (en) | 2009-12-03 |
| US7952928B2 (en) | 2011-05-31 |
| JP5250103B2 (ja) | 2013-07-31 |
| CN102067238A (zh) | 2011-05-18 |
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