ATE486351T1 - Verfahren und vorrichtung zur verbesserung der speicherleistung mithilfe der hintergrundlöschung - Google Patents

Verfahren und vorrichtung zur verbesserung der speicherleistung mithilfe der hintergrundlöschung

Info

Publication number
ATE486351T1
ATE486351T1 AT07795303T AT07795303T ATE486351T1 AT E486351 T1 ATE486351 T1 AT E486351T1 AT 07795303 T AT07795303 T AT 07795303T AT 07795303 T AT07795303 T AT 07795303T AT E486351 T1 ATE486351 T1 AT E486351T1
Authority
AT
Austria
Prior art keywords
background
receiving
storage performance
block address
improving storage
Prior art date
Application number
AT07795303T
Other languages
English (en)
Inventor
Frankie Roohparvar
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=38749332&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=ATE486351(T1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Application granted granted Critical
Publication of ATE486351T1 publication Critical patent/ATE486351T1/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/102—External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)
  • Separation Of Suspended Particles By Flocculating Agents (AREA)
  • Pharmaceuticals Containing Other Organic And Inorganic Compounds (AREA)
AT07795303T 2006-05-25 2007-05-23 Verfahren und vorrichtung zur verbesserung der speicherleistung mithilfe der hintergrundlöschung ATE486351T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/442,514 US7564721B2 (en) 2006-05-25 2006-05-25 Method and apparatus for improving storage performance using a background erase
PCT/US2007/012416 WO2007139901A2 (en) 2006-05-25 2007-05-23 Method and apparatus for improving storage performance using a background erase

Publications (1)

Publication Number Publication Date
ATE486351T1 true ATE486351T1 (de) 2010-11-15

Family

ID=38749332

Family Applications (1)

Application Number Title Priority Date Filing Date
AT07795303T ATE486351T1 (de) 2006-05-25 2007-05-23 Verfahren und vorrichtung zur verbesserung der speicherleistung mithilfe der hintergrundlöschung

Country Status (7)

Country Link
US (2) US7564721B2 (de)
EP (1) EP2022059B1 (de)
KR (1) KR101060799B1 (de)
CN (1) CN101479806B (de)
AT (1) ATE486351T1 (de)
DE (1) DE602007010129D1 (de)
WO (1) WO2007139901A2 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8300477B2 (en) * 2008-03-03 2012-10-30 Rambus, Inc. Piecewise erasure of flash memory
CN102103885B (zh) * 2009-12-21 2013-08-28 上海华虹集成电路有限责任公司 Sd卡清除忙状态的方法及清除忙状态电路
US8406076B2 (en) * 2010-06-28 2013-03-26 Sandisk Technologies Inc. FRDY pull-up resistor activation
US9329990B2 (en) * 2013-01-11 2016-05-03 Micron Technology, Inc. Host controlled enablement of automatic background operations in a memory device
KR20150075886A (ko) 2013-12-26 2015-07-06 에스케이하이닉스 주식회사 메모리 시스템 및 그것의 동작 방법
KR102285462B1 (ko) 2014-03-26 2021-08-05 삼성전자주식회사 불휘발성 메모리 및 메모리 컨트롤러를 포함하는 메모리 시스템의 동작 방법
KR102413755B1 (ko) * 2015-11-20 2022-06-28 삼성전자주식회사 리텐션 특성에 의한 성능 저하를 복구하는 저장 장치의 동작 방법 및 이를 포함하는 데이터 처리 시스템의 동작 방법
US20180239532A1 (en) 2017-02-23 2018-08-23 Western Digital Technologies, Inc. Techniques for performing a non-blocking control sync operation
KR20190120966A (ko) * 2018-04-17 2019-10-25 에스케이하이닉스 주식회사 저장 장치 및 그 동작 방법
EP3791279A4 (de) * 2018-05-11 2022-01-26 Cigent Technology, Inc. Verfahren und system für verbesserte datensteuerung und -zugriff
US11152054B2 (en) * 2019-08-28 2021-10-19 Micron Technology, Inc. Apparatuses and methods for performing background operations in memory using sensing circuitry
US11899577B2 (en) * 2020-11-24 2024-02-13 Micron Technology, Inc. Selective garbage collection
US11816349B2 (en) 2021-11-03 2023-11-14 Western Digital Technologies, Inc. Reduce command latency using block pre-erase

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5341330A (en) 1992-10-30 1994-08-23 Intel Corporation Method for writing to a flash memory array during erase suspend intervals
US20010052062A1 (en) * 1994-03-01 2001-12-13 G. Jack Lipovski Parallel computer within dynamic random access memory
US5933847A (en) * 1995-09-28 1999-08-03 Canon Kabushiki Kaisha Selecting erase method based on type of power supply for flash EEPROM
US5822584A (en) * 1995-10-13 1998-10-13 Compaq Computer Corporation User selectable priority for disk array background operations
US5867641A (en) 1995-10-27 1999-02-02 Scm Microsystems (U.S.) Inc. Flash translation layer cleanup system and method
US6279069B1 (en) 1996-12-26 2001-08-21 Intel Corporation Interface for flash EEPROM memory arrays
US6643731B2 (en) 1999-12-31 2003-11-04 Texas Instruments Incorporated Low cost memory management that resists power interruption
US6851026B1 (en) 2000-07-28 2005-02-01 Micron Technology, Inc. Synchronous flash memory with concurrent write and read operation
JP2002133878A (ja) 2000-10-23 2002-05-10 Hitachi Ltd 不揮発性記憶回路および半導体集積回路
KR100365725B1 (ko) 2000-12-27 2002-12-26 한국전자통신연구원 플래시 메모리를 이용한 파일 시스템에서 등급별 지움정책 및 오류 복구 방법
US6760805B2 (en) 2001-09-05 2004-07-06 M-Systems Flash Disk Pioneers Ltd. Flash management system for large page size
KR100449708B1 (ko) * 2001-11-16 2004-09-22 삼성전자주식회사 플래시 메모리 관리방법
US6977847B2 (en) 2001-11-23 2005-12-20 M-Systems Flash Disk Pioneers Ltd. Detecting partially erased units in flash devices
JP2003223792A (ja) 2002-01-25 2003-08-08 Hitachi Ltd 不揮発性メモリ及びメモリカード
US6621746B1 (en) 2002-02-27 2003-09-16 Microsoft Corporation Monitoring entropic conditions of a flash memory device as an indicator for invoking erasure operations
US6901499B2 (en) 2002-02-27 2005-05-31 Microsoft Corp. System and method for tracking data stored in a flash memory device
US6895464B2 (en) 2002-06-03 2005-05-17 Honeywell International Inc. Flash memory management system and method utilizing multiple block list windows
US6975538B2 (en) 2003-10-08 2005-12-13 Micron Technology, Inc. Memory block erasing in a flash memory device
US7383375B2 (en) 2003-12-30 2008-06-03 Sandisk Corporation Data run programming
US7535759B2 (en) 2004-06-04 2009-05-19 Micron Technology, Inc. Memory system with user configurable density/performance option
US8082382B2 (en) 2004-06-04 2011-12-20 Micron Technology, Inc. Memory device with user configurable density/performance
US7877539B2 (en) * 2005-02-16 2011-01-25 Sandisk Corporation Direct data file storage in flash memories
US20060184719A1 (en) * 2005-02-16 2006-08-17 Sinclair Alan W Direct data file storage implementation techniques in flash memories

Also Published As

Publication number Publication date
KR101060799B1 (ko) 2011-08-30
US20070274134A1 (en) 2007-11-29
CN101479806B (zh) 2012-10-10
EP2022059B1 (de) 2010-10-27
EP2022059A2 (de) 2009-02-11
WO2007139901A3 (en) 2008-03-20
CN101479806A (zh) 2009-07-08
US7742344B2 (en) 2010-06-22
DE602007010129D1 (de) 2010-12-09
US7564721B2 (en) 2009-07-21
KR20090025256A (ko) 2009-03-10
WO2007139901B1 (en) 2008-05-22
WO2007139901A2 (en) 2007-12-06
US20090257284A1 (en) 2009-10-15

Similar Documents

Publication Publication Date Title
ATE486351T1 (de) Verfahren und vorrichtung zur verbesserung der speicherleistung mithilfe der hintergrundlöschung
ATE535868T1 (de) Verfahren und vorrichtung zur aufzeichnung von datenadressen
ATE496372T1 (de) Vorrichtung und verfahren für speicheroperationen unter verwendung adressabhängiger bedingungen
ATE433158T1 (de) System und verfahren zur erkennung der breite eines datenbusses
WO2008050337A3 (en) Erase history-based flash writing method
WO2008084291A3 (en) Memory device performance enhancement through pre-erase mechanism
TW200703342A (en) Erasing non-volatile memory using individual verification and additional erasing of subsets of memory cells
ATE512441T1 (de) Bereitstellung von energiereduktion bei der datenspeicherung in einem speicher
WO2009072102A3 (en) System and methods employing mock thresholds to generate actual reading thresholds in flash memory devices
DE602006012098D1 (de) Verfahren und system zum organisieren von inzidenten aufzeichnungen in einem mobilfunkendgerät
ATE466337T1 (de) Verfahren und vorrichtung zur seitengruppierung in einem block
ATE467179T1 (de) Verfahren zum testen eines computerprogramms
TW200721016A (en) Memory system and method of writing into nonvolatile semiconductor memory
SG150449A1 (en) Method for creating a memory defect map and optimizing performance using the memory defect map
ATE372544T1 (de) Löschen eines gespeicherten datenmusters auf einem speicherungsmedium
ATE532183T1 (de) Erhöhter lesedurchsatz bei einem nichtflüchtigen speicher
GB2513081A (en) Writing new data of first block size to second block size using write-write mode
TW200943990A (en) Method and apparatus for improving performance of erasure sequence detection
DE602006020851D1 (de) System und verfahren zur abfallbehandlung
WO2010056551A3 (en) Systems and methods for erasing a memory
GB2441081A (en) Method,apparatus and system for posted write buffer for memory unidirectional full duplex interface
DE602006009662D1 (de) Verfahren zur Einengung der Schwellspannungsverteilung gelöschter Flash-Speicherzellen während Schreiboperationen
ATE425493T1 (de) Verfahren und vorrichtung zur festlegung eines startzustandes bei einem rechnersystem mit wenigstens zwei ausführungseinheiten durch markieren von registern
ATE534081T1 (de) Peripher gelieferte adressierung in einem einfachen dma
TW200641813A (en) Information recording medium, defect management method, information reading/writing device and information reading device

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties