ATE50895T1 - Integrierte schaltungsvorrichtung, die eingangssignale annimmt und ausgangssignale erzeugt auf den hoehen verschiedener logischer scharen. - Google Patents

Integrierte schaltungsvorrichtung, die eingangssignale annimmt und ausgangssignale erzeugt auf den hoehen verschiedener logischer scharen.

Info

Publication number
ATE50895T1
ATE50895T1 AT84904268T AT84904268T ATE50895T1 AT E50895 T1 ATE50895 T1 AT E50895T1 AT 84904268 T AT84904268 T AT 84904268T AT 84904268 T AT84904268 T AT 84904268T AT E50895 T1 ATE50895 T1 AT E50895T1
Authority
AT
Austria
Prior art keywords
logic
families
memory circuitry
integrated circuit
circuit device
Prior art date
Application number
AT84904268T
Other languages
English (en)
Inventor
Michael D Thompson
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of ATE50895T1 publication Critical patent/ATE50895T1/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/018—Coupling arrangements; Interface arrangements using bipolar transistors only
    • H03K19/01806—Interface arrangements
    • H03K19/01812—Interface arrangements with at least one differential stage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/10—Integrated device layouts

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Measurement Of Current Or Voltage (AREA)
  • Semiconductor Integrated Circuits (AREA)
AT84904268T 1984-11-02 1984-11-02 Integrierte schaltungsvorrichtung, die eingangssignale annimmt und ausgangssignale erzeugt auf den hoehen verschiedener logischer scharen. ATE50895T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP84904268A EP0216756B1 (de) 1984-11-02 1984-11-02 Integrierte schaltungsvorrichtung, die eingangssignale annimmt und ausgangssignale erzeugt auf den höhen verschiedener logischer scharen
PCT/US1984/001805 WO1986002792A1 (en) 1984-11-02 1984-11-02 Integrated circuit device accepting inputs and providing outputs at the levels of different logic families

Publications (1)

Publication Number Publication Date
ATE50895T1 true ATE50895T1 (de) 1990-03-15

Family

ID=22182320

Family Applications (1)

Application Number Title Priority Date Filing Date
AT84904268T ATE50895T1 (de) 1984-11-02 1984-11-02 Integrierte schaltungsvorrichtung, die eingangssignale annimmt und ausgangssignale erzeugt auf den hoehen verschiedener logischer scharen.

Country Status (5)

Country Link
EP (1) EP0216756B1 (de)
JP (1) JPS62500764A (de)
AT (1) ATE50895T1 (de)
DE (1) DE3481574D1 (de)
WO (1) WO1986002792A1 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4692641A (en) * 1986-02-13 1987-09-08 Burr-Brown Corporation Level shifting circuitry for serial-to-parallel converter
FR2599911B1 (fr) * 1986-06-06 1988-08-12 Radiotechnique Compelec Circuit convertisseur de niveaux logiques a trois etats
US4841175A (en) * 1987-01-23 1989-06-20 Siemens Aktiengesellschaft ECL-compatible input/output circuits in CMOS technology
JPH0683053B2 (ja) * 1987-10-30 1994-10-19 日本電気株式会社 レベル変換回路
US4857776A (en) * 1987-11-20 1989-08-15 Tandem Computers Incorporated True TTL output translator-driver with true ECL tri-state control
US4806800A (en) * 1987-11-20 1989-02-21 Tandem Computers Incorporated TTL-to-ECL input translator/driver circuit
AU623095B2 (en) * 1987-11-20 1992-05-07 Tandem Computers Incorporated True TTL to true ECL bi-directional tristatable translator driver circuit
JPH01279633A (ja) * 1988-05-02 1989-11-09 Nec Corp Ｅｃｌ−ｔｔｌレベル変換回路
EP0862127B1 (de) * 1994-01-19 2002-09-04 Matsushita Electric Industrial Co., Ltd. Verfahren zum Entwurf einer integrierten Halbleiter-Schaltung
TW305958B (de) * 1995-05-26 1997-05-21 Matsushita Electric Industrial Co Ltd
TWI487034B (zh) * 2010-09-24 2015-06-01 Au Optronics Corp 薄膜電晶體及其製造方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3959666A (en) * 1974-07-01 1976-05-25 Honeywell Information Systems, Inc. Logic level translator
US3974402A (en) * 1975-03-26 1976-08-10 Honeywell Information Systems, Inc. Logic level translator
US3986045A (en) * 1975-04-23 1976-10-12 Advanced Micro Devices, Inc. High speed logic level converter
US4135103A (en) * 1977-06-22 1979-01-16 Honeywell Inc. Logic transition circuits
JPS5631730U (de) * 1979-07-19 1981-03-27
US4368395A (en) * 1980-07-18 1983-01-11 Harris Corporation Differential linear to digital translator
JPS57162838A (en) * 1981-03-31 1982-10-06 Fujitsu Ltd Emitter coupling type logical circuit
US4472647A (en) * 1982-08-20 1984-09-18 Motorola, Inc. Circuit for interfacing with both TTL and CMOS voltage levels

Also Published As

Publication number Publication date
EP0216756A4 (de) 1987-07-30
WO1986002792A1 (en) 1986-05-09
EP0216756A1 (de) 1987-04-08
EP0216756B1 (de) 1990-03-07
DE3481574D1 (de) 1990-04-12
JPS62500764A (ja) 1987-03-26

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Legal Events

Date Code Title Description
UEP Publication of translation of european patent specification
REN Ceased due to non-payment of the annual fee