JPS56137733A - Electronic circuit - Google Patents

Electronic circuit

Info

Publication number
JPS56137733A
JPS56137733A JP4049380A JP4049380A JPS56137733A JP S56137733 A JPS56137733 A JP S56137733A JP 4049380 A JP4049380 A JP 4049380A JP 4049380 A JP4049380 A JP 4049380A JP S56137733 A JPS56137733 A JP S56137733A
Authority
JP
Japan
Prior art keywords
circuit
reference voltage
voltage terminal
level
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4049380A
Other languages
Japanese (ja)
Inventor
Kazuyoshi Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHIYOU LSI GIJUTSU KENKYU KUMIAI
Original Assignee
CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHIYOU LSI GIJUTSU KENKYU KUMIAI filed Critical CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority to JP4049380A priority Critical patent/JPS56137733A/en
Publication of JPS56137733A publication Critical patent/JPS56137733A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/018—Coupling arrangements; Interface arrangements using bipolar transistors only
    • H03K19/01806—Interface arrangements
    • H03K19/01812—Interface arrangements with at least one differential stage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00369—Modifications for compensating variations of temperature, supply voltage or other physical parameters
    • H03K19/00376—Modifications for compensating variations of temperature, supply voltage or other physical parameters in bipolar transistor circuits

Abstract

PURPOSE:To prevent malfunction due to potential fluctuations in signal transition, by providing a capacitor between a prescribed reference voltage terminal and an optional stable voltage terminal in a level converting circuit which includes a circuit performing level discrimination on the basis of a prescribed reference voltage and another circuit operating at a different power voltage from that of the said circuit. CONSTITUTION:Between reference potential terminal 0V and negative power voltage terminal -VEE, resistances R1 and R2, diodes Q7 and Q8, and resistance R3 are provided to constitute a voltage dividing circuit, and then a reference voltage for discrimination between Emitter Coupled Logic (ECL) levels [0] and [1] is obtained through the base and emitter of transistor TRQ5 whose base connects with the connection point of resistances R1 and R2 to discriminate level ECL applied to the base of TRQ2, so that a level conversion output will be obtained from the collector of output TRQ13. Next, providing capacitor C between reference voltage terminal VBB and negative voltage terminal -VEE stabilizes the reference voltage of the input circuit.
JP4049380A 1980-03-31 1980-03-31 Electronic circuit Pending JPS56137733A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4049380A JPS56137733A (en) 1980-03-31 1980-03-31 Electronic circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4049380A JPS56137733A (en) 1980-03-31 1980-03-31 Electronic circuit

Publications (1)

Publication Number Publication Date
JPS56137733A true JPS56137733A (en) 1981-10-27

Family

ID=12582092

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4049380A Pending JPS56137733A (en) 1980-03-31 1980-03-31 Electronic circuit

Country Status (1)

Country Link
JP (1) JPS56137733A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0765036A2 (en) * 1995-09-20 1997-03-26 Nec Corporation Level converter circuit converting input level into ECL-level against variation in power supply voltage

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0765036A2 (en) * 1995-09-20 1997-03-26 Nec Corporation Level converter circuit converting input level into ECL-level against variation in power supply voltage
EP0765036A3 (en) * 1995-09-20 1998-04-01 Nec Corporation Level converter circuit converting input level into ECL-level against variation in power supply voltage
US5869994A (en) * 1995-09-20 1999-02-09 Nec Corporation Level converter circuit converting input level into ECL-level against variation in power supply voltage

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