JPS54125958A - Ttl circuit - Google Patents

Ttl circuit

Info

Publication number
JPS54125958A
JPS54125958A JP3307578A JP3307578A JPS54125958A JP S54125958 A JPS54125958 A JP S54125958A JP 3307578 A JP3307578 A JP 3307578A JP 3307578 A JP3307578 A JP 3307578A JP S54125958 A JPS54125958 A JP S54125958A
Authority
JP
Japan
Prior art keywords
level
collector
vout
circuit
low level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3307578A
Other languages
Japanese (ja)
Inventor
Masao Mizukami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP3307578A priority Critical patent/JPS54125958A/en
Publication of JPS54125958A publication Critical patent/JPS54125958A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/088—Transistor-transistor logic
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/013—Modifications for accelerating switching in bipolar transistor circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Power Engineering (AREA)

Abstract

PURPOSE:To reduce the delay time and then to obtain easily the output level which is lower than the power voltage by an optional amount of level by inserting the clamping circuit in which plural units of the pn junction means are connected in series between the collector of the transistor and the reference potential terminal. CONSTITUTION:The series circuit of diodes D1-D6 is connected between the collector of transistor TrQ2 and the earth. With this TTL circuit, TrQ1 does not conduct in the case of all input are at the high level, and Q4 is turned on with output Vout at the low level. When either input features the low level, Q1 conducts to turn TrQ3 on with Vout being leveled up suddenly. Here, the collector level of Q2 is regulated by clamping circuits D1-D6 provided between the collector of Q2 and the earth. Thus, the level of Vout features 6VF-2VF=4VF 2.4-2.8V (2VF: base-emitter junction voltage between Q3 and Q3a), and so Vout can be set to the value near high-level side regulated value VIH=2V. As a result, delay time tLOSS can be reduced when the high level changes to the low level.
JP3307578A 1978-03-24 1978-03-24 Ttl circuit Pending JPS54125958A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3307578A JPS54125958A (en) 1978-03-24 1978-03-24 Ttl circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3307578A JPS54125958A (en) 1978-03-24 1978-03-24 Ttl circuit

Publications (1)

Publication Number Publication Date
JPS54125958A true JPS54125958A (en) 1979-09-29

Family

ID=12376590

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3307578A Pending JPS54125958A (en) 1978-03-24 1978-03-24 Ttl circuit

Country Status (1)

Country Link
JP (1) JPS54125958A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59122126A (en) * 1982-12-23 1984-07-14 インタ−ナシヨナル　ビジネス　マシ−ンズ　コ−ポレ−シヨン Ttl circuit
US6218882B1 (en) 1995-12-23 2001-04-17 Nec Corporation Diode circuit for clamping the signals on a transmission line to a predetermined potential

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5132258A (en) * 1974-09-13 1976-03-18 Hitachi Ltd

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5132258A (en) * 1974-09-13 1976-03-18 Hitachi Ltd

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59122126A (en) * 1982-12-23 1984-07-14 インタ−ナシヨナル　ビジネス　マシ−ンズ　コ−ポレ−シヨン Ttl circuit
JPH0449812B2 (en) * 1982-12-23 1992-08-12 Intaanashonaru Bijinesu Mashiinzu Corp
US6218882B1 (en) 1995-12-23 2001-04-17 Nec Corporation Diode circuit for clamping the signals on a transmission line to a predetermined potential

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