ATE485555T1 - System mit mehreren komponenten - Google Patents

System mit mehreren komponenten

Info

Publication number
ATE485555T1
ATE485555T1 AT08252138T AT08252138T ATE485555T1 AT E485555 T1 ATE485555 T1 AT E485555T1 AT 08252138 T AT08252138 T AT 08252138T AT 08252138 T AT08252138 T AT 08252138T AT E485555 T1 ATE485555 T1 AT E485555T1
Authority
AT
Austria
Prior art keywords
cpu
reset signal
components
component
resetting
Prior art date
Application number
AT08252138T
Other languages
English (en)
Inventor
Norihisa Yanagihara
Hajime Kihara
Tsutomu Yamada
Makiko Naemura
Kenji Seino
Original Assignee
Hitachi Ind Equipment Sys
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ind Equipment Sys filed Critical Hitachi Ind Equipment Sys
Application granted granted Critical
Publication of ATE485555T1 publication Critical patent/ATE485555T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/24—Resetting means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
    • G06F11/0724—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU] in a multiprocessor or a multi-core unit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0793—Remedial or corrective actions

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Debugging And Monitoring (AREA)
  • Retry When Errors Occur (AREA)
  • Multi Processors (AREA)
  • Hardware Redundancy (AREA)
  • Developing Agents For Electrophotography (AREA)
AT08252138T 2007-06-25 2008-06-20 System mit mehreren komponenten ATE485555T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007166383A JP5063212B2 (ja) 2007-06-25 2007-06-25 複数コンポーネントシステム

Publications (1)

Publication Number Publication Date
ATE485555T1 true ATE485555T1 (de) 2010-11-15

Family

ID=39735218

Family Applications (1)

Application Number Title Priority Date Filing Date
AT08252138T ATE485555T1 (de) 2007-06-25 2008-06-20 System mit mehreren komponenten

Country Status (6)

Country Link
US (1) US7861115B2 (de)
EP (1) EP2012217B1 (de)
JP (1) JP5063212B2 (de)
CN (1) CN101334746B (de)
AT (1) ATE485555T1 (de)
DE (1) DE602008003063D1 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101770268B (zh) * 2009-12-28 2014-06-11 中兴通讯股份有限公司 智能终端复位方法及装置
US20130074187A1 (en) * 2010-07-26 2013-03-21 Ki Yong Kim Hacker virus security-integrated control device
US9690645B2 (en) * 2012-12-04 2017-06-27 Hewlett Packard Enterprise Development Lp Determining suspected root causes of anomalous network behavior
CN103530197B (zh) * 2013-10-29 2017-06-13 浙江宇视科技有限公司 一种检测及解决Linux系统死锁的方法
US10606702B2 (en) * 2016-11-17 2020-03-31 Ricoh Company, Ltd. System, information processing apparatus, and method for rebooting a part corresponding to a cause identified
JP6750489B2 (ja) 2016-12-06 2020-09-02 株式会社リコー 電子機器、画像形成装置、制御方法、およびプログラム
CN109426321A (zh) * 2017-08-29 2019-03-05 深圳市三诺数字科技有限公司 一种充电复位电路及电子设备

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS589488A (ja) * 1981-07-09 1983-01-19 Pioneer Electronic Corp 複数の中央演算処理装置を有するシステムの中央演算処理装置の復帰機構
JPS6377244A (ja) * 1986-09-19 1988-04-07 Nippon Denso Co Ltd 通信制御装置
US5086505A (en) * 1989-06-30 1992-02-04 Motorola, Inc. Selective individual reset apparatus and method
JPH04295956A (ja) * 1991-03-25 1992-10-20 Oki Electric Ind Co Ltd テレメータ装置
EP0509479B1 (de) * 1991-04-16 1998-10-14 Nec Corporation Multiprozessorssystem
JPH0573344A (ja) * 1991-09-12 1993-03-26 Mitsubishi Electric Corp 計算機システム
JP2729121B2 (ja) * 1991-11-21 1998-03-18 甲府日本電気株式会社 演算処理装置
JPH05216855A (ja) * 1992-02-04 1993-08-27 Fujitsu Ltd マルチｃｐｕ制御方式
JP3240679B2 (ja) * 1992-04-09 2001-12-17 富士通株式会社 マルチｃｐｕシステムのリセット方式
JP3684590B2 (ja) * 1994-04-25 2005-08-17 カシオ計算機株式会社 リセット制御装置及びリセット制御方法
GB2290891B (en) * 1994-06-29 1999-02-17 Mitsubishi Electric Corp Multiprocessor system
JPH09319467A (ja) 1996-05-29 1997-12-12 Hitachi Ltd バス接続システム
JP3266841B2 (ja) 1997-12-15 2002-03-18 株式会社日立製作所 通信制御装置
US6393590B1 (en) * 1998-12-22 2002-05-21 Nortel Networks Limited Method and apparatus for ensuring proper functionality of a shared memory, multiprocessor system
JP3266192B2 (ja) * 1999-01-06 2002-03-18 日本電気株式会社 動作監視方法とそのシステム
US6714996B1 (en) * 1999-08-30 2004-03-30 Mitsubishi Denki Kabushiki Kaisha Programmable controller system and method for resetting programmable controller system
US20020152425A1 (en) * 2001-04-12 2002-10-17 David Chaiken Distributed restart in a multiple processor system
US6912670B2 (en) * 2002-01-22 2005-06-28 International Business Machines Corporation Processor internal error handling in an SMP server
US7137020B2 (en) * 2002-05-17 2006-11-14 Sun Microsystems, Inc. Method and apparatus for disabling defective components in a computer system
JP2004005280A (ja) 2002-05-31 2004-01-08 Omron Corp プログラマブルコントローラ及びｃｐｕユニット
US20050086460A1 (en) * 2003-10-15 2005-04-21 Chang-Shu Huang Apparatus and method for wakeup on LAN
GB2415799A (en) * 2004-06-30 2006-01-04 Nec Technologies Independent processor resetting in a multiprocessor system
JP4529767B2 (ja) * 2005-04-04 2010-08-25 株式会社日立製作所 クラスタ構成コンピュータシステム及びその系リセット方法
US8176302B2 (en) * 2005-10-25 2012-05-08 Nxp B.V. Data processing arrangement comprising a reset facility

Also Published As

Publication number Publication date
EP2012217B1 (de) 2010-10-20
CN101334746B (zh) 2011-11-16
DE602008003063D1 (de) 2010-12-02
US7861115B2 (en) 2010-12-28
US20090013221A1 (en) 2009-01-08
JP2009003862A (ja) 2009-01-08
CN101334746A (zh) 2008-12-31
EP2012217A1 (de) 2009-01-07
JP5063212B2 (ja) 2012-10-31

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Legal Events

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