ATE406744T1 - Demodulator für psk-signale, mit korrektur von gleichspannungsverschiebungen - Google Patents

Demodulator für psk-signale, mit korrektur von gleichspannungsverschiebungen

Info

Publication number
ATE406744T1
ATE406744T1 AT00302483T AT00302483T ATE406744T1 AT E406744 T1 ATE406744 T1 AT E406744T1 AT 00302483 T AT00302483 T AT 00302483T AT 00302483 T AT00302483 T AT 00302483T AT E406744 T1 ATE406744 T1 AT E406744T1
Authority
AT
Austria
Prior art keywords
demodulator
correction
voltage shift
level
difference delta
Prior art date
Application number
AT00302483T
Other languages
English (en)
Inventor
Kazuaki Yoshie
Original Assignee
Sanyo Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co filed Critical Sanyo Electric Co
Application granted granted Critical
Publication of ATE406744T1 publication Critical patent/ATE406744T1/de

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/20—Adaptations for transmission via a GHz frequency band, e.g. via satellite
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22—Demodulator circuits; Receiver circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/061—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset
    • H04L25/063—Setting decision thresholds using feedback techniques only

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Astronomy & Astrophysics (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Circuits Of Receivers In General (AREA)
AT00302483T 1999-03-25 2000-03-27 Demodulator für psk-signale, mit korrektur von gleichspannungsverschiebungen ATE406744T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11081787A JP2000278341A (ja) 1999-03-25 1999-03-25 直交位相復調回路

Publications (1)

Publication Number Publication Date
ATE406744T1 true ATE406744T1 (de) 2008-09-15

Family

ID=13756210

Family Applications (1)

Application Number Title Priority Date Filing Date
AT00302483T ATE406744T1 (de) 1999-03-25 2000-03-27 Demodulator für psk-signale, mit korrektur von gleichspannungsverschiebungen

Country Status (8)

Country Link
US (1) US6731698B1 (de)
EP (1) EP1039703B1 (de)
JP (1) JP2000278341A (de)
KR (1) KR100394200B1 (de)
CN (1) CN1214632C (de)
AT (1) ATE406744T1 (de)
DE (1) DE60040032D1 (de)
TW (1) TW462168B (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2363927C (en) * 2000-11-28 2004-07-06 Research In Motion Limited Synchronization signal detector and method
EP1223717B1 (de) 2001-01-15 2006-08-02 Lucent Technologies Inc. Verfahren zur Maximum-Likelihood-Bestimmung unter Verwendung eines Empfängers mit Sequenzschätzung
US7778365B2 (en) 2001-04-27 2010-08-17 The Directv Group, Inc. Satellite TWTA on-line non-linearity measurement
WO2004040403A2 (en) 2001-04-27 2004-05-13 The Directv Group, Inc. Lower complexity layered modulation signal processor
US7209524B2 (en) * 2001-04-27 2007-04-24 The Directv Group, Inc. Layered modulation for digital signals
US7822154B2 (en) 2001-04-27 2010-10-26 The Directv Group, Inc. Signal, interference and noise power measurement
US7639759B2 (en) * 2001-04-27 2009-12-29 The Directv Group, Inc. Carrier to noise ratio estimations from a received signal
US7423987B2 (en) 2001-04-27 2008-09-09 The Directv Group, Inc. Feeder link configurations to support layered modulation for digital signals
US7471735B2 (en) 2001-04-27 2008-12-30 The Directv Group, Inc. Maximizing power and spectral efficiencies for layered and conventional modulations
US7583728B2 (en) 2002-10-25 2009-09-01 The Directv Group, Inc. Equalizers for layered modulated and other signals
US8005035B2 (en) 2001-04-27 2011-08-23 The Directv Group, Inc. Online output multiplexer filter measurement
EP1271872A1 (de) * 2001-06-28 2003-01-02 Nokia Corporation Verfahren und Vorrichtung zur Schätzung der Gleichspannungsverschiebung eines Signals
ES2604453T3 (es) 2002-07-03 2017-03-07 The Directv Group, Inc. Método y aparato para modulación en capas
KR100505669B1 (ko) * 2003-02-05 2005-08-03 삼성전자주식회사 디지털 텔레비전 수신 시스템의 복조 회로 및 복조 방법
KR100575938B1 (ko) * 2003-03-13 2006-05-02 한국과학기술원 이동통신시스템에서 주파수 오프셋 보상장치 및 방법
US20050259768A1 (en) * 2004-05-21 2005-11-24 Oki Techno Centre (Singapore) Pte Ltd Digital receiver and method for processing received signals
JP4488855B2 (ja) * 2004-09-27 2010-06-23 パナソニック株式会社 半導体回路装置
US20060067453A1 (en) * 2004-09-30 2006-03-30 Lucent Technologies Inc. Timing circuit for data packet receiver
JP4613685B2 (ja) * 2005-05-12 2011-01-19 株式会社村田製作所 受信装置

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0787476B2 (ja) * 1988-10-07 1995-09-20 日本電気株式会社 復調装置
JPH05207326A (ja) * 1992-01-28 1993-08-13 Matsushita Electric Ind Co Ltd 水平圧縮ｐｌｌ回路
WO1994029991A1 (fr) * 1993-06-07 1994-12-22 Kabushiki Kaisha Toshiba Detecteur de phase
JPH07212421A (ja) * 1994-01-19 1995-08-11 Toshiba Corp Ａｆｃ回路
EP0671829B1 (de) * 1994-03-11 2006-06-28 Fujitsu Limited Schaltungsanordnung zur Taktrückgewinnung
US5832043A (en) * 1995-04-03 1998-11-03 Motorola, Inc. System and method for maintaining continuous phase during up/down conversion of near-zero hertz intermediate frequencies
US5629960A (en) 1995-05-22 1997-05-13 Sierra Wireless, Inc. Method for reducing distortion effects on DC off-set voltage and symbol clock tracking in a demodulator
US5719908A (en) 1995-07-19 1998-02-17 Unisys Corporation Digital/analog bit synchronizer
FI961935A (fi) * 1996-05-07 1997-11-08 Nokia Mobile Phones Ltd Erojännitteen eliminointi ja AM-vaimennus suoramuunnosvastaanottimessa
JPH10327204A (ja) * 1997-05-26 1998-12-08 Nec Corp 等化器を用いた位相同期ループ回路
US6069524A (en) * 1998-12-23 2000-05-30 Zenith Electronics Corporation FPLL with third multiplier in an analog input signal
US6590950B1 (en) * 1999-02-22 2003-07-08 Zenith Electronics Corporation Bandwidth stabilized PLL

Also Published As

Publication number Publication date
JP2000278341A (ja) 2000-10-06
TW462168B (en) 2001-11-01
CN1214632C (zh) 2005-08-10
KR20000071475A (ko) 2000-11-25
KR100394200B1 (ko) 2003-08-06
EP1039703A2 (de) 2000-09-27
EP1039703B1 (de) 2008-08-27
DE60040032D1 (de) 2008-10-09
EP1039703A3 (de) 2003-12-10
CN1269670A (zh) 2000-10-11
US6731698B1 (en) 2004-05-04

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