ATE336105T1 - Datentaktrückgewinnungsschaltung - Google Patents

Datentaktrückgewinnungsschaltung

Info

Publication number
ATE336105T1
ATE336105T1 AT01915296T AT01915296T ATE336105T1 AT E336105 T1 ATE336105 T1 AT E336105T1 AT 01915296 T AT01915296 T AT 01915296T AT 01915296 T AT01915296 T AT 01915296T AT E336105 T1 ATE336105 T1 AT E336105T1
Authority
AT
Austria
Prior art keywords
data
input
circuit
recovery circuit
clock recovery
Prior art date
Application number
AT01915296T
Other languages
English (en)
Inventor
Cicero S Vaucher
Original Assignee
Koninkl Philips Electronics Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv filed Critical Koninkl Philips Electronics Nv
Application granted granted Critical
Publication of ATE336105T1 publication Critical patent/ATE336105T1/de

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/091Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector using a sampling device
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Communication Control (AREA)
AT01915296T 2000-03-07 2001-02-26 Datentaktrückgewinnungsschaltung ATE336105T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP00200804 2000-03-07

Publications (1)

Publication Number Publication Date
ATE336105T1 true ATE336105T1 (de) 2006-09-15

Family

ID=8171158

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01915296T ATE336105T1 (de) 2000-03-07 2001-02-26 Datentaktrückgewinnungsschaltung

Country Status (6)

Country Link
US (1) US7027544B2 (de)
EP (1) EP1183781B1 (de)
JP (1) JP2003526984A (de)
AT (1) ATE336105T1 (de)
DE (1) DE60122072T2 (de)
WO (1) WO2001067612A1 (de)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2375274A (en) * 2001-03-27 2002-11-06 Acuid Corp Ltd Receiver with automatic skew compensation
DE10132232C1 (de) * 2001-06-29 2002-11-21 Infineon Technologies Ag Phasendetektorschaltung für einen Phasenregelkreis
US6763294B2 (en) * 2002-05-06 2004-07-13 Deere & Company System and method for validating quadrature signals
CN1252924C (zh) 2002-05-30 2006-04-19 Ntt电子株式会社 相位比较电路和时钟数据恢复电路以及收发器电路
JP2006522540A (ja) * 2003-03-28 2006-09-28 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 多重送信用ラッチ付き線形位相検出器
WO2004086603A1 (en) * 2003-03-28 2004-10-07 Koninklijke Philips Electronics N.V. Frequency detector system with tri-state frequency control signal
EP1611673A1 (de) * 2003-03-28 2006-01-04 Koninklijke Philips Electronics N.V. Schneller linearer phasendetektor
US7627029B2 (en) 2003-05-20 2009-12-01 Rambus Inc. Margin test methods and circuits
US7408981B2 (en) * 2003-05-20 2008-08-05 Rambus Inc. Methods and circuits for performing margining tests in the presence of a decision feedback equalizer
US7590175B2 (en) * 2003-05-20 2009-09-15 Rambus Inc. DFE margin test methods and circuits that decouple sample and feedback timing
WO2005091026A1 (en) 2004-03-15 2005-09-29 Koninklijke Philips Electronics N.V. A light-guiding device and a method of guiding light
KR100574619B1 (ko) 2004-08-04 2006-04-27 삼성전자주식회사 수신 데이터 레이트의 4분의 1 주파수 클록으로 동작하는클록 데이터 복원 회로 및 그 동작 방법
KR20080012368A (ko) * 2005-05-24 2008-02-11 인터심볼 커뮤니케이션즈 인코포레이티드 클럭복원을 위한 패턴 의존성 위상 검출기
JP2007128633A (ja) * 2005-10-07 2007-05-24 Matsushita Electric Ind Co Ltd 半導体記憶装置及びこれを備えた送受信システム
US7916822B2 (en) * 2006-03-03 2011-03-29 Agere Systems Inc. Method and apparatus for reducing latency in a clock and data recovery (CDR) circuit
US8131242B2 (en) * 2007-07-02 2012-03-06 Sony Corporation System and method for implementing a swap function for an IQ generator
TWI405446B (zh) * 2008-03-06 2013-08-11 Tse Hsien Yeh 時脈資料復原裝置及取樣錯誤修正裝置
US8116366B2 (en) * 2008-04-28 2012-02-14 Renesas Electronics Corporation Delayed decision feedback sequence estimator
GB2488180A (en) * 2011-02-21 2012-08-22 Thales Holdings Uk Plc Recovering a clock signal by combining a plurality of measurements at a plurality of samples and selecting a sample as a clock sample
US8520793B2 (en) * 2011-04-20 2013-08-27 Faraday Technology Corp. Phase detector, phase detecting method, and clock-and-data recovery device
US8497708B2 (en) * 2011-05-06 2013-07-30 National Semiconductor Corporation Fractional-rate phase frequency detector
CN102504488A (zh) * 2011-11-02 2012-06-20 上海交通大学 一种球-棒状短碳纤维增强环氧树脂基复合材料的制备方法
US8664983B1 (en) * 2012-03-22 2014-03-04 Altera Corporation Priority control phase shifts for clock signals
JP6024489B2 (ja) * 2013-01-31 2016-11-16 富士通株式会社 クロック再生回路及びクロックデータ再生回路
JP6476659B2 (ja) * 2014-08-28 2019-03-06 富士通株式会社 信号再生回路および信号再生方法
CN106921386B (zh) * 2015-12-24 2019-11-01 瑞昱半导体股份有限公司 半速率时钟数据回复电路
TWI605694B (zh) * 2016-03-25 2017-11-11 智原科技股份有限公司 接收器損失信號的去雜訊裝置與方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5150364A (en) * 1990-08-24 1992-09-22 Hewlett-Packard Company Interleaved time-division demultiplexor
US5301196A (en) 1992-03-16 1994-04-05 International Business Machines Corporation Half-speed clock recovery and demultiplexer circuit
US5485484A (en) * 1993-12-21 1996-01-16 Unisys Corporation Digitally implemented phase and lock indicators for a bit synchronizer
EP0758171A3 (de) * 1995-08-09 1997-11-26 Symbios Logic Inc. Datenabtastung und -rückgewinnung
US5712580A (en) * 1996-02-14 1998-01-27 International Business Machines Corporation Linear phase detector for half-speed quadrature clocking architecture
DE19717586C1 (de) * 1997-04-25 1998-08-27 Siemens Ag Takt- und Datenregenerator für hohe Datenraten
US6347128B1 (en) * 1998-07-20 2002-02-12 Lucent Technologies Inc. Self-aligned clock recovery circuit with proportional phase detector
US6072337A (en) * 1998-12-18 2000-06-06 Cypress Semiconductor Corp. Phase detector
US6075416A (en) * 1999-04-01 2000-06-13 Cypress Semiconductor Corp. Method, architecture and circuit for half-rate clock and/or data recovery
WO2001006696A1 (en) * 1999-07-16 2001-01-25 Conexant Systems, Inc. Apparatus and method for servo-controlled self-centering phase detector
US6100722A (en) * 1999-07-28 2000-08-08 Cypress Semiconductor Corp. Phase detector with extended linear range

Also Published As

Publication number Publication date
EP1183781A1 (de) 2002-03-06
DE60122072T2 (de) 2007-03-01
JP2003526984A (ja) 2003-09-09
DE60122072D1 (de) 2006-09-21
EP1183781B1 (de) 2006-08-09
US7027544B2 (en) 2006-04-11
US20010031028A1 (en) 2001-10-18
WO2001067612A1 (en) 2001-09-13

Similar Documents

Publication Publication Date Title
DE60122072D1 (de) Datentaktrückgewinnungsschaltung
US7965111B2 (en) Method and apparatus for divider unit synchronization
KR940017100A (ko) 발진기 클럭신호 발생 집적회로 및 시스템과 발진기 제어방법
JPH09181712A (ja) 位相ロック・ループ(pll)内でのデータ標本化および回収
CN102075187A (zh) Cpt原子钟伺服电路
CA2201695A1 (en) Phase detector for high speed clock recovery from random binary signals
CN105223558A (zh) 一种超宽带任意波形信号产生方法
CN101882930B (zh) 一种用于全数字锁相环的时间-数字转换装置及方法
JP2014525182A (ja) マルチクロックリアルタイムカウンタ
TW200623642A (en) Clock and data recovery circuit
KR100359047B1 (ko) 두 위상의 디지털 위상 동기 루프 회로
CN101593221A (zh) 一种防止异域时钟动态切换毛刺的方法和电路
CN103141029A (zh) 采样器电路
DE60217847D1 (de) Schaltung zur erzeugung eines mehrphasigen taktsignals
US20070257714A1 (en) high speed dynamic frequency divider
DE60212688D1 (de) Daten- und taktrückgewinnungsschaltung und eine vorrichtung mehrerer dieser schaltungen enthaltend
CN110518884A (zh) 延时放大器
Hong et al. A 1.0 V, 5.4 pJ/bit GFSK demodulator based on an injection locked ring oscillator for low-IF receivers
CN208046589U (zh) 一种时钟移相电路
WO2005074138A3 (en) Programmable and pausable clock generation unit
Bommi et al. Adiabatic Configurable Reversible Synthesizer for 5G Applications
BR0116823A (pt) Circuito travado em fase
Pontikakis et al. A low-complexity high-speed clock generator for dynamic frequency scaling of FPGA and standard-cell based designs
CN202696580U (zh) 双调谐锁相式快跳源
Ramya Design and Implementation of Portable Signal Generator using AVR and Android App

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties