ATE268945T1 - Tiefgraben-dram-prozess auf soi für dram-zelle niedrigen leckstromes - Google Patents

Tiefgraben-dram-prozess auf soi für dram-zelle niedrigen leckstromes

Info

Publication number
ATE268945T1
ATE268945T1 AT95114657T AT95114657T ATE268945T1 AT E268945 T1 ATE268945 T1 AT E268945T1 AT 95114657 T AT95114657 T AT 95114657T AT 95114657 T AT95114657 T AT 95114657T AT E268945 T1 ATE268945 T1 AT E268945T1
Authority
AT
Austria
Prior art keywords
soi
deep trench
leakage current
low leakage
dram
Prior art date
Application number
AT95114657T
Other languages
English (en)
Inventor
Johann Alsmeier
Reinhard Johannes Stengl
Original Assignee
Infineon Technologies Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag filed Critical Infineon Technologies Ag
Application granted granted Critical
Publication of ATE268945T1 publication Critical patent/ATE268945T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Thin Film Transistor (AREA)
AT95114657T 1994-09-26 1995-09-18 Tiefgraben-dram-prozess auf soi für dram-zelle niedrigen leckstromes ATE268945T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/313,507 US5627092A (en) 1994-09-26 1994-09-26 Deep trench dram process on SOI for low leakage DRAM cell

Publications (1)

Publication Number Publication Date
ATE268945T1 true ATE268945T1 (de) 2004-06-15

Family

ID=23215977

Family Applications (1)

Application Number Title Priority Date Filing Date
AT95114657T ATE268945T1 (de) 1994-09-26 1995-09-18 Tiefgraben-dram-prozess auf soi für dram-zelle niedrigen leckstromes

Country Status (7)

Country Link
US (1) US5627092A (de)
EP (1) EP0703625B1 (de)
JP (1) JP3963970B2 (de)
KR (1) KR100518157B1 (de)
AT (1) ATE268945T1 (de)
DE (1) DE69533121T2 (de)
TW (1) TW288203B (de)

Families Citing this family (107)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR0151012B1 (ko) * 1994-11-30 1998-10-01 김광호 매몰 비트라인 디램 셀 및 제조방법
US5792685A (en) * 1996-02-22 1998-08-11 Siemens Aktiengesellschaft Three-dimensional device layout having a trench capacitor
US5893735A (en) * 1996-02-22 1999-04-13 Siemens Aktiengesellschaft Three-dimensional device layout with sub-groundrule features
KR100239414B1 (ko) * 1996-11-07 2000-01-15 김영환 반도체 소자의 제조방법
SE520115C2 (sv) * 1997-03-26 2003-05-27 Ericsson Telefon Ab L M Diken med plan ovansida
US5953607A (en) * 1997-06-06 1999-09-14 International Business Machines Corporation Buried strap for trench storage capacitors in dram trench cells
US6100131A (en) * 1997-06-11 2000-08-08 Siemens Aktiengesellschaft Method of fabricating a random access memory cell
US6389063B1 (en) * 1997-10-31 2002-05-14 Hitachi, Ltd. Signal transmission apparatus using an isolator, modem, and information processor
US5943581A (en) * 1997-11-05 1999-08-24 Vanguard International Semiconductor Corporation Method of fabricating a buried reservoir capacitor structure for high-density dynamic random access memory (DRAM) circuits
US6124141A (en) * 1998-01-07 2000-09-26 International Business Machines Corporation Non-destructive method and device for measuring the depth of a buried interface
US6190955B1 (en) 1998-01-27 2001-02-20 International Business Machines Corporation Fabrication of trench capacitors using disposable hard mask
DE69923436T2 (de) * 1998-03-06 2006-01-05 Asm America Inc., Phoenix Verfahren zum beschichten von silizium mit hoher kantenabdeckung
US6261908B1 (en) * 1998-07-27 2001-07-17 Advanced Micro Devices, Inc. Buried local interconnect
US6074909A (en) * 1998-07-31 2000-06-13 Siemens Aktiengesellschaft Apparatus and method for forming controlled deep trench top isolation layers
US6177289B1 (en) * 1998-12-04 2001-01-23 International Business Machines Corporation Lateral trench optical detectors
US6190971B1 (en) * 1999-05-13 2001-02-20 International Business Machines Corporation Formation of 5F2 cell with partially vertical transistor and gate conductor aligned buried strap with raised shallow trench isolation region
US6232170B1 (en) 1999-06-16 2001-05-15 International Business Machines Corporation Method of fabricating trench for SOI merged logic DRAM
US6229173B1 (en) 1999-06-23 2001-05-08 International Business Machines Corporation Hybrid 5F2 cell layout for buried surface strap aligned to vertical transistor
US6096580A (en) * 1999-09-24 2000-08-01 International Business Machines Corporation Low programming voltage anti-fuse
US6566177B1 (en) * 1999-10-25 2003-05-20 International Business Machines Corporation Silicon-on-insulator vertical array device trench capacitor DRAM
US6396121B1 (en) * 2000-05-31 2002-05-28 International Business Machines Corporation Structures and methods of anti-fuse formation in SOI
US6573137B1 (en) * 2000-06-23 2003-06-03 International Business Machines Corporation Single sided buried strap
US6538299B1 (en) 2000-10-03 2003-03-25 International Business Machines Corporation Silicon-on-insulator (SOI) trench photodiode
US6555891B1 (en) * 2000-10-17 2003-04-29 International Business Machines Corporation SOI hybrid structure with selective epitaxial growth of silicon
US7822969B2 (en) * 2001-04-16 2010-10-26 Digimarc Corporation Watermark systems and methods
TW540154B (en) * 2001-06-04 2003-07-01 Promos Technologies Inc Deep trench capacitor structure and its manufacturing method
DE10128193C1 (de) * 2001-06-11 2003-01-30 Infineon Technologies Ag Ein-Transistor-Speicherzellenanordnung und Verfahren zu deren Herstellung
TWI230392B (en) 2001-06-18 2005-04-01 Innovative Silicon Sa Semiconductor device
US6610573B2 (en) * 2001-06-22 2003-08-26 Infineon Technologies Ag Method for forming a single wiring level for transistors with planar and vertical gates on the same substrate
US6620676B2 (en) * 2001-06-29 2003-09-16 International Business Machines Corporation Structure and methods for process integration in vertical DRAM cell fabrication
CN1181559C (zh) * 2001-11-21 2004-12-22 同济大学 一种半导体器件
US6885080B2 (en) * 2002-02-22 2005-04-26 International Business Machines Corporation Deep trench isolation of embedded DRAM for improved latch-up immunity
EP1355316B1 (de) * 2002-04-18 2007-02-21 Innovative Silicon SA Datenspeichergerät sowie Verfahren zum Auffrischen der auf einem solchen Gerät gespeicherten Daten
EP1357603A3 (de) 2002-04-18 2004-01-14 Innovative Silicon SA Halbleiterbauelement
KR100473476B1 (ko) 2002-07-04 2005-03-10 삼성전자주식회사 반도체 장치 및 그 제조방법
DE10232938B4 (de) * 2002-07-19 2005-05-04 Infineon Technologies Ag Verfahren zur Herstellung einer vergrabenen Bitleitung für einen Halbleiterspeicher
DE10256973B4 (de) 2002-12-05 2006-09-28 Infineon Technologies Ag Integrierter Halbleiterspeicher mit einem an einem Steg ausgebildeten Auswahltransistor
US6912150B2 (en) * 2003-05-13 2005-06-28 Lionel Portman Reference current generator, and method of programming, adjusting and/or operating same
US7085153B2 (en) * 2003-05-13 2006-08-01 Innovative Silicon S.A. Semiconductor memory cell, array, architecture and device, and method of operating same
US20040228168A1 (en) * 2003-05-13 2004-11-18 Richard Ferrant Semiconductor memory device and method of operating same
US7335934B2 (en) * 2003-07-22 2008-02-26 Innovative Silicon S.A. Integrated circuit device, and method of fabricating same
US7184298B2 (en) * 2003-09-24 2007-02-27 Innovative Silicon S.A. Low power programming technique for a floating body memory transistor, memory cell, and memory array
US7442932B2 (en) * 2003-11-18 2008-10-28 Halliburton Energy Services, Inc. High temperature imaging device
US20050104104A1 (en) * 2003-11-18 2005-05-19 Halliburton Energy Services, Inc. High temperature memory device
GB2425177B (en) * 2003-11-18 2009-03-18 Halliburton Energy Serv Inc High temperature imaging device
US7476939B2 (en) * 2004-11-04 2009-01-13 Innovative Silicon Isi Sa Memory cell having an electrically floating body transistor and programming technique therefor
US7251164B2 (en) * 2004-11-10 2007-07-31 Innovative Silicon S.A. Circuitry for and method of improving statistical distribution of integrated circuits
US7301838B2 (en) * 2004-12-13 2007-11-27 Innovative Silicon S.A. Sense amplifier circuitry and architecture to write data into and/or read from memory cells
US7301803B2 (en) * 2004-12-22 2007-11-27 Innovative Silicon S.A. Bipolar reading technique for a memory cell having an electrically floating body transistor
US7485910B2 (en) * 2005-04-08 2009-02-03 International Business Machines Corporation Simplified vertical array device DRAM/eDRAM integration: method and structure
US20070023833A1 (en) * 2005-07-28 2007-02-01 Serguei Okhonin Method for reading a memory cell having an electrically floating body transistor, and memory cell and array implementing same
US7606066B2 (en) 2005-09-07 2009-10-20 Innovative Silicon Isi Sa Memory cell and memory cell array having an electrically floating body transistor, and methods of operating same
US7227233B2 (en) * 2005-09-12 2007-06-05 International Business Machines Corporation Silicon-on-insulator (SOI) Read Only Memory (ROM) array and method of making a SOI ROM
US7355916B2 (en) 2005-09-19 2008-04-08 Innovative Silicon S.A. Method and circuitry to generate a reference current for reading a memory cell, and device implementing same
US20070085140A1 (en) * 2005-10-19 2007-04-19 Cedric Bassin One transistor memory cell having strained electrically floating body region, and method of operating same
US7683430B2 (en) * 2005-12-19 2010-03-23 Innovative Silicon Isi Sa Electrically floating body memory cell and array, and method of operating or controlling same
US7542345B2 (en) * 2006-02-16 2009-06-02 Innovative Silicon Isi Sa Multi-bit memory cell having electrically floating body transistor, and method of programming and reading same
US7492632B2 (en) 2006-04-07 2009-02-17 Innovative Silicon Isi Sa Memory array having a programmable word length, and method of operating same
US7606098B2 (en) 2006-04-18 2009-10-20 Innovative Silicon Isi Sa Semiconductor memory array architecture with grouped memory cells, and method of controlling same
TWI302354B (en) * 2006-04-19 2008-10-21 Promos Technologies Inc A trench step channel cell transistor and manufacture method thereof
WO2007128738A1 (en) 2006-05-02 2007-11-15 Innovative Silicon Sa Semiconductor memory cell and array using punch-through to program and read same
US8069377B2 (en) 2006-06-26 2011-11-29 Micron Technology, Inc. Integrated circuit having memory array including ECC and column redundancy and method of operating the same
US7542340B2 (en) * 2006-07-11 2009-06-02 Innovative Silicon Isi Sa Integrated circuit including memory array having a segmented bit line architecture and method of controlling and/or operating same
KR101277402B1 (ko) 2007-01-26 2013-06-20 마이크론 테크놀로지, 인코포레이티드 게이트형 바디 영역으로부터 격리되는 소스/드레인 영역을 포함하는 플로팅-바디 ｄｒａｍ 트랜지스터
WO2009031052A2 (en) 2007-03-29 2009-03-12 Innovative Silicon S.A. Zero-capacitor (floating body) random access memory circuits with polycide word lines and manufacturing methods therefor
US8064274B2 (en) 2007-05-30 2011-11-22 Micron Technology, Inc. Integrated circuit having voltage generation circuitry for memory cell array, and method of operating and/or controlling same
US8085594B2 (en) * 2007-06-01 2011-12-27 Micron Technology, Inc. Reading technique for memory cell with electrically floating body transistor
WO2009039169A1 (en) 2007-09-17 2009-03-26 Innovative Silicon S.A. Refreshing data of memory cells with electrically floating body transistors
US8536628B2 (en) 2007-11-29 2013-09-17 Micron Technology, Inc. Integrated circuit having memory cell array including barriers, and method of manufacturing same
US8349662B2 (en) * 2007-12-11 2013-01-08 Micron Technology, Inc. Integrated circuit having memory cell array, and method of manufacturing same
US20090159947A1 (en) * 2007-12-19 2009-06-25 International Business Machines Corporation SIMPLIFIED VERTICAL ARRAY DEVICE DRAM/eDRAM INTEGRATION
US8773933B2 (en) 2012-03-16 2014-07-08 Micron Technology, Inc. Techniques for accessing memory cells
US8014195B2 (en) * 2008-02-06 2011-09-06 Micron Technology, Inc. Single transistor memory cell
US8189376B2 (en) 2008-02-08 2012-05-29 Micron Technology, Inc. Integrated circuit having memory cells including gate material having high work function, and method of manufacturing same
US7749835B2 (en) * 2008-03-14 2010-07-06 International Business Machines Corporation Trench memory with self-aligned strap formed by self-limiting process
US7957206B2 (en) 2008-04-04 2011-06-07 Micron Technology, Inc. Read circuitry for an integrated circuit having memory cells and/or a memory cell array, and method of operating same
US20090251960A1 (en) * 2008-04-07 2009-10-08 Halliburton Energy Services, Inc. High temperature memory device
US7947543B2 (en) 2008-09-25 2011-05-24 Micron Technology, Inc. Recessed gate silicon-on-insulator floating body device with self-aligned lateral isolation
US7933140B2 (en) 2008-10-02 2011-04-26 Micron Technology, Inc. Techniques for reducing a voltage swing
US7924630B2 (en) * 2008-10-15 2011-04-12 Micron Technology, Inc. Techniques for simultaneously driving a plurality of source lines
US8223574B2 (en) 2008-11-05 2012-07-17 Micron Technology, Inc. Techniques for block refreshing a semiconductor memory device
US8213226B2 (en) * 2008-12-05 2012-07-03 Micron Technology, Inc. Vertical transistor memory cell and array
US8319294B2 (en) * 2009-02-18 2012-11-27 Micron Technology, Inc. Techniques for providing a source line plane
US8710566B2 (en) 2009-03-04 2014-04-29 Micron Technology, Inc. Techniques for forming a contact to a buried diffusion layer in a semiconductor memory device
US8748959B2 (en) * 2009-03-31 2014-06-10 Micron Technology, Inc. Semiconductor memory device
US8139418B2 (en) 2009-04-27 2012-03-20 Micron Technology, Inc. Techniques for controlling a direct injection semiconductor memory device
US8508994B2 (en) 2009-04-30 2013-08-13 Micron Technology, Inc. Semiconductor device with floating gate and electrically floating body
US8498157B2 (en) * 2009-05-22 2013-07-30 Micron Technology, Inc. Techniques for providing a direct injection semiconductor memory device
US8537610B2 (en) 2009-07-10 2013-09-17 Micron Technology, Inc. Techniques for providing a semiconductor memory device
US9076543B2 (en) 2009-07-27 2015-07-07 Micron Technology, Inc. Techniques for providing a direct injection semiconductor memory device
US8199595B2 (en) 2009-09-04 2012-06-12 Micron Technology, Inc. Techniques for sensing a semiconductor memory device
US8174881B2 (en) 2009-11-24 2012-05-08 Micron Technology, Inc. Techniques for reducing disturbance in a semiconductor device
US8310893B2 (en) 2009-12-16 2012-11-13 Micron Technology, Inc. Techniques for reducing impact of array disturbs in a semiconductor memory device
US9059319B2 (en) * 2010-01-25 2015-06-16 International Business Machines Corporation Embedded dynamic random access memory device and method
US8416636B2 (en) * 2010-02-12 2013-04-09 Micron Technology, Inc. Techniques for controlling a semiconductor memory device
US8576631B2 (en) 2010-03-04 2013-11-05 Micron Technology, Inc. Techniques for sensing a semiconductor memory device
US8411513B2 (en) 2010-03-04 2013-04-02 Micron Technology, Inc. Techniques for providing a semiconductor memory device having hierarchical bit lines
US8369177B2 (en) 2010-03-05 2013-02-05 Micron Technology, Inc. Techniques for reading from and/or writing to a semiconductor memory device
KR20130007609A (ko) 2010-03-15 2013-01-18 마이크론 테크놀로지, 인크. 반도체 메모리 장치를 제공하기 위한 기술들
US8411524B2 (en) 2010-05-06 2013-04-02 Micron Technology, Inc. Techniques for refreshing a semiconductor memory device
US8455875B2 (en) 2010-05-10 2013-06-04 International Business Machines Corporation Embedded DRAM for extremely thin semiconductor-on-insulator
CN102110716B (zh) * 2010-12-29 2014-03-05 电子科技大学 槽型半导体功率器件
US8531878B2 (en) 2011-05-17 2013-09-10 Micron Technology, Inc. Techniques for providing a semiconductor memory device
US9559216B2 (en) 2011-06-06 2017-01-31 Micron Technology, Inc. Semiconductor memory device and method for biasing same
US9837271B2 (en) 2014-07-18 2017-12-05 Asm Ip Holding B.V. Process for forming silicon-filled openings with a reduced occurrence of voids
US9443730B2 (en) 2014-07-18 2016-09-13 Asm Ip Holding B.V. Process for forming silicon-filled openings with a reduced occurrence of voids
US10460932B2 (en) 2017-03-31 2019-10-29 Asm Ip Holding B.V. Semiconductor device with amorphous silicon filled gaps and methods for forming

Family Cites Families (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4939104A (en) * 1984-10-31 1990-07-03 Texas Instruments, Incorporated Method for forming a buried lateral contact
US4694561A (en) * 1984-11-30 1987-09-22 American Telephone And Telegraph Company, At&T Bell Laboratories Method of making high-performance trench capacitors for DRAM cells
US4984039A (en) * 1985-05-03 1991-01-08 Texas Instruments Incorporated Tapered trench structure and process
US4601779A (en) * 1985-06-24 1986-07-22 International Business Machines Corporation Method of producing a thin silicon-on-insulator layer
US4864375A (en) * 1986-02-05 1989-09-05 Texas Instruments Incorporated Dram cell and method
US5043778A (en) * 1986-08-11 1991-08-27 Texas Instruments Incorporated Oxide-isolated source/drain transistor
US4801988A (en) * 1986-10-31 1989-01-31 International Business Machines Corporation Semiconductor trench capacitor cell with merged isolation and node trench construction
JPH0797625B2 (ja) * 1986-11-19 1995-10-18 三菱電機株式会社 半導体記憶装置
JP2681887B2 (ja) * 1987-03-06 1997-11-26 シ−メンス、アクチエンゲゼルシヤフト ３次元１トランジスタメモリセル構造とその製法
US4916524A (en) * 1987-03-16 1990-04-10 Texas Instruments Incorporated Dram cell and method
JPS645052A (en) * 1987-06-29 1989-01-10 Mitsubishi Electric Corp Capacitor cell of semiconductor storage device
JPS6430259A (en) * 1987-07-24 1989-02-01 Fujitsu Ltd Semiconductor device
JPH01125858A (ja) * 1987-11-10 1989-05-18 Fujitsu Ltd 半導体装置およびその製造方法
US4914740A (en) * 1988-03-07 1990-04-03 International Business Corporation Charge amplifying trench memory cell
US4839309A (en) * 1988-03-30 1989-06-13 American Telephone And Telegraph Company, At&T Technologies, Inc. Fabrication of high-speed dielectrically isolated devices utilizing buried silicide outdiffusion
US5105245A (en) * 1988-06-28 1992-04-14 Texas Instruments Incorporated Trench capacitor DRAM cell with diffused bit lines adjacent to a trench
US4963502A (en) * 1988-08-25 1990-10-16 Texas Instruments, Incorporated Method of making oxide-isolated source/drain transistor
US5057887A (en) * 1989-05-14 1991-10-15 Texas Instruments Incorporated High density dynamic ram cell
US4978634A (en) * 1989-07-25 1990-12-18 Texas Instruments, Incorporated Method of making trench DRAM cell with stacked capacitor and buried lateral contact
US5106777A (en) * 1989-09-27 1992-04-21 Texas Instruments Incorporated Trench isolation process with reduced topography
JP3129750B2 (ja) * 1990-09-27 2001-01-31 株式会社東芝 半導体記憶装置及びその製造方法
US5065273A (en) * 1990-12-04 1991-11-12 International Business Machines Corporation High capacity DRAM trench capacitor and methods of fabricating same
US5216265A (en) * 1990-12-05 1993-06-01 Texas Instruments Incorporated Integrated circuit memory devices with high angle implant around top of trench to reduce gated diode leakage
US5055898A (en) * 1991-04-30 1991-10-08 International Business Machines Corporation DRAM memory cell having a horizontal SOI transfer device disposed over a buried storage node and fabrication methods therefor
JPH04328860A (ja) * 1991-04-30 1992-11-17 Hitachi Ltd 半導体集積回路装置及びその製造方法
JP2994110B2 (ja) * 1991-09-09 1999-12-27 株式会社東芝 半導体記憶装置
US5264716A (en) * 1992-01-09 1993-11-23 International Business Machines Corporation Diffused buried plate trench dram cell array
US5250829A (en) * 1992-01-09 1993-10-05 International Business Machines Corporation Double well substrate plate trench DRAM cell array
US5234846A (en) * 1992-04-30 1993-08-10 International Business Machines Corporation Method of making bipolar transistor with reduced topography
JPH0637275A (ja) * 1992-07-13 1994-02-10 Toshiba Corp 半導体記憶装置及びその製造方法
JPH06104398A (ja) * 1992-09-18 1994-04-15 Toshiba Corp 半導体記憶装置及びその製造方法
JP3439493B2 (ja) * 1992-12-01 2003-08-25 沖電気工業株式会社 半導体記憶装置の製造方法
JP2791260B2 (ja) * 1993-03-01 1998-08-27 株式会社東芝 半導体装置の製造方法
US5422294A (en) * 1993-05-03 1995-06-06 Noble, Jr.; Wendell P. Method of making a trench capacitor field shield with sidewall contact

Also Published As

Publication number Publication date
TW288203B (de) 1996-10-11
EP0703625B1 (de) 2004-06-09
KR960012509A (ko) 1996-04-20
JP3963970B2 (ja) 2007-08-22
DE69533121D1 (de) 2004-07-15
DE69533121T2 (de) 2005-07-07
EP0703625A2 (de) 1996-03-27
KR100518157B1 (ko) 2006-06-13
US5627092A (en) 1997-05-06
EP0703625A3 (de) 1999-03-03
JPH08111513A (ja) 1996-04-30

Similar Documents

Publication Publication Date Title
DE69533121D1 (de) Tiefgraben-DRAM-Prozess auf SOI für DRAM-Zelle niedrigen Leckstromes
TW334612B (en) Silicon on insulator buried plate trench capacitor
KR960016773B1 (en) Buried bit line and cylindrical gate cell and forming method thereof
MX9710043A (es) Fabricacion de dispositivos semiconductores.
TW363276B (en) Thin-film semiconductor device, thin-film transistor and method for fabricating the same
EP0977256A3 (de) Verfahren zur Herstellung eines DRAM-Grabenkondensators
KR890702254A (ko) 집적회로 트랜치 셀
ES2003376A6 (es) Dispositivo de memoria dinamica y metodo para fabricarlo.
TW363270B (en) Buried bit line DRAM cell and manufacturing method thereof
KR910010722A (ko) 반도체기억장치
TW356600B (en) A method for fabricating a buried doped region and vertical field effect transistor (VFET) fabricated based on said method
EP0460918A3 (en) Semiconductor device having improved insulated gate type transistor
GB1521955A (en) Semiconductor memory device
US6750509B2 (en) DRAM cell configuration and method for fabricating the DRAM cell configuration
EP1041635A3 (de) Halbleiter-Speicheranordnung und Verfahren zur Herstellung
TW373338B (en) A semiconductor device having an SOI structure and a method for manufacturing the same
JPH07302846A (ja) 半導体メモリ装置
JPH01160047A (ja) 半導体記憶装置とその製造方法
TW371353B (en) Method of producing MOS resistor and capacitor bottom electrode
KR900017148A (ko) 고집적 트렌치형 디램 셀의 제조방법
JPS6425465A (en) Semiconductor storage device
KR920022533A (ko) 수직 채널을 갖는 sram의 제조 방법
KR980011430A (ko) 반도체 메모리 장치
JPS57140056A (en) Semiconductor storage device
GB2150750A (en) One transistor-one capacitor DRAM

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties