ATE122176T1 - Verfahren zur herstellung einer halbleiteranordnung mit gatestruktur. - Google Patents
Verfahren zur herstellung einer halbleiteranordnung mit gatestruktur.Info
- Publication number
- ATE122176T1 ATE122176T1 AT91304827T AT91304827T ATE122176T1 AT E122176 T1 ATE122176 T1 AT E122176T1 AT 91304827 T AT91304827 T AT 91304827T AT 91304827 T AT91304827 T AT 91304827T AT E122176 T1 ATE122176 T1 AT E122176T1
- Authority
- AT
- Austria
- Prior art keywords
- producing
- gate structure
- semiconductor arrangement
- electron donating
- main surface
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title abstract 3
- 238000004519 manufacturing process Methods 0.000 title 1
- 230000005669 field effect Effects 0.000 abstract 1
- 238000009413 insulation Methods 0.000 abstract 1
- 239000002184 metal Substances 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
- H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
- H01L29/4925—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66659—Lateral single gate silicon transistors with asymmetry in the channel direction, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
- H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
- H01L29/7836—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with a significant overlap between the lightly doped extension and the gate electrode
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- High Energy & Nuclear Physics (AREA)
- Chemical & Material Sciences (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Crystallography & Structural Chemistry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Junction Field-Effect Transistors (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14373490 | 1990-05-31 | ||
JP14454390 | 1990-06-04 |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE122176T1 true ATE122176T1 (de) | 1995-05-15 |
Family
ID=26475389
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT91304827T ATE122176T1 (de) | 1990-05-31 | 1991-05-29 | Verfahren zur herstellung einer halbleiteranordnung mit gatestruktur. |
Country Status (4)
Country | Link |
---|---|
US (1) | US5599741A (de) |
EP (1) | EP0459770B1 (de) |
AT (1) | ATE122176T1 (de) |
DE (1) | DE69109366T2 (de) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE69109366T2 (de) * | 1990-05-31 | 1995-10-19 | Canon Kk | Verfahren zur Herstellung einer Halbleiteranordnung mit Gatestruktur. |
TW435820U (en) * | 1993-01-18 | 2001-05-16 | Semiconductor Energy Lab | MIS semiconductor device |
KR950021242A (ko) * | 1993-12-28 | 1995-07-26 | 김광호 | 다결정 실리콘 박막 트랜지스터 및 그 제조 방법 |
US6159854A (en) * | 1994-08-22 | 2000-12-12 | Fujitsu Limited | Process of growing conductive layer from gas phase |
JPH09102591A (ja) * | 1995-07-28 | 1997-04-15 | Toshiba Corp | 半導体装置及びその製造方法 |
KR100203896B1 (ko) * | 1995-12-15 | 1999-06-15 | 김영환 | 게이트 전극 형성방법 |
US5838176A (en) * | 1996-07-11 | 1998-11-17 | Foveonics, Inc. | Correlated double sampling circuit |
JPH10214964A (ja) * | 1997-01-30 | 1998-08-11 | Oki Electric Ind Co Ltd | Mosfet及びその製造方法 |
JPH11186194A (ja) * | 1997-12-19 | 1999-07-09 | Nec Corp | 半導体装置の製造方法 |
US6211001B1 (en) * | 1998-07-24 | 2001-04-03 | Sharp Laboratories Of America, Inc. | Electrostatic discharge protection for salicided devices and method of making same |
JP2000098116A (ja) * | 1998-09-18 | 2000-04-07 | Canon Inc | 素子又は素子作製用モールド型の作製方法 |
US6617644B1 (en) | 1998-11-09 | 2003-09-09 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method of manufacturing the same |
US6248638B1 (en) * | 1998-12-18 | 2001-06-19 | Texas Instruments Incorporated | Enhancements to polysilicon gate |
JP2000195821A (ja) * | 1998-12-24 | 2000-07-14 | Nec Corp | 半導体製造方法及び装置 |
JP3450758B2 (ja) * | 1999-09-29 | 2003-09-29 | 株式会社東芝 | 電界効果トランジスタの製造方法 |
JP2001111040A (ja) * | 1999-10-13 | 2001-04-20 | Oki Electric Ind Co Ltd | 電界効果トランジスタの製造方法 |
TWI286338B (en) * | 2000-05-12 | 2007-09-01 | Semiconductor Energy Lab | Semiconductor device and manufacturing method thereof |
TW480576B (en) * | 2000-05-12 | 2002-03-21 | Semiconductor Energy Lab | Semiconductor device and method for manufacturing same |
US7927950B2 (en) * | 2002-05-07 | 2011-04-19 | Samsung Electronics Co., Ltd. | Method of fabricating trap type nonvolatile memory device |
KR100655441B1 (ko) * | 2005-09-01 | 2006-12-08 | 삼성전자주식회사 | 트랩형 비휘발성 메모리 장치의 제조 방법 |
JP2012242172A (ja) * | 2011-05-17 | 2012-12-10 | Canon Inc | ゲート電極が駆動する電界効果型トランジスタおよびそれを有するセンサデバイス |
KR101521712B1 (ko) * | 2013-10-22 | 2015-05-19 | 삼성전기주식회사 | 압저항 감지모듈 및 이를 포함하는 mems 센서 |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4356623A (en) * | 1980-09-15 | 1982-11-02 | Texas Instruments Incorporated | Fabrication of submicron semiconductor devices |
US4570328A (en) * | 1983-03-07 | 1986-02-18 | Motorola, Inc. | Method of producing titanium nitride MOS device gate electrode |
US4597824A (en) * | 1983-11-11 | 1986-07-01 | Kabushiki Kaisha Toshiba | Method of producing semiconductor device |
JPS60245281A (ja) * | 1984-05-21 | 1985-12-05 | Matsushita Electronics Corp | 半導体装置の製造方法 |
JPS61202467A (ja) * | 1985-03-05 | 1986-09-08 | Nec Corp | 半導体装置 |
JPS61252776A (ja) * | 1985-05-01 | 1986-11-10 | Victor Co Of Japan Ltd | フイ−ルド判別信号記録再生装置 |
US4722909A (en) * | 1985-09-26 | 1988-02-02 | Motorola, Inc. | Removable sidewall spacer for lightly doped drain formation using two mask levels |
US4737828A (en) * | 1986-03-17 | 1988-04-12 | General Electric Company | Method for gate electrode fabrication and symmetrical and non-symmetrical self-aligned inlay transistors made therefrom |
NL8601547A (nl) * | 1986-06-16 | 1988-01-18 | Philips Nv | Optisch litografische inrichting met verplaatsbaar lenzenstelsel en werkwijze voor het regelen van de afbeeldingseigenschappen van een lenzenstelsel in een dergelijke inrichting. |
GB2195663B (en) * | 1986-08-15 | 1990-08-22 | Nippon Telegraph & Telephone | Chemical vapour deposition method and apparatus therefor |
US4755478A (en) * | 1987-08-13 | 1988-07-05 | International Business Machines Corporation | Method of forming metal-strapped polysilicon gate electrode for FET device |
JPH0734475B2 (ja) * | 1989-03-10 | 1995-04-12 | 株式会社東芝 | 半導体装置 |
US4920403A (en) * | 1989-04-17 | 1990-04-24 | Hughes Aircraft Company | Selective tungsten interconnection for yield enhancement |
US4908332A (en) * | 1989-05-04 | 1990-03-13 | Industrial Technology Research Institute | Process for making metal-polysilicon double-layered gate |
JPH02304935A (ja) * | 1989-05-19 | 1990-12-18 | Nec Corp | 半導体集積回路の製造方法 |
PT95232B (pt) * | 1989-09-09 | 1998-06-30 | Canon Kk | Processo de producao de uma pelicula de aluminio depositada |
JPH03104235A (ja) * | 1989-09-19 | 1991-05-01 | Matsushita Electron Corp | Mis型トランジスタの製造方法 |
US5010030A (en) * | 1989-10-30 | 1991-04-23 | Motorola, Inc. | Semiconductor process using selective deposition |
US4975385A (en) * | 1990-04-06 | 1990-12-04 | Applied Materials, Inc. | Method of constructing lightly doped drain (LDD) integrated circuit structure |
DE69109366T2 (de) * | 1990-05-31 | 1995-10-19 | Canon Kk | Verfahren zur Herstellung einer Halbleiteranordnung mit Gatestruktur. |
JP2895166B2 (ja) * | 1990-05-31 | 1999-05-24 | キヤノン株式会社 | 半導体装置の製造方法 |
US5116774A (en) * | 1991-03-22 | 1992-05-26 | Motorola, Inc. | Heterojunction method and structure |
-
1991
- 1991-05-29 DE DE69109366T patent/DE69109366T2/de not_active Expired - Fee Related
- 1991-05-29 AT AT91304827T patent/ATE122176T1/de active
- 1991-05-29 EP EP91304827A patent/EP0459770B1/de not_active Expired - Lifetime
-
1995
- 1995-06-07 US US08/479,385 patent/US5599741A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0459770B1 (de) | 1995-05-03 |
US5599741A (en) | 1997-02-04 |
EP0459770A2 (de) | 1991-12-04 |
DE69109366D1 (de) | 1995-06-08 |
DE69109366T2 (de) | 1995-10-19 |
EP0459770A3 (en) | 1992-01-22 |
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