AT320737B - Halbleittervorrichtung und Verfahren zur Herstellung einer solchen Halbleitervorrichtung - Google Patents

Halbleittervorrichtung und Verfahren zur Herstellung einer solchen Halbleitervorrichtung

Info

Publication number
AT320737B
AT320737B AT1121968A AT1121968A AT320737B AT 320737 B AT320737 B AT 320737B AT 1121968 A AT1121968 A AT 1121968A AT 1121968 A AT1121968 A AT 1121968A AT 320737 B AT320737 B AT 320737B
Authority
AT
Austria
Prior art keywords
semiconductor device
manufacturing
semiconductor
Prior art date
Application number
AT1121968A
Other languages
English (en)
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Application granted granted Critical
Publication of AT320737B publication Critical patent/AT320737B/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/511Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/0883Combination of depletion and enhancement field effect transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0638Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layer, e.g. with channel stopper

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Light Receiving Elements (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
AT1121968A 1967-11-21 1968-11-19 Halbleittervorrichtung und Verfahren zur Herstellung einer solchen Halbleitervorrichtung AT320737B (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL6715753.A NL162250C (nl) 1967-11-21 1967-11-21 Halfgeleiderinrichting met een halfgeleiderlichaam, waarvan aan een hoofdoppervlak het halfgeleideroppervlak plaatselijk met een oxydelaag is bedekt, en werkwijze voor het vervaardigen van planaire halfgeleider- inrichtingen.

Publications (1)

Publication Number Publication Date
AT320737B true AT320737B (de) 1975-02-25

Family

ID=19801764

Family Applications (1)

Application Number Title Priority Date Filing Date
AT1121968A AT320737B (de) 1967-11-21 1968-11-19 Halbleittervorrichtung und Verfahren zur Herstellung einer solchen Halbleitervorrichtung

Country Status (12)

Country Link
US (1) US3649886A (de)
JP (1) JPS5528217B1 (de)
AT (1) AT320737B (de)
BE (1) BE724277A (de)
BR (1) BR6804218D0 (de)
CH (1) CH527497A (de)
DE (1) DE1809817A1 (de)
ES (1) ES360408A1 (de)
FR (1) FR1592750A (de)
GB (1) GB1250509A (de)
NL (1) NL162250C (de)
SE (1) SE354378B (de)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4089992A (en) * 1965-10-11 1978-05-16 International Business Machines Corporation Method for depositing continuous pinhole free silicon nitride films and products produced thereby
DE2047998A1 (de) * 1970-09-30 1972-04-06 Licentia Gmbh Verfahren zum Herstellen einer Planaranordnung
US3856587A (en) * 1971-03-26 1974-12-24 Co Yamazaki Kogyo Kk Method of fabricating semiconductor memory device gate
US3853496A (en) * 1973-01-02 1974-12-10 Gen Electric Method of making a metal insulator silicon field effect transistor (mis-fet) memory device and the product
DE2316096B2 (de) * 1973-03-30 1975-02-27 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Herstellung von integrierten Schaltungen mit Feldeffekttransistoren unterschiedlichen Leltungszustandes
US3924024A (en) * 1973-04-02 1975-12-02 Ncr Co Process for fabricating MNOS non-volatile memories
JPS6022497B2 (ja) * 1974-10-26 1985-06-03 ソニー株式会社 半導体装置
JPS5922381B2 (ja) * 1975-12-03 1984-05-26 株式会社東芝 ハンドウタイソシノ セイゾウホウホウ
JPS54149469A (en) * 1978-05-16 1979-11-22 Toshiba Corp Semiconductor device
JPS5627935A (en) * 1979-08-15 1981-03-18 Toshiba Corp Semiconductor device
EP0051940B1 (de) * 1980-11-06 1985-05-02 National Research Development Corporation Wärmebehandlungsverfahren von Dünnfilm-Halbleiterbauelementen und dadurch hergestellte Bauelemente
US4412242A (en) * 1980-11-17 1983-10-25 International Rectifier Corporation Planar structure for high voltage semiconductor devices with gaps in glassy layer over high field regions
US5043293A (en) * 1984-05-03 1991-08-27 Texas Instruments Incorporated Dual oxide channel stop for semiconductor devices
US5260233A (en) * 1992-11-06 1993-11-09 International Business Machines Corporation Semiconductor device and wafer structure having a planar buried interconnect by wafer bonding
JPH1187663A (ja) * 1997-09-11 1999-03-30 Nec Corp 半導体集積回路装置およびその製造方法
US6168859B1 (en) * 1998-01-29 2001-01-02 The Dow Chemical Company Filler powder comprising a partially coated alumina powder and process to make the filler powder
US6303972B1 (en) 1998-11-25 2001-10-16 Micron Technology, Inc. Device including a conductive layer protected against oxidation
US7067861B1 (en) * 1998-11-25 2006-06-27 Micron Technology, Inc. Device and method for protecting against oxidation of a conductive layer in said device
DE19923466B4 (de) * 1999-05-21 2005-09-29 Infineon Technologies Ag Junctionsisolierter Lateral-MOSFET für High-/Low-Side-Schalter
JP2007165492A (ja) * 2005-12-13 2007-06-28 Seiko Instruments Inc 半導体集積回路装置
FR3049770B1 (fr) * 2016-03-31 2018-07-27 Stmicroelectronics (Tours) Sas Composant de puissance vertical
FR3049769B1 (fr) * 2016-03-31 2018-07-27 Stmicroelectronics (Tours) Sas Composant de puissance vertical
US10211326B2 (en) * 2016-03-31 2019-02-19 Stmicroelectronics (Tours) Sas Vertical power component

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA667423A (en) * 1963-07-23 Northern Electric Company Limited Semiconductor device and method of manufacture
US3477886A (en) * 1964-12-07 1969-11-11 Motorola Inc Controlled diffusions in semiconductive materials
US3484313A (en) * 1965-03-25 1969-12-16 Hitachi Ltd Method of manufacturing semiconductor devices
US3463974A (en) * 1966-07-01 1969-08-26 Fairchild Camera Instr Co Mos transistor and method of manufacture
US3455020A (en) * 1966-10-13 1969-07-15 Rca Corp Method of fabricating insulated-gate field-effect devices
US3475234A (en) * 1967-03-27 1969-10-28 Bell Telephone Labor Inc Method for making mis structures
US3550256A (en) * 1967-12-21 1970-12-29 Fairchild Camera Instr Co Control of surface inversion of p- and n-type silicon using dense dielectrics

Also Published As

Publication number Publication date
NL6715753A (de) 1969-05-23
JPS5528217B1 (de) 1980-07-26
ES360408A1 (es) 1970-10-16
SE354378B (de) 1973-03-05
DE1809817A1 (de) 1969-12-11
CH527497A (de) 1972-08-31
FR1592750A (de) 1970-05-19
NL162250C (nl) 1980-04-15
NL162250B (nl) 1979-11-15
BE724277A (de) 1969-05-21
BR6804218D0 (pt) 1973-04-17
GB1250509A (de) 1971-10-20
US3649886A (en) 1972-03-14

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Legal Events

Date Code Title Description
ELJ Ceased due to non-payment of the annual fee