SE354378B - - Google Patents
Info
- Publication number
- SE354378B SE354378B SE15645/68A SE1564568A SE354378B SE 354378 B SE354378 B SE 354378B SE 15645/68 A SE15645/68 A SE 15645/68A SE 1564568 A SE1564568 A SE 1564568A SE 354378 B SE354378 B SE 354378B
- Authority
- SE
- Sweden
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/0883—Combination of depletion and enhancement field effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0638—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layer, e.g. with channel stopper
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Formation Of Insulating Films (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Junction Field-Effect Transistors (AREA)
- Light Receiving Elements (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| NL6715753.A NL162250C (nl) | 1967-11-21 | 1967-11-21 | Halfgeleiderinrichting met een halfgeleiderlichaam, waarvan aan een hoofdoppervlak het halfgeleideroppervlak plaatselijk met een oxydelaag is bedekt, en werkwijze voor het vervaardigen van planaire halfgeleider- inrichtingen. |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| SE354378B true SE354378B (xx) | 1973-03-05 |
Family
ID=19801764
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| SE15645/68A SE354378B (xx) | 1967-11-21 | 1968-11-18 |
Country Status (12)
| Country | Link |
|---|---|
| US (1) | US3649886A (xx) |
| JP (1) | JPS5528217B1 (xx) |
| AT (1) | AT320737B (xx) |
| BE (1) | BE724277A (xx) |
| BR (1) | BR6804218D0 (xx) |
| CH (1) | CH527497A (xx) |
| DE (1) | DE1809817A1 (xx) |
| ES (1) | ES360408A1 (xx) |
| FR (1) | FR1592750A (xx) |
| GB (1) | GB1250509A (xx) |
| NL (1) | NL162250C (xx) |
| SE (1) | SE354378B (xx) |
Families Citing this family (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4089992A (en) * | 1965-10-11 | 1978-05-16 | International Business Machines Corporation | Method for depositing continuous pinhole free silicon nitride films and products produced thereby |
| DE2047998A1 (de) * | 1970-09-30 | 1972-04-06 | Licentia Gmbh | Verfahren zum Herstellen einer Planaranordnung |
| US3856587A (en) * | 1971-03-26 | 1974-12-24 | Co Yamazaki Kogyo Kk | Method of fabricating semiconductor memory device gate |
| US3853496A (en) * | 1973-01-02 | 1974-12-10 | Gen Electric | Method of making a metal insulator silicon field effect transistor (mis-fet) memory device and the product |
| DE2316096B2 (de) * | 1973-03-30 | 1975-02-27 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Verfahren zur Herstellung von integrierten Schaltungen mit Feldeffekttransistoren unterschiedlichen Leltungszustandes |
| US3924024A (en) * | 1973-04-02 | 1975-12-02 | Ncr Co | Process for fabricating MNOS non-volatile memories |
| JPS6022497B2 (ja) * | 1974-10-26 | 1985-06-03 | ソニー株式会社 | 半導体装置 |
| JPS5922381B2 (ja) * | 1975-12-03 | 1984-05-26 | 株式会社東芝 | ハンドウタイソシノ セイゾウホウホウ |
| JPS54149469A (en) * | 1978-05-16 | 1979-11-22 | Toshiba Corp | Semiconductor device |
| JPS5627935A (en) * | 1979-08-15 | 1981-03-18 | Toshiba Corp | Semiconductor device |
| EP0051940B1 (en) * | 1980-11-06 | 1985-05-02 | National Research Development Corporation | Annealing process for a thin-film semiconductor device and obtained devices |
| US4412242A (en) * | 1980-11-17 | 1983-10-25 | International Rectifier Corporation | Planar structure for high voltage semiconductor devices with gaps in glassy layer over high field regions |
| US5043293A (en) * | 1984-05-03 | 1991-08-27 | Texas Instruments Incorporated | Dual oxide channel stop for semiconductor devices |
| US5260233A (en) * | 1992-11-06 | 1993-11-09 | International Business Machines Corporation | Semiconductor device and wafer structure having a planar buried interconnect by wafer bonding |
| JPH1187663A (ja) * | 1997-09-11 | 1999-03-30 | Nec Corp | 半導体集積回路装置およびその製造方法 |
| US6168859B1 (en) * | 1998-01-29 | 2001-01-02 | The Dow Chemical Company | Filler powder comprising a partially coated alumina powder and process to make the filler powder |
| US7067861B1 (en) * | 1998-11-25 | 2006-06-27 | Micron Technology, Inc. | Device and method for protecting against oxidation of a conductive layer in said device |
| US6303972B1 (en) | 1998-11-25 | 2001-10-16 | Micron Technology, Inc. | Device including a conductive layer protected against oxidation |
| DE19923466B4 (de) | 1999-05-21 | 2005-09-29 | Infineon Technologies Ag | Junctionsisolierter Lateral-MOSFET für High-/Low-Side-Schalter |
| JP2007165492A (ja) * | 2005-12-13 | 2007-06-28 | Seiko Instruments Inc | 半導体集積回路装置 |
| FR3049770B1 (fr) * | 2016-03-31 | 2018-07-27 | Stmicroelectronics (Tours) Sas | Composant de puissance vertical |
| FR3049769B1 (fr) * | 2016-03-31 | 2018-07-27 | Stmicroelectronics (Tours) Sas | Composant de puissance vertical |
| US10211326B2 (en) * | 2016-03-31 | 2019-02-19 | Stmicroelectronics (Tours) Sas | Vertical power component |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CA667423A (en) * | 1963-07-23 | Northern Electric Company Limited | Semiconductor device and method of manufacture | |
| US3477886A (en) * | 1964-12-07 | 1969-11-11 | Motorola Inc | Controlled diffusions in semiconductive materials |
| US3484313A (en) * | 1965-03-25 | 1969-12-16 | Hitachi Ltd | Method of manufacturing semiconductor devices |
| US3463974A (en) * | 1966-07-01 | 1969-08-26 | Fairchild Camera Instr Co | Mos transistor and method of manufacture |
| US3455020A (en) * | 1966-10-13 | 1969-07-15 | Rca Corp | Method of fabricating insulated-gate field-effect devices |
| US3475234A (en) * | 1967-03-27 | 1969-10-28 | Bell Telephone Labor Inc | Method for making mis structures |
| US3550256A (en) * | 1967-12-21 | 1970-12-29 | Fairchild Camera Instr Co | Control of surface inversion of p- and n-type silicon using dense dielectrics |
-
1967
- 1967-11-21 NL NL6715753.A patent/NL162250C/xx not_active IP Right Cessation
-
1968
- 1968-11-09 ES ES360408A patent/ES360408A1/es not_active Expired
- 1968-11-18 SE SE15645/68A patent/SE354378B/xx unknown
- 1968-11-18 GB GB1250509D patent/GB1250509A/en not_active Expired
- 1968-11-18 CH CH1719568A patent/CH527497A/de not_active IP Right Cessation
- 1968-11-19 US US776922A patent/US3649886A/en not_active Expired - Lifetime
- 1968-11-19 AT AT1121968A patent/AT320737B/de not_active IP Right Cessation
- 1968-11-20 JP JP8461568A patent/JPS5528217B1/ja active Pending
- 1968-11-20 DE DE19681809817 patent/DE1809817A1/de not_active Ceased
- 1968-11-21 BE BE724277D patent/BE724277A/xx unknown
- 1968-11-21 FR FR1592750D patent/FR1592750A/fr not_active Expired
- 1968-11-21 BR BR204218/68A patent/BR6804218D0/pt unknown
Also Published As
| Publication number | Publication date |
|---|---|
| US3649886A (en) | 1972-03-14 |
| BE724277A (xx) | 1969-05-21 |
| BR6804218D0 (pt) | 1973-04-17 |
| FR1592750A (xx) | 1970-05-19 |
| NL162250C (nl) | 1980-04-15 |
| CH527497A (de) | 1972-08-31 |
| JPS5528217B1 (xx) | 1980-07-26 |
| GB1250509A (xx) | 1971-10-20 |
| ES360408A1 (es) | 1970-10-16 |
| AT320737B (de) | 1975-02-25 |
| NL6715753A (xx) | 1969-05-23 |
| DE1809817A1 (de) | 1969-12-11 |
| NL162250B (nl) | 1979-11-15 |