WO2024113186A1 - 一种显示基板及其制备方法、显示装置 - Google Patents

一种显示基板及其制备方法、显示装置 Download PDF

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Publication number
WO2024113186A1
WO2024113186A1 PCT/CN2022/135168 CN2022135168W WO2024113186A1 WO 2024113186 A1 WO2024113186 A1 WO 2024113186A1 CN 2022135168 W CN2022135168 W CN 2022135168W WO 2024113186 A1 WO2024113186 A1 WO 2024113186A1
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Prior art keywords
layer
light
substrate
anode
display substrate
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PCT/CN2022/135168
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English (en)
French (fr)
Inventor
赵德江
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京东方科技集团股份有限公司
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Priority to PCT/CN2022/135168 priority Critical patent/WO2024113186A1/zh
Priority to CN202280004737.3A priority patent/CN118414900A/zh
Publication of WO2024113186A1 publication Critical patent/WO2024113186A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations

Definitions

  • the embodiments of the present disclosure relate to, but are not limited to, the field of display technology, and in particular to a display substrate and a method for preparing the same, and a display device.
  • OLED panel is an active light-emitting display device with the advantages of self-luminescence, wide viewing angle, high contrast, full-color display, light weight, thin thickness, low power consumption, high response speed, etc., and can realize flexible display.
  • Inkjet printing OLED devices have the advantages of saving materials and being easy to manufacture on a large scale. However, due to the limitation of ink droplet size, the inkjet printing process is not easy to print fine patterns.
  • An embodiment of the present disclosure provides a display substrate, which includes a substrate and a light-emitting structure layer arranged on the substrate, the light-emitting structure layer includes at least one light-emitting element and a composite medium layer located on at least one side of the light-emitting element;
  • the light-emitting element includes a support layer, and an anode, a partition layer and a light-emitting functional layer arranged on the support layer, the surface of the support layer away from the substrate is higher than the surface of the composite medium layer away from the substrate, the partition layer and the anode form a receiving groove, at least a portion of the light-emitting functional layer is arranged in the receiving groove and is connected to the anode, and at least a portion of the light-emitting functional layer is disconnected from the composite medium layer.
  • the barrier layer is disposed at an edge of the support layer, and the barrier layer and the orthographic projection of the anode on the substrate do not overlap; or, the barrier layer is disposed at an edge of the anode.
  • the distance from the surface of the light-emitting functional layer located in the receiving groove away from the supporting layer to the supporting layer is not greater than the distance from the surface of the partition layer away from the supporting layer to the supporting layer.
  • the barrier layer is in a ring shape and is disposed around the anode.
  • the ring width of the isolation layer is less than 3.0 microns.
  • the display substrate further includes a pixel circuit layer disposed on the base and a planar layer disposed on the pixel circuit layer, and the light emitting structure layer is disposed on the planar layer.
  • a distance from a surface of the support layer away from the substrate to a surface of the planar layer away from the substrate is 0.2 micrometers to 0.8 micrometers.
  • the barrier layer includes an organic insulating material or an inorganic insulating material.
  • the thickness of the barrier layer is 30 nanometers to 100 nanometers.
  • the light-emitting functional layer includes multiple film layers; the composite dielectric layer and at least one film layer of the light-emitting functional layer include the same material; the composite dielectric layer and the film layer of the light-emitting functional layer including the same material are disconnected from each other at the isolation layer.
  • a plurality of the light emitting elements are arranged at intervals to form a light emitting element group, and the composite medium layer is disposed between adjacent light emitting elements in the light emitting element group.
  • the light emitting structure layer further comprises an isolation dam disposed on the substrate, the isolation dam surrounds the light emitting element group, and a surface of the isolation dam away from the substrate is higher than a surface of the partition layer away from the substrate.
  • the support layer and the isolation layer are made of the same material as the isolation dam.
  • a display device comprises the display substrate described in any one of the above embodiments.
  • a method for preparing a display substrate comprising:
  • the ink film in the receiving groove forms at least a part of a light-emitting functional layer, wherein the light-emitting functional layer is connected to the anode;
  • the ink film outside the supporting layer forms a composite dielectric layer
  • the orthographic projection of the composite dielectric layer on the substrate does not overlap with the orthographic projection of at least part of the light-emitting functional layer on the substrate
  • the surface of the supporting layer away from the substrate is higher than the surface of the composite dielectric layer away from the substrate.
  • FIG1 is a schematic top view of a display substrate according to an embodiment of the present disclosure.
  • FIG2 is a schematic cross-sectional view of a substrate along a first direction according to an embodiment of the present disclosure
  • FIG3 is a schematic cross-sectional view of a substrate along a second direction according to an embodiment of the present disclosure
  • FIG4 is an enlarged partial cross-sectional view of a substrate along a first direction according to an embodiment of the present disclosure
  • FIG5 is an enlarged partial cross-sectional view of a substrate along a second direction according to an embodiment of the present disclosure
  • FIG. 6A is a schematic diagram of ink in a first drying stage in a first direction according to an embodiment of the present disclosure.
  • FIG. 6B is a schematic diagram of the ink in the first drying stage in the second direction according to an embodiment of the present disclosure.
  • FIG. 7A is a schematic diagram of ink in a first direction in a second drying stage according to an embodiment of the present disclosure.
  • FIG. 7B is a schematic diagram of the ink in the second direction in the second drying stage according to an embodiment of the present disclosure.
  • FIG8A is a schematic diagram of ink in a first direction in a third drying stage according to an embodiment of the present disclosure.
  • FIG8B is a schematic diagram of the ink in the third drying stage in the second direction according to an embodiment of the present disclosure.
  • the ordinal numbers such as “first”, “second”, and “third” in the present disclosure are provided to avoid confusion of constituent elements, rather than to limit the quantity.
  • the “plurality” in the present disclosure includes two and more than two.
  • the terms “installed”, “connected”, and “connected” should be understood in a broad sense.
  • it can be a fixed connection, or a detachable connection, or an integral connection; it can be a mechanical connection, or a connection; it can be a direct connection, or an indirect connection through an intermediate, or the internal communication of two elements.
  • installed can be a fixed connection, or a detachable connection, or an integral connection; it can be a mechanical connection, or a connection; it can be a direct connection, or an indirect connection through an intermediate, or the internal communication of two elements.
  • a transistor refers to an element including at least three terminals: a gate electrode, a drain electrode, and a source electrode.
  • a transistor has a channel region between a drain electrode (drain electrode terminal, drain region, or drain) and a source electrode (source electrode terminal, source region, or source), and current can flow through the drain electrode, the channel region, and the source electrode.
  • a channel region refers to a region where current mainly flows.
  • the first electrode may be a drain electrode and the second electrode may be a source electrode, or the first electrode may be a source electrode and the second electrode may be a drain electrode.
  • the functions of the "source electrode” and the “drain electrode” are sometimes interchanged. Therefore, in the present disclosure, the "source electrode” and the “drain electrode” may be interchanged.
  • connection includes the situation where the components are connected together through an element having some electrical function.
  • element having some electrical function There is no particular limitation on the “element having some electrical function” as long as it can transmit and receive electrical signals between the connected components.
  • Examples of “element having some electrical function” include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements having one or more functions.
  • parallel means that the angle formed by two straight lines is greater than -10° and less than 10°, and therefore, the angle may be greater than -5° and less than 5°.
  • perpendicular means that the angle formed by two straight lines is greater than 80° and less than 10°, and therefore, the angle may be greater than 85° and less than 95°.
  • film and “layer” may be interchanged.
  • conductive layer may be replaced with “conductive film” in some cases.
  • insulating film may be replaced with “insulating layer” in some cases.
  • Line bank retaining wall
  • subdivided anode is used to print fine patterns.
  • the inventors have found through research that when Line bank printing is used, ink reflux occurs near the line bank during the ink drying process, causing abnormal ink thickness at this position, thus affecting the display effect.
  • the present disclosure provides a display substrate, comprising a substrate and a light-emitting structure layer arranged on the substrate, wherein the light-emitting structure layer comprises at least one light-emitting element and a composite medium layer located on at least one side of the light-emitting element; the light-emitting element comprises a support layer, and an anode, a partition layer and a light-emitting functional layer arranged on the support layer, wherein a surface of the support layer away from the substrate is higher than a surface of the composite medium layer away from the substrate, the partition layer and the anode form a receiving groove, at least a portion of the light-emitting functional layer is arranged in the receiving groove and connected to the anode, and at least a portion of the light-emitting functional layer is disconnected from the composite medium layer.
  • the display substrate disclosed in the present invention includes a supporting layer and an anode and a partition layer arranged on the supporting layer, and the partition layer and the anode form a receiving groove. At least a part of the light-emitting functional layer is arranged in the receiving groove and is connected to the anode. This can avoid the ink backflow phenomenon in the process of forming the light-emitting functional layer by inkjet printing, improve the uniformity of the thickness of the light-emitting functional layer, and thus improve the display effect of the display product.
  • FIG. 1 is a schematic top view of a display substrate of an embodiment of the present disclosure. As shown in FIG. 1 , three directions are defined for the purpose of explaining the technical solution, and the first direction is marked as X and the second direction is marked as Y. The first direction intersects the second direction. In the embodiment of the present disclosure, the first direction, the second direction and the third direction are perpendicular to each other. The third direction is the thickness direction of the display substrate.
  • the display substrate of the embodiment of the present disclosure includes a base 310 , a pixel circuit layer disposed on the base 310 , a planar layer disposed on the pixel circuit layer, and a light emitting structure layer disposed on the planar layer.
  • the pixel circuit layer may include a plurality of transistors and a storage capacitor.
  • the transistor may include an active layer, a gate, a source electrode and a drain electrode, wherein the gate is located on one side of the active layer and is insulated from the active layer, and the source electrode and the drain electrode are electrically connected to the active layer, respectively.
  • the light emitting structure layer includes at least one light emitting element 100 and at least one composite dielectric layer 200 .
  • the light emitting element 100 and the composite dielectric layer 200 are both disposed on a flat layer.
  • the composite dielectric layer 200 is located on at least one side of the light emitting element 100 .
  • a plurality of light-emitting elements 100 are arranged at intervals along a first direction to form a light-emitting element group, and a composite dielectric layer 200 is located on opposite sides of the light-emitting element 100 in the first direction, and the composite dielectric layer 200 and the orthographic projection of the light-emitting element 100 on the substrate 310 do not overlap.
  • the light-emitting element 100 and the composite dielectric layer 200 may be arranged alternately in sequence along the first direction.
  • the light emitting structure layer further includes an isolation dam 800 , which is disposed around the light emitting element group to limit the ink material so that the ink material is confined in the space surrounded by the isolation dam 800 .
  • the display substrate may include a plurality of pixel units arranged in a matrix, each pixel unit including at least 3 sub-pixels.
  • a pixel unit is shown in the dotted box in FIG1.
  • FIG1 only illustrates an arrangement of a plurality of sub-pixels in a pixel unit, and the present disclosure does not limit this.
  • a pixel unit may include a first sub-pixel, a second sub-pixel, and a third sub-pixel arranged in sequence.
  • the first sub-pixel may be a red sub-pixel R
  • the second sub-pixel may be a green sub-pixel G
  • the third sub-pixel may be a blue sub-pixel B.
  • Different sub-pixels are separated by an isolation dam 800.
  • the orthographic projection of the isolation dam 800 on the substrate 310 may be a rectangle, and the isolation dam 800 includes a first side extending along a first direction and a second side extending along a second direction, the first side being located on opposite sides of the light-emitting element group in the second direction, and the second side being located on opposite sides of the light-emitting element group in the first direction.
  • the projection of the light emitting element 100 on the XY plane may be a rectangle, etc.
  • the projection of the composite dielectric layer 200 on the XY plane may be a rectangle, etc.
  • the shapes of the light emitting element 100 and the composite dielectric layer 200 are not limited in the implementation of the present disclosure.
  • the projection area of the light-emitting element 100 and the projection area of the composite dielectric layer 200 can be designed to be the same, and the ratio of the light-emitting element 100 and the composite dielectric layer 200 in the display substrate can be set to 1:1 or 2:1, etc., to facilitate adjusting the display effect of the display substrate.
  • the light emitting structure layer includes a plurality of light emitting element groups. Each light emitting element group is used to emit a different monochromatic light.
  • the first light emitting element group is used to emit a first monochromatic light
  • the second light emitting element group is used to emit a second monochromatic light
  • the third light emitting element group is used to emit a third monochromatic light as an example.
  • the first monochromatic light is set to red light
  • the second monochromatic light is set to green light
  • the third monochromatic light is set to blue light as an example.
  • the first light emitting element group, the second light emitting element group, and the third light emitting element group can be arranged in sequence along the second direction.
  • Fig. 2 is a schematic cross-sectional view of a substrate along a first direction according to an embodiment of the present disclosure. As shown in Fig. 2 , in the embodiment of the present disclosure, the third direction is marked as Z.
  • the light emitting element 100 includes a support layer 400.
  • a surface of the support layer 400 away from the substrate 310 is higher than a surface of the composite dielectric layer 200 away from the substrate 310.
  • the material of the support layer 400 may be polyimide, acrylic, or polyethylene terephthalate.
  • the thickness (along the third direction) of the support layer 400 may be set to 0.2 micrometers to 0.8 micrometers, for example, 0.3 micrometers.
  • the light emitting element 100 further includes an anode 500 disposed on a side of the support layer 400 away from the substrate 310.
  • the orthographic projection of the anode 500 on the substrate 310 overlaps at least partially with the orthographic projection of the support layer 400 on the substrate 310.
  • the orthographic projection of the anode 500 on the substrate 310 may be arranged to coincide with the orthographic projection of the support layer 400 on the substrate 310.
  • the orthographic projection of the anode 500 on the substrate 310 is located within the orthographic projection of the support layer 400 on the substrate 310, etc.
  • the anode 500 is not disposed on the substrate 310 between adjacent support layers 400 , that is, the orthographic projection of the anode 500 on the substrate 310 does not overlap with the substrate 310 between adjacent support layers 400 .
  • the anode 500 may be made of a metal material, such as any one or more of magnesium (Mg), silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo).
  • the anode 500 may be made of an alloy material of a metal such as magnesium (Mg), silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo), such as an aluminum-neodymium alloy (AlNd), or a molybdenum-niobium alloy (MoNb).
  • the anode 500 may be a single-layer structure or a multi-layer composite structure, such as Ti/Al/Ti.
  • the anode 500 is a stack structure formed by a metal and a transparent conductive material, such as ITO/Ag/ITO (ITO, indium tin oxide), or Mo/AlNd/ITO.
  • ITO/Ag/ITO ITO, indium tin oxide
  • Mo/AlNd/ITO Mo/AlNd/ITO.
  • the thickness of the ITO layer can be set to 8.0 nanometers
  • the thickness of the Ag layer can be set to 100 nanometers.
  • the thickness, material and structure of the anode 500 are not limited in this disclosure.
  • the barrier layer 600 may be configured as a single film layer or a composite film layer of multiple film layers.
  • the partition layer 600 may be set to an organic insulating material, for example, it may include one of polymers such as polyimide (PI), polyacrylate, polyphenylene sulfide, polyarylate, cellulose acetate propionate, polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyethersulfone resin (PES), polycarbonate (PC), polyetherimide (PEI), cycloolefin polymer (COP), silicone resin, polyarylate (PAR) or glass fiber reinforced plastic (FRP), or a mixture of multiple polymers.
  • polymers such as polyimide (PI), polyacrylate, polyphenylene sulfide, polyarylate, cellulose acetate propionate, polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyethersulfone resin (PES), polycarbonate (PC), polyetherimide (PEI), cycloolefin polymer (COP), silicone resin, polyarylate (PAR) or
  • the partition layer 600 may be an inorganic insulating material, such as silicon oxynitride (SiO x N y ), silicon nitride (SiN), silicon oxide (SiO), silicon dioxide (SiO 2 ), aluminum oxide (Al 2 O 3 ), titanium dioxide (TiO 2 ), niobium pentoxide (Nb 2 O 5 ), etc.
  • the material of the partition layer 600 may be selected from materials with relatively high surface energy, such as polycarbonate (PC), polyphenylene oxide (PPO), polyester synthetic fiber (PET), polypropylene (PSU) or polyimide (PI). Materials with relatively high surface energy have relatively strong lyophilicity. During the drying process of inkjet printing ink, the transition of the ink after breaking at the support layer 400 will be more natural, which can improve the display effect. For example, the surface energy of the material of the partition layer 600 can be set to 50 to 100.
  • the thickness of the barrier layer 600 can be set to 30 nanometers to 100 nanometers. If the thickness of the barrier layer 600 is set too thick, it is easy to affect the ink distribution at the edge of the anode 500. If the thickness of the barrier layer 600 is set too thin, it cannot effectively cover the anode 500, thereby affecting the service life of the display substrate.
  • the barrier layer 600 and the anode 500 form a receiving groove 601
  • the sidewalls of the receiving groove 601 are the sidewalls of the barrier layer 600
  • the bottom wall of the receiving groove 601 is the surface of the anode 500 away from the support layer 400.
  • the projection of the receiving groove 601 in the XY plane can be circular or rectangular.
  • the barrier layer 600 is in a ring shape, and the ring width of the barrier layer 600 is less than 3.0 micrometers.
  • the light emitting element 100 further includes a light emitting functional layer 700 disposed on a side of the anode 500 away from the substrate 310. At least a portion of the light emitting functional layer 700 may be disposed in the receiving groove 601, and at least a portion of the light emitting functional layer 700 is connected to the anode 500. At least a portion of the light emitting functional layer 700 may not overlap with the orthographic projection of the partition layer 600 on the plane where the display substrate is located.
  • the display substrate further includes a cathode disposed on a side of the light emitting functional layer 700 away from the substrate 310, and the light emitting functional layer 700 may emit light of a set color under the drive of the anode 500 and the cathode.
  • the distance from the surface of the light-emitting functional layer 700 located in the receiving groove 601 away from the supporting layer 400 to the supporting layer 400 is not greater than the distance from the surface of the partition layer 600 away from the supporting layer 400 to the supporting layer 400.
  • the distance from the light-emitting functional layer 700 located in the receiving groove 601 to the supporting layer 400 is less than the distance from the partition layer 600 to the supporting layer 400, which can prevent the printed ink from flowing back during the drying process, improve the uniformity of the film layer of the light-emitting functional layer 700, and enhance the display effect of the display product.
  • the light-emitting functional layer 700 includes a plurality of film layers.
  • the composite dielectric layer 200 and at least one film layer of the light-emitting functional layer 700 include the same material.
  • the composite dielectric layer 200 and the film layers of the light-emitting functional layer 700 including the same material are disconnected from each other at the partition layer 600, so as to facilitate the light-emitting functional layer 700 to form a uniform film thickness.
  • the partition layer 600 may be ring-shaped, and the partition layer 600 may be disposed around the anode 500.
  • the light-emitting functional layer 700 may include a light-emitting layer (EML) and a multilayer structure consisting of one or more film layers including a hole injection layer (HIL), a hole transport layer (HTL), a hole blocking layer (HBL), an electron blocking layer (EBL), an electron injection layer (EIL), and an electron transport layer (ETL).
  • HIL hole injection layer
  • HTL hole transport layer
  • HBL hole blocking layer
  • EBL electron blocking layer
  • EIL electron injection layer
  • ETL electron transport layer
  • the light-emitting functional layer 700 may include a first portion 701 and a second portion 702.
  • the second portion 702 is located on a side of the first portion 701 away from the substrate 310.
  • the first portion 701 may be disconnected from the composite dielectric layer 200 at the partition layer 600, and the orthographic projection of the first portion 701 on the substrate 310 does not overlap with the orthographic projection of the partition layer 600 on the substrate 310.
  • the first portion 701 may include an emitting layer (EML, Emitting Layer), etc.
  • EML emitting layer
  • Emitting Layer an emitting layer
  • the orthographic projection of the second portion 702 on the substrate 310 may cover the support layer 400 and the orthographic projection of the composite dielectric layer 200 on the substrate 310, and the second portion 702 may include an electron injection layer (EIL, Electron Injection Layer), etc.
  • the second portion 702 is disconnected from the composite dielectric layer 200 at the partition layer 600.
  • Figure 3 is a cross-sectional schematic diagram of the substrate along the second direction in the embodiment of the present disclosure. As shown in Figure 3, the first portion 701 and the second portion 702 are no longer distinguished, and the light-emitting functional layer 700 is disconnected from the composite dielectric layer 200 at the partition layer 600 as an example.
  • the width (along the second direction) of the second side of the isolation dam 800 may be set to be 10 micrometers to 30 micrometers.
  • the thickness of the isolation dam 800 is greater than the thickness of the support layer 400.
  • the material of the isolation dam 800 may be set to an organic material.
  • the organic material may include, for example, one of a polymer such as polyimide (PI), polyacrylate, polyphenylene sulfide, polyarylate, cellulose acetate propionate, polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyethersulfone resin (PES), polycarbonate (PC), polyetherimide (PEI), cycloolefin polymer (COP), silicone resin, polyarylate (PAR) or glass fiber reinforced plastic (FRP), or a mixture of multiple polymers.
  • PI polyimide
  • PEN polyethylene naphthalate
  • PET polyethylene terephthalate
  • PES polyethersulfone resin
  • PC polycarbonate
  • PEI polyetherimide
  • COP cycloolefin polymer
  • silicone resin silicone resin
  • PAR polyarylate
  • FRP glass fiber reinforced plastic
  • the material of the isolation dam 800 may be an inorganic material, which may include, for example, any one of silicon oxynitride (SiO x N y ), silicon nitride (SiN), silicon oxide (SiO), silicon dioxide (SiO 2 ), aluminum oxide (Al 2 O 3 ), titanium dioxide (TiO 2 ), niobium pentoxide (Nb 2 O 5 ), and the like.
  • the support layer 400 , the partition layer 600 , and the isolation dam 800 may be made of the same material, which can reduce the types of materials included in the display substrate and facilitate reducing the cost of the display substrate.
  • Fig. 4 is a partial cross-sectional enlarged view of the display substrate along the first direction of the embodiment of the present disclosure.
  • the display substrate includes a base 310 and a pixel circuit layer disposed on the base 310.
  • the pixel circuit layer includes a plurality of driving circuits, as shown in Fig. 4, only one driving circuit is illustrated as an example.
  • the substrate 310 may be a rigid substrate, or a flexible substrate, or a silicon wafer, etc.
  • the rigid substrate may be made of materials such as glass or quartz
  • the flexible substrate may be made of materials such as polyimide (PI) or polyethylene terephthalate (PET).
  • PI polyimide
  • PET polyethylene terephthalate
  • the flexible substrate may be a single-layer structure, or a stacked structure consisting of an inorganic material layer and a flexible material layer, etc., which is not limited in the present disclosure.
  • the display substrate may further include a first insulating layer 311 located on the side of the base 310 close to the support layer 400.
  • the first insulating layer 311 is called a buffer layer, which is used to improve the water and oxygen resistance of the display substrate.
  • the first insulating layer 311 may include any one or more of silicon oxynitride ( SiOxNy ), silicon nitride (SiN), silicon oxide (SiO), silicon dioxide ( SiO2 ), aluminum oxide ( Al2O3 ), titanium dioxide ( TiO2 ), niobium pentoxide ( Nb2O5 ), and the like.
  • the first insulating layer 311 may be configured as a single film layer or a composite film layer.
  • the pixel circuit layer may include an active layer 317 located on a side of the first insulating layer 311 away from the substrate 310.
  • the active layer 317 may include a plurality of source electrodes and a drain electrode.
  • the active layer 317 may be made of one or more materials such as amorphous indium gallium zinc oxide (a-IGZO), zinc oxynitride (ZnON), indium zinc tin oxide (IZTO), amorphous silicon (a-Si), polycrystalline silicon (p-Si), sexithiophene, polythiophene, etc.
  • the pixel circuit layer may further include a second insulating layer 312 located on a side of the active layer 317 away from the substrate 310 .
  • the material and structure of the second insulating layer 312 may be the same as those of the first insulating layer 311 .
  • At least two first via holes D1 are provided in the second insulating layer 312 and penetrate the thickness thereof.
  • One first via hole D1 is used to expose at least a portion of the source electrode of the active layer 317
  • the other first via hole D1 is used to expose at least a portion of the drain electrode of the active layer 317, so as to facilitate electrical connection between the anode 500 and the active layer 317.
  • the pixel circuit layer may further include a first gate electrode 301 located on a side of the second insulating layer 312 away from the substrate 310.
  • the first gate electrode 301 may be made of a metal material, such as any one or more of magnesium (Mg), silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo).
  • the first gate electrode 301 may be made of an alloy material of metals such as magnesium (Mg), silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo), such as aluminum-neodymium alloy (AlNd), or molybdenum-niobium alloy (MoNb).
  • Mg magnesium
  • silver Ag
  • copper Cu
  • aluminum Al
  • titanium Ti
  • Mo molybdenum
  • AlNd aluminum-neodymium alloy
  • MoNb molybdenum-niobium alloy
  • the first gate 301 may be a single-layer structure, or a multi-layer composite structure, such as Ti/Al/Ti.
  • the pixel circuit layer may further include a third insulating layer 313 located on a side of the first gate electrode 301 away from the substrate 310.
  • the material and structure of the third insulating layer 313 may be set to be the same as those of the first insulating layer 311.
  • the second insulating layer 312 and the third insulating layer 313 are referred to as gate insulating (GI) layers.
  • At least two second via holes D2 are provided in the third insulating layer 313 and penetrate the thickness thereof, and one second via hole D2 is used to expose at least a portion of a first via hole D1 and at least a portion of the source electrode. Another second via hole D2 is used to expose at least a portion of another first via hole D1 and at least a portion of the drain electrode, so as to facilitate electrical connection between the anode 500 and the active layer 317.
  • the pixel circuit layer may further include a second gate 302 located on a side of the third insulating layer 313 away from the substrate 310 .
  • the material and structure of the second gate 302 may be the same as those of the first gate 301 .
  • the pixel circuit layer may further include a fourth insulating layer 314 located on a side of the second gate 302 away from the substrate 310.
  • the material and structure of the fourth insulating layer 314 may be set to be the same as those of the first insulating layer 311.
  • the fourth insulating layer 314 is called an interlayer dielectric (ILD) layer.
  • At least two third via holes D3 are provided in the fourth insulating layer 314 and penetrate the thickness thereof, and one third via hole D3 is used to expose at least a portion of a first via hole D1 and at least a portion of the source electrode. Another third via hole D3 is used to expose at least a portion of another first via hole D1 and at least a portion of the drain electrode, so as to facilitate electrical connection between the anode 500 and the active layer 317.
  • the pixel circuit layer may further include a source-drain electrode 303 located on a side of the fourth insulating layer 314 away from the substrate 310.
  • the source-drain electrode 303 is connected to the active layer 317 via the third via hole D3, the second via hole D2, and the first via hole D1.
  • the material and structure of the source-drain electrode 303 may be set to be the same as that of the anode 500.
  • the pixel circuit layer may further include a fifth insulating layer 315 located on the side of the source/drain electrode 303 away from the substrate 310.
  • the material and structure of the fifth insulating layer 315 may be the same as those of the first insulating layer 311.
  • the fifth insulating layer 315 is called a passivation (PVX) layer.
  • a fourth via hole D4 penetrating the thickness of the fifth insulating layer 315 is provided.
  • the fourth via hole D4 is used to expose at least a portion of the source-drain electrode 303 so as to electrically connect the anode 500 to the active layer 317 .
  • the pixel circuit layer may further include a connection electrode 304 located on the side of the fifth insulating layer 315 away from the substrate 310.
  • the material and structure of the connection electrode 304 may be the same as those of the source-drain electrode 303.
  • the connection electrode 304 is connected to the source-drain electrode 303 via the fourth via hole D4.
  • the display substrate may further include a sixth insulating layer 316 located on a side of the connection electrode 304 away from the base 310.
  • the material and structure of the sixth insulating layer 316 may be the same as those of the first insulating layer 311.
  • the sixth insulating layer 316 is called a planarization (PLN) layer.
  • a fifth via hole D5 penetrating the thickness of the sixth insulating layer 316 is provided.
  • the fifth via hole D5 is used to expose at least a portion of the connecting electrode 304 .
  • a sixth via hole D6 is provided on the support layer 400 and penetrates the thickness thereof, and the sixth via hole D6 is used to expose at least a portion of the fifth via hole D5 and at least a portion of the connection electrode 304.
  • the anode 500 is connected to the connection electrode 304 via the sixth via hole D6 and the fifth via hole D5.
  • the light emitting element 100 and the composite medium layer 200 may be disposed on a planar layer.
  • the distance from the surface of the support layer 400 away from the substrate 310 to the surface of the flat layer away from the substrate 310 is 0.2 microns to 0.8 microns, so that there is a gap along the third direction between the anode 500 and the flat layer, so that the ink can easily form a uniform light-emitting film on the anode 500 during the drying process.
  • Fig. 5 is a partial cross-sectional enlarged view of the display substrate along the second direction of the embodiment of the present disclosure.
  • the structure of the display substrate can refer to the above description of the structure shown in Fig. 4, and will not be elaborated here.
  • the "patterning process" mentioned in the embodiments of the present disclosure includes deposition of film layers, coating of photoresist, mask exposure, development, etching, stripping of photoresist and other processes, which are mature preparation processes in the relevant technology.
  • Deposition can adopt known processes such as sputtering and chemical vapor deposition, coating can adopt known coating processes, and etching can adopt known methods, which are not limited here.
  • the method for preparing a display substrate may include the following steps:
  • the following operations may be included: providing a carrier board, which may include cutting, cleaning and drying the carrier board.
  • a first insulating film and an active layer film are sequentially deposited, and a first insulating layer 311 and an active layer 317 are formed by a patterning process.
  • a second insulating film and a first metal film are sequentially deposited, and a patterning process is used to form a second insulating layer 312 and a first gate 301 .
  • a third insulating film and a second metal film are sequentially deposited, and a patterning process is used to form a third insulating layer 313 and a second gate 302 .
  • a fourth insulating film is deposited and patterned to form a fourth insulating layer 314, on which a third via hole D3 is formed.
  • the third insulating layer 313 and the second insulating layer 312 that overlap with the orthographic projection of the third via hole D3 on the substrate 310 are both etched away to form the second via hole D2 and the first via hole D1.
  • a third metal film is deposited and a patterning process is used to form source-drain electrodes 303 , and the source-drain electrodes 303 are connected to the active layer 317 through the third via hole D3 , the second via hole D2 , and the first via hole D1 .
  • a fifth insulating film is deposited, and a patterning process is used to form a fifth insulating layer 315 , on which a fourth via hole D4 is formed.
  • the fourth via hole D4 exposes a portion of the source-drain electrode 303 .
  • connection electrode 304 is connected to the source-drain electrode 303 through the fourth via hole D4 .
  • a sixth insulating film is deposited on the substrate obtained by the aforementioned operation, and a sixth insulating layer 316 is formed by a patterning process.
  • an isolation film is deposited, and an isolation dam 800 is formed by a patterning process.
  • a support layer film is deposited, and a patterning process is used to form a support layer 400.
  • a sixth via hole D6 is opened on the support layer 400, and a portion of the sixth insulating layer 316 overlapping with the orthographic projection of the sixth via hole D6 on the substrate is etched away to form a fifth via hole D5, and the fifth via hole D5 exposes a portion of the connecting electrode 304.
  • An electrode film is deposited on the support layer 400 , and a patterning process is used to form the anode 500 .
  • the orthographic projection of the anode 500 on the substrate 310 may overlap with the orthographic projection of the support layer 400 on the substrate 310 .
  • a partition film is deposited on the anode 500, and a patterning process is used to form a partition layer 600.
  • the partition layer 600 is ring-shaped, and the partition layer 600 and the anode 500 form a receiving groove 601.
  • inkjet printing can be used to form at least part of the light-emitting functional layer 700 in the receiving groove 601.
  • the drying process of the ink forming at least part of the light-emitting functional layer 700 includes a first drying stage, a second drying stage and a third drying stage.
  • Fig. 6A is a schematic diagram of the ink in the first direction in the first drying stage according to the embodiment of the present disclosure. As shown in Fig. 6A, the ink film covers the receiving groove 601 and the area between two adjacent support layers 400.
  • Fig. 6B is a schematic diagram of the ink in the first drying stage in the second direction according to the embodiment of the present disclosure. As shown in Fig. 6B, the ink film covers the area defined by the isolation dam 800.
  • Fig. 7A is a schematic diagram of the ink in the second drying stage in the first direction according to the embodiment of the present disclosure. As shown in Fig. 7A, during the drying process, the ink film is separated by the isolation layer 600 along the first direction.
  • Fig. 7B is a schematic diagram of the ink in the second direction in the second drying stage according to the embodiment of the present disclosure. As shown in Fig. 7B, during the drying process, the ink film is flush with the isolation layer 600.
  • Fig. 8A is a schematic diagram of the ink in the third drying stage in the first direction according to the embodiment of the present disclosure. As shown in Fig. 8A, during the drying process, at least part of the light-emitting functional layer 700 is formed in the receiving groove 601, and a composite dielectric layer 200 is formed between two adjacent support layers 400.
  • Fig. 8B is a schematic diagram of the ink in the third drying stage in the second direction according to the embodiment of the present disclosure. As shown in Fig. 8B, during the drying process, at least a portion of the light-emitting functional layer 700 is formed in the receiving groove 601.
  • the order of preparing the isolation dam 800 and preparing the support layer 400 may be exchanged.
  • the preparation of the isolation dam 800 and the preparation of the support layer 400 may be performed simultaneously.
  • the present disclosure also provides a method for preparing a display substrate.
  • the method comprises:
  • the ink film in the receiving groove forms at least a part of a light-emitting functional layer, wherein the light-emitting functional layer is connected to the anode;
  • the ink film outside the supporting layer forms a composite dielectric layer
  • the orthographic projection of the composite dielectric layer on the substrate does not overlap with the orthographic projection of at least part of the light-emitting functional layer on the substrate
  • the surface of the supporting layer away from the substrate is higher than the surface of the composite dielectric layer away from the substrate.
  • the method for preparing the display substrate in the embodiment of the present disclosure can be implemented using existing mature preparation equipment, with little improvement on the existing process, simple preparation process, low production cost, high production precision, and good application prospects.
  • the embodiment of the present disclosure also provides a display device.
  • the display device includes the display substrate described in any of the above embodiments.
  • the display device can be: a mobile phone, a tablet computer, a television, a laptop computer, a digital photo frame, a navigator, or any other product or component with a display function.

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Abstract

一种显示基板及其制备方法，显示装置。所述显示基板包括基底(310)以及设置在所述基底(310)上的发光结构层，所述发光结构层包括至少一个发光元件(100)以及位于所述发光元件(100)至少一侧的复合介质层(200)；所述发光元件(100)包括支撑层(400)，以及设置在所述支撑层(400)上的阳极(500)、隔断层(600)和发光功能层(700)，所述支撑层(400)远离所述基底(310)一侧的表面高于所述复合介质层(200)远离所述基底(310)一侧的表面，所述隔断层(600)与所述阳极(500)形成容纳槽(601)，所述发光功能层(700)的至少部分设置在所述容纳槽(601)中，且与所述阳极(500)连接，所述发光功能层(700)的至少部分与所述复合介质层(200)互相断开。

Description

一种显示基板及其制备方法、显示装置 技术领域
本公开实施例涉及但不限于显示技术领域，尤其涉及一种显示基板及其制备方法、显示装置。
背景技术
有机发光二极管(Organic Light-Emitting Diode，OLED)面板为主动式发光显示器件，具有自发光、广视角、高对比度、全彩显示、质量轻、厚度薄、低耗电、高反应速度等优点，且可实现柔性显示。
喷墨打印OLED器件具有节省材料，易于大规模制作等优点。但是，由于受墨滴尺寸的限制，喷墨打印工艺不容易进行精细图案的打印。
发明内容
以下是对本文详细描述的主题的概述。本概述并非是为了限制权利要求的保护范围。
本公开实施例提供了一种显示基板，所述显示基板包括基底以及设置在所述基底上的发光结构层，所述发光结构层包括至少一个发光元件以及位于所述发光元件至少一侧的复合介质层；所述发光元件包括支撑层，以及设置在所述支撑层上的阳极、隔断层和发光功能层，所述支撑层远离所述基底一侧的表面高于所述复合介质层远离所述基底一侧的表面，所述隔断层与所述阳极形成容纳槽，所述发光功能层的至少部分设置在所述容纳槽中，且与所述阳极连接，所述发光功能层的至少部分与所述复合介质层互相断开。
在一示例性实施例中，所述隔断层设置在所述支撑层的边缘，所述隔断层与所述阳极在所述基底的正投影不交叠；或者，所述隔断层设置在所述阳极的边缘。
在一示例性实施例中，位于所述容纳槽的所述发光功能层远离所述支撑层一侧的表面到所述支撑层的距离不大于所述隔断层远离所述支撑层一侧的 表面到所述支撑层的距离。
在一示例性实施例中，所述隔断层呈环状，围绕所述阳极的四周设置。
在一示例性实施例中，所述隔断层的环宽小于3.0微米。
在一示例性实施例中，所述显示基板还包括设置在所述基底上的像素电路层以及设置在所述像素电路层上的平坦层，所述发光结构层设置在所述平坦层上。
在一示例性实施例中，所述支撑层远离所述基底一侧表面至所述平坦层远离所述基底一侧表面的距离为0.2微米至0.8微米。
在一示例性实施例中，所述隔断层包括有机绝缘材料或无机绝缘材料。
在一示例性实施例中，所述隔断层的厚度为30纳米至100纳米。
在一示例性实施例中，所述发光功能层包括多个膜层；所述复合介质层与所述发光功能层的至少一个膜层包括相同的材料；所述复合介质层与包括相同材料的所述发光功能层的膜层在所述隔断层处互相断开。
在一示例性实施例中，多个所述发光元件间隔排布形成发光元件组，所述复合介质层设置在所述发光元件组中相邻所述发光元件之间。
在一示例性实施例中，所述发光结构层还包括设置在所述基底上的隔离坝，所述隔离坝环绕所述发光元件组的四周，所述隔离坝远离所述基底一侧的表面高于所述隔断层远离所述基底一侧的表面。
在一示例性实施例中，所述支撑层和所述隔断层与所述隔离坝的材料相同。
一种显示装置，包括上述任一实施例所述的显示基板。
一种显示基板的制备方法，包括：
在基底上形成至少一个支撑层和隔离坝；
在所述支撑层上形成阳极和隔断层，所述隔断层与所述阳极形成容纳槽；
在所述基底上沉积墨水薄膜，所述墨水薄膜覆盖所述容纳槽以及填充至所述支撑层以外且位于所述隔离坝限定的区域；
使位于所述容纳槽中的墨水薄膜形成发光功能层的至少部分，所述发光 功能层与所述阳极连接；
使位于所述支撑层以外的墨水薄膜形成复合介质层，所述复合介质层在所述基底的正投影与所述发光功能层的至少部分在所述基底的正投影不交叠，所述支撑层远离所述基底一侧的表面高于所述复合介质层远离所述基底一侧的表面。
在阅读并理解了附图和详细描述后，可以明白其他方面。
附图说明
附图用来提供对本公开技术方案的进一步理解，并且构成说明书的一部分，与本公开的实施例一起用于解释本公开的技术方案，并不构成对本公开技术方案的限制。附图中部件的形状和大小不反映真实比例，目的只是示意说明本公开内容。
图1为本公开实施例显示基板的俯视示意图；
图2为本公开实施例显示基板沿第一方向的剖视示意图；
图3为本公开实施例显示基板沿第二方向的剖视示意图；
图4为本公开实施例显示基板沿第一方向的局部剖视放大图；
图5为本公开实施例显示基板沿第二方向的局部剖视放大图；
图6A为本公开实施例墨水处于第一干燥阶段在第一方向的示意图。
图6B为本公开实施例墨水处于第一干燥阶段在第二方向的示意图。
图7A为本公开实施例墨水处于第二干燥阶段在第一方向的示意图。
图7B为本公开实施例墨水处于第二干燥阶段在第二方向的示意图。
图8A为本公开实施例墨水处于第三干燥阶段在第一方向的示意图。
图8B为本公开实施例墨水处于第三干燥阶段在第二方向的示意图。
具体实施方式
为使本公开的目的、技术方案和优点更加清楚明白，下文中将结合附图对本公开的实施例进行详细说明。实施方式可以以多个不同形式来实施。所 属技术领域的普通技术人员可以很容易地理解一个事实，就是方式和内容可以在不脱离本公开的宗旨及其范围的条件下被变换为一种或多种形式。因此，本公开不应该被解释为仅限定在下面的实施方式所记载的内容中。在不冲突的情况下，本公开中的实施例及实施例中的特征可以相互任意组合。
在附图中，有时为了明确起见，夸大表示了一个或多个构成要素的大小、层的厚度或区域。因此，本公开的一个方式并不一定限定于该尺寸，附图中各部件的形状和大小不反映真实比例。此外，附图示意性地示出了理想的例子，本公开的一个方式不局限于附图所示的形状或数值等。
本公开中的“第一”、“第二”、“第三”等序数词是为了避免构成要素的混同而设置，而不是为了在数量方面上进行限定的。本公开中的“多个”包括两个以及两个以上的数量。
在本公开中，为了方便起见，使用“中部”、“上”、“下”、“前”、“后”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示方位或位置关系的词句以参照附图说明构成要素的位置关系，仅是为了便于描述本说明书和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本公开的限制。构成要素的位置关系根据描述构成要素的方向适当地改变。因此，不局限于在说明书中说明的词句，根据情况可以适当地更换。
在本公开中，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解。例如，可以是固定连接，或可拆卸连接，或一体地连接；可以是机械连接，或连接；可以是直接相连，或通过中间件间接相连，或两个元件内部的连通。对于本领域的普通技术人员而言，可以根据情况理解上述术语在本公开中的含义。
在本公开中，晶体管是指至少包括栅电极、漏电极以及源电极这三个端子的元件。晶体管在漏电极(漏电极端子、漏区域或漏极)与源电极(源电极端子、源区域或源极)之间具有沟道区域，并且电流能够流过漏电极、沟道区域以及源电极。在本公开中，沟道区域是指电流主要流过的区域。
在本公开中，第一极可以为漏电极、第二极可以为源电极，或者第一极可以为源电极、第二极可以为漏电极。在使用极性相反的晶体管的情况或电 路工作中的电流方向变化的情况等下，“源电极”及“漏电极”的功能有时互相调换。因此，在本公开中，“源电极”和“漏电极”可以互相调换。
在本公开中，“连接”包括构成要素通过具有某种电作用的元件连接在一起的情况。“具有某种电作用的元件”只要可以进行连接的构成要素间的电信号的授受，就对其没有特别的限制。“具有某种电作用的元件”的例子不仅包括电极和布线，而且还包括晶体管等开关元件、电阻器、电感器、电容器、其它具有一种或多种功能的元件等。
在本公开中，“平行”是指两条直线形成的角度为-10°以上且10°以下的状态，因此，可以包括该角度为-5°以上且5°以下的状态。另外，“垂直”是指两条直线形成的角度为80°以上且10°以下的状态，因此，可以包括85°以上且95°以下的角度的状态。
在本公开中，“膜”和“层”可以相互调换。例如，有时可以将“导电层”换成为“导电膜”。与此同样，有时可以将“绝缘膜”换成为“绝缘层”。
本公开中的“约”，是指不严格限定界限，允许工艺和测量误差范围内的数值。
在一些相关技术中，采用Line bank(挡墙)或者细分阳极的方式以实现精细图案的打印。但是，经过发明人的研究发现，采用Line bank打印方式，在墨水干燥过程中，在靠近line bank的位置会出现墨水回流现象，导致此位置的墨水厚度会发生异常，以致影响显示效果。
本公开提出一种显示基板，包括基底以及设置在所述基底上的发光结构层，所述发光结构层包括至少一个发光元件以及位于所述发光元件至少一侧的复合介质层；所述发光元件包括支撑层，以及设置在所述支撑层上的阳极、隔断层和发光功能层，所述支撑层远离所述基底一侧的表面高于所述复合介质层远离所述基底一侧的表面，所述隔断层与所述阳极形成容纳槽，所述发光功能层的至少部分设置在所述容纳槽中，且与所述阳极连接，所述发光功能层的至少部分与所述复合介质层互相断开。
本公开显示基板包括支撑层以及设置在所述支撑层上的阳极和隔断层，且所述隔断层与所述阳极形成容纳槽，所述发光功能层的至少部分设置在所述容纳槽中，且与所述阳极连接，可避免采用喷墨打印形成发光功能层的过 程中，墨水发生回流现象，可提高发光功能层厚度的均匀性，也就提升了显示产品的显示效果。
下面通过实施例详细说明本公开实施例的技术方案。
图1为本公开实施例显示基板的俯视示意图。如图1所示，定义三个方向以便进行技术方案的阐述，且将第一方向标识为X，第二方向标识为Y。第一方向与第二方向交叉。在本公开实施例中，第一方向、第二方向与第三方向两两相互垂直。第三方向也就是显示基板的厚度方向。
在示例的实施方式中，如图1所示，本公开实施例显示基板包括基底310、设置在基底310上的像素电路层、设置在所述像素电路层上的平坦层以及设置在平坦层上的发光结构层。
在示例的实施方式中，像素电路层可以包括多个晶体管和存储电容。晶体管可以包括有源层、栅极、源电极和漏电极，栅极位于有源层的一侧，与有源层相互绝缘，源电极和漏电极分别与有源层电连接。
在示例的实施方式中，如图1所示，发光结构层包括至少一个发光元件100和至少一个复合介质层200。发光元件100和复合介质层200均设置在平坦层上。复合介质层200位于发光元件100的至少一侧。
在示例的实施方式中，如图1所示，多个发光元件100沿着第一方向间隔排列形成发光元件组，复合介质层200位于发光元件100在第一方向上的相对两侧，复合介质层200与发光元件100在基底310的正投影不交叠，示例的，发光元件100和复合介质层200可沿着第一方向依次交替排布。
在示例的实施方式中，如图1所示，发光结构层还包括隔离坝800，隔离坝800围绕发光元件组的四周设置，用于限制墨水材料，使墨水材料限制在隔离坝800围成的空间中。
在示例的实施方式中，显示基板可包括矩阵排布的多个像素单元，每个像素单元包括至少3个子像素。在本公开实施例中，仅以每个像素单元包括3个子像素为例，一个像素单元如图1中虚线框所示。图1仅示意出一种像素单元内多个子像素的排列形式，本公开对此不作限定。如图1所示，沿着第二方向，一个像素单元可包括依次排列的第一子像素、第二子像素以及第 三子像素。第一子像素可以为红色子像素R，第二子像素可以为绿色子像素G，第三子像素可以为蓝色子像素B。不同子像素之间由隔离坝800隔开。
在示例的实施方式中，如图1所示，隔离坝800在基底310的正投影可以为矩形，隔离坝800包括沿着第一方向延伸的第一边部以及沿着第二方向延伸的第二边部，第一边部位于发光元件组在第二方向上的相对两侧，第二边部位于发光元件组在第一方向上的相对两侧。
在示例的实施方式中，发光元件100在XY平面的投影可为矩形等。复合介质层200在XY平面的投影可为矩形等。本公开实施中对发光元件100的形状以及复合介质层200的形状不作限定。
在示例的实施方式中，在XY平面内，发光元件100的投影面积和复合介质层200的投影面积可设计得相同，显示基板内发光元件100和复合介质层200的比例可以设置为1:1或者2:1等，以便于调节显示基板的显示效果。
在示例的实施方式中，发光结构层包括多个发光元件组。每个发光元件组用于出射不同的单色光。在本公开实施例中，以第一发光元件组用于出射第一单色光，第二发光元件组用于出射第二单色光，第三发光元件组用于出射第三单色光为例。在本公开实施例中，以第一单色光设置为红光，第二单色光设置为绿光，第三单色光设置为蓝光为例。如图1所示，第一发光元件组、第二发光元件组以及第三发光元件组可沿着第二方向依次排列。
图2为本公开实施例显示基板沿第一方向的剖视示意图。如图2所示，在本公开实施例中，将第三方向标识为Z。
在示例的实施方式中，如图2所示，发光元件100包括支撑层400。支撑层400远离基底310一侧的表面高于复合介质层200远离基底310一侧的表面。
在示例的实施方式中，支撑层400的材料可以采用聚酰亚胺、亚克力或者聚对苯二甲酸乙二醇酯等。
在示例的实施方式中，支撑层400的厚度(沿第三方向)可设置为0.2微米至0.8微米，例如，0.3微米。
在示例的实施方式中，相邻两个支撑层400沿第一方向的间距可设置为 3.0微米，或者大于3.0微米，以降低支撑层400的制造难度，降低显示基板的制造成本。
在示例的实施方式中，如图2所示，发光元件100还包括设置在支撑层400远离基底310一侧的阳极500。阳极500在基底310的正投影与支撑层400在基底310的正投影存在至少部分交叠。例如，阳极500在基底310上的正投影可设置为与支撑层400在基底310的正投影重合。或者，阳极500在基底310上的正投影位于支撑层400在基底310的正投影之内等。
在示例的实施方式中，如图2所示，阳极500未设置在相邻支撑层400之间的基底310上，即阳极500在基底310的正投影与相邻支撑层400之间的基底310不交叠。
在示例的实施方式中，阳极500可以采用金属材料，例如镁(Mg)、银(Ag)、铜(Cu)、铝(Al)、钛(Ti)和钼(Mo)等中的任意一种或者多种。或者，阳极500可以采用镁(Mg)、银(Ag)、铜(Cu)、铝(Al)、钛(Ti)和钼(Mo)等金属的合金材料，例如铝钕合金(AlNd)，或者钼铌合金(MoNb)等。
在示例的实施方式中，阳极500可以是单层结构，或者是多层复合结构，例如Ti/Al/Ti等。或者，阳极500是金属和透明导电材料形成的堆栈结构，例如ITO/Ag/ITO(ITO，氧化铟锡)，或者Mo/AlNd/ITO等。以阳极500设置为ITO/Ag/ITO结构为例，ITO层的厚度可以设置为8.0纳米，Ag层的厚度可以设置为100纳米。关于阳极500的厚度、材料以及结构，本公开在此不做限定。
在示例的实施方式中，如图2所示，发光元件100还包括设置在支撑层400远离基底310一侧的隔断层600。隔断层600可设置在支撑层400的边缘，隔断层600与阳极500在基底310的正投影不交叠。或者，如图2所示，隔断层600设置在阳极500的边缘上。
在示例的实施方式中，隔断层600可设置为单一膜层或者多层膜层的复合膜层等。
在示例的实施方式中，隔断层600可设置为有机绝缘材料，例如可以包括聚酰亚胺(PI)、聚丙烯酸酯、聚苯硫醚、聚芳酯、乙酸丙酸纤维素、聚 萘二甲酸乙二醇酯(PEN)、聚对苯二甲酸乙二醇酯(PET)、聚醚砜树脂(PES)、聚碳酸酯(PC)、聚醚酰亚胺(PEI)、环烯烃聚合物(COP)、硅胶树脂、多芳基化合物(PAR)或者玻璃纤维增强塑料(FRP)等聚合物中的一种，或者是多种聚合物的混合物。
在示例的实施方式中，隔断层600可设置为无机绝缘材料，例如可以包括氮氧化硅(SiO xN y)、氮化硅(SiN)、氧化硅(SiO)、二氧化硅(SiO 2)、三氧化二铝(Al 2O 3)、二氧化钛(TiO 2)、五氧化二铌(Nb 2O 5)等中的任意一种。
在示例的实施方式中，隔断层600的材料可选择表面能(surface energy)比较高的材料，例如，聚碳酸酯(PC)、聚苯醚(PPO)、聚酯合成纤维(PET)、聚丙烯(PSU)或者聚酰亚胺(PI)等。表面能比较高的材料的亲液性比较强，喷墨打印的墨水在干燥过程中，墨水在支撑层400处断裂后过渡得会比较自然，可提升显示效果。示例的，隔断层600材料的表面能可设置为50至100。
在示例的实施方式中，隔断层600的厚度可设置为30纳米至100纳米。隔断层600的厚度如果设置的太厚则容易对阳极500边缘处的墨水分布造成影响，如果隔断层600的厚度设置的太薄则无法对阳极500形成有效的覆盖，以致影响显示基板的使用寿命。
在示例的实施方式中，如图2所示，隔断层600与阳极500形成容纳槽601，容纳槽601的侧壁为隔断层600的侧壁，容纳槽601的底壁为阳极500远离支撑层400一侧的表面。容纳槽601在XY平面内的投影可为圆形或者矩形等。
在示例的实施方式中，隔断层600呈环状，隔断层600的环宽小于3.0微米。
在示例的实施方式中，如图2所示，发光元件100还包括设置于阳极500远离基底310一侧的发光功能层700。发光功能层700的至少部分可设置在容纳槽601中，发光功能层700的至少部分与阳极500连接。发光功能层700的至少部分可与隔断层600在显示基板所在平面的正投影不交叠。在示例的实施方式中，显示基板还包括设置于发光功能层700远离基底310一侧的阴 极，发光功能层700在阳极500和阴极的驱动下，可发射设定颜色的光。
在示例的实施方式中，如图2所示，位于容纳槽601的发光功能层700远离支撑层400一侧的表面到支撑层400的距离不大于隔断层600远离支撑层400一侧的表面到支撑层400的距离。示例的，位于容纳槽601的发光功能层700到支撑层400的距离小于隔断层600到支撑层400的距离，可防止打印的墨水在干燥过程中发生回流，可提高发光功能层700膜层的均匀性，提升了显示产品的显示效果。
在示例的实施方式中，发光功能层700包括多个膜层。复合介质层200与发光功能层700的至少一个膜层包括相同的材料。复合介质层200与包括相同材料的发光功能层700的膜层在隔断层600处互相断开，以利于发光功能层700形成均匀的膜厚。
在示例的实施方式中，如图2所示，隔断层600可呈环状，隔断层600可围绕阳极500的四周设置。在示例的实施方式中，发光功能层700可包括发光层(EML，Emitting Layer)以及包括空穴注入层(HIL，Hole Injection Layer)、空穴传输层(HTL，Hole Transport Layer)、空穴阻挡层(HBL，Hole Block Layer)、电子阻挡层(EBL，Electron Block Layer)、电子注入层(EIL，Electron Injection Layer)、电子传输层(ETL，Electron Transport Layer)中的一个或多个膜层组成的多层结构。
在示例的实施方式中，如图2所示，发光功能层700可包括第一部分701和第二部分702。第二部分702位于第一部分701远离基底310的一侧。第一部分701可在隔断层600处与复合介质层200断开，第一部分701在基底310的正投影与隔断层600在基底310的正投影不交叠。第一部分701可包括发光层(EML，Emitting Layer)等。第二部分702在基底310的正投影可覆盖支撑层400以及复合介质层200在基底310的正投影，第二部分702可包括电子注入层(EIL，Electron Injection Layer)等。
在示例的实施方式中，第二部分702在隔断层600处与复合介质层200断开。图3为本公开实施例显示基板沿第二方向的剖视示意图。如图3所示，不再区分第一部分701和第二部分702，以发光功能层700在隔断层600处与复合介质层200断开为例。
如图3所示，隔离坝800的第二边部的宽度(沿第二方向)可设置为10微米至30微米。
在示例的实施方式中，如图3所示，隔离坝800的厚度(沿第三方向)可设置为1.2微米至2.5微米。
在示例的实施方式中，如图3所示，隔离坝800的厚度大于支撑层400的厚度。隔断层600与隔离坝800之间存在沿第三方向的段差，且隔断层600的表面相比隔离坝800的表面靠近基底310。也就是，隔离坝800远离基底310一侧的表面高于隔断层600远离基底310一侧的表面，可防止墨水在干燥的过程中发生回流，有利于获得膜厚均匀的发光功能层700。
在示例的实施方式中，隔离坝800的材料可设置为有机材料。有机材料例如可以包括聚酰亚胺(PI)、聚丙烯酸酯、聚苯硫醚、聚芳酯、乙酸丙酸纤维素、聚萘二甲酸乙二醇酯(PEN)、聚对苯二甲酸乙二醇酯(PET)、聚醚砜树脂(PES)、聚碳酸酯(PC)、聚醚酰亚胺(PEI)、环烯烃聚合物(COP)、硅胶树脂、多芳基化合物(PAR)或者玻璃纤维增强塑料(FRP)等聚合物中的一种，或者是多种聚合物的混合物。
在示例的实施方式中，隔离坝800的材料可设置为无机材料。无机材料例如可以包括氮氧化硅(SiO xN y)、氮化硅(SiN)、氧化硅(SiO)、二氧化硅(SiO 2)、三氧化二铝(Al 2O 3)、二氧化钛(TiO 2)、五氧化二铌(Nb 2O 5)等中的任意一种。
在示例的实施方式中，支撑层400和隔断层600与隔离坝800的材料可采用相同材料，可减少显示基板所含材料的种类，便于降低显示基板的成本。
图4为本公开实施例显示基板沿第一方向的局部剖视放大图。在示例的实施方式中，如图4所示，显示基板包括基底310以及设置在基底310上的像素电路层。像素电路层包括多个驱动电路，如图4所示，仅以示意出一个驱动电路为例。
在示例的实施方式中，基底310可以是刚性基板，或者可以是柔性基板，或者可以是硅片等。在示例性实施方式中，刚性基板可以采用玻璃或者石英等材料，柔性基板可以采用聚酰亚胺(PI)或者聚对苯二甲酸乙二脂(PET)等材料。柔性基板可以是单层结构，或者可以是无机材料层和柔性材料层构 成的叠层结构等，本公开在此不做限定。
在示例的实施方式中，如图4所示，显示基板还可包括位于基底310靠近支撑层400一侧的第一绝缘层311。第一绝缘层311称之为缓冲(Buffer)层，用于提高显示基板的抗水氧能力。
在示例的实施方式中，第一绝缘层311可以包括氮氧化硅(SiO xN y)、氮化硅(SiN)、氧化硅(SiO)、二氧化硅(SiO 2)、三氧化二铝(Al 2O 3)、二氧化钛(TiO 2)、五氧化二铌(Nb 2O 5)等中的任意一种或者多种。
在示例的实施方式中，第一绝缘层311可设置为单层膜层或者复合膜层等。
在示例的实施方式中，如图4所示，像素电路层可包括位于第一绝缘层311远离基底310一侧的有源层317。有源层317可包括多个源极电极和漏极电极。有源层317可采用非晶态氧化铟镓锌材料(a-IGZO)、氮氧化锌(ZnON)、氧化铟锌锡(IZTO)、非晶硅(a-Si)、多晶硅(p-Si)、六噻吩、聚噻吩等一种或者多种材料。
在示例的实施方式中，如图4所示，像素电路层还可包括位于有源层317远离基底310一侧的第二绝缘层312。第二绝缘层312的材料和结构可设置为与第一绝缘层311相同。
如图4所示，在第二绝缘层312设置有贯穿其厚度的至少两个第一过孔D1，一个第一过孔D1用于暴露出有源层317的源极电极的至少部分，另一个第一过孔D1用于暴露出有源层317的漏极电极的至少部分，以便于阳极500与有源层317进行电连接。
在示例的实施方式中，如图4所示，像素电路层还可包括位于第二绝缘层312远离基底310一侧的第一栅极301。第一栅极301可以采用金属材料，如镁(Mg)、银(Ag)、铜(Cu)、铝(Al)、钛(Ti)和钼(Mo)等中的任意一种或者多种。或者，第一栅极301可以采用镁(Mg)、银(Ag)、铜(Cu)、铝(Al)、钛(Ti)和钼(Mo)等金属的合金材料，例如铝钕合金(AlNd)，或者钼铌合金(MoNb)等。
在示例的实施方式中，第一栅极301可以是单层结构，或者是多层复合 结构，例如Ti/Al/Ti等。
在示例的实施方式中，如图4所示，像素电路层还可包括位于第一栅极301远离基底310一侧的第三绝缘层313。第三绝缘层313的材料和结构可设置为与第一绝缘层311相同。第二绝缘层312和第三绝缘层313称之为栅绝缘(GI，Gate Insulator)层。
如图4所示，在第三绝缘层313设置有贯穿其厚度的至少两个第二过孔D2，一个第二过孔D2用于暴露出一个第一过孔D1的至少部分，且暴露出源极电极的至少部分。另一个第二过孔D2用于暴露出另一个第一过孔D1的至少部分，且暴露出漏极电极的至少部分，以便于阳极500与有源层317进行电连接。
在示例的实施方式中，如图4所示，像素电路层还可包括位于第三绝缘层313远离基底310一侧的第二栅极302。第二栅极302的材料和结构可设置为与第一栅极301相同。
在示例的实施方式中，如图4所示，像素电路层还可包括位于第二栅极302远离基底310一侧的第四绝缘层314。第四绝缘层314的材料和结构可设置为与第一绝缘层311相同。第四绝缘层314称之为层间绝缘(ILD，Interlayer Dielectric)层。
如图4所示，在第四绝缘层314设置有贯穿其厚度的至少两个第三过孔D3，一个第三过孔D3用于暴露出一个第一过孔D1的至少部分，且暴露出源极电极的至少部分。另一个第三过孔D3用于暴露出另一个第一过孔D1的至少部分，且暴露出漏极电极的至少部分，以便于阳极500与有源层317进行电连接。
在示例的实施方式中，如图4所示，像素电路层还可包括位于第四绝缘层314远离基底310一侧的源漏电极303。源漏电极303经由第三过孔D3、第二过孔D2以及第一过孔D1与有源层317连接。源漏电极303的材料和结构可设置为与阳极500相同。
在示例的实施方式中，如图4所示，像素电路层还可包括位于源漏电极303远离基底310一侧的第五绝缘层315。第五绝缘层315的材料和结构可设置为与第一绝缘层311相同。第五绝缘层315称之为钝化(PVX)层。
如图4所示，在第五绝缘层315设置有贯穿其厚度的第四过孔D4，第四过孔D4用于暴露出源漏电极303的至少部分，以便于阳极500与有源层317进行电连接。
在示例的实施方式中，如图4所示，像素电路层还可包括位于第五绝缘层315远离基底310一侧的连接电极304。连接电极304的材料和结构可设置为与源漏电极303相同。连接电极304经由第四过孔D4与源漏电极303连接。
在示例的实施方式中，如图4所示，显示基板还可包括位于连接电极304远离基底310一侧的第六绝缘层316。第六绝缘层316的材料和结构可设置为与第一绝缘层311相同。第六绝缘层316称之为平坦(PLN，Planarization)层。
如图4所示，在第六绝缘层316设置有贯穿其厚度的第五过孔D5，第五过孔D5用于暴露出连接电极304的至少部分。
如图4所示，在支撑层400上设置有贯穿其厚度的第六过孔D6，第六过孔D6用于暴露出第五过孔D5的至少部分，且暴露出连接电极304的至少部分。阳极500经由第六过孔D6以及第五过孔D5与连接电极304连接。
在示例的实施方式中，发光元件100以及复合介质层200可均设置在平坦层上。
在示例的实施方式中，如图4所示，支撑层400远离基底310一侧表面至平坦层远离基底310一侧表面的距离为0.2微米至0.8微米，使得阳极500与平坦层之间存在沿着第三方向的间隔，使得墨水在干燥过程中，容易在阳极500上形成均匀的发光薄膜。
图5为本公开实施例显示基板沿第二方向的局部剖视放大图。如图5所示，关于显示基板的结构可参考前述关于图4所示结构的描述，在此不再展开赘述。
本公开实施例中所说的“构图工艺”包括沉积膜层、涂覆光刻胶、掩模曝光、显影、刻蚀、剥离光刻胶等处理，是相关技术中成熟的制备工艺。沉积可采用溅射、化学气相沉积等已知工艺，涂覆可采用已知的涂覆工艺，刻 蚀可采用已知的方法，在此不做限定。
显示基板的制备方法，可包括如下步骤：
(1)制备基底310。
可以包括如下操作：提供载板，可包括对载板进行切割、清洗和烘干等操作。
(2)制备像素电路层。
在前述操作获得的基底310上，依次沉积第一绝缘薄膜和有源层薄膜，利用构图工艺以形成第一绝缘层311和有源层317。
随后，依次沉积第二绝缘薄膜和第一金属薄膜，利用构图工艺以形成第二绝缘层312和第一栅极301。
随后，依次沉积第三绝缘薄膜和第二金属薄膜，利用构图工艺以形成第三绝缘层313和第二栅极302。
随后，沉积第四绝缘薄膜，利用构图工艺以形成第四绝缘层314，第四绝缘层314上开设有第三过孔D3。与第三过孔D3在基底310的正投影交叠的第三绝缘层313部分和第二绝缘层312部分均被刻蚀掉，以形成第二过孔D2和第一过孔D1。
随后，沉积第三金属薄膜，利用构图工艺以形成源漏电极303，且源漏电极303经由第三过孔D3、第二过孔D2以及第一过孔D1与有源层317连接。
随后，沉积第五绝缘薄膜，利用构图工艺以形成第五绝缘层315，第五绝缘层315上开设有第四过孔D4。第四过孔D4暴露出源漏电极303的部分。
随后，沉积第四金属薄膜，利用构图工艺以形成连接电极304，且连接电极304经由第四过孔D4与源漏电极303连接。
在前述操作获得的基底上，沉积第六绝缘薄膜，利用构图工艺以形成第六绝缘层316。
(3)制备隔离坝800
在前述操作获得的基底上，沉积隔离薄膜，利用构图工艺以形成隔离坝 800。
(4)制备支撑层400。
在前述操作获得的基底上，沉积支撑层薄膜，利用构图工艺以形成支撑层400。支撑层400上开设有第六过孔D6，与第六过孔D6在基底的正投影交叠的第六绝缘层316的部分被刻蚀掉，以形成第五过孔D5，且第五过孔D5暴露出连接电极304的部分。
(5)制备阳极500。
在支撑层400上沉积电极薄膜，利用构图工艺以形成阳极500。阳极500在基底310上的正投影可与支撑层400在基底310上的正投影重叠。
(6)制备隔断层600。
在阳极500上沉积隔断薄膜，利用构图工艺以形成隔断层600。隔断层600为环状，隔断层600与阳极500形成容纳槽601。
(7)制备发光功能层700。
在上述操作的基础上，可采用喷墨打印的方式在容纳槽601内形成发光功能层700的至少部分。其中，形成发光功能层700的至少部分的墨水的干燥过程包括第一干燥阶段、第二干燥阶段以及第三干燥阶段。
图6A为本公开实施例墨水处于第一干燥阶段在第一方向的示意图。如图6A所示，墨水薄膜覆盖容纳槽601以及相邻的两个支撑层400之间的区域。
图6B为本公开实施例墨水处于第一干燥阶段在第二方向的示意图。如图6B所示，墨水薄膜覆盖隔离坝800限定的区域。
图7A为本公开实施例墨水处于第二干燥阶段在第一方向的示意图。如图7A所示，在干燥过程中，墨水薄膜沿着第一方向被隔断层600隔断开。
图7B为本公开实施例墨水处于第二干燥阶段在第二方向的示意图。如图7B所示，在干燥过程中，墨水薄膜与隔断层600平齐。
图8A为本公开实施例墨水处于第三干燥阶段在第一方向的示意图。如图8A所示，在干燥过程中，容纳槽601内形成发光功能层700的至少部分， 相邻两个支撑层400之间形成复合介质层200。
图8B为本公开实施例墨水处于第三干燥阶段在第二方向的示意图。如图8B所示，在干燥过程中，容纳槽601内形成发光功能层700的至少部分。
在一些示意性实施例中，制备隔离坝800和制备支撑层400的顺序可交换。或者，制备隔离坝800和制备支撑层400同步进行。
本公开实施例中还提供了一种显示基板的制备方法。该制备方法包括：
在基底上形成至少一个支撑层和隔离坝；
在所述支撑层上形成阳极和隔断层，所述隔断层与所述阳极形成容纳槽；
在所述基底上沉积墨水薄膜，所述墨水薄膜覆盖所述容纳槽以及填充至所述支撑层以外且位于所述隔离坝限定的区域；
使位于所述容纳槽中的墨水薄膜形成发光功能层的至少部分，所述发光功能层与所述阳极连接；
使位于所述支撑层以外的墨水薄膜形成复合介质层，所述复合介质层在所述基底的正投影与所述发光功能层的至少部分在所述基底的正投影不交叠，所述支撑层远离所述基底一侧的表面高于所述复合介质层远离所述基底一侧的表面。
本公开实施例中显示基板的制备方法利用现有成熟的制备设备即可实现，对现有工艺改进较小，制备过程简单，制作成本低，制作精度高，具有良好的应用前景。
本公开实施例中还提供了一种显示装置。该显示装置包括上述任一实施例所述的显示基板。显示装置可以为：手机、平板电脑、电视机、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
虽然本发明所揭露的实施方式如上，但所述的内容仅为便于理解本发明而采用的实施方式，并非用以限定本发明。任何本发明所属领域内的技术人员，在不脱离本发明所揭露的精神和范围的前提下，可以在实施的形式及细节上进行任何的修改与变化，但本发明的专利保护范围，仍须以所附的权利要求书所界定的范围为准。

Claims (15)

  1. 一种显示基板，包括基底以及设置在所述基底上的发光结构层，所述发光结构层包括至少一个发光元件以及位于所述发光元件至少一侧的复合介质层；所述发光元件包括支撑层，以及设置在所述支撑层上的阳极、隔断层和发光功能层，所述支撑层远离所述基底一侧的表面高于所述复合介质层远离所述基底一侧的表面，所述隔断层与所述阳极形成容纳槽，所述发光功能层的至少部分设置在所述容纳槽中，且与所述阳极连接，所述发光功能层的至少部分与所述复合介质层互相断开。
  2. 如权利要求1所述的显示基板，其中，所述隔断层设置在所述支撑层的边缘，所述隔断层与所述阳极在所述基底的正投影不交叠；或者，所述隔断层设置在所述阳极的边缘。
  3. 如权利要求1所述的显示基板，其中，位于所述容纳槽的所述发光功能层远离所述支撑层一侧的表面到所述支撑层的距离不大于所述隔断层远离所述支撑层一侧的表面到所述支撑层的距离。
  4. 如权利要求1所述的显示基板，其中，所述隔断层呈环状，围绕所述阳极的四周设置。
  5. 如权利要求4所述的显示基板，其中，所述隔断层的环宽小于3.0微米。
  6. 如权利要求1所述的显示基板，还包括设置在所述基底上的像素电路层以及设置在所述像素电路层上的平坦层，所述发光结构层设置在所述平坦层上。
  7. 如权利要求6所述的显示基板，其中，所述支撑层远离所述基底一侧表面至所述平坦层远离所述基底一侧表面的距离为0.2微米至0.8微米。
  8. 如权利要求1所述的显示基板，其中，所述隔断层包括有机绝缘材料或无机绝缘材料。
  9. 如权利要求1所述的显示基板，其中，所述隔断层的厚度为30纳米至100纳米。
  10. 如权利要求1所述的显示基板，其中，所述发光功能层包括多个膜 层；所述复合介质层与所述发光功能层的至少一个膜层包括相同的材料；所述复合介质层与包括相同材料的所述发光功能层的膜层在所述隔断层处互相断开。
  11. 如权利要求1所述的显示基板，其中，多个所述发光元件间隔排布形成发光元件组，所述复合介质层设置在所述发光元件组中相邻所述发光元件之间。
  12. 如权利要求11所述的显示基板，其中，所述发光结构层还包括设置在所述基底上的隔离坝，所述隔离坝环绕所述发光元件组的四周，所述隔离坝远离所述基底一侧的表面高于所述隔断层远离所述基底一侧的表面。
  13. 如权利要求12所述的显示基板，其中，所述支撑层和所述隔断层与所述隔离坝的材料相同。
  14. 一种显示装置，包括如权利要求1至13任一所述的显示基板。
  15. 一种显示基板的制备方法，包括：
    在基底上形成至少一个支撑层和隔离坝；
    在所述支撑层上形成阳极和隔断层，所述隔断层与所述阳极形成容纳槽；
    在所述基底上沉积墨水薄膜，所述墨水薄膜覆盖所述容纳槽以及填充至所述支撑层以外且位于所述隔离坝限定的区域；
    使位于所述容纳槽中的墨水薄膜形成发光功能层的至少部分，所述发光功能层与所述阳极连接；
    使位于所述支撑层以外的墨水薄膜形成复合介质层，所述复合介质层在所述基底的正投影与所述发光功能层的至少部分在所述基底的正投影不交叠，所述支撑层远离所述基底一侧的表面高于所述复合介质层远离所述基底一侧的表面。
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