WO2024082532A1 - Structure de module 2,5 d à protection à six côtés et procédé s'y rapportant - Google Patents

Structure de module 2,5 d à protection à six côtés et procédé s'y rapportant Download PDF

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Publication number
WO2024082532A1
WO2024082532A1 PCT/CN2023/081843 CN2023081843W WO2024082532A1 WO 2024082532 A1 WO2024082532 A1 WO 2024082532A1 CN 2023081843 W CN2023081843 W CN 2023081843W WO 2024082532 A1 WO2024082532 A1 WO 2024082532A1
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Prior art keywords
adapter plate
chip
adapter
front side
module structure
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PCT/CN2023/081843
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English (en)
Chinese (zh)
Inventor
张春艳
孙鹏
Original Assignee
华进半导体封装先导技术研发中心有限公司
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Publication of WO2024082532A1 publication Critical patent/WO2024082532A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/4824—Pads with extended contours, e.g. grid structure, branch structure, finger structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape
    • H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
    • H01L2924/18161—Exposing the passive side of the semiconductor or solid-state body of a flip chip

Definitions

  • the present invention relates to the field of semiconductor packaging technology, and in particular to a six-sided protected 2.5D module structure and a preparation method thereof.
  • the 2.5D module is prepared using the chip on wafer on substrate (CoWoS) process, after the chip is soldered to the adapter wafer by flip-chip or wire bonding, the chip assembled on the adapter wafer will be protected by the wafer plastic sealing process to improve the reliability of the chip. Then the product completes the TSV exposure, rewiring and solder joints on the back of the wafer, and then cuts it into single modules and finally mounts it on the substrate. Cutting exposes the four silicon-based sides of the adapter without any protection. Silicon cracks are prone to occur during subsequent use, and the reliability of the 2.5D module is not high.
  • CoWoS chip on wafer on substrate
  • Another method for preparing a 2.5D module has the following steps: cutting the adapter board into individual pieces, mounting them on the substrate through a flip-chip process, then mounting the chip on the front of the adapter board through wire bonding or flip-chip bonding, and finally protecting the adapter board and chip by applying a cover. Since the process is to cut the adapter board into individual pieces first, the four silicon-based sides of the adapter board are exposed in the later assembly process without any protection, and it is easy for the adapter board and chip to be damaged and fail due to collision during operation. Therefore, a 2.5D module structure that can achieve all-round protection is needed.
  • the task of the present invention is to provide a six-sided protected 2.5D module structure and a preparation method thereof, so as to realize all-round protection of the 2.5D module structure and improve the reliability of the 2.5D module structure.
  • the present invention provides a 2.5D module structure with six-sided protection, comprising:
  • a conductive through silicon via which passes through the adapter plate and is electrically connected to the pad and the redistribution layer;
  • a soldering pad which is located on the back side of the adapter board
  • a redistribution layer which is located on the front side of the adapter board and is electrically connected to the bumps;
  • a chip which is arranged on the front side of the adapter board
  • a first bottom filling layer which is located between the chip and the adapter board;
  • a plastic sealing layer which plastic seals the chip
  • the second bottom filling layer is located between the substrate and the adapter plate.
  • the present invention also provides a six-sided protected 2.5D module structure, comprising:
  • a conductive through silicon via which passes through the adapter plate and is electrically connected to the pad and the redistribution layer;
  • a soldering pad which is located on the back side of the adapter board
  • a redistribution layer which is located on the front side of the adapter board and is electrically connected to the bumps;
  • a first bottom filling layer which is located between the substrate and the adapter plate;
  • a chip which is arranged on the front side of the adapter board
  • a second underfill layer which is located between the chip and the adapter board.
  • the cover is arranged on the chip, wherein the periphery of the cover is connected to the substrate, and the top of the cover is connected to the back side of the chip.
  • the front side of the chip has pins, and the pins are welded to the bumps, so that the chip is arranged on the front side of the adapter board.
  • the substrate is connected to the solder balls so that the adapter plate is arranged on the substrate.
  • the present invention also provides a method for preparing a six-sided protected 2.5D module structure, comprising:
  • the back side of the adapter board is thinned to expose the conductive through silicon via, and a solder pad is arranged on the conductive through silicon via, and then a solder ball is arranged on the solder pad;
  • the present invention also provides a method for preparing a six-sided protected 2.5D module structure, comprising:
  • the back side of the transfer board is thinned to expose the conductive silicon through via, and a pad is arranged on the conductive silicon through via, and then a solder ball is arranged on the pad, and a single transfer board is formed by cutting along a cutting path;
  • the cover is arranged on the chip, wherein the periphery of the cover is connected to the substrate, and the top of the cover is connected to the back side of the chip.
  • the cutting path is formed on the front side of the adapter plate by a plasma dry etching method or a mechanical blade half-cutting method.
  • the side surface of the interposer in the single package structure is covered by the dry film.
  • the side surface of the single adapter plate is covered by the dry film.
  • the present invention has at least the following beneficial effects: the present invention discloses a six-sided protected 2.5D module structure and a preparation method thereof, wherein a cutting path is formed on an adapter plate and filled with a dry film, and after the cutting step, the sides of the adapter plate are covered with a dry film to form protection.
  • This method achieves all-round protection of the 2.5D module structure without almost increasing the manufacturing process and cost of the 2.5D module structure, thereby improving the reliability of the module.
  • FIGS. 1A to 1I are schematic cross-sectional views showing a process for preparing a 2.5D module structure with six-sided protection according to an embodiment of the present invention
  • FIGS. 2A to 2G are schematic cross-sectional views showing a process of preparing a 2.5D module structure with six-sided protection and a cover according to an embodiment of the present invention
  • FIG3 shows a 2.5D module structure with six-sided protection according to an embodiment of the present invention.
  • FIG. 4 shows a 2.5D module structure with six-side protection according to an embodiment of the present invention.
  • the quantifiers "a”, “an” and “an” do not exclude the presence of a plurality of elements.
  • the terms “center”, “longitudinal”, “lateral”, “up”, “down”, “front”, “back”, “left”, “right”, “vertical”, “horizontal”, “top”, “bottom”, “inside”, “outside” and the like indicate directions or positional relationships based on the directions or positional relationships shown in the accompanying drawings and are only for the convenience of describing the present invention and the like. The description is simplified, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore cannot be understood as limiting the present invention.
  • the terms “first” and “second” are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.
  • the embodiments of the present invention describe the process steps in a specific order, but this is only for the convenience of distinguishing the steps, and does not limit the sequence of the steps. In different embodiments of the present invention, the sequence of the steps can be adjusted according to the adjustment of the process.
  • the side of the adapter board in the 2.5D module structure is exposed silicon, which means that the rest of the entire 2.5D module is wrapped by resin material, which can effectively resist drop tests. Only the small section of the adapter board on the four sides is exposed silicon-based material. Silicon is a brittle material. Without the protection of resin, it is difficult to meet the drop test requirements.
  • the six-sided protected 2.5D module structure and its preparation method proposed by the present invention realize all-round protection of the module and improve the reliability of the module without almost increasing the preparation process and cost of the 2.5D module.
  • FIGS. 1A to 1I are schematic cross-sectional views of a process for preparing a 2.5D module structure with six-side protection according to an embodiment of the present invention.
  • a method for preparing a six-sided protected 2.5D module structure comprises the following steps:
  • Step 1 as shown in FIG. 1A, a conductive silicon through via 101 is formed on the front of the adapter board 100, and a cutting path 102 is formed.
  • a through hole is first etched on the front of the adapter board 100, and then metal is filled to form the conductive silicon through via 101.
  • the cutting path 102 is formed on the front of the adapter board 100 by a plasma dry etching method or a mechanical blade half-cutting method.
  • Step 2 as shown in FIG. 1B , fill the dicing street 102 with a dry film 103 .
  • Step 3 as shown in FIG1C , a redistribution layer and bumps 104 are arranged on the front surface of the transfer board 100.
  • the redistribution layer is electrically connected to the conductive through silicon vias 101, and the redistribution layer is electrically connected to the bumps 104.
  • Step 4 as shown in FIG1D , the chip 105 is arranged on the front of the adapter board 100, and the first underfill layer 106 is arranged between the chip 105 and the adapter board 100.
  • the chip 105 is arranged on the front of the adapter board 100 by welding the pins 1051 of the chip 105 to the bumps 104.
  • Step 5 as shown in FIG. 1E , the chip 105 is plastic-encapsulated to form a plastic-encapsulation layer 107 .
  • Step 6 as shown in FIG. 1F , temporarily bond the plastic encapsulation layer 107 to the carrier film 108 via a bonding adhesive 109 .
  • Step 7 as shown in FIG. 1G , the back side of the adapter board 100 is thinned to expose the conductive silicon via 101, and a pad 110 is arranged on the conductive silicon via 101, and then a solder ball is arranged on the pad 110 111.
  • step 8 as shown in FIG1H , the carrier sheet 108 and the bonding adhesive 109 are removed, and then a single package structure is formed by cutting along the cutting path 102. After cutting, the side of the transfer board is covered with a dry film 103 to avoid damage caused by collision and improve reliability.
  • Step 9 as shown in FIG. 1I , assemble the single package structure onto the substrate 112 , connect the solder ball 111 to the substrate 112 , and then fill the second underfill layer 113 between the single package structure and the substrate 112 .
  • FIGS. 2A to 2G are schematic cross-sectional views of a process for preparing a 2.5D module structure with six-sided protection and a cap according to an embodiment of the present invention.
  • a method for preparing a 2.5D module structure with six-sided protection and a cover comprising the following steps:
  • Step 1 as shown in FIG. 2A, a conductive silicon through via 201 is formed on the front of the adapter plate 200, and a cutting path 202 is formed.
  • the adapter plate 200 has a conductive silicon through via 201.
  • a through hole is first etched on the front of the adapter plate 200, and then metal is filled to form the conductive silicon through via 201.
  • the cutting path 202 is formed on the front of the adapter plate 200 by a plasma dry etching method or a mechanical blade half-cutting method.
  • Step 2 as shown in FIG. 2B , fill the dicing street 202 with a dry film 203 .
  • Step 3 as shown in FIG2C , a redistribution layer and bumps 204 are arranged on the front surface of the transfer board 200.
  • the redistribution layer is electrically connected to the conductive through silicon vias 201, and the redistribution layer is electrically connected to the bumps 204.
  • step 4 as shown in FIG. 2D , the back side of the transfer board 200 is thinned to expose the conductive silicon via 201, and the pad 205 is arranged on the conductive silicon via 201, and then the solder ball 206 is arranged on the pad 205, and the transfer board 2001 is cut along the cutting path 202 to form a single transfer board 2001.
  • the side of the cut single transfer board 2001 is covered with a dry film 203 to avoid damage caused by collision and improve reliability.
  • Step 5 as shown in FIG. 2E , a single interposer 2001 is arranged on the substrate 207 , a solder ball 206 is connected to the substrate 207 , and then a first underfill layer 208 is filled between the single interposer 2001 and the substrate 207 .
  • Step 6 as shown in FIG2F , the chip 209 is arranged on the single transfer board 2001, and a second underfill layer 210 is filled between the single transfer board 2001 and the chip 209.
  • the chip 209 is arranged on the front side of the single transfer board 2001 by soldering the pins 2091 of the chip 209 to the bumps 204.
  • Step 7 as shown in FIG. 2G , a cover 211 is placed on the chip 209 .
  • the four sides of the chip 207 are connected to the substrate 207, and the top of the cover 211 is connected to the back side of the chip 209.
  • FIG. 3 shows a 2.5D module structure with six-side protection according to an embodiment of the present invention.
  • a six-sided protected 2.5D module structure includes an adapter plate 300 , a conductive silicon via 301 , a dry film 302 , a solder ball 303 , a pad 304 , a redistribution layer, a bump 305 , a chip 306 , a first underfill layer 307 , a plastic encapsulation layer 308 , a substrate 309 and a second underfill layer 310 .
  • the conductive through silicon via 301 passes through the transfer board 300 and is electrically connected to the pad 304 and the redistribution layer.
  • the solder pad 304 is located on the back side of the transfer board 300 , and the solder ball 303 is connected to the solder pad 304 .
  • the redistribution layer is located on the front side of the interposer 300 with the bump 305.
  • the redistribution layer is electrically connected to the bump 305.
  • the dry film 302 is located around the adapter plate 300 , and the side surfaces of the adapter plate are covered by the dry film 302 , thereby avoiding damage caused by collision and improving reliability.
  • the chip 306 is arranged on the front side of the transfer board 300 .
  • the front side of the chip 306 has pins 3061 , which are soldered to the bumps 305 , so that the chip 306 is arranged on the front side of the transfer board 300 .
  • the first underfill layer 307 is located between the chip 306 and the transfer board 300 .
  • the plastic encapsulation layer 308 encapsulates the chip 306 .
  • the substrate 309 is connected to the solder balls 303 , so that the interposer 300 is disposed on the substrate 309 .
  • the second underfill layer 310 is located between the substrate 309 and the transfer board 300 .
  • FIG. 4 shows a 2.5D module structure with six-side protection according to an embodiment of the present invention.
  • a six-sided protected 2.5D module structure includes an adapter plate 400 , a conductive silicon via 401 , a dry film 402 , a solder ball 403 , a pad 404 , a redistribution layer, a bump 405 , a substrate 406 , a first underfill layer 407 , a chip 408 , a second underfill layer 409 and a cover 410 .
  • the conductive through silicon via 401 passes through the transfer board 400 and is electrically connected to the pad 404 and the redistribution layer.
  • the solder pad 404 is located on the back side of the transfer board 400 , and the solder ball 403 is connected to the solder pad 404 .
  • the redistribution layer is located on the front side of the bump 405 of the transfer board 400.
  • the redistribution layer is electrically connected to the bump 305.
  • the dry film 402 is located around the adapter plate 400 , and the side surfaces of the adapter plate are covered by the dry film 402 , thereby avoiding damage caused by collision and improving reliability.
  • the substrate 406 is connected to the solder balls 403 , so that the interposer 400 is disposed on the substrate 406 .
  • the first underfill layer 407 is located between the substrate 406 and the transfer board 400 .
  • the chip 408 is arranged on the front side of the interposer 400 .
  • the front side of the chip 408 has pins 4081 , which are soldered to the bumps 405 , so that the chip 408 is arranged on the front side of the interposer 400 .
  • the second underfill layer 409 is located between the chip 408 and the transfer board 400 .
  • the cover 410 is disposed on the chip 408.
  • the periphery of the cover 410 is connected to the substrate 406, and the top of the cover 410 is connected to the back side of the chip 408.
  • the present invention has at least the following beneficial effects: the present invention discloses a six-sided protected 2.5D module structure and a preparation method thereof, wherein a cutting path is formed on an adapter plate and filled with a dry film, and after the cutting step, the sides of the adapter plate are covered with a dry film to form protection.
  • This method achieves all-round protection of the 2.5D module structure without almost increasing the manufacturing process and cost of the 2.5D module structure, thereby improving the reliability of the module.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)

Abstract

La présente invention concerne une structure de module 2,5 D avec protection à six côtés, comprenant une plaque d'adaptateur ; des trous traversants en silicium conducteur, qui passent à travers la plaque d'adaptateur et sont électriquement connectés à des plots et à une couche de redistribution ; les plots, qui sont situés sur la face arrière de la plaque d'adaptateur ; des billes de soudure, qui sont connectées aux plots ; la couche de redistribution, qui est située sur la face avant de la plaque d'adaptateur et est électriquement connectée à des bosses ; les bosses, qui sont situées sur la face avant de la plaque d'adaptateur ; des films secs, qui recouvrent des faces latérales de la plaque d'adaptateur ; des puces, qui sont disposées sur la face avant de la plaque d'adaptateur ; une première couche de matériau de remplissage diélectrique, qui est située entre les puces et la plaque d'adaptateur ; une couche d'encapsulation, qui encapsule les puces ; un substrat, qui est connecté aux billes de soudure ; et une seconde couche de matériau de remplissage diélectrique, qui est située entre le substrat et la plaque d'adaptateur. La présente invention concerne en outre un procédé de fabrication pour la structure de module 2,5 D avec protection à six côtés. La structure de module 2,5 D avec protection à six côtés réalise une protection totale pour des modules 2,5 D tout en augmentant difficilement les procédures et les coûts de fabrication, ce qui permet d'améliorer la fiabilité des modules.
PCT/CN2023/081843 2022-10-21 2023-03-16 Structure de module 2,5 d à protection à six côtés et procédé s'y rapportant WO2024082532A1 (fr)

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CN115547998A (zh) * 2022-10-21 2022-12-30 华进半导体封装先导技术研发中心有限公司 一种六面保护的2.5d模组结构及其制备方法

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CN114256194A (zh) * 2021-12-21 2022-03-29 华进半导体封装先导技术研发中心有限公司 一种封装结构及其制备方法
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