WO2024014235A1 - 積層セラミックコンデンサ - Google Patents

積層セラミックコンデンサ Download PDF

Info

Publication number
WO2024014235A1
WO2024014235A1 PCT/JP2023/022726 JP2023022726W WO2024014235A1 WO 2024014235 A1 WO2024014235 A1 WO 2024014235A1 JP 2023022726 W JP2023022726 W JP 2023022726W WO 2024014235 A1 WO2024014235 A1 WO 2024014235A1
Authority
WO
WIPO (PCT)
Prior art keywords
internal electrode
region
layer
electrode layer
coverage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2023/022726
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
泰之 嶌田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP2024533601A priority Critical patent/JPWO2024014235A1/ja
Priority to KR1020247042949A priority patent/KR20250012661A/ko
Priority to CN202380052147.2A priority patent/CN119487593A/zh
Publication of WO2024014235A1 publication Critical patent/WO2024014235A1/ja
Priority to US18/650,285 priority patent/US20240282522A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/005—Electrodes
    • H01G4/012—Form of non-self-supporting electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/018—Dielectrics
    • H01G4/06—Solid dielectrics
    • H01G4/08—Inorganic dielectrics
    • H01G4/12—Ceramic dielectrics
    • H01G4/1209—Ceramic dielectrics characterised by the ceramic dielectric material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/228—Terminals
    • H01G4/232—Terminals electrically connecting two or more layers of a stacked or rolled capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/30—Stacked capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/018—Dielectrics
    • H01G4/06—Solid dielectrics
    • H01G4/08—Inorganic dielectrics
    • H01G4/12—Ceramic dielectrics
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/13—Energy storage using capacitors

Definitions

  • the present invention relates to a multilayer ceramic capacitor.
  • Patent Document 1 describes that structural defects in the internal electrode layer are suppressed by setting the average crystal grain size of the internal electrode layer to 0.1 ⁇ m or less. As a result of suppressing structural defects in the internal electrode layer, coverage of the internal electrode layer is improved. When the coverage of the internal electrode layer is improved, the area connected to the external electrode increases, and ESR (Equivalent Series Resistance) is suppressed.
  • ESR Equivalent Series Resistance
  • an object of the present invention is to provide a multilayer ceramic capacitor that is capable of achieving both good contact between internal electrode layers and external electrodes and good interlayer adhesion between internal electrode layers and dielectric layers. .
  • a multilayer ceramic capacitor includes a plurality of stacked dielectric layers and a plurality of internal electrode layers, and has first and second main surfaces facing each other in the stacking direction and facing in a width direction perpendicular to the stacking direction.
  • a laminate having a first side surface and a second side surface, and a first end surface and a second end surface facing each other in a length direction perpendicular to the lamination direction and the width direction; an external electrode disposed on an end surface of the internal electrode layer and connected to the internal electrode layer, the internal electrode layer having a first region and a second region having mutually different coverages; The coverage is larger than that of the second region, and the first region is connected to the external electrode.
  • FIG. 1 is a perspective view of a multilayer ceramic capacitor of the present invention.
  • FIG. 2 is a sectional view taken along the line II in FIG. 1; 2 is a sectional view taken along the line II-II in FIG. 1.
  • FIG. 2 is a sectional view taken along line III-III in FIG. 1.
  • FIG. 3 is a diagram showing a LT cross section of an internal electrode layer.
  • FIG. 3 is a diagram showing a state in which internal electrode layers are formed on a dielectric layer. It is a figure showing a sheet after cutting.
  • FIG. 3 is a diagram showing an LT cross section of a multilayer ceramic capacitor.
  • FIG. 3 is a diagram showing an LT cross section of a multilayer ceramic capacitor.
  • FIG. 1 is a perspective view showing a multilayer ceramic capacitor 1 of this embodiment.
  • the multilayer ceramic capacitor 1 includes a multilayer body 2 and an external electrode 3, as shown in FIG.
  • FIGS. 1 to 9 an L direction, a W direction, and a T direction are shown.
  • the L direction is the length direction L of the multilayer ceramic capacitor 1.
  • the W direction is the width direction W of the multilayer ceramic capacitor 1.
  • the T direction is the lamination direction T of the multilayer ceramic capacitor 1.
  • the cross section shown in FIG. 2 is referred to as the LT cross section
  • the cross section shown in FIG. 3 is referred to as the WT cross section
  • the cross section shown in FIG. 4 is referred to as the LW cross section.
  • the length direction L, the width direction W, and the lamination direction T do not necessarily have to be perpendicular to each other.
  • the length direction L, the width direction W, and the lamination direction T may intersect with each other.
  • the laminate 2 has a substantially rectangular parallelepiped shape.
  • the laminate has two main faces, two end faces and two side faces.
  • the main surface is a surface facing the stacking direction T.
  • the end face is a face facing in the length direction L.
  • the side surfaces are surfaces facing in the width direction W.
  • the two main surfaces are referred to as a first main surface M1 and a second main surface M2.
  • the two end faces are referred to as a first end face E1 and a second end face E2.
  • the two side surfaces are referred to as a first side surface S1 and a second side surface S2.
  • the ridgeline portion is a portion where two sides of the laminate 2 intersect.
  • a corner is a portion where three sides of the laminate 2 intersect.
  • the size of the laminate 2 can be, for example, as follows. That is, the length of the laminate 2 in the longitudinal direction L can be 200 ⁇ m or more and 3500 ⁇ m or less. The length of the laminate 2 in the stacking direction T can be 100 ⁇ m or more and 2800 ⁇ m or less. The length of the laminate 2 in the width direction W can be 100 ⁇ m or more and 2800 ⁇ m or less. The length of each part of the laminate 2 can be measured with a micrometer or an optical microscope.
  • FIG. 2 is a sectional view taken along line II of the multilayer ceramic capacitor shown in FIG.
  • the laminate 2 includes a plurality of dielectric layers 7 and a plurality of internal electrode layers 5.
  • the plurality of dielectric layers 7 and the plurality of internal electrode layers 5 are stacked on each other in the stacking direction T.
  • the laminate 2 includes, in the lamination direction T, an inner layer part IL and two outer layer parts OL, a first outer layer part OL1 and a second outer layer part OL2, which are arranged to sandwich the inner layer part IL.
  • the inner layer portion IL includes a portion of the plurality of dielectric layers 7 and the plurality of internal electrode layers 5.
  • a plurality of internal electrode layers 5 are arranged facing each other with a dielectric layer 7 in between.
  • the inner layer portion IL is a portion that forms a capacitance, and therefore substantially functions as a capacitor. From this, it can be said that the inner layer part IL is an effective area in the stacking direction T.
  • the first outer layer part OL1 is arranged on the first main surface M1 side of the laminate 2, and the second outer layer part OL2 is arranged on the second main surface M2 side of the laminate 2.
  • the first outer layer portion OL1 is arranged between the internal electrode layer 5 closest to the first main surface M1 among the plurality of internal electrode layers 5 and the first main surface M1.
  • the second outer layer portion OL2 is arranged between the internal electrode layer 5 closest to the second main surface M2 among the plurality of internal electrode layers 5 and the second main surface M2.
  • the first outer layer portion OL1 and the second outer layer portion OL2 do not include the internal electrode layer 5, and the remaining dielectric layers 7 excluding the dielectric layer 7 for the inner layer portion IL among the plurality of dielectric layers 7 are included. include.
  • the first outer layer portion OL1 and the second outer layer portion OL2 are portions that function as a protective layer for the inner layer portion IL.
  • the dielectric layer 7 includes an outer dielectric layer 7a and an inner dielectric layer 7b.
  • the outer dielectric layer 7a is the dielectric layer 7 that constitutes the first outer layer portion OL1 and the second outer layer portion OL2 among the dielectric layers 7.
  • the outer dielectric layer 7a is arranged between the first main surface M1 and the internal electrode layer 5 closest to the first main surface M1, and between the second main surface M2 and the inner electrode layer 5 closest to the second main surface M2. It is located between the adjacent internal electrode layer 5.
  • the inner dielectric layer 7b is a dielectric layer 7 that is located between the internal electrode layers 5 and forms the inner layer portion IL together with the internal electrode layers 5.
  • the inner dielectric layer 7b is located between a first internal electrode layer 5a and a second internal electrode layer 5b, which will be described below.
  • the number of dielectric layers 7 stacked on the laminate 2 can be, for example, 10 or more and 1800 or less.
  • the number of dielectric layers 7 includes the number of outer dielectric layers 7a and the number of inner dielectric layers 7b.
  • the thickness of the outer dielectric layer 7a of the dielectric layer 7 can be, for example, 10 ⁇ m or more and 200 ⁇ m or less.
  • the thickness of the inner dielectric layer 7b can be, for example, 0.3 ⁇ m or more and 5.0 ⁇ m or less.
  • the material of the dielectric layer 7 can be, for example, a dielectric ceramic containing BaTiO 3 , CaTiO 3 , SrTiO 3 , CaZrO 3 or TiO 2 .
  • the material of the dielectric layer 7 may be the aforementioned dielectric ceramic to which a Mn compound, Fe compound, Cr compound, Co compound, Ni compound, or the like is added.
  • Internal electrode layer 5 includes a first internal electrode layer 5a and a second internal electrode layer 5b.
  • the first internal electrode layer 5a is an internal electrode layer 5 connected to the first external electrode 3a.
  • the second internal electrode layer 5b is the internal electrode layer 5 connected to the second external electrode 3b.
  • the first internal electrode layer 5a extends from the first end surface E1 toward the second end surface E2.
  • the second internal electrode layer 5b extends from the second end surface E2 toward the first end surface E1.
  • the first internal electrode layer 5a and the second internal electrode layer 5b each have a counter electrode part and an extraction electrode part.
  • the opposing electrode portion is a portion of the internal electrode layer 5 where the first internal electrode layer 5a and the second internal electrode layer 5b face each other in the stacking direction T.
  • the extraction electrode portion is a portion of the internal electrode layer 5 that is extracted from the counter electrode portion to the end surface E1 or end surface E2 of the laminate 2.
  • the counter electrode portion of the first internal electrode layer 5a is referred to as a first counter electrode portion 5af, and the extraction electrode portion of the first internal electrode layer 5a is referred to as a first extraction electrode portion 5ad.
  • the first lead-out electrode portion 5ad is a portion drawn out from the first opposing electrode portion 5af to the first end surface E1 of the stacked body 2.
  • the opposing electrode portion of the second internal electrode layer 5b is referred to as a second opposing electrode portion 5bf
  • the extraction electrode portion of the second internal electrode layer 5b is referred to as a second extraction electrode portion 5bd.
  • the second lead-out electrode portion 5bd is a portion drawn out from the second opposing electrode portion 5bf to the second end surface E2 of the stacked body 2.
  • the number of internal electrode layers 5 can be, for example, 10 or more and 1800 or less.
  • the number of internal electrode layers 5 includes the number of first internal electrode layers 5a and the number of second internal electrode layers 5b.
  • the thickness of the internal electrode layer 5 can be, for example, 0.3 ⁇ m or more and 5.0 ⁇ m or less.
  • the material of the internal electrode layer 5 can be, for example, a metal such as Ni, Cu, Ag, Pd, and Au, an alloy of Ni and Cu, or an alloy of Ag and Pd.
  • the material of the internal electrode layer 5 may include dielectric particles having the same composition as the ceramic contained in the dielectric layer 7.
  • the laminate 2 has, in the length direction L, an electrode facing portion LF and two end gap portions EG, a first end gap portion EG1 and a second end gap portion EG2.
  • the electrode facing portion LF is a portion where the first internal electrode layer 5a and the second internal electrode layer 5b face each other in the stacking direction T. That is, the portion where the first opposing electrode section 5af and the second opposing electrode section 5bf face each other in the stacking direction T is the electrode opposing section LF.
  • the electrode facing portion LF is located at the center of the laminate 2 in the longitudinal direction L.
  • a capacitance is formed by the first counter electrode section 5af and the second counter electrode section 5bf facing each other with the inner dielectric layer 7b interposed therebetween. From this, it can be said that the electrode facing portion LF is an effective area in the length direction L.
  • the end gap portion is a portion where the first internal electrode layer 5a and the second internal electrode layer 5b do not face each other in the stacking direction T. Specifically, in the stacking direction T, a portion where the first internal electrode layer 5a is arranged and where the second internal electrode layer 5b is not arranged is the first end gap portion EG1. Similarly, a portion where the second internal electrode layer 5b is arranged and where the first internal electrode layer 5a is not arranged is the second end gap portion EG2.
  • the first end gap portion EG1 corresponds to a portion where the first extraction electrode portion 5ad is arranged
  • the second end gap portion EG2 corresponds to a portion where the second extraction electrode portion 5bd is arranged. do.
  • the first end gap portion EG1 functions as an extraction electrode to the first end surface E1 of the first internal electrode layer 5a
  • the second end gap portion EG2 functions as a lead-out electrode to the first end surface E1 of the first internal electrode layer 5b. It functions as an extraction electrode to the end surface E2. Since the end gap portion EG is a division in the length direction L, it is also referred to as an L gap.
  • the length of the end gap portion EG in the longitudinal direction L can be, for example, 5 ⁇ m or more and 30 ⁇ m or less.
  • the external electrodes include a first external electrode 3a and a second external electrode 3b.
  • the first external electrode 3a is an external electrode arranged on the first end surface E1 of the stacked body 2.
  • the first external electrode 3a is electrically connected to the first internal electrode layer 5a.
  • the first external electrode 3a extends from the first end surface E1 to parts of the two main surfaces and parts of the two side surfaces.
  • a portion of the first external electrode 3a disposed on the first end surface E1 of the stacked body 2 is referred to as an end surface external electrode 3aE.
  • a portion disposed on a part of the first main surface M1 or a part of the second main surface M2 is referred to as a main surface external electrode 3aM.
  • a portion disposed on a part of the first side surface S1 or a part of the second side surface S2 is referred to as a side surface external electrode 3aS.
  • the second external electrode 3b is an external electrode arranged on the second end surface E2 of the stacked body 2.
  • the second external electrode 3b is electrically connected to the second internal electrode layer 5b.
  • the second external electrode 3b has the same configuration as the first external electrode 3a. That is, the second external electrode 3b extends from the second end surface E2 to parts of the two main surfaces and parts of the two side surfaces.
  • a portion of the second external electrode 3b disposed on the second end surface E2 of the stacked body 2 is referred to as an end surface external electrode 3bE.
  • a portion disposed on a part of the first main surface M1 or a part of the second main surface M2 is referred to as a main surface external electrode 3bM.
  • a portion disposed on a part of the first side surface S1 or a part of the second side surface S2 is referred to as a side surface external electrode 3bS.
  • the layer structure of the external electrode 3 will be explained based on FIG. 2.
  • the first external electrode 3a includes a first base electrode layer 3a1, a first inner plating layer 3a2, and a first surface plating layer 3a3, and similarly, the second external electrode 3b includes a second base electrode layer 3a1. It includes a layer 3b1, a second inner plating layer 3b2, and a second surface plating layer 3b3.
  • the layer structure of the external electrode 3 will be explained based on the first external electrode 3a.
  • the explanation based on the first external electrode 3a also applies to the second external electrode 3b. This is because the first external electrode 3a and the second external electrode 3b have the same structure, although the surfaces on which they are provided are different.
  • the first base electrode layer 3a1 is arranged on the first end surface E1 of the laminate 2, and covers the first end surface E1 of the laminate 2.
  • the first base electrode layer 3a1 extends from the first end surface E1 to a part of the first main surface M1, a part of the second main surface M2, a part of the first side surface S1, and a second side surface S2. It may extend to a part of the
  • the first base electrode layer 3a1 may be a fired layer containing metal and glass.
  • the glass include glass components containing at least one selected from B, Si, Ba, Mg, Al, Li, and the like. As a specific example, borosilicate glass can be used.
  • the metal includes Cu as a main component. Further, the metal may include at least one selected from Ni, Ag, Pd, or Au, or an alloy such as Ag-Pd alloy as a main component, or may contain as a component other than the main component. But that's fine.
  • the fired layer is a layer obtained by applying a conductive paste containing metal and glass to the laminate using a dipping method and firing it. Note that the firing may be performed after the internal electrode layer is fired, or the firing may be performed simultaneously with the internal electrode layer. Moreover, the fired layer may be a plurality of layers.
  • the first base electrode layer 3a1 may be a resin layer containing conductive particles and a thermosetting resin.
  • the resin layer may be formed on the above-mentioned fired layer, or may be formed directly on the laminate without forming the fired layer.
  • the resin layer is a layer obtained by applying a conductive paste containing conductive particles and a thermosetting resin to the laminate using a coating method and then baking it. Note that the firing may be performed after the internal electrode layer is fired, or the firing may be performed simultaneously with the internal electrode layer. Moreover, the resin layer may be a plurality of layers.
  • each of the first base electrode layer 3a1 and the second base electrode layer 425 as a fired layer or resin layer is not particularly limited, and may be 1 ⁇ m or more and 10 ⁇ m or less.
  • the first base electrode layer 3a1 may be a thin film layer of 1 ⁇ m or less formed by a thin film forming method such as a sputtering method or a vapor deposition method, and on which metal particles are deposited.
  • the first inner plating layer 3a2 is disposed on the first base electrode layer 3a1, and covers at least a portion of the first base electrode layer 3a1.
  • the first inner plating layer 3a2 includes, for example, at least one selected from metals such as Cu, Ni, Ag, Pd, or Au, or alloys such as an Ag-Pd alloy.
  • the first surface plating layer 3a3 is arranged on the first inner plating layer 3a2, and covers at least a portion of the first inner plating layer 3a2.
  • the first surface plating layer 3a3 contains, for example, a metal such as Sn.
  • the first inner plating layer 3a2 is a Ni plating layer
  • the first surface plating layer 3a3 is a Sn plating layer.
  • the Ni plating layer can prevent the base electrode layer from being eroded by solder when mounting ceramic electronic components, and the Sn plating layer can improve the wettability of solder when mounting ceramic electronic components. , which can facilitate implementation.
  • the first inner plating layer 3a2 has lower solder wettability than the first surface plating layer 3a3.
  • FIG. 3 is a sectional view taken along line II-II of the multilayer ceramic capacitor shown in FIG.
  • the laminate 2 includes, in the width direction W, an electrode facing part WF where the internal electrode layer 5 faces, and two side gap parts SG arranged so as to sandwich the electrode facing part WF. It has one side gap part SG1 and a second side gap part SG2.
  • the first side gap portion SG1 is located between the electrode facing portion WF and the first side surface S1
  • the second side gap portion SG2 is located between the electrode facing portion WF and the second side surface S2. do.
  • the first side gap portion SG1 is located between the end of the internal electrode layer 5 on the first side surface S1 side and the first side surface S1
  • the second side gap portion SG2 is located between the inner electrode layer 5 and the first side surface S1. It is located between the end of the electrode layer 5 on the second side surface S2 side and the second side surface S2.
  • the first side gap portion SG1 and the second side gap portion SG2 do not include the internal electrode layer 5, but only include the dielectric layer 7.
  • the first side gap portion SG1 and the second side gap portion SG2 function as a protective layer for the internal electrode layer 5. Since the side gap portion SG is a division in the width direction W, it is also referred to as a W gap.
  • the length of the side gap portion SG in the width direction W can be, for example, 5 ⁇ m or more and 30 ⁇ m or less.
  • the length in the longitudinal direction L of the entire multilayer ceramic capacitor 1 including the multilayer body 2 and the external electrode 3 can be, for example, 0.2 mm or more and 3.5 mm or less.
  • the length of the entire multilayer ceramic capacitor 1 in the stacking direction T can be, for example, 0.1 mm or more and 2.8 mm or less.
  • the length of the entire multilayer ceramic capacitor 1 in the width direction W can be, for example, 0.1 mm or more and 2.8 mm or less.
  • the multilayer ceramic capacitor 1 is a two-terminal capacitor.
  • the multilayer ceramic capacitor 1 is not limited to two terminals, but can also be a multi-terminal capacitor having three or more terminals.
  • FIG. 4 is a sectional view of the laminate 2 corresponding to the sectional view taken along the line III--III of the multilayer ceramic capacitor shown in FIG. In other words, FIG. 4 shows the LW cross section of the laminate 2 at the position where the first internal electrode layer 5a is present. Since FIG. 4 is a cross-sectional view of the laminate 2, the external electrode 3 is not shown in FIG. Hereinafter, the first internal electrode layer 5a will be explained as the internal electrode layer 5.
  • the first internal electrode layer 5a extends from the first end surface E1 to the second end surface E2.
  • the first internal electrode layer 5a is located in the first end gap portion EG1 and the electrode facing portion LF in the length direction L of the stacked body 2.
  • the first internal electrode layer 5a has a plurality of regions with different coverage within its plane. Specifically, the first internal electrode layer 5a has four regions, a first region A1 to a fourth region A4, and the four regions have different coverages.
  • the internal electrode layer 5 is made of the metal material mentioned above. However, the internal electrode layer 5 is not completely filled with the metal material. Internal electrode layer 5 includes a hollow portion where no metal material is present. Therefore, the ratio occupied by the metal material in the internal electrode layer 5 is defined as coverage. Coverage is also called coverage rate. The method of measuring coverage will be explained later.
  • the first internal electrode layer 5a has four regions, the first region A1 to the fourth region A4, which have different coverages.
  • the order of coverage size from the first area A1 to the fourth area A4 is first area A1>second area A2>third area A3>fourth area A4.
  • each region in the first internal electrode layer 5a is as follows.
  • the first area A1, the third area A3, the second area A2, and the fourth area A4 are arranged in this order from the first end surface E1 to the second end surface E2.
  • a first region A1 and a third region A3 are arranged in the first end gap portion EG1
  • a second region A2 and a fourth region are arranged in the electrode facing region LF.
  • the first region A1 and the third region A3 occupy the first end gap portion EG1
  • the second region A2 and the fourth region occupy the electrode facing portion LF.
  • the internal electrode layer 5 since the internal electrode layer 5 has a plurality of regions with different coverages, the connectivity between the internal electrode layer 5 and the external electrode 3 and the connection between the internal electrode layer 5 and the dielectric layer 7 are improved. It is possible to simultaneously suppress peeling during the process.
  • the characteristics of the arrangement of regions will be explained in order.
  • the internal electrode layer 5 has a plurality of regions with different coverages, and a first region A1 with a large coverage is arranged at a position facing the first end surface E1. Areas with low coverage are placed at other positions.
  • a first region A1 with large coverage is arranged at a position connected to the first external electrode 3a in the first internal electrode layer 5a. Therefore, the connectivity between the first internal electrode layer 5a and the first external electrode 3a can be improved.
  • the first internal electrode layer 5a has a second region and a third region, which are regions with small coverage.
  • the region with small coverage can improve the adhesion between the first internal electrode layer 5a and the inner dielectric layer 7b.
  • delamination between the first internal electrode layer 5a and the inner dielectric layer 7b can be suppressed.
  • the reason why the adhesion is improved is as follows.
  • the first internal electrode layer 5a in the region with small coverage has more cavities, through holes, depressions, etc. than the first internal electrode layer 5a in the region with large coverage. do.
  • the dielectric of the inner dielectric layer 7b easily enters into these cavities, through holes, and depressions. Since the dielectric of the inner dielectric layer 7b enters the inside of the first internal electrode layer 5a, the adhesion between the first internal electrode layer 5a and the inner dielectric layer 7b is improved.
  • a region with large coverage is arranged at a position connected to the first external electrode 3a in the first internal electrode layer 5a, and a region with high coverage is arranged at a position not directly involved in the connection with the first external electrode 3a.
  • a small area is located. Therefore, it is possible to improve the connectivity between the first external electrode 3a and the first external electrode 3a, and to suppress delamination between the first internal electrode layer 5a and the inner dielectric layer 7b. , it is possible to achieve both.
  • the first internal electrode layer 5a has a second region A2 and a third region A3 as regions having smaller coverage than the first region A1.
  • the third region A3 is located between the first region A1 and the second region A2 and in the end gap portion EG1.
  • the coverage of the third area A3 is smaller than the coverage of the second area A2.
  • the connection between the first internal electrode layer 5a and the first external electrode 3a and the formation of capacitance can be achieved without sacrificing either the connectivity or the capacitance formation. Adhesion between the first internal electrode layer 5a and the inner dielectric layer 7b can be improved.
  • the third region A3 having the smallest coverage among the first to third regions A1 to A3 is arranged not in the electrode facing part LF but in the first end gap part EG1.
  • the third region A3 is arranged not on the first end surface E1 side of the first end gap portion EG1 but on the electrode facing portion LF side. Therefore, although the third region A3 is arranged in the first end gap portion EG1, it does not face the first end surface E1. As described above, even if the coverage of the third region A3 is small, the connectivity with the external electrode 3 does not deteriorate.
  • the third region A3 has a small coverage, it is possible to improve the adhesion between the first internal electrode layer 5a and the inner dielectric layer 7b, as described above.
  • the third region A3 with small coverage is arranged on the side of the electrode facing part LF in the first end gap part EG, capacitance is formed and the first internal electrode layer 5a and the first external
  • the adhesion between the first internal electrode layer 5a and the inner dielectric layer 7b can be improved without sacrificing any connectivity with the electrode 3a.
  • a fourth region A4 is arranged at the end of the second region A2 on the opposite side to the first end gap portion EG1.
  • the fourth area A4 is an area with the smallest coverage among the first area A1 to the fourth area A4. Furthermore, as will be explained later, the length in the length direction L of the fourth area A4 is much shorter than the length in the length direction of the second area A2.
  • the adhesion between the first internal electrode layer 5a and the inner dielectric layer 7b can be improved without sacrificing capacitance formation.
  • the fourth region A4 is arranged at a portion corresponding to an end portion when the internal electrode layer 5 is formed on the dielectric layer 7 by coating or the like, as will be described later. Therefore, the thickness of the first internal electrode layer 5a in the fourth region A4 gradually decreases toward the end thereof. That is, the cross section is obliquely inclined. Therefore, the end portion of the first internal electrode layer 5a where the fourth region A4 is arranged can be said to be a region that is unlikely to contribute to capacitance formation. Therefore, even if the coverage of the fourth region A4 is small, the influence on capacitance formation is not large.
  • the end portion of the internal electrode layer 5 is a portion where separation from the dielectric layer 7 is likely to occur. Therefore, by arranging the fourth region A4 at the end of the first internal electrode layer 5a, it is possible to effectively suppress separation between the first internal electrode layer 5a and the inner dielectric layer 7b.
  • the fourth region A4 having the smallest coverage at the end of the first internal electrode layer 5a on the second end surface E2 side the first internal Adhesion between the electrode layer 5a and the inner dielectric layer 7b can be improved.
  • the preferred length of each region in the length direction L and the preferred ratio of each region to the length of the end gap portion EG1, that is, the L gap in the length direction L will be explained.
  • the first area A1 and the third area A3 arranged in the end gap portion EG1 are as follows.
  • the length of the first region A1 is preferably 5 ⁇ m or more and 15 ⁇ m or less, and the ratio to the L gap is preferably 8% or more and 25% or less.
  • the length of the third region A3 is preferably 16 ⁇ m or more and 45 ⁇ m or less, and the ratio to the L gap is preferably 26% or more and 75% or less.
  • the second area A2 and the fourth area A4 arranged in the electrode facing part LF are as follows.
  • the length of the second region A2 is preferably 1840 ⁇ m or more and 1880 ⁇ m or less, and the ratio to the L gap is preferably 3067% or more and 3133% or less.
  • the length of the fourth region A4 is preferably 1 ⁇ m or more and 30 ⁇ m or less, and the ratio to the L gap is preferably 2% or more and 50% or less. Note that the above-mentioned numerical values are just examples, and can be changed as appropriate depending on the size of the multilayer ceramic capacitor 1 and the like.
  • Coverage measurement is performed as follows. As described above, the interior of the internal electrode layer 5 includes a hollow portion where no metal is present. Therefore, in the internal electrode layer 5, the ratio occupied by metal is defined as coverage.
  • the entire internal electrode layer 5 is the sum of (i) metal, (ii) a portion that is not filled with dielectric material and exists as a cavity, and (iii) a portion of the cavity that is filled with dielectric material. shall be.
  • the ratio of (i) metal to the entire internal electrode layer 5 is defined as coverage.
  • Step 1 coverage can be determined through Step 1 and Step 2 below.
  • Step 1 Regarding the laminate 2, the surface including the length direction L and the lamination direction T, that is, the LT surface, is polished to the center in the width direction W to expose the LT cross section of the internal electrode layer 5.
  • Step 2 The exposed LT cross section of the internal electrode layer 5 is divided into regions of a predetermined length in the length direction L, and the ratio of metal to the whole in the divided regions is determined. The obtained ratio becomes the coverage.
  • the predetermined length is set to, for example, 2% or more and 3% or less of the total length of the internal electrode layer 5 in the length direction L. Note that this length is just an example, and can be changed as appropriate depending on the size of the multilayer ceramic capacitor 1, the size of the end gap portion, etc.
  • the predetermined length may be 50 ⁇ m.
  • FIG. 5 is a diagram showing a LT cross section of the internal electrode layer 5.
  • FIG. 5 is a diagram showing a LT cross section of the first internal electrode layer 5a shown in FIG. 4.
  • FIG. 5 shows four frames R1 to R4 as the outer frames of the portion where coverage is measured. Within these frames, find the proportion of metal to the whole.
  • the dielectric of the dielectric layer 7 that has entered the cavity of the internal electrode layer 5, that is, the dielectric material is shown as an intra-cavity dielectric 7c.
  • ⁇ Coverage measurement procedure> The procedure for measuring coverage is as follows. First, the area within the frame is observed using an optical microscope. Then, the length L2 of the entire internal electrode layer in the length direction L that is included in the field of view of the optical microscope is determined. A length L1 in the length direction L at which the metal is substantially observed within the field of view of the optical microscope is determined. The remaining length after excluding the length of the "region where the metal of the internal electrode layer is not observed" is L1. The ratio is determined by dividing this length L1 by the length L2, and the determined ratio becomes the coverage.
  • the area where the coverage is 95% or more is determined to be the first area A1 with large coverage.
  • An area where the coverage is 80% or more and less than 95% is determined to be the second area A2 in coverage.
  • the area where the coverage is 70% or more and less than 80% is determined to be the third area A3 with low coverage.
  • the area where the coverage is 50% or more and less than 70% is determined to be the fourth area A4 with the minimum coverage.
  • FIG. 6 is a diagram showing a state in which the first internal electrode layer 5a and the second internal electrode layer 5b are formed on the upper surface of the dielectric layer 7.
  • a portion 601 in FIG. 6 shows an LW cross section in the laminate 2, and a portion 602 shows a LT cross section corresponding to the portion 601.
  • a first internal electrode layer 5a and a second internal electrode layer 5b are formed on the dielectric layer 7.
  • the uncut sheet 10 is cut into two along the cutting line CL.
  • One of the sheets resulting from cutting is designated as a first cut sheet 10a, and the other is designated as a second cut sheet 10b.
  • FIG. 7 shows the first cut sheet 10a and the second cut sheet 10b.
  • FIG. 7 is a diagram showing the first cut sheet 10a and the second cut sheet 10b.
  • a portion 701 in FIG. 7 shows the LW cross section of the first cut sheet 10a, and a portion 702 shows the LW cross section of the second cut sheet 10b.
  • the inner layer part IL in the laminate 2 can be formed by sequentially stacking a plurality of first cut sheets 10a shown in a section 701 and second cut sheets 10b shown in a section 702.
  • the dielectric layer 7 is provided with the internal electrode layer 5 corresponding to the first internal electrode layer 5a and the internal electrode layer 5 corresponding to the second internal electrode layer 5b. Then, by cutting along the cutting line CL, the internal electrode layer 5 is divided into a first internal electrode layer 5a and a second internal electrode layer 5b. Further, the dielectric layer 7 is provided with portions on both ends thereof in the length direction L where the internal electrode layer 5 is not formed. This portion is a portion that becomes the end gap portion EG in the laminate 2.
  • the portion of the internal electrode layer 5 facing the cutting line CL in the uncut sheet 10 is connected to the external electrode 3. This will be the part that will be used. Therefore, it is preferable that the portion facing the cutting line CL be the first region A1 with large coverage.
  • the first internal electrode layer 5a and the second internal electrode layer 5b overlap.
  • This part becomes the electrode facing part LF.
  • the electrode facing portion LF is a portion where a capacitor is formed. Therefore, as a region following the first region A1 located on both sides of the cutting line CL, a second region A2 having the second largest coverage after the first region A1 can be used. However, in the end gap portion EG, the portion of the internal electrode layer 5 following the first region A1 does not need to be a region with large coverage. This is because no capacitance is formed in the end gap portion EG.
  • a third area A3 whose coverage is smaller than the first area A1 and the second area A2 is arranged in the end gap part EG, following the first area A1.
  • the connection between the internal electrode layer 5 and the dielectric layer 7 is achieved using a portion that has a small contribution to capacitance formation. Peeling can be suppressed.
  • a second region A2 having a larger coverage than the third region A3 is arranged at a position corresponding to the electrode facing portion LF.
  • the fourth area A4 (Fourth area) Next, the fourth area A4 will be explained.
  • the fourth regions A4 are arranged at both ends of the internal electrode layer 5 in the length direction L in the sheet 10 before cutting.
  • the end surfaces thereof are obliquely inclined. That is, the LT cross section of the internal electrode layer 5 has a trapezoidal shape.
  • the internal electrode layer 5 is thinner. Therefore, this becomes a portion of the internal electrode layer 5 that is unlikely to contribute to capacitance formation. Further, the end face of the internal electrode layer 5 is also a part where separation from the dielectric layer 7 is likely to occur. Therefore, a fourth region A4 with small coverage is arranged in the region LE of the internal electrode layer 5. Thereby, the adhesiveness between the internal electrode layer 5 and the dielectric layer 7 can be improved without impairing capacitance formation.
  • the auxiliary dielectric layer 7d is used for coverage adjustment. Therefore, first, the auxiliary dielectric layer 7d will be explained. It is preferable that the length of the laminate 2 in the stacking direction T has a small difference between the electrode facing portion LF and the end gap portion EG. However, in the inner layer portion IL, the lengths in the stacking direction T tend to differ between the electrode facing portion LF and the end gap portion EG. In the electrode facing part LF, a plurality of dielectric layers 7 and internal electrode layers 5 are laminated, whereas in the end gap part EG, only the dielectric layer 7 is laminated and the internal electrode layer 5 is not laminated. It is. Therefore, in order to reduce the difference in length in the stacking direction T between the end gap part EG and the electrode facing part LF, an auxiliary dielectric layer 7d, which is an additional dielectric layer 7, is arranged in the end gap part EG. There are cases.
  • FIGS. 8 and 9 are diagrams showing the LT cross section of the multilayer ceramic capacitor 1. 8 and 9 schematically show the state of region R5 in FIG. 2. In FIG. Further, FIGS. 8 and 9 show examples of different configurations in the vicinity of the auxiliary dielectric layer 7d. As shown in FIG. 8, in the first end gap portion EG1, an auxiliary dielectric layer 7d is arranged between the two inner dielectric layers 7b. Since the auxiliary dielectric layer 7d compensates for the thickness of the second internal electrode layer 5b, the difference in length in the stacking direction T between the end gap portion EG and the electrode facing portion LF becomes small.
  • the structure shown in FIG. 8 and the structure shown in FIG. 9 differ in the structure of the portion where the auxiliary dielectric layer 7d and the second internal electrode layer 5b are in contact.
  • the auxiliary dielectric layer 7d overlaps the second internal electrode layer 5b, whereas in the configuration shown in FIG. It overlaps with 7d.
  • overlapping means covering from above in the stacking direction T.
  • the side of the second main surface M2 is defined as the upper side with respect to the first main surface M1.
  • Overlapping means overlapping from the second main surface M side.
  • auxiliary dielectric layer 7d and the internal electrode layer 5 may or may not overlap as described above. That is, instead of one covering the other, it is also possible to have their end surfaces in contact with each other.
  • the coverage can be adjusted by changing the composition of the auxiliary dielectric layer 7d and thereby changing the degree of shrinkage of the auxiliary dielectric layer 7d that occurs during firing.
  • metal discontinuities occur when following the contraction of the auxiliary dielectric layer 7d. Therefore, by changing the degree of contraction of the auxiliary dielectric layer 7d, the coverage of the internal electrode layer 5 can be adjusted.
  • the coverage can be adjusted by adjusting the depth of the openings in the mesh used for screen printing.
  • the opening of the mesh is adjusted as follows. Opening corresponding to first area A1: large depth (deepest) Opening corresponding to second area A2: medium depth (depth between deepest and shallowest) Opening corresponding to third area A3: small depth (shallowest)
  • the fourth area A4 can be provided by adjusting the viscosity of the conductive paste to be printed to form an inclined area (area LE shown in FIG. 6).
  • Internal electrode layer 5 can also be formed using gravure printing.
  • the coverage of each region can be adjusted by adjusting the area and volume of the opening of the gravure plate corresponding to each region.
  • the area and volume of the opening can also be adjusted using, for example, laser drawing.
  • auxiliary dielectric layer 7d can be arbitrarily selected.
  • the Ni paste and then the paste for the auxiliary dielectric layer 7d may be printed in this order, or conversely, the paste for the auxiliary dielectric layer 7d and then the Ni paste may be printed in this order.
  • the composition of the auxiliary dielectric layer 7d and the composition of the other portions of the dielectric layer 7 may be the same or different.
  • the composition here means the elements constituting the dielectric layer 7 and their amounts.
  • the grains may be different between the auxiliary dielectric layer 7d and the other portions of the dielectric layer 7.
  • the grain of the auxiliary dielectric layer 7d may be smaller than the grain of the other portion of the dielectric layer 7, or vice versa.
  • Sn may be present at the interface between the internal electrode layer 5 and the dielectric layer 7.
  • a construction method for forming the laminate 2 a construction method in which the first side gap portion SG1 and the second side gap portion SG2 are attached later to the counter electrode portion WF can also be used.
  • ⁇ 1> Including a plurality of stacked dielectric layers and a plurality of internal electrode layers, A first main surface and a second main surface facing each other in the stacking direction, a first side surface and a second side surface facing each other in the width direction perpendicular to the stacking direction, and a length direction perpendicular to the stacking direction and the width direction.
  • a laminate having a first end face and a second end face facing each other; an external electrode arranged on the first end surface and the second end surface and connected to the internal electrode layer,
  • the internal electrode layer has a first region and a second region having different coverages, The first region has a larger coverage than the second region, the first region is connected to the external electrode, Multilayer ceramic capacitor.
  • ⁇ 2> There is a third region between the first region and the second region, The coverage of the third region is smaller than both the coverage of the first region and the coverage of the second region.
  • the multilayer ceramic capacitor according to ⁇ 1> is a third region between the first region and the second region.
  • the second area includes at least a part of the effective area facing the internal electrode layer.
  • ⁇ 4> Coverage of the first region is 95% or more, The coverage of the second region is 80% or more and less than 95%.
  • the coverage of the third region is 70% or more and less than 80%, The multilayer ceramic capacitor according to ⁇ 2>.
  • a fourth region is provided at an end of the second region opposite to the first region, The coverage of the fourth region is smaller than any of the first region, the second region, and the third region.
  • the coverage of the fourth region is 50% or more and less than 70%,
  • Multilayer ceramic capacitor 2 Laminated body 3 External electrode 3a First external electrode 3b Second external electrode 5 Internal electrode layer 5a First internal electrode layer 5ad First extraction electrode section 5af First counter electrode section 5b Second internal electrode layer 5bd first extraction electrode part 5bf second counter electrode part 7 dielectric layer 7a outer dielectric layer 7b inner dielectric layer 7c intra-cavity dielectric 7d auxiliary dielectric layer 10 sheet before cutting 10a first Sheet after cutting 10b Second sheet after cutting IL Inner layer part OL1 First outer layer part OL2 Second outer layer part LF Electrode facing part EG1 First end gap part EG2 Second end gap part WF Electrode facing part SG1 First Side gap portion SG2 Second side gap portion M1 First main surface M2 Second main surface E1 First end surface E2 Second end surface S1 First side surface S2 Second side surface T Lamination direction L Length direction W Width direction A1 First area A2 Second area A3 Third area A4 Fourth area CL Cutting line

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Ceramic Capacitors (AREA)
PCT/JP2023/022726 2022-07-12 2023-06-20 積層セラミックコンデンサ Ceased WO2024014235A1 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2024533601A JPWO2024014235A1 (https=) 2022-07-12 2023-06-20
KR1020247042949A KR20250012661A (ko) 2022-07-12 2023-06-20 적층 세라믹 콘덴서
CN202380052147.2A CN119487593A (zh) 2022-07-12 2023-06-20 层叠陶瓷电容器
US18/650,285 US20240282522A1 (en) 2022-07-12 2024-04-30 Multilayer ceramic capacitor

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2022111971 2022-07-12
JP2022-111971 2022-07-12

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US18/650,285 Continuation US20240282522A1 (en) 2022-07-12 2024-04-30 Multilayer ceramic capacitor

Publications (1)

Publication Number Publication Date
WO2024014235A1 true WO2024014235A1 (ja) 2024-01-18

Family

ID=89536462

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2023/022726 Ceased WO2024014235A1 (ja) 2022-07-12 2023-06-20 積層セラミックコンデンサ

Country Status (5)

Country Link
US (1) US20240282522A1 (https=)
JP (1) JPWO2024014235A1 (https=)
KR (1) KR20250012661A (https=)
CN (1) CN119487593A (https=)
WO (1) WO2024014235A1 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2025263243A1 (ja) * 2024-06-21 2025-12-26 株式会社村田製作所 積層セラミックコンデンサ

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011204849A (ja) * 2010-03-25 2011-10-13 Murata Mfg Co Ltd 積層セラミック電子部品の製造方法
JP2013016770A (ja) * 2011-06-30 2013-01-24 Samsung Electro-Mechanics Co Ltd 積層セラミック電子部品及びその製造方法
JP2016136557A (ja) * 2015-01-23 2016-07-28 Tdk株式会社 積層型セラミック電子部品
JP2018152547A (ja) * 2017-03-14 2018-09-27 株式会社村田製作所 積層セラミックコンデンサ
JP2021061302A (ja) * 2019-10-04 2021-04-15 株式会社村田製作所 積層セラミックコンデンサ

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001035747A (ja) * 1999-07-21 2001-02-09 Taiyo Yuden Co Ltd 積層セラミックコンデンサ
JP4809173B2 (ja) * 2006-09-27 2011-11-09 京セラ株式会社 積層セラミックコンデンサ
KR101197921B1 (ko) * 2011-10-18 2012-11-05 삼성전기주식회사 적층 세라믹 전자 부품
JP5711696B2 (ja) 2012-06-21 2015-05-07 太陽誘電株式会社 積層セラミック電子部品
JP2015111651A (ja) * 2013-10-29 2015-06-18 株式会社村田製作所 積層セラミックコンデンサ
KR101551595B1 (ko) * 2015-01-22 2015-09-15 가부시키가이샤 무라타 세이사쿠쇼 적층 세라믹 콘덴서
JP6632808B2 (ja) * 2015-03-30 2020-01-22 太陽誘電株式会社 積層セラミックコンデンサ
DE102018115085B4 (de) * 2018-06-22 2021-03-25 Tdk Electronics Ag Keramisches Vielschichtbauelement und Verfahren zur Herstellung eines keramischen Vielschichtbauelements
JP7801118B2 (ja) * 2021-11-04 2026-01-16 太陽誘電株式会社 セラミック電子部品およびその製造方法
JP2023139338A (ja) * 2022-03-22 2023-10-04 太陽誘電株式会社 積層セラミックコンデンサ及び回路基板

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011204849A (ja) * 2010-03-25 2011-10-13 Murata Mfg Co Ltd 積層セラミック電子部品の製造方法
JP2013016770A (ja) * 2011-06-30 2013-01-24 Samsung Electro-Mechanics Co Ltd 積層セラミック電子部品及びその製造方法
JP2016136557A (ja) * 2015-01-23 2016-07-28 Tdk株式会社 積層型セラミック電子部品
JP2018152547A (ja) * 2017-03-14 2018-09-27 株式会社村田製作所 積層セラミックコンデンサ
JP2021061302A (ja) * 2019-10-04 2021-04-15 株式会社村田製作所 積層セラミックコンデンサ

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2025263243A1 (ja) * 2024-06-21 2025-12-26 株式会社村田製作所 積層セラミックコンデンサ

Also Published As

Publication number Publication date
KR20250012661A (ko) 2025-01-24
CN119487593A (zh) 2025-02-18
JPWO2024014235A1 (https=) 2024-01-18
US20240282522A1 (en) 2024-08-22

Similar Documents

Publication Publication Date Title
JP7081543B2 (ja) 積層セラミックコンデンサ
US11476046B2 (en) Multilayer ceramic capacitor
US10510488B2 (en) Multilayer ceramic capacitor
JP7586206B2 (ja) 積層セラミックコンデンサ
KR102411771B1 (ko) 적층 세라믹 콘덴서
JP2022139484A (ja) 積層セラミックコンデンサ
US11990282B2 (en) Multilayer ceramic capacitor
KR20190122533A (ko) 적층 세라믹 전자부품
JP2020077793A (ja) 積層セラミックコンデンサ
WO2024014235A1 (ja) 積層セラミックコンデンサ
WO2024116557A1 (ja) 積層セラミック電子部品
JP2018133419A (ja) 積層セラミックコンデンサ
JP2019106443A (ja) 積層セラミックコンデンサおよびその製造方法
JP2023043725A (ja) 積層セラミックコンデンサ
JP2017103377A (ja) 積層セラミック電子部品
JP2023073705A (ja) 積層セラミックコンデンサ
WO2023189749A1 (ja) 積層セラミックコンデンサ
JP2024008171A (ja) 積層セラミックコンデンサ
CN216773071U (zh) 层叠陶瓷电容器
US20240249881A1 (en) Multilayer ceramic capacitor
US20250210273A1 (en) Multilayer electronic component
WO2025203234A1 (ja) 積層セラミックコンデンサ
WO2023233836A1 (ja) 積層セラミックコンデンサ
WO2026034335A1 (ja) 積層セラミックコンデンサ
WO2025047205A1 (ja) 積層セラミックコンデンサ

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 23839410

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 202417039918

Country of ref document: IN

WWE Wipo information: entry into national phase

Ref document number: 2024533601

Country of ref document: JP

ENP Entry into the national phase

Ref document number: 20247042949

Country of ref document: KR

Kind code of ref document: A

WWE Wipo information: entry into national phase

Ref document number: 1020247042949

Country of ref document: KR

WWE Wipo information: entry into national phase

Ref document number: 202380052147.2

Country of ref document: CN

NENP Non-entry into the national phase

Ref country code: DE

WWP Wipo information: published in national office

Ref document number: 202380052147.2

Country of ref document: CN

122 Ep: pct application non-entry in european phase

Ref document number: 23839410

Country of ref document: EP

Kind code of ref document: A1