WO2023231430A1 - Mémoire ferroélectrique et condensateur ferroélectrique associé et son procédé de préparation - Google Patents
Mémoire ferroélectrique et condensateur ferroélectrique associé et son procédé de préparation Download PDFInfo
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- WO2023231430A1 WO2023231430A1 PCT/CN2023/073667 CN2023073667W WO2023231430A1 WO 2023231430 A1 WO2023231430 A1 WO 2023231430A1 CN 2023073667 W CN2023073667 W CN 2023073667W WO 2023231430 A1 WO2023231430 A1 WO 2023231430A1
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- Prior art keywords
- ferroelectric
- layer
- antiferroelectric
- memory
- phase
- Prior art date
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- 239000003990 capacitor Substances 0.000 title claims abstract description 50
- 230000015654 memory Effects 0.000 title claims abstract description 50
- 238000002360 preparation method Methods 0.000 title abstract description 7
- 238000000034 method Methods 0.000 claims abstract description 10
- 239000000463 material Substances 0.000 claims description 43
- 238000000137 annealing Methods 0.000 claims description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 3
- 238000000206 photolithography Methods 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- 229910052719 titanium Inorganic materials 0.000 claims description 3
- 238000011282 treatment Methods 0.000 claims description 3
- ITWBWJFEJCHKSN-UHFFFAOYSA-N 1,4,7-triazonane Chemical compound C1CNCCNCCN1 ITWBWJFEJCHKSN-UHFFFAOYSA-N 0.000 claims description 2
- 229910002601 GaN Inorganic materials 0.000 claims description 2
- 229910010037 TiAlN Inorganic materials 0.000 claims description 2
- 229910008484 TiSi Inorganic materials 0.000 claims description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 2
- 229910052782 aluminium Inorganic materials 0.000 claims description 2
- 238000001312 dry etching Methods 0.000 claims description 2
- 229910052733 gallium Inorganic materials 0.000 claims description 2
- 229910052741 iridium Inorganic materials 0.000 claims description 2
- 229910052750 molybdenum Inorganic materials 0.000 claims description 2
- 229910052759 nickel Inorganic materials 0.000 claims description 2
- 229910052758 niobium Inorganic materials 0.000 claims description 2
- 229910052697 platinum Inorganic materials 0.000 claims description 2
- 229920000642 polymer Polymers 0.000 claims description 2
- 229910052702 rhenium Inorganic materials 0.000 claims description 2
- 229910052707 ruthenium Inorganic materials 0.000 claims description 2
- 239000000758 substrate Substances 0.000 claims description 2
- 229910052718 tin Inorganic materials 0.000 claims description 2
- QHGNHLZPVBIIPX-UHFFFAOYSA-N tin(II) oxide Inorganic materials [Sn]=O QHGNHLZPVBIIPX-UHFFFAOYSA-N 0.000 claims description 2
- 238000001039 wet etching Methods 0.000 claims description 2
- XLOMVQKBTHCTTD-UHFFFAOYSA-N zinc oxide Inorganic materials [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 2
- 229910004166 TaN Inorganic materials 0.000 claims 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 abstract description 15
- 239000001301 oxygen Substances 0.000 abstract description 15
- 229910052760 oxygen Inorganic materials 0.000 abstract description 15
- 230000010287 polarization Effects 0.000 abstract description 13
- 230000007547 defect Effects 0.000 abstract description 6
- 230000008569 process Effects 0.000 abstract description 5
- 238000002425 crystallisation Methods 0.000 abstract description 3
- 230000008025 crystallization Effects 0.000 abstract description 3
- 239000004065 semiconductor Substances 0.000 abstract 1
- 238000000231 atomic layer deposition Methods 0.000 description 13
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 11
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 9
- MCMNRKCIXSYSNV-UHFFFAOYSA-N Zirconium dioxide Chemical compound O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 description 6
- 238000006243 chemical reaction Methods 0.000 description 5
- 229910000449 hafnium oxide Inorganic materials 0.000 description 5
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 5
- 229910052742 iron Inorganic materials 0.000 description 5
- 239000002243 precursor Substances 0.000 description 5
- 238000011161 development Methods 0.000 description 4
- 239000010408 film Substances 0.000 description 4
- 230000001172 regenerating effect Effects 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 3
- 239000012159 carrier gas Substances 0.000 description 3
- 230000005621 ferroelectricity Effects 0.000 description 3
- 230000006872 improvement Effects 0.000 description 3
- 230000010354 integration Effects 0.000 description 3
- 230000009466 transformation Effects 0.000 description 3
- 229910019899 RuO Inorganic materials 0.000 description 2
- SEQDDYPDSLOBDC-UHFFFAOYSA-N Temazepam Chemical compound N=1C(O)C(=O)N(C)C2=CC=C(Cl)C=C2C=1C1=CC=CC=C1 SEQDDYPDSLOBDC-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(iv) oxide Chemical compound O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 description 2
- 238000001755 magnetron sputter deposition Methods 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000011160 research Methods 0.000 description 2
- 239000013589 supplement Substances 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 230000004913 activation Effects 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000001351 cycling effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000002401 inhibitory effect Effects 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 230000005055 memory storage Effects 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000004151 rapid thermal annealing Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
- H10B53/30—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Definitions
- the invention belongs to the technical field of integrated circuits, and specifically relates to a ferroelectric memory with high storage window and high reliability.
- the storage in the system adopts a three-tier architecture.
- the memory changes from high-speed static random access memory (SRAM) to dynamic random access memory (DRAM) to high-density flash memory (Flash).
- SRAM static random access memory
- DRAM dynamic random access memory
- Flash high-density flash memory
- Ferroelectric memory has the advantages of non-volatility, low power consumption, and high speed, and is expected to partially replace or supplement existing memory technology.
- ferroelectric memory composed of a selection transistor and a ferroelectric capacitor (1T1C) is similar to DRAM in structure and operation mode. It can read and write data at high speed and has better performance.
- the purpose of the present invention is to propose a ferroelectric memory, a ferroelectric capacitor and a preparation method thereof.
- the ferroelectric capacitor of the ferroelectric memory is inserted into a layer of low surface energy, T-phase dominated antiferroelectric layer to achieve high Memory window for high-reliability ferroelectric memory.
- a ferroelectric memory includes a ferroelectric capacitor and a unit selection transistor; the bottom electrode of the ferroelectric capacitor is connected to the memory board line, and the top electrode of the ferroelectric capacitor is connected to the source end of the unit selection transistor; the gate of the unit selection transistor It is connected to the memory word line, and the drain end of the cell selection transistor is connected to the memory bit line. It is characterized in that an antiferroelectric layer is inserted between the ferroelectric layer and the bottom electrode of the ferroelectric capacitor.
- the antiferroelectric layer is made of T Phase-dominated antiferroelectric materials or antiferroelectric materials in which the phase with the lowest surface energy dominates.
- the core of the present invention is that in the ferroelectric capacitor of the ferroelectric memory, an antiferroelectric layer is inserted between the ferroelectric layer and the bottom electrode.
- the antiferroelectric layer uses an antiferroelectric material with a dominant T phase or the lowest surface energy. Antiferroelectric materials where the phase dominates.
- the ferroelectric layer serves as the storage medium layer, and the antiferroelectric layer serves as the contact interface layer between the ferroelectric layer and the bottom electrode. At the same time, during the preparation, the antiferroelectric layer also serves as the seed layer of the ferroelectric layer.
- the antiferroelectric material of the present invention guides the growth of grains of the hafnium oxide-based ferroelectric layer and increases the proportion of the orthorhombic phase (O phase) in the ferroelectric layer medium, thereby improving the residual polarization of the ferroelectric layer, thereby increasing the iron content of the ferroelectric material.
- Electricity, and suppresses the generation of monoclinic phase (M phase) in the ferroelectric layer medium reduces the proportion of M phase, reduces the growth rate of oxygen vacancy concentration caused by M phase transformation, thereby improving durability; as an optimized
- the contact interface layer because it has a lower surface energy and a more stable electrode contact interface than other phases, can reduce the initial oxygen vacancy concentration at the interface and inhibit the growth of oxygen vacancies in electrical cycle tests, achieving durability. Effective improvement.
- the antiferroelectric layer can be selected from pure ZrO 2 , HfZrO with a Zr proportion greater than that of Hf, PbZrO 3 , or NH 4 H 2 PO 4 (ADP) type, (NH 4 ) 2 SO 4 type, (NH 4 ) 2 H 3 O 6 type, perovskite type and RbNO 3 type antiferroelectric materials.
- the thickness of the antiferroelectric layer may be below 10 nm.
- the ferroelectric layer can be selected from traditional perovskite ferroelectric materials, ferroelectric polymers, or new ferroelectric materials based on HfO2 that produce ferroelectricity under doping, stress, and annealing treatments.
- the thickness of the ferroelectric layer may be below 30 nm.
- the bottom electrode and top electrode of the ferroelectric capacitor can be selected from Ti, TiN, TiSi, TiAlN, TaN, TaCN, TaSi, W, WSi, WN, Al, Ru, RuO, RuO 2 , Re, Pt, Mo, Ir , IrO 2 , In 2 O 3 , SnO, ZnO, Ti, Ni, Nb, Ga, GaN, GeSi, doped Si, SiC, GeSi or combinations thereof.
- a method for preparing a ferroelectric capacitor of a ferroelectric memory The steps are as follows: 1) Prepare the bottom electrode on the surface of the silicon substrate; 2) Grow an antiferroelectric layer on the bottom electrode.
- the antiferroelectric layer uses an antiferroelectric material dominated by the T phase or an antiferroelectric material dominated by the phase with the lowest surface energy.
- the antiferroelectric layer serves as the ferroelectric layer.
- the seed layer 3) Growth of the ferroelectric layer on the surface of the antiferroelectric layer; 4) Grow the top electrode on the surface of the ferroelectric layer; 5) Define the capacitor area through photolithography, and remove other parts of the material through wet etching or dry etching to expose the bottom electrode; 6) Under the same annealing conditions, by adjusting the growth temperature of the antiferroelectric layer in step 2), the material of the ferroelectric layer is in an orthorhombic phase and the material of the antiferroelectric layer is in a phase dominated by the T phase or the phase with the lowest surface energy. leading.
- the ferroelectric memory of the present invention is based on a ferroelectric capacitor inserted into an antiferroelectric layer, and has the beneficial effects of high storage window and high reliability: 1.
- an antiferroelectric material dominated by the T phase or an antiferroelectric material dominated by the phase with the lowest surface energy is used as a seed layer to grow the ferroelectric layer, so that the crystal phase of the ferroelectric layer
- the proportion of the O phase in the medium is higher, which increases the ferroelectric polarization strength, thereby increasing the storage window; at the same time, the proportion of the M phase is reduced, inhibiting the generation of oxygen vacancies, and improving the durability.
- the antiferroelectric layer serves as a seed layer.
- the antiferroelectric layer guides the grain growth of the ferroelectric layer material, reducing the activation energy of the ferroelectric layer material to crystallize to the ferroelectric phase when crystallizing, causing the ferroelectric layer material to produce A larger proportion of the ferroelectric phase crystallizes, and the proportion of the ferroelectric phase in the ferroelectric dielectric layer increases, which improves the overall ferroelectricity of the material, increases the ferroelectric residual polarization strength while maintaining the same thickness, and thereby increases the memory storage window; At the same time, the generation of M phase in the ferroelectric layer is suppressed, which reduces the proportion of M phase and reduces the growth rate of oxygen vacancy concentration caused by M phase transformation, thereby improving durability.
- the proportion of the ferroelectric phase in the ferroelectric dielectric layer of the present invention is increased by about 10%; the proportion of M phase in the ferroelectric capacitor is as low as 3.7%, and no antiferroelectric medium is introduced.
- the ferroelectric capacitance of the M phase is reduced by 6% compared to the M phase.
- the antiferroelectric layer As an interface layer in contact with the bottom electrode, the antiferroelectric layer has a lower surface energy than other phases and a more stable electrode contact interface, which reduces interface defects, leakage current, oxygen vacancy concentration, and inhibits oxygen during electrical cycling.
- the generation of vacancies reduces the initial oxygen vacancy concentration at the interface, effectively improving the durability and improving the reliability of the memory. Taking the results of specific embodiments as an example, compared with a ferroelectric capacitor without an antiferroelectric layer, interface defects are reduced by about 12%. .
- Figure 1 is a schematic diagram of a ferroelectric memory according to a specific embodiment of the present invention.
- FIG. 1 is a schematic cross-sectional view of a ferroelectric capacitor prepared according to a specific embodiment of the present invention.
- this embodiment provides a high storage window and high reliability ferroelectric memory, including a cell selection transistor T1, a ferroelectric capacitor C FE/DE with an antiferroelectric layer, and an equivalent bit line load capacitor C BL , sensitive regenerative amplifier SA.
- the unit selection transistor T1 is an n-type MOSFET device used to realize unit selection control.
- the source end is connected to the top electrode of the asymmetric ferroelectric capacitor, and the drain end is connected to the bit line;
- the ferroelectric capacitor is made of TaN/Hf 0.5 Zr 0.5 O 2 /ZrO 2 /TaN, in which the ferroelectric layer Hf 0.5 Zr 0.5 O 2 is used to store data, the antiferroelectric layer ZrO 2 is located between the ferroelectric layer and the bottom electrode, and the bottom electrode TaN is connected to the board line.
- the ferroelectric capacitor When the ferroelectric capacitor When the ferroelectric polarization direction is toward the bottom electrode, it means that the storage state is "1", otherwise it is "0"; the sensitive regenerative amplifier is used to amplify the bit line differential signal to achieve data readout and write-back, and its input end is connected Bit lines,reference terminated to virtual cells.
- the word line When logic "0" and “1” states are written, or the cell's storage state is read, the word line (WL) is selected to access the storage capacitor.
- PL When reading data, PL is set to high level, and WL and PL are selected at the same time.
- FeRAM stores data 0 or 1
- the ferroelectric capacitor polarization state is P r+ or P r- .
- the core of the invention lies in the ferroelectric capacitor of the ferroelectric memory.
- the ferroelectric layer is the storage medium; the antiferroelectric layer is located between the ferroelectric layer and the bottom electrode.
- the antiferroelectric layer is a layer of antiferroelectric in which the T phase is dominant.
- Materials or antiferroelectric materials in which the phase with the lowest surface energy dominates are ZrO 2 in which the T phase dominates or HfZrO in which the T phase dominates and the Zr proportion is greater than the Hf proportion; PbZrO 3 type and NH 4 with low surface energy H 2 PO 4 (ADP) type, (NH 4 ) 2 SO 4 type, (NH 4 ) 2 H 3 O 6 type, perovskite type and RbNO 3 type antiferroelectric materials.
- the CMOS process-compatible preparation method of the ferroelectric capacitor of the present invention is as follows: (1) Magnetron sputtering bottom tantalum nitride (TaN) metal plate.
- ALD Atomic layer deposition
- the specific steps are to prepare a ZrO 2 film with a thickness of 2 nm by thermal oxidation atomic layer deposition.
- TEMAZ serves as the Zr precursor source and H 2 O serves as the O precursor source.
- the growth temperature range is 200-250°C, and the Zr source and 100 sccm O source are alternately circulated with a carrier gas flow rate of 50 sccm to complete the growth of the ZrO 2 film.
- HZO Atomic layer deposition
- Rapid thermal annealing with an annealing temperature range of 400 ⁇ 600°C and an annealing time of 30s ⁇ 90s, to achieve orthorhombic phase HZO and antiferroelectric ZrO 2 dominated by T phase with the lowest surface energy.
- the storage window is the difference in the polarization flipping amount of the ferroelectric capacitor when reading different states, which is proportional to the remaining polarization amount of the ferroelectric capacitor;
- the T phase containing low surface energy in the present invention accounts for
- the present invention is based on T containing low surface energy.
- the high-reliability ferroelectric memory of the ferroelectric capacitor with the dominant antiferroelectric layer enhances the ferroelectric residual polarization intensity and increases the storage window of the ferroelectric memory; improves durability and reliability.
- the ferroelectric capacitor When operating a ferroelectric memory normally, after multiple operations, the ferroelectric capacitor will have increased oxygen vacancies, increased leakage current, and increased interface defects, leading to fatigue, breakdown, and failure.
- the antiferroelectric ZrO 2 layer dominated by the T phase in the ferroelectric capacitor containing the antiferroelectric layer dominated by the T phase with low surface energy in the present invention serves as the optimized interface layer, and the T phase ZrO 2 is the surface of ZrO 2 The phase with the lowest energy is the most stable.
- the ferroelectric capacitor of the dielectric layer can reduce the oxygen vacancy concentration at the interface, inhibit the generation of oxygen vacancies, reduce interface defects and leakage current during multiple electrical cycles, so that the T phase with low surface energy dominates the anti-iron
- the number of durable electrical cycles of the ferroelectric capacitor of the dielectric layer is increased by several orders of magnitude, and the durability is improved; to sum up, the ferroelectric capacitor of the present invention based on the antiferroelectric layer with low surface energy dominated by T phase has high reliability
- the durability of ferroelectric memory is enhanced and the reliability of ferroelectric memory is improved.
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Semiconductor Memories (AREA)
Abstract
Mémoire ferroélectrique et condensateur ferroélectrique associé et son procédé de préparation, appartenant au domaine des dispositifs de stockage à semi-conducteurs. Une couche de couche diélectrique antiferroélectrique est introduite avant la croissance d'une couche diélectrique ferroélectrique dans le condensateur ferroélectrique. Lorsque la couche antiferroélectrique est utilisée en tant que couche de germe, un modèle de cristallisation est fourni pour la couche diélectrique ferroélectrique, de telle sorte que la proportion d'une phase ferroélectrique est augmentée, l'intensité de polarisation résiduelle est améliorée, et la fenêtre de stockage est encore améliorée. De plus, lorsque la couche antiferroélectrique est utilisée en tant que couche d'interface, ladite couche a une énergie de surface inférieure et une interface de contact d'électrode plus stable que d'autres phases, des défauts d'interface et des courants de fuite sont réduits, la concentration de lacunes d'oxygène est réduite, la génération de lacunes d'oxygène pendant un processus de circulation électrique est inhibée, la durabilité est améliorée, et la fiabilité de la mémoire est améliorée. La présente invention facilite l'utilisation à faible consommation d'énergie, à haute performance et à haute fiabilité de la mémoire vive ferroélectrique.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210620069.9A CN114927526A (zh) | 2022-06-02 | 2022-06-02 | 一种铁电存储器及其铁电电容和制备方法 |
| CN202210620069.9 | 2022-06-02 |
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| Publication Number | Publication Date |
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| WO2023231430A1 true WO2023231430A1 (fr) | 2023-12-07 |
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| Application Number | Title | Priority Date | Filing Date |
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| PCT/CN2023/073667 WO2023231430A1 (fr) | 2022-06-02 | 2023-01-29 | Mémoire ferroélectrique et condensateur ferroélectrique associé et son procédé de préparation |
Country Status (2)
| Country | Link |
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| CN (1) | CN114927526A (fr) |
| WO (1) | WO2023231430A1 (fr) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN114927526A (zh) * | 2022-06-02 | 2022-08-19 | 北京超弦存储器研究院 | 一种铁电存储器及其铁电电容和制备方法 |
| CN117769257A (zh) * | 2022-09-14 | 2024-03-26 | 华为技术有限公司 | 铁电存储阵列及其制备方法、存储器、电子设备 |
| CN116209258B (zh) * | 2022-11-01 | 2024-03-29 | 北京超弦存储器研究院 | 存储单元的存储结构和制备方法 |
| CN116209259B (zh) * | 2022-11-01 | 2024-03-15 | 北京超弦存储器研究院 | 存储单元阵列结构和制备方法 |
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2022
- 2022-06-02 CN CN202210620069.9A patent/CN114927526A/zh active Pending
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