WO2023013213A1 - プリント配線板 - Google Patents

プリント配線板 Download PDF

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Publication number
WO2023013213A1
WO2023013213A1 PCT/JP2022/021565 JP2022021565W WO2023013213A1 WO 2023013213 A1 WO2023013213 A1 WO 2023013213A1 JP 2022021565 W JP2022021565 W JP 2022021565W WO 2023013213 A1 WO2023013213 A1 WO 2023013213A1
Authority
WO
WIPO (PCT)
Prior art keywords
printed wiring
wiring board
groove
metal particle
main surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2022/021565
Other languages
English (en)
French (fr)
Japanese (ja)
Inventor
正道 山本
佳世 橋爪
一誠 岡田
健一郎 相川
良雄 岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Sumitomo Electric Printed Circuits Inc
Original Assignee
Sumitomo Electric Industries Ltd
Sumitomo Electric Printed Circuits Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd, Sumitomo Electric Printed Circuits Inc filed Critical Sumitomo Electric Industries Ltd
Priority to CN202280053943.3A priority Critical patent/CN117751691A/zh
Priority to JP2023539665A priority patent/JPWO2023013213A1/ja
Priority to US18/681,035 priority patent/US12538432B2/en
Publication of WO2023013213A1 publication Critical patent/WO2023013213A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0313—Organic insulating material
    • H05K1/032—Organic insulating material consisting of one material
    • H05K1/0346—Organic insulating material consisting of one material containing N
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/107—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/188—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by direct electroplating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0154—Polyimide
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2081—Compound repelling a metal, e.g. solder

Definitions

  • Patent Document 1 A printed wiring board is described in Japanese Patent Application Laid-Open No. 2009-81212 (Patent Document 1).
  • the printed wiring board described in Patent Document 1 has a base material, a plating core, and a circuit.
  • the base material has a first principal surface and a second principal surface opposite to the first principal surface.
  • a groove is formed in the first main surface. The groove extends toward the second main surface side in a cross-sectional view. Plating nuclei are attached to the inner surface of the groove.
  • the circuit is an electroless plated layer and is filled in the groove.
  • a printed wiring board of the present disclosure includes a base film having a first main surface including grooves, and wiring arranged in the grooves.
  • the wiring has at least a metal particle layer arranged on the bottom surface of the groove and a plating layer arranged on the metal particle layer.
  • the metal particle layer includes a plurality of metal particles that are metallurgically bonded together. A surface of each of the plurality of metal particles is partially covered with an organic film.
  • FIG. 1 is a cross-sectional view of printed wiring board 100 .
  • FIG. 2 is a schematic enlarged view of the metal particle layer 21.
  • FIG. 3A to 3D are process diagrams showing a method for manufacturing printed wiring board 100.
  • FIG. 4 is a cross-sectional view for explaining the groove forming step S1.
  • FIG. 5 is a cross-sectional view for explaining the metal particle layer forming step S2.
  • FIG. 6 is a cross-sectional view for explaining the electroless plating step S3.
  • FIG. 7 is a cross-sectional view for explaining the electrolytic plating step S4.
  • FIG. 8 is a cross-sectional view of printed wiring board 200 .
  • FIG. 9 is a cross-sectional view of printed wiring board 100 according to the first modification.
  • FIG. 4 is a cross-sectional view for explaining the groove forming step S1.
  • FIG. 5 is a cross-sectional view for explaining the metal particle layer forming step S2.
  • FIG. 6 is a cross-section
  • FIG. 10 is a cross-sectional view of printed wiring board 100 according to a second modification.
  • FIG. 11 is a cross-sectional view of printed wiring board 100 according to a third modification.
  • FIG. 12 is a cross-sectional view of printed wiring board 100 according to a fourth modification.
  • FIG. 13 is a cross-sectional view of printed wiring board 100 according to a fifth modification.
  • FIG. 14 is a cross-sectional view of printed wiring board 100 according to a sixth modification.
  • FIG. 15 is a cross-sectional view of printed wiring board 100 according to a seventh modification.
  • the circuit may be oxidized at the interface with the inner surface of the groove. If the circuit is oxidized at the interface with the inner surface of the groove, the circuit may be separated from the groove.
  • the present disclosure has been made in view of the problems of the prior art as described above. More specifically, the present disclosure provides a printed wiring board capable of suppressing oxidation of wiring at the interface with the groove.
  • a printed wiring board includes a base film having a first main surface including grooves, and wiring arranged in the grooves.
  • the wiring has at least a metal particle layer arranged on the bottom surface of the groove and a plating layer arranged on the metal particle layer.
  • the metal particle layer includes a plurality of metal particles that are metallurgically bonded together. A surface of each of the plurality of metal particles is partially covered with an organic film.
  • the metal particle layer may be arranged on the bottom surface and side surfaces of the groove.
  • the plurality of metal particles may be made of copper.
  • the plurality of metal particles may be made of silver.
  • the organic film may be made of a polymeric material having a number average molecular weight of 100 or more and 1,000,000 or less.
  • d50 of the plurality of metal particles may be 1 nm or more and 500 nm or less.
  • the plating layer comprises an electroless plating layer arranged on the metal particle layer and an electrolytic plating layer arranged on the electroless plating layer.
  • the plating layer may include an electrolytic plating layer disposed on the metal particle layer.
  • the process of forming the electroless plating layer can be omitted, so the manufacturing process can be simplified.
  • the wiring may have a portion where the value obtained by dividing the height of the wiring by the width of the wiring is 2 or more.
  • the groove may have a first groove portion and a second groove portion adjacent to each other with a space therebetween.
  • the wiring may have a first portion located within the first trench and a second portion located within the second trench.
  • the wiring may have a portion where the value obtained by dividing the height of the wiring by the distance between the first portion and the second portion is 2 or more.
  • the resist since no resist is used to form the wiring, the resist does not collapse even when the height of the wiring is large and the gap between adjacent wiring portions is small. .
  • the base film may be made of polyimide.
  • the printed wiring board (11) above it is possible to increase the heat resistance of the base film.
  • the heat resistance of the base film is enhanced, so that the printed wiring board can withstand a thermal load when components are mounted by soldering or the like.
  • the base film may further have a second main surface opposite to the first main surface.
  • the width of the groove may decrease from the first main surface side toward the second main surface side.
  • the printed wiring board described in (1) to (12) includes an adhesive that covers the first main surface and fills the grooves so as to cover the wiring, and an adhesive that covers the first main surface. It may further comprise an attached coverlay.
  • the printed wiring boards of (1) to (12) above may further include a solder resist filling the grooves so as to cover the first main surface and the wiring.
  • a printed wiring board according to an embodiment of the present disclosure is referred to as printed wiring board 100 .
  • FIG. 1 is a cross-sectional view of the printed wiring board 100.
  • printed wiring board 100 has base film 10 and wiring 20 .
  • the base film 10 has a first main surface 10a and a second main surface 10b.
  • the first main surface 10a and the second main surface 10b are end surfaces of the base film 10 in the thickness direction.
  • the second principal surface 10b is the opposite surface of the first principal surface 10a.
  • a groove 10c is formed in the first main surface 10a.
  • the groove 10c extends toward the second main surface 10b side in a cross-sectional view.
  • the groove 10c has a bottom surface 10ca and side surfaces 10cb and 10cc.
  • the side 10cb and the side 10cc face each other with a space therebetween.
  • the bottom surface 10ca continues to the lower end of the side surface 10cb and the lower end of the side surface 10cc.
  • the width of the groove 10c decreases from the side of the first main surface 10a toward the side of the second main surface 10b. From another point of view, it is preferable that the distance between the side surface 10cb and the side surface 10cc decreases from the side of the first main surface 10a toward the side of the second main surface 10b.
  • the bottom surface 10ca has a linear shape in a cross-sectional view, but the bottom surface 10ca may have a curved shape that protrudes toward the second main surface 10b side in a cross-sectional view.
  • the corner of the groove 10c where the bottom surface 10ca and the side surface 10cb are connected and the corner of the groove 10c where the bottom surface 10ca and the side surface 10cc are connected may be curved in a cross-sectional view.
  • the base film 10 is made of a flexible, electrically insulating material.
  • the base film 10 is preferably made of polyimide.
  • the base film 10 may be made of polyethylene terephthalate, polyethylene naphthalate, or the like.
  • the wiring 20 is arranged in the groove 10c.
  • the wiring 20 has a metal particle layer 21 and a plating layer 22 .
  • the plating layer 22 has an electroless plating layer 23 and an electrolytic plating layer 24 .
  • height H be the height of the wiring 20 .
  • the height H is the maximum value of the distance between the top surface of the wiring 20 and the bottom surface 10ca.
  • Width W is the width of the wiring 20 .
  • the width W is measured at the position where the width of the wiring 20 is maximum in the height direction of the wiring 20 .
  • Height H may be greater than width W.
  • the height H may be less than or equal to the width W.
  • the value obtained by dividing the height H by the width W can be 2 or more from the viewpoint of the filling property of the adhesive 30 and the viewpoint of countermeasures against collapse of the resist.
  • the value obtained by dividing the height H by the width W of the wiring 20 does not have to be 2 or more.
  • At least part of the wiring 20 should have a value obtained by dividing the height H by the width W of 2 or more.
  • the interval between the portions of the wiring 20 adjacent to each other is assumed to be the interval SP.
  • the spacing SP is measured at a position where the spacing between adjacent portions of the wiring 20 in the height direction of the wiring 20 is the smallest.
  • Height H may be greater than spacing SP.
  • the height H may be less than or equal to the spacing SP.
  • the value obtained by dividing the height H by the interval SP can be set to 2 or more from the viewpoint of the filling property of the adhesive 30 and the countermeasure against collapse of the resist. However, the value obtained by dividing the height H by the interval SP does not have to be 2 or more in all portions of the wiring 20 . At least a part of the wiring 20 should have a value obtained by dividing the height H by the interval SP of 2 or more.
  • the metal particle layer 21 is arranged on the bottom surface 10ca, the side surface 10cb, and the side surface 10cb.
  • the thickness of the metal particle layer 21 is preferably 1 nm or more and 4000 nm or less from the viewpoint of ensuring the oxidation suppressing function of the metal particle layer 21 and from the viewpoint of suppressing the metal particle layer 21 from becoming excessively thick. More preferably, the thickness of the metal particle layer 21 is 30 nm or more and 3000 nm or less.
  • FIG. 2 is a schematic enlarged view of the metal particle layer 21.
  • the metal particle layer 21 has a plurality of metal particles 21a.
  • the plurality of metal particles 21a are metallically bonded to each other.
  • the metal particles 21a are made of copper, for example.
  • the metal particles 21a may be made of silver.
  • d50 of the plurality of metal particles 21a is preferably 1 nm or more and 500 nm or less. More preferably, d50 of the plurality of metal particles 21a is 30 nm or more and 200 nm or less.
  • the d50 of the plurality of metal particles 21a is measured by the following method.
  • the distribution of crystal grain size of the plurality of metal particles 21a is measured by laser diffraction method.
  • the crystal grain size at which the volume integrated value is 50% is calculated.
  • the crystal grain size at which the volume integrated value is 50% in the measured crystal grain size distribution of the plurality of metal particles 21a is d50 of the plurality of metal particles 21a.
  • the organic film 21b is preferably made of a polymeric material having a number average molecular weight (Mn) of 100 or more and 1,000,000 or less.
  • the organic film 21b may be a polymeric material having polar groups. This polar group is, for example, an amine, a carboxyl group, a hydroxyl group, or the like.
  • polymeric material forming the organic film 21b examples include polyethyleneimine, ethylene oxide adducts of polyethyleneimine, amine-based polymeric materials such as polyvinylpyrrolidone, polyacrylic acid, carboxymethylcellulose, and styrene-malein.
  • polymeric materials having carboxyl groups such as polymers, and polymeric materials having hydroxyl groups such as polyvinyl alcohol.
  • the other part of the surface of the metal particle 21a is metallically bonded to another metal particle 21a.
  • the plating layer 22 is a layer formed by plating. As shown in FIG. 1 , the plating layer 22 is arranged on the metal particle layer 21 . More specifically, the plating layer 22 is filled in the groove 11 with the metal particle layer 21 interposed between the bottom surface 10ca, the side surface 10cb and the side surface 10cc of the groove 10c. The plating layer 22 may be deposited not only on the metal particle layer 21 but also in the gaps between the metal particles 21 a in the metal particle layer 21 .
  • the electroless plated layer 23 is arranged on the metal particle layer 21 .
  • the electroless plated layer 23 is a layer formed by electroless plating.
  • the electroless plated layer 23 is made of copper, for example.
  • the electrolytic plated layer 24 is arranged on the electroless plated layer 23 .
  • the electrolytic plated layer 24 is a layer formed by electrolytic plating.
  • the electrolytic plating layer 24 is made of copper, for example.
  • the printed wiring board 100 further has an adhesive 30 and a coverlay 40 .
  • the adhesive 30 covers the first major surface 10a. Further, the adhesive 30 is filled in the groove 10c so as to cover the wiring 20. As shown in FIG.
  • the adhesive 30 is, for example, an epoxy adhesive.
  • the coverlay 40 is attached to the first main surface 10a with an adhesive 30. As shown in FIG.
  • the coverlay 40 is made of polyimide, for example.
  • FIG. 3A to 3D are process diagrams showing a method for manufacturing printed wiring board 100.
  • the method for manufacturing printed wiring board 100 includes a groove forming step S1, a metal particle layer forming step S2, an electroless plating step S3, an electrolytic plating step S4, and a coverlay attaching step S5. and
  • FIG. 4 is a cross-sectional view for explaining the groove forming step S1.
  • grooves 10c are formed in the groove forming step S1.
  • the groove 10c is formed by irradiating the first main surface 10a with a laser. By appropriately adjusting the laser irradiation conditions, the width of the groove 10c becomes smaller from the side of the first main surface 10a toward the side of the second main surface 10b.
  • FIG. 5 is a cross-sectional view explaining the metal particle layer forming step S2. As shown in FIG. 5, the metal particle layer 21 is formed in the metal particle layer forming step S2. In forming the metal particle layer 21, first, an ink containing metal particles 21a is applied on the bottom surface 10ca, the side surface 10cb, and the side surface 10cc.
  • the entire surface of the metal particles 21a in the ink is covered with the organic film 21b. Therefore, in the above ink, the metal particles 21a are not metallically bonded to each other. The ink adhering to the portion of the first main surface 10a where the groove 10c is not formed is removed.
  • the solvent in the ink and part of the organic film 21b covering the surface of the metal particles 21a are volatilized by heating.
  • the surface of the exposed metal particle 21a is brought into direct contact with the other metal particle 21a to be metallically bonded, and the metal particle layer 21 is formed.
  • FIG. 6 is a cross-sectional view explaining the electroless plating step S3.
  • an electroless plating layer 23 is formed in the electroless plating step S3.
  • the electroless plating layer 23 is formed by immersing the base film 10 having the metal particle layer 21 formed thereon in a plating solution containing the constituent material of the electroless plating layer 23 . Since the electroless plating is performed without using a catalyst such as palladium particles, the electroless plating layer 23 is not formed except on the metal particle layer 21 .
  • FIG. 7 is a cross-sectional view explaining the electrolytic plating step S4.
  • an electrolytic plating layer 24 is formed as shown in FIG.
  • the formation of the electroplating layer 24 is performed by immersing the base film on which the metal particle layer 21 and the electroless plating layer 23 are formed in a plating solution containing the constituent materials of the electroplating layer 24, and removing the metal particle layer 21 and the electroless plating. This is done by energizing layer 23 .
  • the coverlay 40 is attached using the adhesive 30 .
  • the coverlay 40 coated with the uncured adhesive 30 is arranged on the first major surface 10a.
  • the uncured adhesive 30 covers the first major surface 10a.
  • the uncured adhesive 30 is filled in the groove 10 c so as to cover the wiring 20 .
  • the coverlay 40 is attached onto the first main surface 10a. This attachment is performed by pressing the coverlay 40 toward the first main surface 10a while heating. As described above, the printed wiring board 100 having the structure shown in FIG. 1 is manufactured.
  • the surfaces of the metal particles 21a are partially covered with the organic film 21b. Therefore, in printed wiring board 100, even if oxygen diffuses in base film 10, wiring 20 is less likely to be oxidized at the interface with groove 10c. As a result, according to the printed wiring board 100, the wiring 20 is suppressed from peeling off from the groove 10c. Note that when the metal particles 21a are made of silver, the metal particle layer 21 is more difficult to oxidize, so that the wiring 20 is more difficult to oxidize at the interface with the groove 10c.
  • a printed wiring board according to a comparative example is referred to as a printed wiring board 200 .
  • FIG. 8 is a cross-sectional view of printed wiring board 200 .
  • printed wiring board 200 includes base film 10 , wiring 20 , adhesive 30 , and coverlay 40 .
  • groove 10c is not formed in first main surface 10a.
  • wiring 20 has seed layer 25 and electrolytic plating layer 26 .
  • the seed layer 25 is arranged on the first main surface 10a.
  • Electroplated layer 26 is disposed on seed layer 25 .
  • adhesive 30 is arranged on first main surface 10 a so as to cover wiring 20 , and coverlay 40 is attached with adhesive 30 .
  • the printed wiring board 200 is manufactured by a semi-additive method. More specifically, first, a resist is formed on seed layer 25 . This resist is formed by exposing and developing a dry film resist or the like. Secondly, electroplating is performed on the seed layer 25 exposed through the openings of the resist to form an electroplating layer 26 . Third, the resist is removed.
  • the printed wiring board 200 when the height H is large (more specifically, when the height H is twice or more the width W or when the height H is twice or more the interval SP), It is difficult to fill the adhesive 30 between adjacent portions of the wiring 20 .
  • the printed wiring board 100 since the wiring 20 is arranged in the groove 10c, even if the height H is large, the filling of the adhesive 30 is unlikely to be a problem.
  • the electrolytic plating layer 26 is The width of the resist used for formation is reduced, and the height of the resist is increased. Therefore, in the printed wiring board 200, when the wirings 20 having a large height H and a small interval SP are formed, the resist may collapse.
  • the printed wiring board 100 since the printed wiring board 100 does not use a resist to form the wiring 20, there is no need to consider the collapse of the resist when forming the wiring 20 with a large height H and a small interval SP.
  • FIG. 9 is a cross-sectional view of printed wiring board 100 according to the first modification.
  • a groove 10d may be formed in the second main surface 10b.
  • channels are extended toward the 1st main surface 10a side in cross-sectional view.
  • the groove 10d has a bottom surface 10da, side surfaces 10db, and side surfaces 10dc.
  • the side 10db and the side 10dc face each other with a space therebetween.
  • the lower end of the side surface 10db and the lower end of the side surface 10dc continue to the bottom surface 10da.
  • groove 10d is formed at a position overlapping groove 10c in plan view, but groove 10d may be formed at a position not overlapping groove 10c in plan view.
  • a wiring 50 is arranged in the groove 10d.
  • the wiring 50 has a metal particle layer 51 and a plated layer 52 .
  • the plating layer 52 has an electroless plating layer 53 and an electrolytic plating layer 54 .
  • the metal particle layer 51 is arranged on the bottom surface 10da, the side surface 10db, and the side surface 10dc.
  • the electroless plated layer 53 is arranged on the metal particle layer 51 .
  • the electrolytic plated layer 54 is arranged on the electroless plated layer 53 .
  • the metal particle layer 51, the electroless plated layer 53, and the electrolytic plated layer 54 have the same configurations as the metal particle layer 21, the electroless plated layer 23, and the electrolytic plated layer 24, respectively.
  • the printed wiring board 100 may further have an adhesive 60 and a coverlay 70 .
  • the adhesive 60 covers the second major surface 10b. Further, the adhesive 60 is filled in the trench 10d so as to cover the wiring 50.
  • the coverlay 70 is attached to the second main surface 10b with an adhesive 60.
  • Adhesive 60 and coverlay 70 are of similar construction to adhesive 30 and coverlay 40, respectively.
  • FIG. 10 is a cross-sectional view of printed wiring board 100 according to a second modification. As shown in FIG. 10, the metal particle layer 21 may be arranged only on the bottom surface 10ca and may not be arranged on the side surfaces 10cb and 10cc.
  • FIG. 11 is a cross-sectional view of printed wiring board 100 according to a third modification. As shown in FIG. 11, the width of the groove 10d may be constant in the thickness direction of the base film 10. As shown in FIG.
  • FIG. 12 is a cross-sectional view of printed wiring board 100 according to a fourth modification.
  • printed wiring board 100 may have solder resist 80 instead of adhesive 30 and coverlay 40 .
  • Solder resist 80 covers first main surface 10a.
  • the solder resist 80 is filled in the grooves 10 c so as to cover the wirings 20 .
  • FIG. 13 is a cross-sectional view of printed wiring board 100 according to a fifth modification.
  • plating layer 22 may have only electrolytic plating layer 24 . That is, the plated layer 22 does not have the electroless plated layer 23 .
  • the electrolytic plating layer 24 is arranged on the metal particle layer 21 . In this case, since the electroless plating step S3 can be omitted, the manufacturing process of printed wiring board 100 can be simplified.
  • FIG. 14 is a cross-sectional view of printed wiring board 100 according to a sixth modification. As shown in FIG. 14, the upper surface of the wiring 20 (the upper surface of the electrolytic plating layer 24) may be flush with the first main surface 10a.
  • FIG. 15 is a cross-sectional view of printed wiring board 100 according to a seventh modification.
  • the upper surface of the wiring 20 (the upper surface of the electroplating layer 24) may be located at a position protruding from the first main surface 10a.
  • the maximum thickness of the wiring 20 (electrolytic plating layer 24) protruding from the first main surface 10a may be smaller than the spacing SP in order to prevent the wiring 20 adjacent to each other from being short-circuited.
  • Samples 1 and 2 were prepared as printed wiring board samples. Sample 1 corresponds to printed wiring board 100 .
  • the width and depth of the grooves 10c were set to 25 ⁇ m and 60 ⁇ m, respectively, and the interval between adjacent grooves 10c was set to 25 ⁇ m.
  • the thickness of the metal particle layer 21 was set to 280 nm, and the thickness of the electroless plated layer 23 was set to 340 nm.
  • the electrolytic plated layer 24 was formed such that the distance between the electrolytic plated layer 24 and the first main surface 10a was 2 ⁇ m.
  • the base film 10 is made of Upilex S (polyimide) manufactured by Ube Industries, and the thickness of the base film 10 is 125 ⁇ m.
  • Sample 1 was prepared by performing a groove forming step S1, a metal particle layer forming step S2, an electroless plating step S3 and an electrolytic plating step S4.
  • the grooves 10c were formed by laser processing under the conditions of a beam moving speed of 350 mm/sec, an output of 0.5 W, and a rotation speed of 3 times.
  • the linear velocity is 2 m/sec
  • the gas is a mixed gas of oxygen and tetrafluoromethane (flow rate of oxygen: 200 sccm, the flow rate of methane tetrafluoride: 20 sccm)
  • the pressure in the chamber is 80 Pa
  • plasma A plasma treatment was performed on the base film 10 under the conditions of an output of 500 W and a treatment time of 7 seconds.
  • an ink containing 26% by mass of copper particles with a particle size of 80 nm and having a surface coated with an organic film with a molecular weight of 70000 was used.
  • This ink was applied by a bar coating method using a flat shaped bar.
  • the line speed during application was 0.5 m/min.
  • the ink adhering to the portion of the first main surface 10a where the groove 10c was not formed was removed by immersing it in an aqueous solution of sodium persulfate at 25° C. for 30 seconds. After this removal, washing with water for 30 seconds was performed three times, and drying was performed by air drying.
  • the firing of the ink was performed under the conditions of a firing temperature of 350° C., a holding time of 2 hours, and a nitrogen atmosphere with an oxygen concentration of 10 ppm.
  • the electroless plating step S3 was performed under conditions of a liquid temperature of 31° C. and a plating time of 8 minutes.
  • the electroplating step S4 was performed for 5 minutes at a current density of 0.5 A/dm 2 and for 45 minutes at a current density of 1 A/dm 2 .
  • Sample 2 is the same as Sample 1 except that it does not have the metal particle layer 21 . However, in sample 2, the thickness of the electroless plated layer 23 was set to 600 nm. Sample 2 was prepared in a similar manner as Sample 1. However, Sample 2 was not subjected to the metal particle layer forming step S2.
  • samples 1 and 2 were evaluated by keeping them at 150°C for 7 days and then performing a tape peeling test to observe the presence or absence of peeling of the wiring 20 . As a result, sample 1 did not peel off, while sample 2 caused wiring 20 to peel off. From this comparison, according to printed wiring board 100 having metal particle layer 21, even if oxygen diffuses in base film 10, wiring 20 is less likely to oxidize at the interface with groove 10c, and wiring 20 is less likely to separate from groove 10c. It was also found experimentally that
  • 10 base film 10a first main surface, 10b second main surface, 10c groove, 10ca bottom surface, 10cb, 10cc side surface, 10d groove, 10da bottom surface, 10db, 10dc side surface, 20 wiring, 21 metal particle layer, 21a metal particle, 21b organic film, 22 plating layer, 23 electroless plating layer, 24 electroplating layer, 25 seed layer, 26 electroplating layer, 30 adhesive, 40 coverlay, 50 wiring, 51 metal particle layer, 52 plating layer, 53 nothing Electroplated layer, 54 Electroplated layer, 60 Adhesive, 70 Coverlay, 80 Solder resist, 100, 200 Printed wiring board, H Height, S1 Groove formation process, S2 Metal particle layer formation process, S3 Electroless plating process, S4 Electroplating process, S5 Coverlay pasting process, SP interval, W width.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Manufacturing Of Printed Wiring (AREA)
PCT/JP2022/021565 2021-08-06 2022-05-26 プリント配線板 Ceased WO2023013213A1 (ja)

Priority Applications (3)

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CN202280053943.3A CN117751691A (zh) 2021-08-06 2022-05-26 印刷布线板
JP2023539665A JPWO2023013213A1 (https=) 2021-08-06 2022-05-26
US18/681,035 US12538432B2 (en) 2021-08-06 2022-05-26 Printed wiring board

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JP2021-129871 2021-08-06
JP2021129871 2021-08-06

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2026048123A1 (ja) * 2024-08-30 2026-03-05 住友電気工業株式会社 プリント配線板およびプリント配線板の製造方法

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Publication number Priority date Publication date Assignee Title
JPS62243390A (ja) * 1986-04-15 1987-10-23 キヤノン株式会社 プリント配線板の製造方法
JP2009081209A (ja) * 2007-09-25 2009-04-16 Panasonic Electric Works Co Ltd プリント配線板の製造方法
JP2012244009A (ja) * 2011-05-20 2012-12-10 Sumitomo Electric Ind Ltd プリント配線板用基板およびプリント配線板用基板の製造方法

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009081212A (ja) 2007-09-25 2009-04-16 Panasonic Electric Works Co Ltd プリント配線板の製造方法
KR101067207B1 (ko) * 2009-04-16 2011-09-22 삼성전기주식회사 트렌치 기판 및 그 제조방법
CN102986311B (zh) * 2010-07-08 2016-05-04 Lg伊诺特有限公司 印刷电路板及其制造方法
JP5594407B2 (ja) 2013-07-24 2014-09-24 富士電機株式会社 半導体装置

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Publication number Priority date Publication date Assignee Title
JPS62243390A (ja) * 1986-04-15 1987-10-23 キヤノン株式会社 プリント配線板の製造方法
JP2009081209A (ja) * 2007-09-25 2009-04-16 Panasonic Electric Works Co Ltd プリント配線板の製造方法
JP2012244009A (ja) * 2011-05-20 2012-12-10 Sumitomo Electric Ind Ltd プリント配線板用基板およびプリント配線板用基板の製造方法

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2026048123A1 (ja) * 2024-08-30 2026-03-05 住友電気工業株式会社 プリント配線板およびプリント配線板の製造方法

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