WO2022259809A1 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
WO2022259809A1
WO2022259809A1 PCT/JP2022/020032 JP2022020032W WO2022259809A1 WO 2022259809 A1 WO2022259809 A1 WO 2022259809A1 JP 2022020032 W JP2022020032 W JP 2022020032W WO 2022259809 A1 WO2022259809 A1 WO 2022259809A1
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WO
WIPO (PCT)
Prior art keywords
lead
semiconductor device
thickness direction
electrode
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2022/020032
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English (en)
French (fr)
Japanese (ja)
Inventor
正起 鹿野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP2023527579A priority Critical patent/JPWO2022259809A1/ja
Priority to DE112022002587.5T priority patent/DE112022002587T5/de
Priority to CN202280040756.1A priority patent/CN117441230A/zh
Publication of WO2022259809A1 publication Critical patent/WO2022259809A1/ja
Priority to US18/491,315 priority patent/US20240047315A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/464—Additional interconnections in combination with leadframes
    • H10W70/466—Tape carriers or flat leads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/411—Chip-supporting parts, e.g. die pads
    • H10W70/417—Bonding materials between chips and die pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
    • H10W70/424—Cross-sectional shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/481—Leadframes for devices being provided for in groups H10D8/00 - H10D48/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/60—Strap connectors, e.g. thick copper clips for grounding of power devices
    • H10W72/641—Dispositions of strap connectors
    • H10W72/646—Dispositions of strap connectors the connected ends being on auxiliary connecting means on bond pads, e.g. on a bump connector
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/886—Die-attach connectors and strap connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/926—Multiple bond pads having different sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/761—Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors
    • H10W90/766—Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/761—Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors
    • H10W90/767—Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors between a chip and a laterally-adjacent lead frame, conducting package substrate or heat sink

Definitions

  • the present disclosure relates to semiconductor devices.
  • Patent Document 1 discloses an example of a semiconductor device (power module) in which a plurality of semiconductor elements are bonded to a conductor layer.
  • the semiconductor device includes a plurality of connection metal members joined to a conductor layer and a plurality of semiconductor elements. This allows a large current to flow through the plurality of semiconductor elements.
  • connection metal members may be displaced from the electrodes of the semiconductor element to be joined. If the degree of misalignment becomes relatively large, the connecting metal member may cover the gate electrode of the semiconductor element. In this case, when a wire is joined to the gate electrode, the connection metal member makes it difficult to join the wire. Therefore, a measure for suppressing the positional deviation of the connection metal member with respect to the electrode of the semiconductor element is desired.
  • one object of the present disclosure is to provide a semiconductor device capable of suppressing displacement of a conducting member with respect to an electrode of a semiconductor element.
  • a semiconductor device provided by the present disclosure includes: a semiconductor element having a first lead; a first electrode; a conducting member that electrically connects the first lead and the first electrode; and a second conductive junction layer that conductively joins the first electrode and the conductive member, wherein the conductive member extends in the thickness direction of the semiconductor element from the first It has a first surface facing the lead and a second surface facing the first lead in a first direction perpendicular to the thickness direction, the first lead facing the first surface. and a fourth surface facing the second surface, and the first conductive junction layer is in contact with the first surface and the third surface.
  • the semiconductor device of the present disclosure it is possible to suppress misalignment of the conducting member with respect to the electrodes of the semiconductor element.
  • FIG. 1 is a plan view of a semiconductor device according to a first embodiment of the present disclosure, which is transparent through a sealing resin.
  • FIG. 2 is a plan view corresponding to FIG. 1, with the conductive member, the first conductive bonding layer, and the second conductive member further transparent.
  • 3 is a bottom view of the semiconductor device shown in FIG. 1.
  • FIG. 4 is a right side view of the semiconductor device shown in FIG. 1.
  • FIG. 5 is a rear view of the semiconductor device shown in FIG. 1.
  • FIG. FIG. 6 is a cross-sectional view taken along line VI-VI of FIG.
  • FIG. 7 is a cross-sectional view taken along line VII--VII of FIG.
  • FIG. 8 is a cross-sectional view along line VIII-VIII of FIG.
  • FIG. 9 is a partially enlarged view of FIG. 6.
  • FIG. 10 is a partially enlarged view of FIG. 6.
  • FIG. 11 is a partially enlarged cross-sectional view of a modification of the semiconductor device shown in FIG.
  • FIG. 12 is a plan view of the semiconductor device according to the second embodiment of the present disclosure, which is transparent through the sealing resin.
  • 13 is a cross-sectional view taken along line XIII-XIII in FIG. 12.
  • FIG. 14 is a cross-sectional view along line XIV-XIV in FIG. 12.
  • FIG. 15 is a partially enlarged view of FIG. 13.
  • FIG. FIG. 16 is a plan view of the semiconductor device according to the third embodiment of the present disclosure, which is transparent through the sealing resin.
  • FIG. 17 is a cross-sectional view along line XVII-XVII of FIG. 16.
  • FIG. 18 is a partially enlarged view of FIG. 17.
  • FIG. 19 is a partially enlarged cross-sectional view of a modification of the semiconductor device shown in FIG. 16.
  • FIG. FIG. 20 is a plan view of the semiconductor device according to the fourth embodiment of the present disclosure, which is transparent through the sealing resin.
  • 21 is a cross-sectional view taken along line XXI-XXI of FIG. 20.
  • FIG. 22 is a partially enlarged view of FIG. 21.
  • FIG. 1 is transparent through the sealing resin 50 for convenience of understanding.
  • FIG. 2 further shows the conductive member 30, the first conductive bonding layer 31, and the second conductive member 32 as compared to FIG.
  • FIGS. 1 and 2 show the conductive member 30, the first conductive bonding layer 31, and the second conductive member 32 as compared to FIG.
  • FIGS. 1 and 2 show the conductive member 30, the first conductive bonding layer 31, and the second conductive member 32 as compared to FIG.
  • the permeated sealing resin 50 is indicated by an imaginary line (chain double-dashed line).
  • the transmissive conductive member 30 is indicated by imaginary lines.
  • the VII-VII line and the VIII-VIII line are indicated by one-dot chain lines.
  • the thickness direction of the semiconductor element 10 is called “thickness direction z" for convenience.
  • One direction perpendicular to the thickness direction z is called a “first direction x”.
  • a direction orthogonal to both the thickness direction z and the first direction x is called a "second direction y”.
  • the semiconductor element 10 is mounted on the die pad 23 as shown in FIGS.
  • the semiconductor element 10 is, for example, a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor).
  • the semiconductor element 10 may be a switching element such as an IGBT (Insulated Gate Bipolar Transistor) or a diode.
  • the semiconductor element 10 is an n-channel MOSFET with a vertical structure.
  • Semiconductor device 10 includes a compound semiconductor substrate.
  • the composition of the compound semiconductor substrate includes silicon carbide (SiC). That is, the semiconductor substrate contains silicon carbide.
  • the semiconductor element 10 has a first electrode 11 , a second electrode 12 and a third electrode (gate electrode in the illustrated example) 13 .
  • the first electrode 11 and the second electrode 12 are separated from each other in the thickness direction z, and the first electrode 11 is positioned on one side of the second electrode 12 in the thickness direction z. do.
  • a current corresponding to the power converted by the semiconductor element 10 flows through the first electrode 11 . That is, the first electrode 11 corresponds to the source electrode of the semiconductor element 10 .
  • the first electrode 11 includes multiple metal plating layers.
  • the first electrode 11 includes a nickel (Ni) plating layer and a gold (Au) plating layer laminated on the nickel plating layer.
  • the first electrode 11 may include a nickel plating layer, a palladium (Pd) plating layer laminated on the nickel plating layer, and a gold plating layer laminated on the palladium plating layer. .
  • the second electrode 12 is located on the side opposite to the first electrode 11 in the thickness direction z and faces the die pad 23 .
  • a current corresponding to the power before being converted by the semiconductor element 10 flows through the second electrode 12 . That is, the second electrode 12 corresponds to the drain electrode of the semiconductor element 10 .
  • the gate electrode 13 is positioned on the same side as the first electrode 11 in the thickness direction z.
  • a gate voltage for driving the semiconductor element 10 is applied to the gate electrode 13 .
  • the area of the gate electrode 13 is smaller than the area of the first electrode 11 when viewed in the thickness direction z.
  • the conducting member 30 conducts the first lead 21 and the first electrode 11 of the semiconductor element 10 . Therefore, the conductive member 30 forms part of the conductive path of the semiconductor device A10.
  • the composition of the conducting member 30 contains copper (Cu).
  • Conductive member 30 is a metal clip. As shown in FIGS. 1 and 6 , the conductive member 30 straddles between the first lead 21 and the die pad 23 . As shown in FIGS. 6 and 10 , the conducting member 30 has a first surface 301 , a second surface 302 , a joint surface 303 and an inclined surface 304 .
  • the first surface 301 faces the first lead 21 in the thickness direction z.
  • the second surface 302 faces the first lead 21 in the first direction x.
  • the second surface 302 faces the side opposite to the side where the semiconductor element 10 is located in the first direction x.
  • the second surface 302 is positioned further away from the semiconductor element 10 in the first direction x than the first surface 301 is.
  • the second surface 302 is connected to the first surface 301 .
  • the joint surface 303 faces the first electrode 11 of the semiconductor element 10 .
  • the inclined surface 304 is located between the first surface 301 and the joint surface 303 in the first direction x and is connected to the joint surface 303 .
  • the inclined surface 304 is inclined at an inclination angle ⁇ with respect to the bonding surface 303 in a direction away from the semiconductor element 10 in the thickness direction z as the distance from the bonding surface 303 increases in the first direction x.
  • the inclination angle ⁇ is 30° or more and 60° or less.
  • the first lead 21, the second lead 22 and the die pad 23 are constructed from the same lead frame.
  • the lead frame is copper or copper alloy. Therefore, the compositions of the first lead 21, the second lead 22 and the die pad 23 contain copper.
  • the first lead 21 is positioned on one side in the first direction x, as shown in FIGS.
  • the first lead 21 is electrically connected to the first electrode 11 of the semiconductor element 10 via the conducting member 30 . Therefore, the first lead 21 forms the source terminal of the semiconductor device A10.
  • the first lead 21 includes a first main surface 211, a first mounting surface 212, a plurality of first side surfaces 213, a third surface 214, a fourth surface 215, a fifth surface 216, and a plurality of recesses 217 .
  • the third surface 214 faces one side in the thickness direction z (for example, upward in FIG. 10).
  • the first electrode 11 has a surface facing the outside of the semiconductor element 10 (that is, one side in the thickness direction z) and a surface facing the inside of the semiconductor element 10 (that is, the thickness and a surface facing the other side of direction z). That is, in the thickness direction z, the side to which the third surface 214 faces is the same as the side to which the outer surface of the first electrode 11 faces.
  • the third surface 214 faces the first surface 301 of the conducting member 30 .
  • the fourth surface 215 faces the side where the semiconductor element 10 is located in the first direction x.
  • the fourth surface 215 faces the second surface 302 of the conducting member 30 .
  • the fourth surface 215 connects to the third surface 214 .
  • First lead 21 is formed with notches defined by third surface 214 and fourth surface 215 .
  • the first main surface 211 faces the same side as the third surface 214 in the thickness direction z.
  • the first main surface 211 is located on the opposite side of the first side surface 213 with the fourth surface 215 interposed therebetween in the thickness direction z.
  • the first main surface 211 is positioned further away from the semiconductor element 10 in the first direction x than the third surface 214 is.
  • the first major surface 211 is connected to the fourth surface 215 .
  • a plated layer containing nickel, silver (Ag), or the like in its composition may be provided on the first main surface 211 .
  • the first mounting surface 212 faces the side opposite to the third surface 214 in the thickness direction z. As shown in FIG. 3 , the first mounting surface 212 is exposed from the sealing resin 50 .
  • the third surface 214 is positioned between the first main surface 211 and the first mounting surface 212 in the thickness direction z. When viewed in the thickness direction z, the third surface 214 overlaps the first mounting surface 212 (see FIGS. 2 and 3).
  • a plating layer containing tin (Sn) or the like in its composition may be provided on the first mounting surface 212 .
  • the fifth surface 216 faces the same side as the fourth surface 215 in the first direction x.
  • the fifth surface 216 is located between the first mounting surface 212 and the third surface 214 in the thickness direction z.
  • a fifth surface 216 is connected to the first mounting surface 212 and the third surface 214 .
  • the fifth surface 216 is located on the opposite side of the fourth surface 215 with the third surface 214 interposed therebetween in the first direction x.
  • the fifth surface 216 is positioned closer to the semiconductor element 10 in the first direction x than the fourth surface 215 is.
  • the plurality of first side surfaces 213 face the side opposite to the side on which the semiconductor element 10 is located in the first direction x.
  • the plurality of first side surfaces 213 are connected to the first major surface 211 and the first mounting surface 212 .
  • the multiple first side surfaces 213 are arranged along the second direction y. As shown in FIG. 5 , the multiple first side surfaces 213 are exposed from the sealing resin 50 .
  • the plurality of recesses 217 are recessed in the first direction x from between two first side surfaces 213 adjacent in the second direction y.
  • the plurality of recesses 217 are filled with the sealing resin 50 .
  • the second lead 22 is positioned away from the first lead 21 in the second direction y, as shown in FIGS.
  • the second lead 22 is electrically connected to the gate electrode 13 of the semiconductor element 10 . Therefore, the second lead 22 forms a gate terminal of the semiconductor device A10.
  • the second lead 22 has a second main surface 221, a second mounting surface 222, a second side surface 223 and a thin portion 224. As shown in FIGS.
  • the second main surface 221 faces the same side as the third surface 214 of the first lead 21 in the thickness direction z.
  • the position of the second principal surface 221 in the thickness direction z is equal to the position of the first principal surface 211 of the first lead 21 in the thickness direction z.
  • a plated layer containing nickel, silver, or the like in its composition may be provided on the second main surface 221 .
  • the second mounting surface 222 faces the side opposite to the second main surface 221 in the thickness direction z. As shown in FIG. 3 , the second mounting surface 222 is exposed from the sealing resin 50 .
  • a plating layer containing tin or the like in its composition may be provided on the first mounting surface 212 .
  • the second side surface 223 faces the same side as the plurality of first side surfaces 213 of the first lead 21 in the first direction x.
  • the second side surface 223 is connected to the second major surface 221 and the second mounting surface 222 .
  • the second side surface 223 is exposed from the sealing resin 50 .
  • the thin portion 224 has an eave shape projecting from the second mounting surface 222 in a direction orthogonal to the thickness direction z when viewed in the thickness direction z.
  • a portion of the second main surface 221 is included in the thin portion 224 .
  • the thinned portion 224 includes an intermediate surface 224A and an end surface 224B.
  • 224 A of intermediate surfaces face the side opposite to the 2nd main surface 221 in the thickness direction z.
  • 224 A of intermediate surfaces are located between the 2nd main surface 221 and the 2nd mounting surface 222 in the thickness direction z.
  • 224 A of intermediate surfaces are in contact with the sealing resin 50. As shown in FIG.
  • the end surface 224B is connected to the second main surface 221 and the intermediate surface 224A and faces the second direction y. As shown in FIG. 5, the end face 224B is exposed from the sealing resin 50. As shown in FIG. The area of the end surface 224B is smaller than the area of the second side surface 223 .
  • the die pad 23 is positioned apart from the first lead 21 and the second lead 22 in the first direction x, as shown in FIGS.
  • the die pad 23 is electrically connected to the second electrode 12 of the semiconductor element 10 . Therefore, the die pad 23 forms a drain terminal of the semiconductor device A10.
  • the die pad 23 has a mounting surface 231 , a back surface 232 , a plurality of peripheral surfaces 233 and a thin portion 234 .
  • the mounting surface 231 faces the same side as the third surface 214 of the first lead 21 in the thickness direction z.
  • the position of the mounting surface 231 in the thickness direction z is equal to the position of the first main surface 211 of the first lead 21 in the thickness direction z.
  • the semiconductor element 10 is mounted on the mounting surface 231 .
  • a plating layer containing nickel, silver, or the like in its composition may be provided on the mounting surface 231 .
  • the back surface 232 faces the side opposite to the side where the semiconductor element 10 is located in the thickness direction z. As shown in FIG. 3 , the rear surface 232 is exposed from the sealing resin 50 . The back surface 232 overlaps the semiconductor element 10 when viewed in the thickness direction z. A plated layer containing tin or the like in its composition may be provided on the back surface 232 .
  • the plurality of peripheral surfaces 233 face the side opposite to the first side surface 213 of the first lead 21 in the first direction x.
  • a plurality of peripheral surfaces 233 are connected to the mounting surface 231 and the back surface 232 .
  • the plurality of peripheral surfaces 233 are arranged along the second direction y. As shown in FIG. 6 , the multiple peripheral surfaces 233 are exposed from the sealing resin 50 .
  • the thin portion 234 has an eave shape projecting from the rear surface 232 in a direction orthogonal to the thickness direction z when viewed in the thickness direction z.
  • a portion of the mounting surface 231 is included in the thin portion 234 .
  • thin portion 234 includes an intermediate surface 234A and a pair of end surfaces 234B.
  • the intermediate surface 234A faces the side opposite to the mounting surface 231 in the thickness direction z.
  • the intermediate surface 234A is located between the mounting surface 231 and the back surface 232 in the thickness direction z. 234 A of intermediate surfaces are in contact with the sealing resin 50. As shown in FIG.
  • the pair of end surfaces 234B are connected to the mounting surface 231 and the intermediate surface 234A and face opposite sides in the second direction y.
  • the pair of end faces 234B are positioned apart from each other in the second direction y.
  • a pair of end faces 234B are exposed from the sealing resin 50 .
  • the area of each of the pair of end surfaces 234B is smaller than the area of each of the plurality of peripheral surfaces 233 .
  • the bonding layer 29 is interposed between the mounting surface 231 of the die pad 23 and the second electrode 12 of the semiconductor element 10, as shown in FIG.
  • the bonding layer 29 is in contact with the mounting surface 231 and the second electrode 12 .
  • the bonding layer 29 electrically connects the die pad 23 and the second electrode 12 .
  • the die pad 23 is electrically connected to the second electrode 12 .
  • the composition of the bonding layer 29 contains tin.
  • the bonding layer 29 is solder.
  • the first conductive joining layer 31 conductively joins the first lead 21 and the conductive member 30 .
  • the first conductive junction layer 31 is indicated by a plurality of shaded areas.
  • the first conductive junction layer 31 includes a portion located between the first surface 301 of the conductive member 30 and the third surface 214 of the first lead 21 . The portion is in contact with the first surface 301 and the third surface 214 .
  • the first conductive bonding layer 31 includes a portion located between the second surface 302 of the conductive member 30 and the fourth surface 215 of the first lead 21 . The portion is in contact with the second surface 302 and the fourth surface 215 .
  • the composition of the first conductive junction layer 31 contains tin.
  • the first conductive junction layer 31 is solder.
  • the maximum value of the first distance P1 from the first surface 301 of the conducting member 30 to the third surface 214 of the first lead 21 is the distance from the second surface 302 of the conducting member 30 to the first lead 21 It is smaller than the maximum value of the second distance P2 up to the fourth surface 215 .
  • the thickness of the portion of the first conductive junction layer 31 located between the first surface 301 and the third surface 214 is the thickness of the first conductive junction located between the second surface 302 and the fourth surface 215 . It is thinner than the thickness of the portion of layer 31 .
  • the second conductive member 32 electrically connects the first electrode 11 of the semiconductor element 10 and the conductive member 30 .
  • the second conductive member 32 is indicated by a plurality of shaded areas.
  • the second conductive member 32 is interposed between the first electrode 11 and the joint surface 303 of the conductive member 30 .
  • the second conductive member 32 is in contact with the first electrode 11 and the joint surface 303 .
  • the composition of the second conduction member 32 contains tin.
  • the second conducting member 32 is solder.
  • the wire 40 is electrically connected to the gate electrode 13 of the semiconductor element 10 and the second main surface 221 of the second lead 22, as shown in FIG. Thereby, the second lead 22 is electrically connected to the gate electrode 13 .
  • the composition of wire 40 includes gold.
  • the composition of the wire 40 may contain aluminum (Al) or copper.
  • the sealing resin 50 covers the semiconductor element 10, the conductive members 30, the wires 40, and a portion of each of the first leads 21, the second leads 22, and the die pad 23. .
  • the sealing resin 50 has electrical insulation.
  • Sealing resin 50 is made of a material containing, for example, black epoxy resin.
  • the sealing resin 50 has a top surface 51 , a bottom surface 52 , a pair of first side surfaces 53 and a pair of second side surfaces 54 .
  • the top surface 51 faces the same side as the mounting surface 231 of the die pad 23 in the thickness direction z.
  • the bottom surface 52 faces away from the top surface 51 in the thickness direction z.
  • the first mounting surface 212 of the first lead 21 , the second mounting surface 222 of the second lead 22 , and the back surface 232 of the die pad 23 are exposed from the bottom surface 52 .
  • the pair of first side surfaces 53 face opposite to each other in the first direction x and are positioned apart from each other in the first direction x.
  • a pair of first side surfaces 53 are connected to the top surface 51 and the bottom surface 52 .
  • a plurality of first side surfaces 213 of the first lead 21 and a second side surface 223 of the second lead 22 are exposed from one first side surface 53 of the pair of first side surfaces 53 .
  • a plurality of peripheral surfaces 233 of the die pad 23 are exposed from the other first side surface 53 of the pair of first side surfaces 53 .
  • the multiple first side surfaces 213 , the second side surfaces 223 , and the multiple peripheral surfaces 233 are flush with one of the pair of first side surfaces 53 .
  • the pair of second side surfaces 54 face opposite to each other in the second direction y and are located apart from each other in the second direction y.
  • a pair of second side surfaces 54 are connected to the top surface 51 and the bottom surface 52 .
  • a pair of end surfaces 234B of the die pad 23 are exposed from the pair of second side surfaces 54 .
  • the end face 224B of the second lead 22 is exposed from one of the pair of second side faces 54 .
  • the pair of end surfaces 234B and the end surface 224B are flush with either of the pair of second side surfaces 54 .
  • FIG. 11 is the same as the position of FIG.
  • the configurations of the first surface 301 of the conductive member 30 and the third and fourth surfaces 214 and 215 of the first leads 21 are different from those of the semiconductor device A10.
  • the first surface 301 and the third surface 214 are curved surfaces that are concave to opposite sides in the thickness direction z.
  • the fourth surface 215 is a curved surface recessed in the first direction x.
  • the fourth surface 215 smoothly connects to the third surface 214 .
  • the third surface 214 and the fourth surface 215 are part of one curved surface provided on the first lead 21 .
  • the first surface 301, the third surface 214 and the fourth surface 215 of the semiconductor device A11 are obtained by subjecting the lead frame, which is the base of the first lead 21 and the conductive member 30, to an etching process.
  • the third surface 214 and the fourth surface 215 of the semiconductor device A10 are obtained by subjecting the lead frame serving as the base of the first lead 21 to press working.
  • the semiconductor device A10 includes a first lead 21, a conduction member 30 that electrically connects the first lead 21 and the first electrode 11 of the semiconductor element 10, and a first conduction junction that electrically connects the first lead 21 and the conduction member 30.
  • the conductive member 30 has a first surface 301 facing the first lead 21 in the thickness direction z and a second surface 302 facing the first lead 21 in the first direction x.
  • the first lead 21 has a third surface 214 facing the first surface 301 and a fourth surface 215 facing the second surface 302 .
  • the first conductive junction layer 31 is in contact with the first surface 301 and the third surface 214 .
  • the first conductive bonding layer 31 is also in contact with the second surface 302 of the conductive member 30 and the fourth surface 215 of the first lead 21 . As a result, the bonding area of the conductive member 30 with respect to the first lead 21 is increased. Therefore, the bonding strength of the conductive member 30 to the first lead 21 can be improved.
  • the maximum value of the first distance P1 from the first surface 301 of the conductive member 30 to the third surface 214 of the first lead 21 is the maximum distance from the second surface 302 of the conductive member 30 to the fourth surface 215 of the first lead 21. 2 less than the maximum value of the interval P2.
  • the portion of the first conductive bonding layer 31 located between the first surface 301 and the third surface 214 is This is a manifestation of the fact that a relatively large compressive stress was applied to the Thereby, the bonding strength of the conductive member 30 to the first lead 21 is improved.
  • the second surface 302 melts when the conductive member 30 tries to shift in the first direction x. This is a result of receiving a relatively large reaction force from the first conductive junction layer 31 . As a result, displacement of the conductive member 30 in the first direction x with respect to the first electrode 11 of the semiconductor element 10 is more effectively suppressed.
  • the first surface 301 of the conductive member 30 is a curved surface recessed in the thickness direction z.
  • the contact area of the conductive member 30 with respect to the first conductive bonding layer 31 is increased.
  • an anchoring effect caused by the first surface 301 is exhibited in the first conductive junction layer 31 .
  • the bonding strength of the conductive member 30 to the first lead 21 can be further improved.
  • the first conductive junction layer 31 is in contact with the first major surface 211 of the first lead 21 .
  • the gap between the first surface 301 and the second surface 302 of the conductive member 30 and the third surface 214 and the fourth surface 215 of the first lead 21 is filled with the first conductive bonding layer 31. is a manifestation of As a result, the bonding strength of the conductive member 30 to the first lead 21 is reliably improved.
  • the first lead 21 has a first mounting surface 212 facing away from the third surface 214 in the thickness direction z.
  • the third surface 214 overlaps the first mounting surface 212 when viewed in the thickness direction z.
  • the composition of the first conductive bonding layer 31, the second conductive member 32 and the bonding layer 29 contains tin. Thereby, the semiconductor element 10 can be bonded to the die pad 23 in the step of conductively bonding the conductive member 30 to the first lead 21 and the first electrode 11 of the semiconductor element 10 .
  • the first lead 21 has a first side surface 213 facing the side opposite to the side where the semiconductor element 10 is located in the first direction x.
  • the first side surface 213 is exposed from the sealing resin 50 .
  • a rear surface 232 of the die pad 23 is exposed from the sealing resin 50 . Thereby, the heat dissipation of the semiconductor device A10 can be improved.
  • the composition of the conducting member 30 contains copper. As a result, the electrical resistance of the conductive member 30 can be reduced compared to a wire containing aluminum in its composition. This is suitable for allowing a larger current to flow through the semiconductor device 10 .
  • FIG. 12 is transparent through the sealing resin 50 for convenience of understanding.
  • the configuration of the first lead 21 and the conductive member 30 of the semiconductor device A20 is different from that of the semiconductor device A10 described above.
  • the first lead 21 does not have the first main surface 211 in the semiconductor device A20.
  • a third surface 214 of the first lead 21 is connected to the plurality of first side surfaces 213 .
  • the fourth surface 215 of the first lead 21 is positioned between the first mounting surface 212 and the third surface 214 in the thickness direction z.
  • the fourth surface 215 is connected to the first mounting surface 212 .
  • the first surface 301 of the conducting member 30 is positioned closer to the third surface 214 of the first lead 21 than the second surface 302 in the thickness direction z.
  • the first surface 301 is positioned farther from the semiconductor element 10 in the first direction x than the second surface 302 is.
  • a notch defined by the first surface 301 and the second surface 302 is formed in the conducting member 30 .
  • the semiconductor device A20 includes a first lead 21, a conduction member 30 that electrically connects the first lead 21 and the first electrode 11 of the semiconductor element 10, and a first conduction junction that electrically connects the first lead 21 and the conduction member 30. layer 31;
  • the conductive member 30 has a first surface 301 facing the first lead 21 in the thickness direction z and a second surface 302 facing the first lead 21 in the first direction x.
  • the first lead 21 has a third surface 214 facing the first surface 301 and a fourth surface 215 facing the second surface 302 .
  • the first conductive junction layer 31 is in contact with the first surface 301 and the third surface 214 .
  • the semiconductor device A20 can also suppress the displacement of the conductive member 30 with respect to the electrode (first electrode 11) of the semiconductor element 10.
  • FIG. Furthermore, since the semiconductor device A20 has the same configuration as the semiconductor device A10, the semiconductor device A20 also exhibits the effects of the configuration.
  • the dimension of the first lead 21 in the first direction x can be reduced compared to the case of the semiconductor device A10. Thereby, the distance in the first direction x between the first lead 21 and the die pad 23 can be made longer. Therefore, when forming the sealing resin 50, it is possible to increase the density of the resin filled between the first lead 21 and the die pad 23 in the first direction x.
  • FIG. 16 is transparent through the sealing resin 50 for convenience of understanding.
  • the configuration of the conductive member 30 and the first conductive bonding layer 31 of the semiconductor device A20 is different from that of the semiconductor device A10 described above.
  • the conducting member 30 has a regulation surface 305.
  • the regulation surface 305 faces the same side as the second surface 302 in the first direction x.
  • the regulation surface 305 is located on the opposite side of the second surface 302 with the first surface 301 interposed therebetween in the thickness direction z.
  • the regulation surface 305 is located on the opposite side of the second surface 302 with the first surface 301 interposed therebetween in the first direction x.
  • the regulation surface 305 is located closer to the semiconductor element 10 in the first direction x than the second surface 302 is.
  • a notch defined by the first surface 301 and the regulation surface 305 is formed in the conducting member 30 .
  • the regulating surface 305 of the conducting member 30 faces the fifth surface 216 of the first lead 21.
  • a portion of the first conductive junction layer 31 is located between the fifth surface 216 and the regulation surface 305 .
  • the first conductive junction layer 31 is in contact with the fifth surface 216 and the regulation surface 305 .
  • FIG. 19 is the same as the position of FIG.
  • the conducting member 30 has a facing surface 306 instead of the regulating surface 305.
  • the opposing surface 306 faces the same side as the first surface 301 in the thickness direction z.
  • the facing surface 306 is located on the opposite side of the first surface 301 with the second surface 302 interposed therebetween in the thickness direction z.
  • the facing surface 306 is located on the opposite side of the first surface 301 with the second surface 302 interposed therebetween in the first direction x.
  • the facing surface 306 is located on the side farther from the semiconductor element 10 in the first direction x than the first surface 301 is.
  • a notch defined by the second surface 302 and the opposing surface 306 is formed in the conducting member 30 .
  • the facing surface 306 of the conducting member 30 faces the first main surface 211 of the first lead 21 .
  • a portion of the first conductive junction layer 31 is located between the first major surface 211 and the opposing surface 306 .
  • the first conductive junction layer 31 is in contact with the facing surface 306 .
  • the semiconductor device A30 includes a first lead 21, a conduction member 30 that electrically connects the first lead 21 and the first electrode 11 of the semiconductor element 10, and a first conduction junction that electrically connects the first lead 21 and the conduction member 30.
  • the conductive member 30 has a first surface 301 facing the first lead 21 in the thickness direction z and a second surface 302 facing the first lead 21 in the first direction x.
  • the first lead 21 has a third surface 214 facing the first surface 301 and a fourth surface 215 facing the second surface 302 .
  • the first conductive junction layer 31 is in contact with the first surface 301 and the third surface 214 .
  • the semiconductor device A30 can also suppress the displacement of the conductive member 30 with respect to the electrode (first electrode 11) of the semiconductor element 10.
  • FIG. since the semiconductor device A30 has the same configuration as the semiconductor device A10, the semiconductor device A30 also exhibits the effects of the configuration.
  • the conducting member 30 has a restricting surface 305 facing the fifth surface 216 of the first lead 21. As shown in FIG. With this configuration, when the conductive member 30 is conductively joined to the first lead 21 via the first conductive joining layer 31, if the conductive member 30 tries to shift in the first direction x, the regulating surface 305 is moved to the fifth direction. The first conductive junction layer 31 is in contact with the surface 216 or sandwiched between the regulation surface 305 and the fifth surface 216 .
  • the displacement of the conductive member 30 in the first direction x is restricted by both the second surface 302 and the restricting surface 305, so that the displacement of the conductive member 30 in the first direction x with respect to the first electrode 11 of the semiconductor element 10 is minimized. can be effectively suppressed.
  • the first lead 21 is The bonding area of the conducting member 30 is increased. Thereby, the bonding strength of the conductive member 30 to the first lead 21 can be improved.
  • the conduction member 30 has a facing surface 306 that faces the first main surface 211 of the first lead 21. As shown in FIG.
  • the first conductive junction layer 31 is in contact with the first major surface 211 and the opposing surface 306 .
  • FIG. 20 is transparent through the sealing resin 50 for convenience of understanding.
  • the configuration of the first lead 21 and the conductive member 30 of the semiconductor device A40 is different from that of the semiconductor device A10 described above.
  • the first lead 21 does not have the fifth surface 216 in the semiconductor device A40.
  • the fourth surface 215 of the first lead 21 faces the side opposite to the side where the semiconductor element 10 is located in the first direction x.
  • the third surface 214 of the first lead 21 is positioned between the fourth surface 215 and the plurality of first side surfaces 213 in the first direction x.
  • the first main surface 211 of the first lead 21 is positioned closer to the semiconductor element 10 in the first direction x than the third surface 214 is.
  • the conducting member 30 straddles the first main surface 211 of the first lead 21. As shown in FIGS. 20 and 21, the conducting member 30 straddles the first main surface 211 of the first lead 21. As shown in FIG.
  • the semiconductor device A40 includes a first lead 21, a conduction member 30 that electrically connects the first lead 21 and the first electrode 11 of the semiconductor element 10, and a first conduction junction that electrically connects the first lead 21 and the conduction member 30. layer 31;
  • the conductive member 30 has a first surface 301 facing the first lead 21 in the thickness direction z and a second surface 302 facing the first lead 21 in the first direction x.
  • the first lead 21 has a third surface 214 facing the first surface 301 and a fourth surface 215 facing the second surface 302 .
  • the first conductive junction layer 31 is in contact with the first surface 301 and the third surface 214 .
  • the semiconductor device A40 can also suppress the displacement of the conductive member 30 with respect to the electrode (first electrode 11) of the semiconductor element 10.
  • FIG. since the semiconductor device A40 has the same configuration as the semiconductor device A10, the semiconductor device A40 also exhibits the effects of the configuration.
  • Appendix 1 a first lead; a semiconductor element having a first electrode; a conducting member that conducts the first lead and the first electrode; a first conductive bonding layer for conductively bonding the first lead and the conductive member; a second conductive joining layer that conductively joins the first electrode and the conductive member;
  • the conducting member has a first surface facing the first lead in a thickness direction of the semiconductor element, a second surface facing the first lead in a first direction perpendicular to the thickness direction, and has the first lead has a third surface facing the first surface and a fourth surface facing the second surface;
  • the semiconductor device wherein the first conductive junction layer is in contact with the first surface and the third surface.
  • the semiconductor device according to appendix 1 wherein the third surface faces the same side as the outer surface of the first electrode in the thickness direction.
  • Appendix 3. The semiconductor device according to appendix 2, wherein the first conductive junction layer is in contact with the second surface and the fourth surface.
  • Appendix 4. The semiconductor device according to appendix 3, wherein the first surface is a curved surface that is recessed in the thickness direction.
  • Appendix 5. The semiconductor device according to appendix 3 or 4, wherein the maximum value of the first distance from the first surface to the third surface is smaller than the maximum value of the second distance from the second surface to the fourth surface.
  • Appendix 6. the first lead has a first main surface facing the same side as the third surface in the thickness direction; 6.
  • the first lead has a first mounting surface facing away from the third surface in the thickness direction and a fifth surface facing the same side as the fourth surface in the first direction; When viewed in the thickness direction, the third surface overlaps the first mounting surface, The fifth surface is located between the first mounting surface and the third surface in the thickness direction, and is opposite to the fourth surface with the third surface interposed therebetween in the first direction.
  • the semiconductor device according to appendix 10 wherein the conduction member has a regulation surface facing the fifth surface.
  • the semiconductor device according to appendix 11, wherein part of the first conductive junction layer is located between the fifth surface and the regulation surface. Appendix 13. 13.
  • the semiconductor device according to any one of appendices 10 to 12, wherein the first conductive junction layer and the second conductive junction layer contain tin.
  • Appendix 14. a die pad positioned away from the first lead; a bonding layer that bonds the die pad and the semiconductor element, 14. The semiconductor device according to Appendix 13, wherein the bonding layer contains tin.
  • Appendix 15. The semiconductor element has a second electrode positioned opposite to the first electrode in the thickness direction, 15. The semiconductor device according to appendix 14, wherein the bonding layer is in contact with the second electrode. Appendix 16.
  • the semiconductor element has a gate electrode located on the same side as the first electrode in the thickness direction, 16.
  • Appendix 17. further comprising a sealing resin covering the semiconductor element and the conductive member, and a part of each of the first lead and the die pad; the die pad has a back surface facing the side opposite to the side on which the semiconductor element is located in the thickness direction; 17.
  • Appendix 18. the first lead has a first side surface facing in the first direction opposite to the side on which the semiconductor element is located; 18.

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
PCT/JP2022/020032 2021-06-07 2022-05-12 半導体装置 Ceased WO2022259809A1 (ja)

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DE112022002587.5T DE112022002587T5 (de) 2021-06-07 2022-05-12 Halbleiterbauelement
CN202280040756.1A CN117441230A (zh) 2021-06-07 2022-05-12 半导体装置
US18/491,315 US20240047315A1 (en) 2021-06-07 2023-10-20 Semiconductor device

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019186321A (ja) * 2018-04-05 2019-10-24 ローム株式会社 半導体装置
JP2020088319A (ja) * 2018-11-30 2020-06-04 ローム株式会社 半導体装置
JP2021027146A (ja) * 2019-08-05 2021-02-22 住友電気工業株式会社 半導体装置

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JP6594000B2 (ja) 2015-02-26 2019-10-23 ローム株式会社 半導体装置
JP6842177B2 (ja) * 2018-04-06 2021-03-17 旭精工株式会社 硬貨識別方法、硬貨識別システム及び硬貨識別プログラム

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019186321A (ja) * 2018-04-05 2019-10-24 ローム株式会社 半導体装置
JP2020088319A (ja) * 2018-11-30 2020-06-04 ローム株式会社 半導体装置
JP2021027146A (ja) * 2019-08-05 2021-02-22 住友電気工業株式会社 半導体装置

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