WO2022196188A1 - 撮像装置、撮像装置の製造方法、および電子機器 - Google Patents

撮像装置、撮像装置の製造方法、および電子機器 Download PDF

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Publication number
WO2022196188A1
WO2022196188A1 PCT/JP2022/004899 JP2022004899W WO2022196188A1 WO 2022196188 A1 WO2022196188 A1 WO 2022196188A1 JP 2022004899 W JP2022004899 W JP 2022004899W WO 2022196188 A1 WO2022196188 A1 WO 2022196188A1
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Prior art keywords
substrate
imaging device
chip
intermediate member
solid
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PCT/JP2022/004899
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English (en)
French (fr)
Japanese (ja)
Inventor
貴弘 亀井
Original Assignee
ソニーセミコンダクタソリューションズ株式会社
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Priority to JP2023506864A priority Critical patent/JPWO2022196188A1/ja
Publication of WO2022196188A1 publication Critical patent/WO2022196188A1/ja

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith

Definitions

  • the present disclosure relates to an imaging device having an imaging element, a manufacturing method thereof, and an electronic device provided with the imaging device.
  • an imaging device having a structure suitable for thinning while having good imaging performance, a manufacturing method thereof, and an electronic device equipped with such an imaging device.
  • An imaging device includes a first substrate, a second substrate, a chip, and an intermediate member.
  • the first substrate has an imaging element that includes a plurality of pixels and can generate a pixel signal for each pixel.
  • the second substrate is arranged to face the first substrate in the first direction.
  • the chip is provided between the first substrate and the second substrate and has a circuit for performing signal processing of pixel signals.
  • the intermediate member is located in a gap between the first substrate and the second substrate, and is provided so as to be adjacent to the chip in an in-plane direction perpendicular to the first direction.
  • the intermediate member is provided in the gap between the first substrate and the second substrate so as to be adjacent to the chip in the in-plane direction orthogonal to the first direction. Therefore, for example, the thickness of the protective layer provided in the gap between the first substrate and the second substrate so as to cover the chip may be thin.
  • FIG. 1 is a cross-sectional view showing an overall configuration example of a solid-state imaging device according to a first embodiment of the present disclosure
  • FIG. 1B is a plan view showing the configuration of the solid-state imaging device shown in FIG. 1A
  • FIG. 1B is a schematic diagram illustrating one step of a method for manufacturing the solid-state imaging device shown in FIG. 1A
  • FIG. 2A It is a schematic diagram explaining 1 process following FIG. 2B.
  • FIG. 2C It is a schematic diagram explaining 1 process following FIG. 2D.
  • FIG. 2E It is a schematic diagram explaining one process following FIG. 2F.
  • FIG. 2A is a schematic diagram explaining 1 process following FIG. 2A
  • FIG. 2C It is a schematic diagram explaining 1 process following FIG. 2C.
  • FIG. 2D It is a schematic diagram explaining 1 process following FIG. 2E.
  • FIG. 2F FIG.
  • FIG. 10 is a cross-sectional view showing an example of the overall configuration of a solid-state imaging device according to Modification 1 of the present disclosure
  • 4A and 4B are schematic diagrams for explaining a step of a method for manufacturing the solid-state imaging device shown in FIG. 3
  • FIG. 4B is a schematic diagram illustrating a step following FIG. 4A
  • FIG. 4B It is a schematic diagram explaining 1 process following FIG. 4B.
  • FIG. 4C It is a schematic diagram explaining 1 process following FIG. 4C.
  • FIG. 4D It is a schematic diagram explaining one process following FIG. 4E.
  • FIG. 4A and 4B are schematic diagrams for explaining a step of a method for manufacturing the solid-state imaging device shown in FIG. 3
  • FIG. 4B is a schematic diagram illustrating a step following FIG. 4A
  • FIG. 4D It is a schematic diagram explaining 1
  • FIG. 7 is a cross-sectional view showing an example of the overall configuration of a solid-state imaging device according to a second embodiment of the present disclosure
  • 6A and 6B are schematic diagrams for explaining a step of a method for manufacturing the solid-state imaging device shown in FIG. 5
  • FIG. 6B is a schematic diagram illustrating a step following FIG. 6A
  • FIG. 6B is a schematic diagram illustrating a step following FIG. 6B
  • FIG. 6G is a schematic diagram illustrating a step following FIG. 6G.
  • FIG. 6H is a schematic diagram illustrating a step following FIG. 6H;
  • FIG. 11 is a schematic diagram showing an example of the overall configuration of an electronic device according to a third embodiment of the present disclosure
  • 1 is a block diagram showing an example of a schematic configuration of a vehicle control system;
  • FIG. 4 is an explanatory diagram showing an example of installation positions of an outside information detection unit and an imaging unit;
  • FIG. 11 is a cross-sectional view showing an example of the overall configuration of a solid-state imaging device according to a second modified example of the present disclosure;
  • FIG. 11 is a cross-sectional view showing an example of the overall configuration of a solid-state imaging device according to a third modified example of the present disclosure;
  • FIG. 21 is a cross-sectional view showing an example of the overall configuration of a solid-state imaging device according to Modification 4 of the present disclosure;
  • FIGS. 1A and 1B show a cross-sectional configuration of the solid-state imaging device 1
  • FIG. 1B shows a planar configuration of the solid-state imaging device 1.
  • FIG. FIG. 1A corresponds to a cross-sectional view taken along the IA-IA line shown in FIG. 1B.
  • the solid-state imaging device 1 includes, for example, a circuit board 10, a sensor board 20, a chip 30, and a protective layer 40.
  • the circuit board 10 and the sensor board 20 each extend, for example, in the XY plane direction.
  • the circuit board 10 and the sensor board 20 are arranged so as to face each other in the Z-axis direction.
  • the lamination direction of the circuit board 10 and the sensor board 20 is the Z-axis direction
  • the plane on which the circuit board 10 and the sensor board 20 spread is the XY plane.
  • reference character K1 represents the outer edge of the solid-state imaging device 1.
  • the outer edge K1 of the solid-state imaging device 1 coincides with, for example, the outermost edge of the circuit board 10 and the outermost edge of the sensor substrate 20 .
  • the circuit board 10 and the sensor board 20 are bonded via a protective layer 40, for example.
  • the sensor substrate 20 has a layered structure of an element forming substrate 21 and a wiring layer 22 .
  • the wiring layer 22 is provided on the side facing the circuit board 10 when viewed from the element forming substrate 21 .
  • the wiring layer 22 has a facing surface 22S that faces the circuit board 10 .
  • a terminal portion 23 is embedded in the wiring layer 22 . However, the surface 23S of the terminal portion 23 is exposed to the facing surface 22S.
  • the wiring layer 22 is made of an insulating material such as an insulating resin, a metal oxide, a metal nitride, or an inorganic oxide.
  • the wiring layer 22 may be made of organic insulating materials such as polyimide, silicone, epoxy, and acrylic, and inorganic insulating materials such as AlOx, AlNx, SiOx, SiNx, SiON, SiCN, and SiOC.
  • the terminal portion 23 is preferably made of a highly conductive material such as Cu (copper).
  • the element formation substrate 21 is a substrate made of a semiconductor material such as silicon (Si).
  • a solid-state imaging device 24 is provided on the device forming substrate 21 .
  • an area extending in the XY plane where the solid-state imaging device 24 is provided on the sensor substrate 20 is called an effective pixel area R24 (see FIG. 1B).
  • the effective pixel area R24 is, for example, an area inside the light-shielding area (OPB), that is, an area capable of receiving external light.
  • the solid-state imaging device 24 is formed by arranging a plurality of pixels PX each including a photoelectric conversion unit 25 such as a photodiode, a color filter 26, and an on-chip lens 27 along the XY plane.
  • the solid-state imaging device 24 can receive external light for each pixel PX and generate a pixel signal for each pixel PX.
  • the terminal portion 23 is electrically connected to the terminal portion 33 of the chip 30 .
  • the electrical connection between the terminal portion 23 and the terminal portion 33 establishes electrical connection between, for example, the solid-state imaging device 24 and a signal processing circuit provided in the chip 30 .
  • the circuit board 10 has, for example, a support 11 and an insulating film 12 .
  • the support 11 includes, for example, a support substrate 111 extending in the XY plane, and an intermediate member 112 provided on the upper surface 111S of the support substrate 111 .
  • the intermediate member 112 is located in the gap between the support substrate 111 and the element forming substrate 21 and is provided so as to be adjacent to the chip 30 in the XY plane direction.
  • the intermediate member 112 may have a second thermal conductivity higher than the first thermal conductivity of the protective layer 40 .
  • the support substrate 111 and the intermediate member 112 are integrated.
  • the constituent material of the support substrate 111 and the constituent material of the intermediate member 112 may be substantially the same.
  • the constituent material of the support substrate 111 and the constituent material of the intermediate member 112 are both silicon (Si), for example.
  • the insulating film 12 is provided so as to uniformly cover the support 11 .
  • the insulating film 12 is made of an inorganic oxide such as silicon oxide (SiOx) or silicon nitride (SiNx).
  • the insulating film 12 has a facing surface 12S facing the sensor substrate 20 .
  • One or more recesses 10U are formed in the circuit board 10 on the side facing the sensor board 20 .
  • FIG. 1B illustrates a configuration in which four recesses 10U are provided at positions corresponding to the effective pixel region R24 of the sensor substrate 20 in the Z-axis direction, but the present disclosure is not limited to this. do not have. That is, only one concave portion 10U may be provided, or two, three, or five or more concave portions 10U may be provided.
  • the chip 30 is provided between the sensor board 20 and the support board 111 of the circuit board 10 .
  • the chip 30 has, for example, a substrate 31 , a circuit forming layer 32 provided on the substrate 31 , and terminal portions 33 provided on the circuit forming layer 32 .
  • the substrate 31 is a substrate made of a semiconductor material such as silicon (Si).
  • the circuit formation layer 32 is provided with a signal processing circuit including, for example, semiconductor elements such as transistors and wiring.
  • the signal processing circuit provided in the circuit forming layer 32 performs signal processing of pixel signals from the solid-state imaging device 24, for example.
  • the circuit forming layer 32 has a facing surface 32S that faces the sensor substrate 20 . In the configuration example shown in FIG.
  • the facing surface 32S protrudes from the facing surface 12S by the thickness of the protective layer 40, for example. Therefore, the distance between the facing surface 32S of the chip 30 and the element forming substrate 21 is narrower than the distance between the intermediate member 112 and the element forming substrate 21 in the Z-axis direction.
  • the protection layer 40 may be extremely thin in the Z-axis direction, and the distance between the chip 30 and the element forming substrate 21 may be substantially equal to the distance between the intermediate member 112 and the element forming substrate 21 .
  • the terminal portion 33 is embedded in the circuit forming layer 32 . However, the surface 33S of the terminal portion 33 is exposed to the facing surface 32S.
  • the circuit forming layer 32 is made of an insulating material such as an insulating resin, metal oxide, metal nitride, or inorganic oxide.
  • the constituent materials of the circuit forming layer 32 include organic insulating materials such as polyimide, silicone, epoxy, and acrylic, and inorganic insulating materials such as AlOx, AlNx, SiOx, SiNx, SiON, SiCN, and SiOC.
  • the terminal portion 33 is preferably made of a highly conductive material such as Cu (copper).
  • the chip 30 is housed in a recess 10U formed in the circuit board 10, for example.
  • the intermediate member 112 of the circuit board 10 is in contact with the end surface 30T of the chip 30 via the insulating film 12 in the XY plane direction.
  • the protective layer 40 is a member that joins the circuit board 10 and the sensor board 20 as described above.
  • the protective layer 40 fills the gap between the circuit board 10 and the sensor board 20 so as to cover the chip 30 .
  • constituent materials of the protective layer 40 include organic materials such as polyimide, silicone, epoxy, and acrylic, and inorganic materials such as SiOx, SiNx, SiON, SiCN, and SiOC.
  • FIGS. 2A to 2G are cross-sectional views respectively showing one step of the manufacturing method of the solid-state imaging device 1, corresponding to FIG. 1A.
  • a resist mask RM is formed on the upper surface of the semiconductor substrate 11Z.
  • the resist mask RM is formed with an opening K in a region corresponding to the region where the recess 10U for accommodating the chip 30 is to be formed.
  • recesses 10U are formed. Specifically, the portion of the semiconductor substrate 11Z that is not covered with the resist mask RM, that is, the portion corresponding to the opening K is dug down by dry etching, for example. As a result, the support 11 in which the support substrate 111 and the intermediate member 112 are integrated is completed.
  • an insulating film 12 is formed to cover the entire support 11 as shown in FIG. 2C.
  • the insulating film 12 can be formed by, for example, a sputtering method or a CVD method. At that time, the insulating film 12 is conformally formed so as to maintain the shape of the concave portion 10U as much as possible.
  • the chip 30 is placed in the recess 10U.
  • a resin adhesive may be applied to the back surface of the substrate 31 of the chip 30 to adhere and fix the chip 30 to the concave portion 10U.
  • the upper surface 30S of the chip 30 protrudes above the opposing surface 12S of the insulating film 12, that is, in a direction away from the support substrate 111. It's becoming
  • a protective film 40Z is formed to cover the entire circuit board 10 and the chip 30 placed in the recess 10U.
  • the protective film 40Z can be formed by, for example, a coating method.
  • the protective film 40Z is polished and planarized by chemical mechanical polishing (CMP), for example, to obtain the protective layer 40 as shown in FIG. 2F.
  • CMP chemical mechanical polishing
  • a structure 20Z is prepared.
  • the structural body 20Z is obtained by laminating a wiring layer 22 on an element forming substrate 21 including a photoelectric conversion portion 25 .
  • a terminal portion 23 is provided on the wiring layer 22 .
  • a surface 23S of the terminal portion 23 is exposed to the facing surface 22S.
  • the position of the structural body 20Z and the circuit board 10 in the XY plane is determined. Align. After that, the structure 20Z and the circuit board 10 are bonded together.
  • the surface 33S of the terminal portion 33 of the chip 30 and the surface 23S of the terminal portion 23 of the sensor substrate 20 are bonded by Cu--Cu, for example. Thereby, the contact plug CP in which the terminal portion 33 and the terminal portion 23 are integrated is obtained.
  • the element forming substrate 21 of the structure 20Z is thinned.
  • a plurality of color filters 26 and a plurality of on-chip lenses 27 are laminated on the thinned device forming substrate 21 to form the solid-state imaging device 24 . This obtains the sensor substrate 20 (see FIG. 1A).
  • the solid-state imaging device 1 is completed through the above steps.
  • the intermediate member 112 is provided in the gap between the element forming substrate 21 and the support substrate 111 so as to be adjacent to the chip 30 in the XY plane direction orthogonal to the Z-axis direction. . Therefore, the protective layer 40 provided to cover the chip 30 in the gap between the element forming substrate 21 and the support substrate 111, for example, can be thin. By reducing the thickness of the protective layer 40, the stress applied to the chip 30 due to bonding of the sensor substrate 20 and the circuit substrate 10, for example, is alleviated. The stress applied to the chip 30 is due, for example, to the distortion of the protective layer 40 and its peripheral portion.
  • the flatness of the protective layer 40 in the XY plane is improved. That is, for example, the inclination of the element formation substrate 21 with respect to the support substrate 111 can be sufficiently reduced. As a result, variations in the distance between the support substrate 111 and the element forming substrate 21 can be reduced, and the operational reliability of the solid-state imaging device 1 can be improved.
  • the chip 30 is arranged so as to be embedded in the concave portion 10U. Therefore, the thickness of the support substrate 111 can be reduced. This is because even if the support substrate 111 is made thin, the mechanical strength of the circuit board 10 as a whole can be maintained because the intermediate member 112 is provided. By reducing the thickness of the support substrate 111, the overall thickness of the solid-state imaging device 1 can be reduced. Further, even if the entire solid-state imaging device 1 is made thinner, the thickness of the chip 30 can be maintained because the chip 30 is embedded in the concave portion 10U in the solid-state imaging device 1 . Therefore, the withstand voltage and mechanical strength required for the substrate 31 can be sufficiently secured. Therefore, long-term reliability of the solid-state imaging device 1 can be improved.
  • the intermediate member 112 is arranged so as to be adjacent to the chip 30 in the XY plane direction.
  • the intermediate member 112 has a second thermal conductivity higher than the first thermal conductivity of the protective layer 40 . Therefore, heat generated in the chip 30 can be efficiently released to the outside, for example, compared to the case where the protective layer 40 covers most of the chip 30 without the intermediate member 112 present. In this respect as well, the operational reliability of the solid-state imaging device 1 can be improved.
  • FIG. 3 is a cross-sectional view showing an overall configuration example of a solid-state imaging device 1A according to a first modification (hereinafter referred to as modification 1) of the first embodiment.
  • FIGS. 4A to 4F are cross-sectional views respectively showing one step of the manufacturing method of the solid-state imaging device 1A, corresponding to FIG. 1A.
  • FIGS. 2A to 2C are sequentially performed in the same manner as in the manufacturing method of the solid-state imaging device 1 of the first embodiment.
  • the chip 30 is placed in the recess 10U.
  • a resin adhesive may be applied to the back surface of the substrate 31 of the chip 30 to adhere and fix the chip 30 to the concave portion 10U.
  • the chip 30 is substantially the same as the chip 30 of the first embodiment.
  • modification 1-1 as shown in FIG. 4A, when the chip 30 is placed in the recess 10U, the upper surface 30S of the chip 30 is positioned below the facing surface 12S of the insulating film 12, that is, on the support substrate 111. It is in a recessed state in the approaching direction.
  • a protective film 40Z is formed to cover the entire circuit board 10 and the chip 30 placed in the recess 10U.
  • the protective film 40Z can be formed by, for example, a coating method.
  • the protective film 40Z is polished and planarized by chemical mechanical polishing (CMP), for example, to obtain the protective layer 40 as shown in FIG. 4C.
  • CMP chemical mechanical polishing
  • the surface 33S of the terminal portion 33 of the chip 30 is covered with the protective layer 40.
  • the facing surface 12S of the insulating film 12 may be covered with the protective layer 40 without being exposed.
  • a resist mask RM2 that selectively covers the protective layer 40 is formed by photolithography, for example.
  • the resist mask RM2 has openings K2 at positions corresponding to the terminal portions 33 .
  • dry etching for example, is performed using a resist mask RM2.
  • the protective layer 40 exposed in the opening K2 is selectively etched.
  • An opening K40 is formed in the protective layer 40 by etching using the resist mask RM2, and the terminal portion 33 is exposed.
  • a metal film 34 is formed on the terminal portion 33 by, for example, plating.
  • the metal film 34 is made of the same material as the terminal portion 33, such as Cu.
  • a planarization process may be performed.
  • the terminal portion 35 composed of the terminal portion 33 and the metal film 34 is obtained.
  • the chip 30A including the substrate 31, the circuit forming layer 32, and the terminal portion 35 is completed.
  • the terminal portion 35 includes a surface 35S.
  • Surface 40S of protective layer 40 forms a common plane with surface 35S.
  • a structure 20Z is prepared.
  • the structural body 20Z is obtained by laminating a wiring layer 22 on an element forming substrate 21 including a photoelectric conversion portion 25 .
  • a terminal portion 23 is provided on the wiring layer 22 .
  • a surface 23S of the terminal portion 23 is exposed to the facing surface 22S.
  • the position of the structural body 20Z and the circuit board 10 in the XY plane is determined. Align. After that, the structure 20Z and the circuit board 10 are bonded together.
  • the surface 35S of the terminal portion 35 of the chip 30A and the surface 23S of the terminal portion 23 of the sensor substrate 20 are bonded by Cu--Cu, for example. Thereby, the contact plug CP2 in which the terminal portion 35 and the terminal portion 23 are integrated is obtained.
  • the element forming substrate 21 of the structure 20Z is thinned.
  • a plurality of color filters 26 and a plurality of on-chip lenses 27 are laminated on the thinned device forming substrate 21 to form the solid-state imaging device 24 .
  • the sensor substrate 20 is obtained (see FIG. 3).
  • (Effect) Modification 1 has a terminal portion 35 obtained by forming an additional metal film 34 on the terminal portion 33, for example.
  • the terminal portion 35 includes a surface 35S protruding from both the facing surface 32S and the facing surface 12S. Therefore, the heights of the plurality of terminal portions 35 can be easily aligned by, for example, CMP. Therefore, the solid-state imaging device 1A having higher dimensional accuracy can be realized.
  • FIG. 5 is a cross-sectional view showing an overall configuration example of the solid-state imaging device 2 according to the second embodiment of the present disclosure.
  • the solid-state imaging device 2 is different from the solid-state imaging device 1 in that it includes a circuit board 50 instead of the circuit board 10 .
  • the circuit board 50 has, for example, a support substrate 111, insulating films 12 to 14, a chip 30, and an intermediate member 112.
  • the insulating film 12 extends in the XY plane so as to entirely cover the upper surface of the support substrate 111 .
  • the chip 30 is arranged on the insulating film 12 .
  • the intermediate member 112 is arranged on the support substrate 111 with the insulating films 14 and 13 interposed therebetween. The intermediate member 112 and the chip 30 are provided adjacent to each other in the XY plane.
  • the intermediate member 112 is in contact with the end face 30T of the chip 30 via the insulating film 13 .
  • the insulating films 13 and 14 are made of inorganic oxides such as silicon oxide (SiOx) and silicon nitride (SiNx).
  • the facing surface 20S of the sensor substrate 20 and the facing surface 50S of the circuit board 50 are joined.
  • the facing surface 20S of the sensor substrate 20 includes the facing surface 22S of the wiring layer 22 and the surface 23S of the terminal portion 23 .
  • the facing surface 50 ⁇ /b>S of the circuit board 50 includes the surface 112 ⁇ /b>S of the intermediate member 112 , the facing surface 32 ⁇ /b>S of the circuit forming layer 32 , and the surface 33 ⁇ /b>S of the terminal portion 33 .
  • FIGS. 6A to 6I are cross-sectional views showing one step of the manufacturing method of the solid-state imaging device 2, respectively, and correspond to FIG.
  • a resist mask RM3 is formed on the upper surface of the semiconductor substrate 112Z.
  • the resist mask RM3 is formed with an opening K3 in a region corresponding to the region where the recess 112U for housing the chip 30 is to be formed.
  • recesses 112U are formed in the semiconductor substrate 112Z.
  • the portion of the semiconductor substrate 112Z that is not covered with the resist mask RM3, that is, the portion corresponding to the opening K3 is dug down by dry etching, for example.
  • an insulating film 13 is formed to cover the entire semiconductor substrate 112Z, as shown in FIG. 6C.
  • the insulating film 13 can be formed by, for example, a sputtering method or a CVD method. At that time, the insulating film 13 is conformally formed so as to maintain the shape of the concave portion 112U as much as possible.
  • the chip 30 is placed in the recess 112U.
  • the upper surface 30S of the chip 30 may face the recess 112U, and a resin adhesive may be applied to the upper surface 30S to adhere and fix the chip 30 to the recess 112U.
  • the rear surface of the chip 30 protrudes upward from the upper surface of the insulating film 13. As shown in FIG.
  • an insulating film 14Z is formed so as to entirely cover the insulating film 13 and the chip 30 placed in the recess 112U.
  • the insulating film 14Z can be formed by, for example, a coating method.
  • the insulating film 14Z is polished and planarized by chemical mechanical polishing (CMP), for example, to obtain the insulating film 14 as shown in FIG. 6F.
  • CMP chemical mechanical polishing
  • CMP is performed until the back surface of the substrate 31 of the chip 30 is exposed.
  • a facing surface 31S including the front surface of the insulating film 14 and the rear surface of the substrate 31 is formed.
  • a structure 50Z is prepared.
  • the structural body 50Z is obtained by laminating an insulating film 12 on a support substrate 111 which is a semiconductor substrate. Subsequently, the structure 50Z is attached to the facing surface 31S.
  • the semiconductor substrate 112Z is polished by, for example, chemical mechanical polishing (CMP) from the side opposite to the structure 50Z, and thinned until the upper surface 30S of the chip 30 is exposed. As a result, the intermediate member 112 is formed and the circuit board 50 is completed.
  • CMP chemical mechanical polishing
  • a structure 20Z is prepared.
  • the structural body 20Z is obtained by laminating a wiring layer 22 on an element forming substrate 21 including a photoelectric conversion portion 25 .
  • a terminal portion 23 is provided on the wiring layer 22 .
  • a surface 23S of the terminal portion 23 is exposed to the facing surface 22S.
  • the structural body 20Z and the circuit board 50 are aligned in the XY plane with the facing surface 22S of the structural body 20Z and the facing surface 50S of the circuit board 50 facing each other.
  • the structure 20Z and the circuit board 50 are bonded together.
  • the surface 33S of the terminal portion 33 of the chip 30 and the surface 23S of the terminal portion 23 of the sensor substrate 20 are bonded by Cu--Cu, for example.
  • the contact plug CP2 in which the terminal portion 33 and the terminal portion 23 are integrated is obtained.
  • the element forming substrate 21 of the structure 20Z is thinned.
  • a plurality of color filters 26 and a plurality of on-chip lenses 27 are laminated on the thinned device forming substrate 21 to form the solid-state imaging device 24 .
  • the sensor substrate 20 is obtained (see FIG. 5).
  • the solid-state imaging device 2 is completed through the above steps.
  • FIG. 7 is a block diagram showing a configuration example of a camera 2000 as an electronic device to which the present technology is applied.
  • a camera 2000 includes an optical unit 2001 including a group of lenses and the like, and an imaging apparatus (imaging device) 2002 to which the above-described solid-state imaging devices 1, 1A to 1C, 2, 2A (hereinafter referred to as the solid-state imaging device 1 and the like) are applied. , and a DSP (Digital Signal Processor) circuit 2003 which is a camera signal processing circuit.
  • the camera 2000 also includes a frame memory 2004 , a display section 2005 , a recording section 2006 , an operation section 2007 and a power supply section 2008 .
  • DSP circuit 2003 , frame memory 2004 , display unit 2005 , recording unit 2006 , operation unit 2007 and power supply unit 2008 are interconnected via bus line 2009 .
  • An optical unit 2001 captures incident light (image light) from a subject and forms an image on an imaging surface of an imaging device 2002 .
  • the imaging device 2002 converts the amount of incident light formed on the imaging surface by the optical unit 2001 into an electric signal for each pixel, and outputs the electric signal as a pixel signal.
  • the display unit 2005 is composed of, for example, a panel type display device such as a liquid crystal panel or an organic EL panel, and displays moving images or still images captured by the imaging device 2002 .
  • a recording unit 2006 records a moving image or still image captured by the imaging device 2002 in a recording medium such as a hard disk or a semiconductor memory.
  • the operation unit 2007 issues operation commands for various functions of the camera 2000 under the user's operation.
  • a power supply unit 2008 appropriately supplies various power supplies as operating power supplies for the DSP circuit 2003, the frame memory 2004, the display unit 2005, the recording unit 2006, and the operation unit 2007 to these supply targets.
  • the technology (the present technology) according to the present disclosure can be applied to various products.
  • the technology according to the present disclosure can be realized as a device mounted on any type of moving body such as automobiles, electric vehicles, hybrid electric vehicles, motorcycles, bicycles, personal mobility, airplanes, drones, ships, and robots. may
  • FIG. 8 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile control system to which the technology according to the present disclosure can be applied.
  • a vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001.
  • the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an exterior information detection unit 12030, an interior information detection unit 12040, and an integrated control unit 12050.
  • a microcomputer 12051, an audio/image output unit 12052, and an in-vehicle network I/F (Interface) 12053 are illustrated.
  • the drive system control unit 12010 controls the operation of devices related to the drive system of the vehicle according to various programs.
  • the driving system control unit 12010 includes a driving force generator for generating driving force of the vehicle such as an internal combustion engine or a driving motor, a driving force transmission mechanism for transmitting the driving force to the wheels, and a steering angle of the vehicle. It functions as a control device such as a steering mechanism to adjust and a brake device to generate braking force of the vehicle.
  • the body system control unit 12020 controls the operation of various devices equipped on the vehicle body according to various programs.
  • the body system control unit 12020 functions as a keyless entry system, a smart key system, a power window device, or a control device for various lamps such as headlamps, back lamps, brake lamps, winkers or fog lamps.
  • the body system control unit 12020 can receive radio waves transmitted from a portable device that substitutes for a key or signals from various switches.
  • the body system control unit 12020 receives the input of these radio waves or signals and controls the door lock device, power window device, lamps, etc. of the vehicle.
  • the vehicle exterior information detection unit 12030 detects information outside the vehicle in which the vehicle control system 12000 is installed.
  • the vehicle exterior information detection unit 12030 is connected with an imaging section 12031 .
  • the vehicle exterior information detection unit 12030 causes the imaging unit 12031 to capture an image of the exterior of the vehicle, and receives the captured image.
  • the vehicle exterior information detection unit 12030 may perform object detection processing or distance detection processing such as people, vehicles, obstacles, signs, or characters on the road surface based on the received image.
  • the imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal according to the amount of received light.
  • the imaging unit 12031 can output the electric signal as an image, and can also output it as distance measurement information.
  • the light received by the imaging unit 12031 may be visible light or non-visible light such as infrared rays.
  • the in-vehicle information detection unit 12040 detects in-vehicle information.
  • the in-vehicle information detection unit 12040 is connected to, for example, a driver state detection section 12041 that detects the state of the driver.
  • the driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 detects the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041. It may be calculated, or it may be determined whether the driver is dozing off.
  • the microcomputer 12051 calculates control target values for the driving force generator, the steering mechanism, or the braking device based on the information inside and outside the vehicle acquired by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, and controls the drive system control unit.
  • a control command can be output to 12010 .
  • the microcomputer 12051 realizes the functions of ADAS (Advanced Driver Assistance System) including collision avoidance or shock mitigation of vehicles, follow-up driving based on inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane deviation warning, etc. Cooperative control can be performed for the purpose of ADAS (Advanced Driver Assistance System) including collision avoidance or shock mitigation of vehicles, follow-up driving based on inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane deviation warning, etc. Cooperative control can be performed for the purpose of ADAS (Advanced Driver Assistance System) including collision avoidance or shock mitigation of vehicles, follow-up driving based on inter-vehicle distance, vehicle speed maintenance driving
  • the microcomputer 12051 controls the driving force generator, the steering mechanism, the braking device, etc. based on the information about the vehicle surroundings acquired by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, so that the driver's Cooperative control can be performed for the purpose of autonomous driving, etc., in which vehicles autonomously travel without depending on operation.
  • the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the information detection unit 12030 outside the vehicle.
  • the microcomputer 12051 controls the headlamps according to the position of the preceding vehicle or the oncoming vehicle detected by the vehicle exterior information detection unit 12030, and performs cooperative control aimed at anti-glare such as switching from high beam to low beam. It can be carried out.
  • the audio/image output unit 12052 transmits at least one of audio and/or image output signals to an output device capable of visually or audibly notifying the passengers of the vehicle or the outside of the vehicle.
  • an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are illustrated as output devices.
  • the display unit 12062 may include at least one of an on-board display and a head-up display, for example.
  • FIG. 9 is a diagram showing an example of the installation position of the imaging unit 12031.
  • the imaging unit 12031 has imaging units 12101, 12102, 12103, 12104, and 12105.
  • the imaging units 12101, 12102, 12103, 12104, and 12105 are provided at positions such as the front nose, side mirrors, rear bumper, back door, and windshield of the vehicle 12100, for example.
  • An image pickup unit 12101 provided in the front nose and an image pickup unit 12105 provided above the windshield in the passenger compartment mainly acquire images in front of the vehicle 12100 .
  • Imaging units 12102 and 12103 provided in the side mirrors mainly acquire side images of the vehicle 12100 .
  • An imaging unit 12104 provided in the rear bumper or back door mainly acquires an image behind the vehicle 12100 .
  • the imaging unit 12105 provided above the windshield in the passenger compartment is mainly used for detecting preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, and the like.
  • FIG. 9 shows an example of the imaging range of the imaging units 12101 to 12104.
  • the imaging range 12111 indicates the imaging range of the imaging unit 12101 provided in the front nose
  • the imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided in the side mirrors, respectively
  • the imaging range 12114 The imaging range of an imaging unit 12104 provided on the rear bumper or back door is shown. For example, by superimposing the image data captured by the imaging units 12101 to 12104, a bird's-eye view image of the vehicle 12100 viewed from above can be obtained.
  • At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information.
  • at least one of the imaging units 12101 to 12104 may be a stereo camera composed of a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.
  • the microcomputer 12051 determines the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and changes in this distance over time (relative velocity with respect to the vehicle 12100). , it is possible to extract, as the preceding vehicle, the closest three-dimensional object on the traveling path of the vehicle 12100, which runs at a predetermined speed (for example, 0 km/h or more) in substantially the same direction as the vehicle 12100. can. Furthermore, the microcomputer 12051 can set the inter-vehicle distance to be secured in advance in front of the preceding vehicle, and perform automatic brake control (including following stop control) and automatic acceleration control (including following start control). In this way, cooperative control can be performed for the purpose of automatic driving in which the vehicle runs autonomously without relying on the operation of the driver.
  • automatic brake control including following stop control
  • automatic acceleration control including following start control
  • the microcomputer 12051 converts three-dimensional object data related to three-dimensional objects to other three-dimensional objects such as motorcycles, ordinary vehicles, large vehicles, pedestrians, and utility poles. It can be classified and extracted and used for automatic avoidance of obstacles. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into those that are visible to the driver of the vehicle 12100 and those that are difficult to see. Then, the microcomputer 12051 judges the collision risk indicating the degree of danger of collision with each obstacle, and when the collision risk is equal to or higher than the set value and there is a possibility of collision, an audio speaker 12061 and a display unit 12062 are displayed. By outputting an alarm to the driver via the drive system control unit 12010 and performing forced deceleration and avoidance steering via the drive system control unit 12010, driving support for collision avoidance can be performed.
  • At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays.
  • the microcomputer 12051 can recognize a pedestrian by determining whether or not the pedestrian exists in the captured images of the imaging units 12101 to 12104 .
  • recognition of a pedestrian is performed by, for example, a procedure for extracting feature points in images captured by the imaging units 12101 to 12104 as infrared cameras, and performing pattern matching processing on a series of feature points indicating the outline of an object to determine whether or not the pedestrian is a pedestrian.
  • the audio image output unit 12052 outputs a rectangular outline for emphasis to the recognized pedestrian. is superimposed on the display unit 12062 . Also, the audio/image output unit 12052 may control the display unit 12062 to display an icon or the like indicating a pedestrian at a desired position.
  • the technology according to the present disclosure can be applied to the imaging unit 12031 among the configurations described above.
  • the solid-state imaging device 1 or the like shown in FIG. 1A or the like can be applied to the imaging unit 12031 .
  • excellent operation of the vehicle control system can be expected.
  • the solid-state imaging device 1 has a structure in which the sensor substrate 20 is laminated on the circuit board 10, but the present disclosure is not limited to this.
  • the present disclosure is not limited to this.
  • three or more substrates may be laminated.
  • another circuit board 60 is further inserted between the circuit board 10 and the sensor board 20 .
  • the end face 30T of the chip 30 is brought into contact with the intermediate member 112 through the insulating film 12, but the present disclosure is limited to this. is not.
  • a space may be provided between the end surface 30T of the chip 30 and the side wall of the recess 10U.
  • a protective layer 40 may be filled in the gap between the end surface 30T of the chip 30 and the side wall of the recess 10U.
  • the technology according to the present disclosure can also have the following configuration.
  • the intermediate member is provided in the gap between the first substrate and the second substrate so as to be adjacent to the chip in the in-plane direction orthogonal to the first direction. Therefore, for example, the thickness of the protective layer provided in the gap between the first substrate and the second substrate so as to cover the chip may be thin. As a result, it is possible to realize a structure suitable for thinning while having good imaging performance.
  • the effects of the technology according to the present disclosure are not necessarily limited to the effects described herein, and may be any of the effects described in the present disclosure.
  • a first substrate having an imaging device that includes a plurality of pixels and is capable of generating a pixel signal for each pixel; a second substrate arranged to face the first substrate in a first direction; a chip provided between the first substrate and the second substrate and having a circuit for performing signal processing of the pixel signal; an intermediate member located in a gap between the first substrate and the second substrate and provided so as to be adjacent to the chip in an in-plane direction perpendicular to the first direction.
  • the imaging device according to (1) wherein the intermediate member is in contact with the chip via an insulating film in the in-plane direction.
  • the chip is a third substrate; a circuit forming layer provided on the third substrate;
  • the distance between the chip and the first substrate in the first direction is substantially equal to the distance between the intermediate member and the first substrate according to any one of (1) to (8) above.
  • Imaging device (10) The imaging device according to any one of (1) to (8), wherein the distance between the chip and the first substrate is narrower than the distance between the intermediate member and the first substrate in the first direction. . (11) The imaging device according to any one of (1) to (8) above, wherein the distance between the chip and the first substrate is wider than the distance between the intermediate member and the first substrate in the first direction. .
  • a first substrate having an imaging device that includes a plurality of pixels and is capable of generating a pixel signal for each pixel; a second substrate having a recess facing the first substrate in a first direction; A chip located between the first substrate and the second substrate, partially or entirely accommodated in the recess in the first direction, and having a circuit for performing signal processing of the pixel signal.
  • the imaging device according to (12) above further comprising a protective layer filled in a gap between the first substrate and the second substrate so as to cover the chip.
  • the intermediate member has a second thermal conductivity higher than a first thermal conductivity of the protective layer.
  • the chip has a third substrate, an insulating layer provided on the third substrate, and wiring embedded in the insulating layer, The method for manufacturing an imaging device according to (16) above, wherein the wiring is exposed from the insulating layer by planarizing the protective layer.
  • the imaging device is a first substrate having an imaging device that includes a plurality of pixels and is capable of generating a pixel signal for each pixel; a second substrate arranged to face the first substrate in a first direction; a chip provided between the first substrate and the second substrate and having a circuit for performing signal processing of the pixel signal;
  • An electronic device comprising: an intermediate member located in a gap between the first substrate and the second substrate, and provided so as to be adjacent to the chip in an in-plane direction perpendicular to the first direction.

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PCT/JP2022/004899 2021-03-15 2022-02-08 撮像装置、撮像装置の製造方法、および電子機器 WO2022196188A1 (ja)

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Publication number Priority date Publication date Assignee Title
JP2003264280A (ja) * 2002-03-08 2003-09-19 Hamamatsu Photonics Kk 検出器
JP2005191157A (ja) * 2003-12-25 2005-07-14 Casio Comput Co Ltd 半導体装置およびその製造方法
JP2007103714A (ja) * 2005-10-05 2007-04-19 Sony Corp 半導体装置及びその製造方法
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