WO2022188214A1 - 显示面板及其制备方法 - Google Patents

显示面板及其制备方法 Download PDF

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Publication number
WO2022188214A1
WO2022188214A1 PCT/CN2021/083754 CN2021083754W WO2022188214A1 WO 2022188214 A1 WO2022188214 A1 WO 2022188214A1 CN 2021083754 W CN2021083754 W CN 2021083754W WO 2022188214 A1 WO2022188214 A1 WO 2022188214A1
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WIPO (PCT)
Prior art keywords
pixel
area
substrate
cathode
layer
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PCT/CN2021/083754
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English (en)
French (fr)
Inventor
吕磊
金蒙
袁涛
黄金昌
Original Assignee
武汉华星光电半导体显示技术有限公司
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Priority to US17/309,871 priority Critical patent/US20230263010A1/en
Publication of WO2022188214A1 publication Critical patent/WO2022188214A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/352—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels the areas of the RGB subpixels being different
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/353—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels characterised by the geometrical arrangement of the RGB subpixels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8052—Cathodes
    • H10K59/80521—Cathodes characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/875—Arrangements for extracting light from the devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10—Deposition of organic active material
    • H10K71/16—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • H10K59/65—OLEDs integrated with inorganic image sensors

Definitions

  • the present application relates to the field of display technology, and in particular, to a display panel and a manufacturing method thereof.
  • OLED Organic Light Emitting Diode
  • Organic Light Emitting Diode Organic Light Emitting Diode
  • the requirements for the screen ratio of display devices are getting higher and higher, making large-size and high-resolution comprehensive display devices the future development direction.
  • optical components such as the front camera and face recognition are usually arranged under the screen.
  • the cathode is arranged on the entire surface. , and the transmittance of the cathode to light is low, so that the optical element disposed under the screen cannot receive sufficient light signals, which affects the normal operation of the optical element.
  • the cathode is arranged on the whole surface, and the transmittance of the cathode to light is low, so that the optical element arranged under the screen cannot receive sufficient light signals, which affects the normal operation of the optical element. .
  • Embodiments of the present application provide a display panel and a manufacturing method thereof, so as to solve the problem that an optical element disposed under the screen cannot receive sufficient light signals, which affects the normal operation of the optical element.
  • an embodiment of the present application provides a display panel, the display panel includes a first display area and a second display area, and the display panel further includes:
  • the pixel definition layer is disposed on one side of the substrate, and a plurality of spaced pixel openings are disposed on the pixel definition layer;
  • a cathode suppression layer formed of a light-transmitting material is disposed between two adjacent pixel openings, and the cathode suppression layer is disposed on the side of the pixel definition layer away from the substrate; the cathode suppression layer is located on the side of the pixel definition layer.
  • the area of the orthographic projection of the cathode suppression layer on the substrate is less than or equal to 0.95 times the area of the first display area.
  • the area of the orthographic projection of the cathode suppression layer on the substrate is greater than or equal to 0.05 times the area of the first display area.
  • the display panel further includes a cathode layer disposed on a side of the pixel definition layer away from the substrate; the cathode layer includes electrode portions corresponding to the pixel openings one-to-one and for connecting adjacent ones.
  • the overlapping part of the two electrode parts, the overlapping part is located in the first display area.
  • the overlapping portion and the electrode portion are integrally formed;
  • the cathode suppression layer includes a plurality of spaced-apart light-transmitting blocks, and the first display area includes a portion located between two adjacent electrode portions.
  • the overlapping area, the overlapping portion is located in the overlapping area.
  • the first display area includes a plurality of light-transmitting sub-areas, and each of the light-transmitting sub-areas is formed by the overlapping portion and the first pixel opening, the second pixel opening, the first pixel opening, and the first pixel opening among the plurality of pixel openings. surrounded by a three-pixel opening and a fourth pixel opening;
  • the second pixel opening is adjacent to the first pixel opening and is located at the side of the first pixel opening along the first direction
  • the third pixel opening is adjacent to the second pixel opening and is located at the side of the first pixel opening along the first direction.
  • the side of the second pixel opening along the second direction, the fourth pixel opening is adjacent to the first pixel opening and the third pixel opening at the same time; the light-transmitting block and the light-transmitting partition are one A corresponding setting.
  • the light-transmitting block includes a platform portion and an edge portion located at an edge of the platform portion;
  • the distance between the orthographic projection of the platform portion on the substrate and the orthographic projection of the adjacent pixel opening on the substrate is greater than or equal to the width of the edge portion.
  • the width of the edge portion is 2 to 5 microns.
  • the area of the orthographic projection of the platform portion on the substrate is greater than or equal to 0.84 times the area of the first display area.
  • the distance between the orthographic projection of the platform portion on the substrate and the orthographic projection of the adjacent pixel opening on the substrate is 2 to 10 microns.
  • the area of the orthographic projection of the platform portion on the substrate is greater than or equal to 0.64 times the area of the first display area.
  • the area of the orthographic projection of the platform portion on the substrate is less than or equal to 0.90 times the area of the first display area.
  • the orthographic projection of the light-transmitting block on the substrate is separated from the orthographic projection of the anode on the substrate.
  • the shape of the orthographic projection of the platform portion on the substrate is adapted to the shape of the corresponding light-transmitting partition.
  • the shape of the orthographic projection of the platform portion on the base is an arc.
  • an embodiment of the present application further provides a display panel, the display panel includes a first display area and a second display area, and the display panel further includes:
  • the pixel definition layer is disposed on one side of the substrate, and a plurality of spaced pixel openings are disposed on the pixel definition layer;
  • a cathode suppression layer formed of a light-transmitting material is disposed between two adjacent pixel openings, and the cathode suppression layer is disposed on the side of the pixel definition layer away from the substrate; the cathode suppression layer is located on the side of the pixel definition layer.
  • the first display area, the area of the orthographic projection of the cathode suppression layer on the substrate is less than or equal to 0.95 times the area of the first display area;
  • the area of the orthographic projection of the cathode suppression layer on the substrate is greater than or equal to 0.05 times the area of the first display region.
  • the display panel further includes a cathode layer disposed on a side of the pixel definition layer away from the substrate; the cathode layer includes electrode portions corresponding to the pixel openings one-to-one and for connecting adjacent ones.
  • the overlapping part of the two electrode parts, the overlapping part is located in the first display area.
  • the overlapping portion and the electrode portion are integrally formed;
  • the cathode suppression layer includes a plurality of spaced-apart light-transmitting blocks, and the first display area includes a portion located between two adjacent electrode portions.
  • the overlapping area, the overlapping portion is located in the overlapping area.
  • the first display area includes a plurality of light-transmitting sub-areas, and each of the light-transmitting sub-areas is formed by the overlapping portion and the first pixel opening, the second pixel opening, the first pixel opening, and the first pixel opening among the plurality of pixel openings. surrounded by a three-pixel opening and a fourth pixel opening;
  • the second pixel opening is adjacent to the first pixel opening and is located at the side of the first pixel opening along the first direction
  • the third pixel opening is adjacent to the second pixel opening and is located at the side of the first pixel opening along the first direction.
  • the side of the second pixel opening along the second direction, the fourth pixel opening is adjacent to the first pixel opening and the third pixel opening at the same time; the light-transmitting block and the light-transmitting partition are one A corresponding setting.
  • the light-transmitting block includes a platform portion and an edge portion located at an edge of the platform portion;
  • the distance between the orthographic projection of the platform portion on the substrate and the orthographic projection of the adjacent pixel opening on the substrate is greater than or equal to the width of the edge portion.
  • an embodiment of the present application provides a method for manufacturing a display panel, the display panel includes a first display area and a second display area, and the method for manufacturing the display panel includes:
  • the cathode suppression layer located between two adjacent pixel openings on the side of the pixel definition layer away from the substrate, the cathode suppression layer is formed of a light-transmitting material; the cathode suppression layer is located on the In the first display area, the area of the orthographic projection of the cathode suppression layer on the substrate is less than or equal to 0.95 times the area of the first display area.
  • the beneficial effects of the present application are as follows: by setting the cathode suppression layer with less adhesive force or even repelling the cathode layer, when the cathode layer is formed by the whole surface evaporation process, the cathode layer deposited on the cathode suppression layer is thinner or There is no cathode layer deposition, so that the cathode layer deposited at the light-transmitting area is thinner or no cathode layer is deposited, so as to greatly improve the light transmittance of the light-transmitting area, so as to improve the process without changing the cathode layer.
  • the light transmittance of the first display area enables the optical elements arranged in the first display area to receive sufficient light signals, and at the same time, the area ratio of the cathode suppression layer to the first display area is set to ensure that the first display area is On the premise that the display can be performed normally, the transmittance of the first display area is improved as much as possible.
  • FIG. 1 is a schematic plan view of a display panel according to an embodiment of the present application.
  • FIG. 2 is a schematic structural diagram of a display panel according to an embodiment of the present application.
  • FIG. 3 is a schematic diagram of the arrangement of the anode and the transparent block of the first sub-pixel in an embodiment of the present application.
  • FIG. 4 is a schematic diagram of the arrangement of the anode and the transparent block of the first sub-pixel in an embodiment of the present application.
  • FIG. 5 is a schematic diagram of the arrangement of the anode and the transparent block of the first sub-pixel in an embodiment of the present application.
  • FIG. 6 is a schematic diagram of the arrangement of the anode and the transparent block of the first sub-pixel in an embodiment of the present application.
  • FIG. 7 is a schematic diagram of the arrangement of the anode and the transparent block of the first sub-pixel in an embodiment of the present application.
  • FIG. 8 is a schematic diagram of the arrangement of the anode and the transparent block of the first sub-pixel in an embodiment of the present application.
  • FIG. 9 is a schematic diagram of the arrangement of the anode and the transparent block of the first sub-pixel in an embodiment of the present application.
  • FIG. 10 is a schematic diagram of the arrangement of the anode and the transparent block of the first sub-pixel in an embodiment of the present application.
  • FIG. 11 is a schematic plan view of a display panel according to an embodiment of the present application.
  • FIG. 12 is a schematic diagram of a manufacturing process of a display panel according to an embodiment of the present application.
  • Embodiments of the present application provide a display panel and a manufacturing method thereof. Each of them will be described in detail below. It should be noted that the description order of the following embodiments is not intended to limit the preferred order of the embodiments.
  • the display panel includes a first display area 11 and a second display area 12 , and the second display area 12 surrounds at least a portion of the first display area 11 .
  • the first display area 11 can be arranged at any position on the display panel.
  • the display panel is a full-screen display panel, a plurality of first sub-pixels 13 are arranged in the first display area 11 , and a plurality of second sub-pixels 14 are arranged in the second display area 12 .
  • the first display area 11 is an additional function area, and the first display area 11 can be used not only to display images, so that the display panel can present a full-screen display effect, but also to install cameras, optical touch components and Optical components such as fingerprint recognition sensors, thereby improving user experience;
  • the second display area 12 is the main display area, and the second display area 12 is used for displaying images.
  • the display brightness at the first display area 11 can be the same as or different from the display brightness at the second display area 12, and the first display can be adjusted by adjusting factors such as the driving current and light transmittance. Display brightness at zone 11 and second display zone 12.
  • the light transmittance of the first display area 11 is greater than the light transmittance of the second display area 12 .
  • the light transmittance of the first display area 11 has a great influence on the operation of the optical element, and the light transmittance at the first display area 11 is different from that at the first display area 11 . It is related to the structure of the film layer. Taking the optical element as the camera as an example, the higher the light transmittance of the first display area 11 is, the better the imaging quality of the camera is when the camera is shooting.
  • the display panel includes a substrate 15 , a pixel definition layer 17 disposed on one side of the substrate 15 , and a pixel definition layer 17 disposed on the pixel definition layer 17 away from the substrate
  • the cathode layer 133 on one side of the pixel definition layer 17 is provided with a plurality of spaced apart pixel openings 171 .
  • the substrate 15 can be a flexible substrate, and the material of the flexible substrate can be an organic material such as polyimide; the substrate 15 can also be a rigid substrate, and the material of the rigid substrate can be, for example, glass, metal, plastic, etc.; 15 may be a single-layer film structure or a multi-layer film structure.
  • a cathode suppression layer 18 formed of a light-transmitting material is disposed between two adjacent pixel openings 171 , and the cathode suppression layer 18 is disposed on a part of the pixel definition layer 17 away from the substrate 15 . On one side, the cathode suppression layer 18 is located in the first display area 11 .
  • the cathode suppressing layer 18 by providing the cathode suppressing layer 18 with the cathode layer 133 having less adhesion or even repelling each other, when the cathode layer 133 is formed by the whole surface evaporation process, due to the adhesion between the cathode layer 133 and other film layers
  • the adhesion force between the cathode layer 133 and the cathode suppression layer 18 is greater than that of the cathode suppression layer 18, so that the cathode layer 133 deposited on the cathode suppression layer 18 is thinner or no cathode layer 133 is deposited, so that the process of the cathode layer 133 is not changed.
  • the light transmittance of the first display area 11 enables the optical elements disposed in the first display area 11 to receive sufficient light signals.
  • the material of the cathode layer 133 may be metal magnesium
  • the material of the cathode suppression layer 18 may be BAlq (bis(2-methyl-8-hydroxyquinoline)-4-(p-phenylphenol) aluminum) ), TAZ (3-(biphenyl-4-yl)-5-(4-tert-butylphenyl)-4-phenyl-4H-1,2,4-triazole) and OTI (indium oxide) at least one of.
  • BAlq bis(2-methyl-8-hydroxyquinoline)-4-(p-phenylphenol) aluminum
  • TAZ triphenyl-4-yl-5-(4-tert-butylphenyl)-4-phenyl-4H-1,2,4-triazole
  • OTI indium oxide
  • the display panel further includes an array layer 16 disposed on one side of the substrate 15;
  • the first sub-pixel 13 includes an anode 131, a light-emitting layer 132 and the cathode layer 133;
  • the anode 131 is disposed on
  • the array layer 16 is located on the side away from the substrate 15
  • the light emitting layer 132 is located on the side of the anode 131 away from the substrate 15
  • the cathode layer 133 is located on the light emitting layer 132 away from the substrate 15 side.
  • the first display area 11 includes a light-emitting area 111 and a light-transmitting area 112, the light-emitting area 111 is used for image display, and the light-transmitting area 112 is used for transmitting external light to enhance the first To display the light transmittance of the area 11 , the anode 131 is located in the light-emitting area 111 .
  • the first display area 11 includes a plurality of light-emitting areas 111, and the plurality of the light-emitting areas 111 can be connected to each other to form a display area with a larger area; the plurality of the light-emitting areas 111 can also be isolated from each other.
  • the first sub-pixels 13 are distributed in the plurality of light-emitting regions 111 .
  • a plurality of the light-emitting areas 111 are evenly distributed in the first display area 11, and the first sub-pixels 13 correspond to the light-emitting areas 111 one-to-one, so that the first sub-pixels 13 are uniform It is distributed in each area of the first display area 11 to avoid the situation that a large area is not displayed or is poorly displayed during display due to concentrated display, which helps to improve the user experience.
  • the light-transmitting area 112 may include a plurality of sub-regions, and the plurality of sub-regions may be isolated from each other, and the plurality of sub-regions may also be connected to each other.
  • the cathode suppressing layer 18 is located in the light-transmitting area 112 of the first display area 11 , and the thickness of the portion of the cathode suppressing layer 133 formed on the cathode suppressing layer 18 is smaller than that of the cathode layer 133 and the The thickness of the portion corresponding to the pixel opening 171.
  • the anode 131 is located on a side of the array layer 16 away from the substrate 15
  • the pixel definition layer 17 is disposed on a side of the array layer 16 and the anode 131 away from the substrate 15 .
  • the pixel openings 171 are in one-to-one correspondence with the anodes 131 , and at least a part of the anodes 131 is exposed through the pixel openings 171 , and the pixel openings 171 are located in the light-emitting region 111 .
  • the light-emitting layer 132 is an organic light-emitting material layer; the display panel further includes a first auxiliary layer 134 located on a side of the anode 131 away from the substrate 15 , and a first auxiliary layer 134 located away from the first auxiliary layer 134 The second auxiliary layer 135 on one side of the substrate 15 .
  • the light emitting layer 132 is located between the first auxiliary layer 134 and the second auxiliary layer 135, the light emitting layer 132 is located in the pixel opening 171, and a part of the first auxiliary layer 134 is located in the pixel
  • the definition layer 17 covers and covers the portion of the anode 131 located in the pixel opening 171 .
  • the first auxiliary layer 134 may include a hole injection layer and a hole transport layer that are sequentially stacked along a direction away from the substrate 15 , and the hole injection layer covers the anode 131 ;
  • the second auxiliary layer 135 may include The electron transport layer and the electron injection layer are sequentially stacked along the direction away from the substrate 15 , and the electron transport layer covers the light-emitting layer 132 .
  • the preparation materials of the first auxiliary layer 134 and the second auxiliary layer 135 are transparent materials, which have little influence on the light transmittance of the first display area 11 .
  • 134 and the second auxiliary layer 135 may cover the light-emitting area 111 and the light-transmitting area 112 .
  • the cathode layer 133 and the cathode suppression layer 18 are disposed on the side of the second auxiliary layer 135 away from the substrate 15 , and the cathode layer 133 and the cathode suppression layer
  • the adhesion force of 18 is smaller than the adhesion force of the cathode layer 133 and the second auxiliary layer 135, so that the thickness of the part of the cathode layer 133 deposited on the second auxiliary layer 135 is greater than that of the cathode layer 133
  • the light-emitting layer 132 is only located in the light-emitting area 111 , and the light-emitting layer 132 is not disposed in the light-transmitting area 112 , which can prevent the light-emitting layer 132 from affecting the light transmittance of the light-transmitting area 112 , and help to improve the first display. Transmittance of zone 11.
  • the thickness of the portion of the cathode layer 133 corresponding to the pixel openings 171 is greater than or equal to the thickness of the cathode suppression layer 18 , so as to prevent the formation of a larger thickness between the cathode layer 133 and the cathode suppression layer 18 .
  • the height difference affects the setting of the encapsulation layer.
  • the area of the orthographic projection of the cathode suppression layer 18 on the substrate 15 is less than or equal to 0.95 times the area of the first display area 11 .
  • the cathode suppressing layer 18 is used to thin or even remove the cathode layer 133 located in the light-transmitting region 112 to thin or even remove the cathode layer 133 located in the light-transmitting region 112, the cathode layer 133 becomes thinner and the resistance of the cathode layer 133 increases, which affects the electrical performance of the cathode layer 133, thereby affecting the first
  • the setting area of the cathode suppressing layer 18 cannot be infinite.
  • the settable area of the suppression layer 18 is the largest, and the area of the orthographic projection of the cathode suppression layer 18 on the substrate 15 is equal to 0.95 times the area of the first display area 11 .
  • the area of the orthographic projection of the cathode suppression layer 18 on the substrate 15 is greater than or equal to 0.05 times the area of the first display area 11 .
  • the installation of the cathode suppression layer 18 requires additional processes and materials, which will improve the The manufacturing cost of the display panel, the setting area of the cathode suppression layer 18 is too small, which will lead to a small increase in the light transmittance of the first display area 11, which reduces the cost performance of the cathode suppression layer 18.
  • the cathode suppression layer 18 When the cathode suppression layer 18 is on the substrate 15 When the area of the orthographic projection is less than 0.05 times the area of the first display area 11 , the actual benefit of disposing the cathode suppressing layer 18 will be less than the cost of disposing the cathode suppressing layer 18 .
  • the cathode layer 133 includes electrode portions corresponding to the pixel openings 171 one-to-one, and an overlap portion for connecting two adjacent electrode portions.
  • the overlapping portion 133a is located in the first display area 11, and two adjacent electrode portions are connected through the overlapping portion 133a.
  • the electrode parts are in one-to-one correspondence with the first sub-pixels 13 , that is, one first sub-pixel 13 includes one electrode part, and the electrode parts are arranged in a scattered manner, that is, the first sub-pixels 13 are arranged in a dispersed manner, which can avoid display concentration caused by display.
  • using the overlap portion 133a to connect the electrode portion can reduce the overall resistance of the cathode layer 133, thereby reducing the voltage drop caused by the central area and the edge of the first display area 11.
  • the difference in the magnitude of the current in the regions can improve the uniformity of the display brightness of the first display region 11 .
  • the electrode portions can be uniformly distributed in the first display area 11 to improve the display uniformity of the first display area 11 .
  • the overlapping portion 133a and the electrode portion are located at different layers, and the overlapping portion 133a and the electrode portion can be made of the same or different materials.
  • the overlap portion 133a and the electrode portion are made of different materials
  • the overlap portion 133a can be made of transparent conductive metal, and the overlap portion 133a reduces the overall resistance of the cathode layer 133 and enhances the first display area 11 at the same time. of light transmittance.
  • the cathode suppression layer 18 can be used to remove the part of the cathode layer 133 outside the light emitting area 111, and only the part of the cathode layer 133 located in the light emitting area 111 is left, so as to The light transmittance of the first display area 11 is further improved.
  • the overlapping portion 133a and the electrode portion are disposed on the same layer, and the overlapping portion 133a and the electrode portion can be made of the same or different materials.
  • the overlap portion 133a and the electrode portion are made of different materials, the overlap portion 133a can be made of transparent conductive metal, so as to greatly improve the light transmittance of the first display area 11, and at the same time, the overlap portion 133a reduces the The overall resistance of the cathode layer 133 .
  • the overlap metal layer can be integrally formed with the electrode portion; the cathode suppression layer 18 includes a plurality of phases.
  • the light-transmitting blocks 181 are spaced apart.
  • the first display area 11 includes an overlapping area between two adjacent light-transmitting blocks 181 , and the overlapping portion 133 a is located in the overlapping area.
  • the cathode suppressing layer 18 is configured to be composed of a plurality of spaced-apart light-transmitting blocks 181 .
  • the cathode layers 133 of all the first sub-pixels 13 are formed by evaporation on the entire surface, the cathode material is simultaneously deposited at the overlapping area between the two adjacent light-transmitting blocks 181 to form the electrode portion and the connecting electrode portion.
  • the overlapping portion 133a can reduce the overall resistance of the cathode layer 133 without increasing the manufacturing process.
  • FIG. 3 to FIG. 10 only illustrate the case where the shape of the overlapping portion 133a is a line shape, this is only to better illustrate the positional relationship between the overlapping portion 133a and the pixel opening 171, in actual implementation
  • the cathode layer 133 is vapor-deposited on the front side, the cathode material is distributed in the whole overlapping area, so that the overlapping part 133a distributed in the whole overlapping area can be formed.
  • the shape of the overlapping part 133a is the same as that of the overlapping area.
  • the light-transmitting area 112 includes a plurality of light-transmitting sub-regions, and each of the light-transmitting sub-regions is composed of the overlapping portion 133 a and the first pixel opening 171 a of the plurality of pixel openings 171 , The second pixel opening 171b, the third pixel opening 171c and the fourth pixel opening 171d are surrounded.
  • the second pixel opening 171b is adjacent to the first pixel opening 171a and is located at the side of the first pixel opening 171a along the first direction
  • the third pixel opening 171c and the second pixel opening 171b is adjacent to and located at the side of the second pixel opening 171b along the second direction
  • the fourth pixel opening 171d is adjacent to the first pixel opening 171a and the third pixel opening 171c at the same time
  • the light blocks 181 are arranged in a one-to-one correspondence with the light-transmitting partitions.
  • each light-transmitting partition is surrounded by four adjacent pixel openings 171 and overlapping portions 133 a.
  • first direction and the second direction are different directions, that is, the first direction and the second direction intersect, as shown in FIG. 3 , in FIG. 3 , the first direction is parallel to the first pixel opening 171 a
  • the length direction of the overlapping portion 133a between the second pixel opening 171b and the second pixel opening 171b is parallel to the length direction of the overlapping portion 133a between the second pixel opening 171b and the third pixel opening 171c.
  • the setting position of the pixel opening 171 is the setting position of the first sub-pixel 13.
  • the first sub-pixel 13 and the light transmission block 181 are located in the The distribution in the first display area 11 is more uniform, thereby ensuring the overall uniformity of the display brightness and light transmittance of the first display area 11 .
  • the light-transmitting blocks 181 are located in the corresponding light-transmitting sub-areas, so as to reserve enough space for the arrangement of the overlapping parts 133 a, so as to prevent the overlapping parts 133 a from being unable to be formed after the connection of two adjacent transparent blocks 181 . , while preventing the disposition of the cathode suppression layer 18 from causing interference and adverse effects on the display of the first display area 11 .
  • the arrangement of the light-transmitting blocks 181 is related to the arrangement of the first sub-pixels 13.
  • the light-transmitting blocks 181 are evenly arranged; when the first sub-pixels 13 are randomly distributed, the transparent blocks 181 are arranged uniformly.
  • the light blocks 181 are randomly distributed, and the arrangement of the first sub-pixels 13 can be selected according to the actual situation.
  • the light-transmitting block 181 includes a platform portion 181a and an edge portion 181b located at the edge of the platform portion 181a.
  • the distance T1 between the orthographic projection of the platform portion 181a on the substrate 15 and the orthographic projection of the adjacent pixel openings 171 on the substrate 15 is greater than or equal to the width T2 of the edge portion 181b.
  • the platform portion 181a is an effective part of the light-transmitting block 181 to suppress the formation of the cathode material.
  • the cathode suppressing layer 18 is patterned, with the current process, a generally slope-like structure is inevitably formed at the edge of the light-transmitting block 181 , that is, the edge portion 181 b is formed, and if the cathode suppressing material falls into the pixel opening 171 In the middle, the normal display of the first sub-pixel 13 will be affected.
  • the position of the platform portion 181 a of the light-transmitting block 181 is designed so that the distance T1 between the platform portion 181 a and the pixel opening 171 is greater than the width T2 of the edge portion 181 b , so that the cathode suppressing layer 18 can be avoided when the light-transmitting block 181 is formed. into the pixel opening 171 .
  • the width T2 of the edge portion 181b is 2 to 5 micrometers, and the width T2 of the edge portion 181b may be 2 micrometers, 3 micrometers, 4 micrometers or 5 micrometers. That is, when the width T2 of the edge portion 181b is 2 microns, the distance T1 between the orthographic projection of the platform portion 181a on the substrate 15 and the orthographic projection of the adjacent pixel openings 171 on the substrate 15 is greater than 2 microns; When the width T2 of the edge portion 181b is 5 microns, the distance T1 between the orthographic projection of the platform portion 181a on the substrate 15 and the orthographic projection of the adjacent pixel openings 171 on the substrate 15 is greater than 5 microns;
  • the width of the edge portion 181b depends on factors such as process accuracy and equipment accuracy. In theory, the smaller the width T2 of the edge portion 181b, the larger the settable area of the platform portion 181a, so as not to affect the first Under the premise of normal display of the sub-pixels 13 , the transmittance of the first display area 11 is made larger.
  • the area of the orthographic projection of the platform portion 181 a on the substrate 15 is greater than or equal to 0.84 times the area of the first display area 11 .
  • the area of the orthographic projection of the platform portion 181 a on the substrate 15 is less than or equal to 0.90 times the area of the first display area 11 .
  • the settable area of the platform portion 181a is the smallest, and the area of the orthographic projection of the platform portion 181a on the substrate 15 is the first 0.84 times the area of the display area 11; when the width T2 of the edge portion 181b is 2 microns, the settable area of the platform portion 181a is the largest, and the orthographic projection of the platform portion 181a on the substrate 15 is the largest.
  • the area is 0.90 times the area of the first display area 11 .
  • the distance T1 between the orthographic projection of the platform portion 181a on the substrate and the orthographic projection of the adjacent pixel openings 171 on the substrate is 2 to 10 ⁇ m;
  • the distance T1 between the orthographic projection on the substrate and the orthographic projection of the adjacent pixel openings 171 on the substrate may be 2 microns, 3 microns, 5 microns, 8 microns, or 10 microns.
  • the distance between the platform portion 181a and the pixel opening 171 is reasonably set in consideration of factors such as the distance between the edge portion 181b and the pixel opening 171, the width of the edge portion 181b, and the cost-effectiveness of providing the cathode suppressing layer 18. , so as to reduce the risk of the edge portion 181b falling into the pixel opening 171 on the premise that the first display area 11 has a large transmittance.
  • the area of the orthographic projection of the platform portion 181 a on the substrate 15 is greater than or equal to 0.64 times the area of the first display area 11 .
  • the area of the orthographic projection of the platform portion 181 a on the substrate 15 is less than or equal to 0.90 times the area of the first display area 11 .
  • the settable area of the platform portion 181a is the smallest, and the platform The area of the orthographic projection of the portion 181a on the substrate 15 is 0.64 times the area of the first display area 11; when the distance T1 between the edge portion 181b and the pixel opening 171 is 0, and the edge portion 181b is When the width T2 is 2 mm, the settable area of the platform portion 181 a is the largest, and the area of the orthographic projection of the platform portion 181 a on the substrate 15 is 0.90 times the area of the first display area 11 .
  • the orthographic projection of the cathode suppression layer 18 on the substrate 15 is separated from the orthographic projection of the anode 131 on the substrate 15 .
  • the orthographic projection of the anode 131 on the substrate 15 will cover the orthographic projection of the pixel opening 171 on the substrate 15, and in order to ensure the normal display of the first sub-pixel 13, it is necessary to ensure that the cathode layer 133 is on the substrate.
  • the orthographic projection on 15 covers the orthographic projection of the pixel opening 171 on the substrate 15.
  • the orthographic projection of the cathode layer 133 on the substrate 15 can cover the orthographic projection of the pixel openings 171 on the substrate 15 to prevent interference and adverse effects on the display of the first display area 11 caused by the arrangement of the cathode suppression layer 18 .
  • a sufficient distance needs to be maintained between the light-transmitting blocks 181 and the pixel openings 171 to facilitate the arrangement of the overlapping portions 133a.
  • each pixel opening 171 corresponds to a first sub-pixel, corresponding to the four pixel openings 171 enclosing the light-transmitting partition.
  • the four first sub-pixels 13 include at least one red sub-pixel ("R" sub-pixel), one green sub-pixel (“G” sub-pixel) and one blue sub-pixel (“B" sub-pixel).
  • the shape of the orthographic projection of the platform portion 181a on the substrate 15 is adapted to the shape of the corresponding light-transmitting partition, so that the area of the light-transmitting partition remains unchanged.
  • the settable area of the platform portion 181 a is increased, so as to further improve the light transmittance of the first display area 11 .
  • the shape of the orthographic projection of the platform portion on the substrate is adapted to the shape of the corresponding light-transmitting partition, which refers to the shape of the orthographic projection of the platform portion on the substrate and the corresponding light-transmitting partition. are the same in shape, and each side of the outline of the orthographic projection of the platform portion on the substrate has the same shape as the corresponding side of the outline of the corresponding light-transmitting partition.
  • the shape of the outline of the light-transmitting partition is an irregular quadrilateral formed by arcing the four corners of the prism.
  • the shape of the contour of the orthographic projection of the corresponding platform portion on the substrate is also a prism. The four corners of the irregular quadrilateral are formed after arcing, and the four corners of the contour of the orthographic projection of the platform portion on the substrate are the same as the four corners of the contour of the light-transmitting partition.
  • the shape of the light-transmitting partition is other shapes, such as the shape of the outline of the light-transmitting partition is a regular trapezoid
  • the shape of the contour of the orthographic projection of the corresponding platform portion on the substrate is also a regular trapezoid
  • the upper bottom of the contour of the light-transmitting partition corresponds to the upper bottom of the contour of the orthographic projection of the corresponding platform portion on the substrate
  • the lower bottom of the contour of the light-transmitting partition corresponds to the lower bottom of the contour of the orthographic projection of the corresponding platform portion on the substrate.
  • the shape of the light-transmitting partition is a circle
  • the shape of the orthographic projection of the corresponding platform portion on the substrate is also a circle, and so on, and will not be listed here.
  • the shape of the orthographic projection of the platform portion 181 a on the base 15 is an arc, and the orthographic projection of the platform portion 181 a on the base 15
  • the shape of the outline can be a circle ( Figure 4), a large semi-circle, an ellipse ( Figure 5), or a large semi-ellipse with arcs on the equilateral sides.
  • the shape of the platform portion 181a depends on the shape of the openings on the mask used for patterning, and the shape and precision of the openings depend on the precision of the process and processing equipment. , the process of the arc-shaped hole is more mature, and the machining accuracy is higher, so that the shape of the final formed platform portion 181a is more accurate, so that the final formed platform portion 181a can be prevented from falling into the pixel opening 171 or two adjacent transparent
  • the light blocks 181 are connected to improve the fabrication yield of the display panel.
  • the shape of the orthographic projection of the platform portion 181 a on the base 15 may also be regular or irregular such as a square ( FIG. 6 ), an octagon ( FIG. 7 ), a triangle, etc. non-arc shape.
  • the shape of the pixel opening 171 matches the shape of the first sub-pixel 13.
  • FIGS. 3 to 7 only illustrate the case where the shape of the pixel opening 171 is circular.
  • the shape of the pixel openings 171 may also be prismatic ( FIG. 8 ), square ( FIG. 9 ) or ellipse ( FIG. 10 ), and the shapes of all pixel openings 171 may be the same or different.
  • FIG. 8 to FIG. 9 only illustrate the case where the shape of the orthographic projection of the platform portion 181a on the substrate 15 is circular.
  • the shape of the pixel opening 171 is When the shape is prismatic (FIG. 8), square (FIG. 9) or ellipse (FIG. 10), the outline of the orthographic projection of the platform portion 181a on the base 15 may also be an ellipse, a square, a pentagon or an octagon. other shapes such as polygons.
  • FIG. 3 to FIG. 10 only illustrate the case where the shapes and sizes of all the platform portions 181a are the same. can be all or partially different in size.
  • the pixel density in the first display area 11 may be the same as or different from the pixel density in the second display area 12; for example, the pixel density in the first display area 11 may be smaller than that in the second display area 12, In order to increase the light transmittance of the first display area 11 .
  • the array layer 16 includes an active layer 161 disposed on the substrate 15 , a first insulating layer 162 covering the active layer 161 , a first insulating layer 162 disposed on the first
  • the first gate electrode 163 on the side of the insulating layer 162 away from the active layer 161, the second insulating layer 164 covering the first gate electrode 163, and the second insulating layer 164 disposed on the second insulating layer 164 away from the substrate
  • the second gate 165 on one side of the 15 , the interlayer dielectric layer 166 covering the second gate 165 , the source-drain metal disposed on the side of the interlayer dielectric layer 166 away from the substrate 15 layer 167 , and a flat layer 168 covering the source-drain metal layer 167 .
  • the anode 131 and the pixel definition layer 17 are disposed on the side of the flat layer 168 away from the substrate 15 , the source-drain metal layer 167 includes a source and a drain, and the anode 131 passes through The via is in contact with one of the source and drain.
  • the present application further provides a method for manufacturing a display panel, wherein the display panel includes a first display area 11 and a second display area 12 .
  • the preparation method of the display panel includes:
  • the cathode suppressing layer 18 is formed of a light-transmitting material; the cathode The suppression layer 18 is located in the first display area 11 , and the orthographic projection area of the cathode suppression layer 18 on the substrate 15 is less than or equal to 0.95 times the area of the first display area 11 ;
  • the area of the orthographic projection of the cathode suppression layer on the substrate is greater than or equal to 0.05 times the area of the first display region.
  • the display panel further includes a cathode layer 133 disposed on a side of the pixel definition layer 17 away from the substrate 15 , and the cathode layer 133 includes electrodes corresponding to the pixel openings 171 one-to-one. and an overlap portion 133 a for connecting two adjacent electrode portions, and the overlap portion 133 a is located in the first display area 11 .
  • the overlapping portion 133a and the electrode portion are integrally formed; the cathode suppression layer 18 includes a plurality of spaced-apart light-transmitting blocks 181 , and the first display area 11 includes two adjacent light-transmitting blocks 181 . In the overlapping area between the light-transmitting blocks 181, the overlapping portion 133a is located in the overlapping area.
  • the first display area 11 includes a plurality of light-transmitting subsections, and each of the light-transmitting subsections is composed of the overlapping portion 133a and the first pixel opening 171a, The second pixel opening 171b, the third pixel opening 171c and the fourth pixel opening 171d are surrounded.
  • the second pixel opening 171b is adjacent to the first pixel opening 171a and is located at the side of the first pixel opening 171a along the first direction
  • the third pixel opening 171c and the second pixel opening 171b is adjacent to and located at the side of the second pixel opening 171b along the second direction
  • the fourth pixel opening 171d is adjacent to the first pixel opening 171a and the third pixel opening 171c at the same time
  • the light blocks 181 are arranged in a one-to-one correspondence with the light-transmitting partitions.
  • the light-transmitting block 18 includes a platform portion 181a and an edge portion 181b located at the edge of the platform portion 181a.
  • the distance between the orthographic projection of the platform portion 181a on the substrate 15 and the orthographic projection of the adjacent pixel openings 171 on the substrate 15 is greater than or equal to the width of the edge portion 181b.
  • the width of the edge portion 181b is 2 to 5 microns.
  • the area of the orthographic projection of the platform portion 181 a on the substrate 15 is greater than or equal to 0.84 times the area of the first display area 11 .
  • the distance between the orthographic projection of the platform portion 181 a on the substrate 15 and the orthographic projection of the adjacent pixel openings 171 on the substrate 15 is 2 to 10 ⁇ m.
  • the area of the orthographic projection of the platform portion 181 a on the substrate 15 is greater than or equal to 0.64 times the area of the first display area 11 .
  • the area of the orthographic projection of the platform portion 181 a on the substrate 15 is less than or equal to 0.90 times the area of the first display area 11 .
  • the orthographic projection of the light-transmitting block 181 on the substrate 15 is separated from the orthographic projection of the anode 131 on the substrate 15 .
  • the shape of the orthographic projection of the platform portion 181a on the substrate 15 is adapted to the shape of the corresponding light-transmitting partition.
  • the shape of the orthographic projection of the platform portion 181a on the base 15 is an arc.

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Abstract

一种显示面板及其制备方法，通过设置阴极抑制层（18），在采用整面蒸镀工艺形成阴极层（133）时，使得在阴极抑制层（18）上沉积的阴极层（133）较薄或没有阴极层（133）沉积，以极大的提升透光区的透光率，同时对阴极抑制层（18）与第一显示区（11）的面积占比进行设置，在保证第一显示区（11）可以正常进行显示的前提下，尽可能的提升第一显示区（11）的透光率。

Description

显示面板及其制备方法 技术领域
本申请涉及显示技术领域，具体涉及一种显示面板及其制备方法。
 背景技术
OLED（Organic Light Emitting Diode，有机发光二极管）显示技术受到了越来越多科研工作者的关注，并被广泛应用于手机、平板和电视等显示领域，而随着显示设备的快速发展，用户对显示设备的屏占比的要求越来越高，使得大尺寸和高分辨率的全面显示设备成为未来的发展方向。
在现有技术当中，为了尽可能的提升屏占比，通常采用将前置摄像头和面部识别等光学元件设置在屏下，但是，现有的OLED全面显示设备中，阴极采用整面设置的方式，而阴极对于光线的透过率低，从而导致设置在屏下的光学元件无法接收到充足的光信号，影响光学元件的正常工作。
 技术问题
现有的OLED全面显示设备中，阴极采用整面设置的方式，而阴极对于光线的透过率低，从而导致设置在屏下的光学元件无法接收到充足的光信号，影响光学元件的正常工作。
 技术解决方案
本申请实施例提供一种显示面板及其制备方法，以解决设置在屏下的光学元件无法接收到充足的光信号，影响光学元件的正常工作的问题。
第一方面，本申请实施例提供一种显示面板，所述显示面板包括第一显示区和第二显示区，所述显示面板还包括：
基底；
像素定义层，所述像素定义层设置于所述基底的一侧，所述像素定义层上设置有多个相间隔的像素开口；
其中，相邻两所述像素开口之间设置有由透光材料形成的阴极抑制层，所述阴极抑制层设置于所述像素定义层远离所述基底的一侧；所述阴极抑制层位于所述第一显示区，所述阴极抑制层在所述基底上的正投影的面积小于或等于所述第一显示区的面积的0.95倍。
可选的，所述阴极抑制层在所述基底上的正投影的面积大于或等于所述第一显示区的面积的0.05倍。
可选的，所述显示面板还包括设置于所述像素定义层远离所述基底的一侧的阴极层；所述阴极层包括与所述像素开口一一对应的电极部以及用于连接相邻两个所述电极部的搭接部，所述搭接部位于所述第一显示区。
可选的，所述搭接部与所述电极部一体成型；所述阴极抑制层包括多个相间隔的透光块，所述第一显示区包括位于相邻两个所述电极部之间的搭接区，所述搭接部位于所述搭接区。
可选的，所述第一显示区包括多个透光分区，每一所述透光分区由所述搭接部与多个所述像素开口中的第一像素开口、第二像素开口、第三像素开口以及第四像素开口所围成；
其中，所述第二像素开口与所述第一像素开口相邻且位于所述第一像素开口沿第一方向的侧部，所述第三像素开口与所述第二像素开口相邻且位于所述第二像素开口沿第二方向的侧部，所述第四像素开口同时与所述第一像素开口和所述第三像素开口相邻；所述透光块与所述透光分区一一对应设置。
可选的，所述透光块包括平台部和位于所述平台部边缘的边缘部；
其中，所述平台部在所述基底上的正投影与相邻的像素开口在所述基底上的正投影的距离，大于或等于所述边缘部的宽度。
可选的，所述边缘部的宽度为2至5微米。
可选的，所述平台部在所述基底上的正投影的面积大于或等于所述第一显示区的面积的0.84倍。
可选的，所述平台部在所述基底上的正投影与相邻的像素开口在所述基底上的正投影的距离为2至10微米。
可选的，所述平台部在所述基底上的正投影的面积大于或等于所述第一显示区的面积的0.64倍。
可选的，所述平台部在所述基底上的正投影的面积小于或等于所述第一显示区的面积的0.90倍。
可选的，所述透光块在所述基底上的正投影与阳极在所述基底上的正投影相离。
可选的，所述平台部在所述基底上的正投影的形状与对应的所述透光分区的形状相适配。
可选的，所述平台部在所述基底上的正投影的轮廓的形状为弧形。
第二方面，本申请实施例还提供一种显示面板，所述显示面板包括第一显示区和第二显示区，所述显示面板还包括：
基底；
像素定义层，所述像素定义层设置于所述基底的一侧，所述像素定义层上设置有多个相间隔的像素开口；
其中，相邻两所述像素开口之间设置有由透光材料形成的阴极抑制层，所述阴极抑制层设置于所述像素定义层远离所述基底的一侧；所述阴极抑制层位于所述第一显示区，所述阴极抑制层在所述基底上的正投影的面积小于或等于所述第一显示区的面积的0.95倍；
所述阴极抑制层在所述基底上的正投影的面积大于或等于所述第一显示区的面积的0.05倍。
可选的，所述显示面板还包括设置于所述像素定义层远离所述基底的一侧的阴极层；所述阴极层包括与所述像素开口一一对应的电极部以及用于连接相邻两个所述电极部的搭接部，所述搭接部位于所述第一显示区。
可选的，所述搭接部与所述电极部一体成型；所述阴极抑制层包括多个相间隔的透光块，所述第一显示区包括位于相邻两个所述电极部之间的搭接区，所述搭接部位于所述搭接区。
可选的，所述第一显示区包括多个透光分区，每一所述透光分区由所述搭接部与多个所述像素开口中的第一像素开口、第二像素开口、第三像素开口以及第四像素开口所围成；
其中，所述第二像素开口与所述第一像素开口相邻且位于所述第一像素开口沿第一方向的侧部，所述第三像素开口与所述第二像素开口相邻且位于所述第二像素开口沿第二方向的侧部，所述第四像素开口同时与所述第一像素开口和所述第三像素开口相邻；所述透光块与所述透光分区一一对应设置。
可选的，所述透光块包括平台部和位于所述平台部边缘的边缘部；
其中，所述平台部在所述基底上的正投影与相邻的像素开口在所述基底上的正投影的距离，大于或等于所述边缘部的宽度。
第三方面，本申请实施例提供一种显示面板的制备方法，所述显示面板包括第一显示区和第二显示区，所述显示面板的制备方法包括：
S10、在基底的一侧形成像素定义层，所述像素定义层上设置有多个相间隔的像素开口；
S20、在所述像素定义层远离所述基底的一侧形成位于相邻两所述像素开口之间的阴极抑制层，所述阴极抑制层由透光材料形成；所述阴极抑制层位于所述第一显示区，所述阴极抑制层在所述基底上的正投影的面积小于或等于所述第一显示区的面积的0.95倍。
 有益效果
本申请的有益效果为：通过设置与阴极层粘合力较小甚至相斥的阴极抑制层，在采用整面蒸镀工艺形成阴极层时，使得在阴极抑制层上沉积的阴极层较薄或没有阴极层沉积，从而在透光区处沉积的阴极层较薄或没有阴极层沉积，以极大的提升透光区的透光率，从而在不改变阴极层的制程工艺的前提下，提升第一显示区的透光率，使得设置在第一显示区的光学元件可以接收到充足的光信号，同时对阴极抑制层与第一显示区的面积占比进行设置，在保证第一显示区可以正常进行显示的前提下，尽可能的提升第一显示区的透光率。
 附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请一实施方式中显示面板的平面示意图。
图2为本申请一实施方式中显示面板的结构示意图。
图3为本申请一实施方式中第一子像素的阳极与透明块的排布示意图。
图4为本申请一实施方式中第一子像素的阳极与透明块的排布示意图。
图5为本申请一实施方式中第一子像素的阳极与透明块的排布示意图。
图6为本申请一实施方式中第一子像素的阳极与透明块的排布示意图。
图7为本申请一实施方式中第一子像素的阳极与透明块的排布示意图。
图8为本申请一实施方式中第一子像素的阳极与透明块的排布示意图。
图9为本申请一实施方式中第一子像素的阳极与透明块的排布示意图。
图10为本申请一实施方式中第一子像素的阳极与透明块的排布示意图。
图11为本申请一实施方式中显示面板的平面示意图。
图12为本申请一实施方式中显示面板的制备步骤示意图。
附图标记说明：
11、第一显示区；111、发光区；112、透光区；12、第二显示区；13、第一子像素；131、阳极；132、发光层；133、阴极层；133a、搭接部；134、第一辅助层；135、第二辅助层；14、第二子像素；15、基底；16、阵列层；161、有源层；162、第一绝缘层；163、第一栅极；164、第二绝缘层；165、第二栅极；166、层间介质层；167、源漏极金属层；168、平坦层；17、像素定义层；171、像素开口；18、阴极抑制层；181、透光块；181a、平台部；181b、边缘部。
 本发明的实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。此外，应当理解的是，此处所描述的具体实施方式仅用于说明和解释本申请，并不用于限制本申请。在本申请中，在未作相反说明的情况下，使用的方位词如“上”和“下”通常是指装置实际使用或工作状态下的上和下，具体为附图中的图面方向；而“内”和“外”则是针对装置的轮廓而言的。
本申请实施例提供一种显示面板及其制备方法。以下分别进行详细说明。需说明的是，以下实施例的描述顺序不作为对实施例优选顺序的限定。
本申请实施例提供一种显示面板，如图1所示，所述显示面板包括第一显示区11和第二显示区12，所述第二显示区12围绕所述第一显示区11的至少一部分设置，第一显示区11可以设置于显示面板上的任意位置。
其中，显示面板为全面屏显示面板，所述第一显示区11中排布有多个第一子像素13，所述第二显示区12中排布有多个第二子像素14。
需要说明的是，第一显示区11为功能附加区，第一显示区11既可以用于显示图像，从而使得显示面板可以呈现全屏显示的效果，又可以用于安装摄像头、光学触控组件以及指纹识别传感器等光学元件，从而提高用户体验；第二显示区12为主显示区，第二显示区12用于显示图像。
还需要说明的是，第一显示区11处的显示亮度可以与第二显示区12处的显示亮度相同，也可以不同，可以通过调节驱动电流大小和透光率等因素，从而调整第一显示区11和第二显示区12处的显示亮度。
在一实施方式中，所述第一显示区11的透光率大于所述第二显示区12的透光率。
可以理解的是，对于光学元件而言，第一显示区11的透光性对光学元件的工作具有极大的影响，而第一显示区11处的透光性又与第一显示区11处的膜层结构相关，以光学元件为摄像头为例，第一显示区11的透光率越高，摄像头进行拍摄工作时，摄像头的成像品质越好。
如图2所示，在本申请实施例中，所述显示面板包括基底15、设置于所述基底15的一侧的像素定义层17，以及，设置于所述像素定义层17远离所述基底的一侧的阴极层133；所述像素定义层17上设置有多个相间隔的像素开口171。
在一实施例中，基底15可以是柔性基底，柔性基底的材料可以是聚酰亚胺等有机材料；基底15也可以是刚性基底，刚性基底的材料例如可以为玻璃、金属、塑料等；基底15可以为单层膜层结构或多层膜层结构。
在本申请实施例中，相邻两所述像素开口171之间设置有由透光材料形成的阴极抑制层18，所述阴极抑制层18设置于所述像素定义层17远离所述基底15的一侧，所述阴极抑制层18位于所述第一显示区11。
需要说明的是，通过设置与阴极层133粘合力较小甚至相斥的阴极抑制层18，在采用整面蒸镀工艺形成阴极层133时，由于阴极层133与其他膜层的粘合力大于阴极层133与阴极抑制层18的粘合力，使得在阴极抑制层18上沉积的阴极层133较薄或没有阴极层133沉积，从而在不改变阴极层133的制程工艺的前提下，提升第一显示区11的透光率，使得设置在第一显示区11的光学元件可以接收到充足的光信号。
在一实施例中，阴极层133的材料可以为金属镁，阴极抑制层18的材料可以为BAlq(双(2-甲基-8-羟基喹啉)-4-(对苯基苯酚)合铝)、TAZ(3-(联苯-4-基)-5-(4-叔丁基苯基)-4-苯基-4H-1,2,4-三唑)及OTI（氧化铟）中的至少一种。金属镁在BAlq、TAZ和OTI材料上的附着力较差，在蒸镀金属镁形成阴极层133时，阴极抑制层18抑制金属镁在阴极抑制层18上成膜。
具体的，所述显示面板还包括设置于所述基底15的一侧的阵列层16；所述第一子像素13包括阳极131、发光层132以及所述阴极层133；所述阳极131设置于所述阵列层16远离所述基底15的一侧，所述发光层132设置于所述阳极131远离所述基底15的一侧，所述阴极层133设置于所述发光层132远离所述基底15的一侧。
在本申请实施例中，所述第一显示区11包括发光区111和透光区112，所述发光区111用于进行图像显示，所述透光区112用于透射外部光线以提升第一显示区11的透光率，所述阳极131位于所述发光区111。
在一实施例中，第一显示区11包括多个发光区111，多个所述发光区111可以相互连通以形成较大面积的显示区域；多个所述发光区111也可以相互隔离，多个第一子像素13分布在多个发光区111中。
在一实施例中，多个所述发光区111均匀分布于所述第一显示区11中，所述第一子像素13与所述发光区111一一对应，以使得第一子像素13均匀分布于第一显示区11的各个区域中，避免显示集中导致显示时出现大片区域不显示或显示较差的情况，有助于提升用户的使用体验。
在一实施例中，透光区112可以包括多个分区，多个分区可以相互隔离，多个分区也可以相互连通。
其中，所述阴极抑制层18位于第一显示区11的所述透光区112中，所述阴极层133形成于所述阴极抑制层18上的部分的厚度，小于所述阴极层133与所述像素开口171对应的部分的厚度。
在一实施方式中，所述阳极131位于所述阵列层16远离所述基底15的一侧上，所述像素定义层17设置于所述阵列层16和阳极131远离所述基底15的一侧上，所述像素开口171与所述阳极131一一对应，利用像素开口171露出阳极131的至少一部分，所述像素开口171位于所述发光区111中。
具体的，所述发光层132为有机发光材料层；所述显示面板还包括位于所述阳极131远离所述基底15的一侧第一辅助层134，以及，位于所述第一辅助层134远离所述基底15的一侧的第二辅助层135。
其中，所述发光层132位于所述第一辅助层134和第二辅助层135之间，所述发光层132位于所述像素开口171中，所述第一辅助层134的部分位于所述像素定义层17上且覆盖所述阳极131位于所述像素开口171中的部分。
其中，第一辅助层134可以包括沿远离基底15的方向依次层叠设置的空穴注入层和空穴传输层，所述空穴注入层覆盖所述阳极131；所述第二辅助层135可以包括沿远离基底15的方向依次层叠设置的电子传输层和电子注入层，所述电子传输层覆盖所述发光层132。
在本申请实施例中，所述第一辅助层134和所述第二辅助层135的制备材料为透明材料，对第一显示区11的透光率的影响较小，所述第一辅助层134和所述第二辅助层135可以覆盖发光区111和透光区112。
可以理解的是，此时，所述阴极层133和所述阴极抑制层18设置于所述第二辅助层135远离所述基底15的一侧上，所述阴极层133与所述阴极抑制层18的粘合力小于所述阴极层133与所述第二辅助层135的粘合力，使得所述阴极层133在所述第二辅助层135上沉积的部分的厚度，大于所述阴极层133在所述阴极抑制层18上沉积的部分的厚度。
在一实施例中，所述发光层132仅位于发光区111，透光区112中未设置发光层132，可避免发光层132影响透光区112的透光率，有助于提升第一显示区11的透光率。
在一实施例中，所述阴极层133与所述像素开口171对应的部分的厚度大于或等于所述阴极抑制层18的厚度，以防止阴极层133与阴极抑制层18之间形成较大的高度差影响封装层的设置。
在本申请实施例中，所述阴极抑制层18在所述基底15上的正投影的面积小于或等于所述第一显示区11的面积的0.95倍。
可以理解的是，理论上，阴极抑制层18的面积越大，第一显示区11的透光率越大，然而，由于第一显示区11中需要设置足够数量的第一子像素13，并且在利用阴极抑制层18减薄甚至去除位于透光区112的阴极层133时，阴极层133变薄的同时会导致阴极层133的电阻增大，影响阴极层133的电学性能，从而影响第一子像素13的正常显示，因此所述阴极抑制层18的设置面积不可能无限大，当第一显示区11中除去与像素开口171对应的区域外全部设置有阴极抑制层18时，此时阴极抑制层18的可设置面积最大，阴极抑制层18在基底15上的正投影的面积等于第一显示区11的面积的0.95倍，此时可在保证第一显示区11可以正常进行显示的前提下，最大可能的提升第一显示区11的透光率。
进一步的，所述阴极抑制层18在所述基底15上的正投影的面积大于或等于所述第一显示区11的面积的0.05倍。
需要说明的是，阴极抑制层18设置的面积越小，对阴极层133的电学性能和第一子像素13的影响越少，然而，设置阴极抑制层18需要增加额外的工序和材料，会提高显示面板的制备成本，阴极抑制层18的设置面积过小，会导致第一显示区11的透光率提升较小，降低了设置阴极抑制层18的性价比，当阴极抑制层18在基底15上的正投影的面积小于第一显示区11的面积的0.05倍时，会导致设置阴极抑制层18带来的实际收益小于设置阴极抑制层18的成本。
如图2至图11所示，在本申请实施例中，所述阴极层133包括与所述像素开口171一一对应的电极部以及用于连接相邻两个所述电极部的搭接部133a，所述搭接部133a位于所述第一显示区11，相邻两个所述电极部通过所述搭接部133a连接。
需要说明的是，电极部与第一子像素13一一对应，即一个第一子像素13包括一个电极部，而电极部分散设置，即第一子像素13分散设置，可以避免显示集中导致显示时出现大片区域不显示或显示较差的情况，同时利用搭接部133a连接电极部，可以降低阴极层133的整体电阻，进而可减小压降导致的第一显示区11的中心区域与边缘区域的电流大小的差别，从而可提升第一显示区11的显示亮度的均匀性。
其中，电极部可以均匀分布于第一显示区11中，以提升第一显示区11的显示均匀度。
在一实施例中，所述搭接部133a与电极部位于不同层别，搭接部133a与电极部可以采用相同或不同的材料制成。
当搭接部133a与电极部采用不同的材料制成时，搭接部133a可以采用透明导电金属制成，利用搭接部133a减小阴极层133的整体电阻的同时，提升第一显示区11的透光率。
需要说明的是，此时可在整面蒸镀阴极层133时，利用阴极抑制层18去除阴极层133位于发光区111之外的部分，仅保留阴极层133位于发光区111内的部分，以进一步提升第一显示区11的透光率。
在一实施例中，所述搭接部133a与电极部同层设置，搭接部133a与电极部可以采用相同或不同的材料制成。
当搭接部133a与电极部采用不同的材料制成时，搭接部133a可以采用透明导电金属制成，以大幅度提升第一显示区11的透光率，同时利用搭接部133a减小阴极层133的整体电阻。
如图2至图10所示，当搭接部133a与电极部采用相同的材料制成时，所述搭接金属层可以与所述电极部一体成型；所述阴极抑制层18包括多个相间隔的透光块181，所述第一显示区11包括位于相邻两个所述透光块181之间的搭接区，所述搭接部133a位于所述搭接区。
需要说明的是，当所述搭接部133a与电极部同层设置且搭接部133a与电极部采用相同材料时，通过将阴极抑制层18设置成由多个相间隔的透光块181组成，在整面蒸镀形成所有第一子像素13的阴极层133时，相邻两个所述透光块181之间的搭接区处同时沉积阴极材料，以形成电极部以及连接电极部的搭接部133a，从而可以在无需增加制程的前提下，减小阴极层133的整体电阻。
需要说明的是，图3至图10中仅示意了搭接部133a的形状为走线状的情况，这仅是为了更好的示意搭接部133a与像素开口171的位置关系，实际实施中，正面蒸镀阴极层133时，阴极材料分布于整个搭接区，从而可以形成分布在整个搭接区的搭接部133a，此时搭接部133a的形状与搭接区的形状相同。
在本申请实施例中，所述透光区112包括多个透光分区，每一所述透光分区由所述搭接部133a与多个所述像素开口171中的第一像素开口171a、第二像素开口171b、第三像素开口171c以及第四像素开口171d所围成。
其中，所述第二像素开口171b与所述第一像素开口171a相邻且位于所述第一像素开口171a沿第一方向的侧部，所述第三像素开口171c与所述第二像素开口171b相邻且位于所述第二像素开口171b沿第二方向的侧部，所述第四像素开口171d同时与所述第一像素开口171a和所述第三像素开口171c相邻；所述透光块181与所述透光分区一一对应设置。
需要说明的是，参见图3，每一透光分区由4个相邻的像素开口171与搭接部133a所围成。
还需要说明的是，第一方向和第二方向为不同的方向，即第一方向与第二方向交叉，如参见图3所示，在图3中，第一方向平行于第一像素开口171a与第二像素开口171b之间搭接部133a的长度方向，第二方向平行于第二像素开口171b与第三像素开口171c之间搭接部133a的长度方向。
可以理解的是，像素开口171的设置位置即为第一子像素13的设置位置，通过对第一子像素13和透光块181的位置设计，使得第一子像素13和透光块181在第一显示区11中的分布更加均匀，从而保证第一显示区11的显示亮度和透光率的整体均一性。
具体的，所述透光块181位于对应的透光分区内，从而为搭接部133a的排布预留足够的空间，避免相邻两个透光块181连接后导致搭接部133a无法成型，同时防止阴极抑制层18的设置对第一显示区11的显示造成干扰和不良影响。
其中，透光块181的排布与第一子像素13的排布相关，当第一子像素13均匀排布时，透光块181均匀排布；当第一子像素13随机分布时，透光块181随机分布，第一子像素13的排布可以根据实际情况进行选择。
在一实施例中，所述透光块181包括平台部181a和位于所述平台部181a边缘的边缘部181b。
其中，所述平台部181a在所述基底15上的正投影与相邻的像素开口171在所述基底15上的正投影的距离T1，大于或等于所述边缘部181b的宽度T2。
需要说明的是，平台部181a为透光块181抑制阴极材料成型的有效部分，平台部181a的面积越大，则被减薄或去除的阴极部分就越多，但利用掩膜板蒸镀形成图案化的阴极抑制层18时，以目前的工艺，必然会在透光块181的边缘位置形成大致呈斜坡状的结构，即形成所述边缘部181b，而若阴极抑制材料落入像素开口171中时，会影响第一子像素13的正常显示。
本申请中通过对透光块181的平台部181a的位置进行设计，使得平台部181a与像素开口171的距离T1大于边缘部181b的宽度T2，从而可以避免形成透光块181时阴极抑制层18落入像素开口171中。
在一实施方式中，所述边缘部181b的宽度T2为2至5微米，所述边缘部181b的宽度T2可以为2微米、3微米、4微米或5微米。即当边缘部181b的宽度T2为2微米时，所述平台部181a在所述基底15上的正投影与相邻的像素开口171在所述基底15上的正投影的距离T1大于2微米；当边缘部181b的宽度T2为5微米时，所述平台部181a在所述基底15上的正投影与相邻的像素开口171在所述基底15上的正投影的距离T1大于5微米；
需要说明的是，所述边缘部181b的宽度取决于工艺精度和设备精度等因素，理论上边缘部181b的宽度T2越小，则平台部181a的可设置面积越大，从而在不影响第一子像素13正常显示前提下，使得第一显示区11的透光率越大。
其中，所述平台部181a在所述基底15上的正投影的面积大于或等于所述第一显示区11的面积的0.84倍。
所述平台部181a在所述基底15上的正投影的面积小于或等于所述第一显示区11的面积的0.90倍。
需要说明的是，当所述边缘部181b的宽度T2为5微米时，此时平台部181a的可设置面积最小，此时平台部181a在所述基底15上的正投影的面积为所述第一显示区11的面积的0.84倍；当所述边缘部181b的宽度T2为2微米时，此时平台部181a的可设置面积最大，此时平台部181a在所述基底15上的正投影的面积为所述第一显示区11的面积的0.90倍。
在一实施方式中，所述平台部181a在所述基底上的正投影与相邻的像素开口171在所述基底上的正投影的距离T1为2至10微米；所述平台部181a在所述基底上的正投影与相邻的像素开口171在所述基底上的正投影的距离T1可以为2微米、3微米、5微米、8微米或10微米等。
需要说明的是，实际工艺中，因工艺精度等因素，为了避免边缘部181b落入像素开口171中，还需要考虑到边缘部181b与像素开口171之间的距离，边缘部181b与像素开口171之间的距离越小，则平台部181a的可设置面积越大，然而边缘部181b落入像素开口171中的风险越大，同时边缘部181b与像素开口171之间的距离越大，边缘部181b落入像素开口171中的风险越小，然而平台部181a的可设置面积也越小。
在本申请中，在综合考虑边缘部181b于像素开口171的间距、边缘部181b的宽度以及设置阴极抑制层18的性价比等因素的情况下，对平台部181a与像素开口171的距离进行合理设置，以在保证第一显示区11具有较大透光率的前提下，减小边缘部181b落入像素开口171的风险。
其中，所述平台部181a在所述基底15上的正投影的面积大于或等于所述第一显示区11的面积的0.64倍。
所述平台部181a在所述基底15上的正投影的面积小于或等于所述第一显示区11的面积的0.90倍。
需要说明的是，当所述边缘部181b与所述像素开口171的距离T1为5毫米，并且边缘部181b的宽度T2为5毫米时，此时平台部181a的可设置面积最小，此时平台部181a在所述基底15上的正投影的面积为所述第一显示区11的面积的0.64倍；当所述边缘部181b与所述像素开口171的距离T1为0，并且边缘部181b的宽度T2为2毫米时，此时平台部181a的可设置面积最大，此时平台部181a在所述基底15上的正投影的面积为所述第一显示区11的面积的0.90倍。
在一实施方式中，所述阴极抑制层18在所述基底15上的正投影与所述阳极131在所述基底15上的正投影相离。
需要说明的是，阳极131在基底15上的正投影会覆盖所述像素开口171在所述基底15上的正投影，而为了保证第一子像素13的正常显示，需要保证阴极层133在基底15上的正投影覆盖所述像素开口171在所述基底15上的正投影，通过将阴极抑制层18与阳极131设置成不重合，可以保证透光块181与像素开口171保持一定的间距，同时保证阴极层133在基底15上的正投影可以覆盖所述像素开口171在所述基底15上的正投影，防止阴极抑制层18的设置对第一显示区11的显示造成干扰和不良影响。
还需要说明的是，透光块181与像素开口171之间需要保持足够的间距，以便于搭接部133a的排布，通过对阴极抑制层18中透光块181的位置进行设计，使得在第一显示区11具有足够的透光率的前提下，透光块181与像素开口171之间可以具有足够的间距以排布搭接部133a。
在一实施例中，围合形成透光分区的四个所述像素开口171中，每一像素开口171对应一个第一子像素，与围合形成透光分区的四个所述像素开口171对应的四个第一子像素13中，包括至少一个红色子像素（“R”子像素）、一个绿色子像素（“G”子像素）和一个蓝色子像素（“B”子像素）。
在一实施例中，如图3所示，所述平台部181a在所述基底15上的正投影的形状与对应的透光分区的形状相适配，以在透光分区的面积不变的前提下，增大平台部181a的可设置面积，从而进一步提升第一显示区11的透光率。
可以理解的是，平台部在基底上的正投影的形状与对应的透光分区的形状相适配，指的是平台部在基底上的正投影的轮廓的形状与对应的透光分区的轮廓的形状相同，并且平台部在基底上的正投影的轮廓的每一侧边具有与对应的透光分区的轮廓的对应侧边相同的形状。如图3中透光分区的轮廓的形状为将棱形的4个角弧形化后形成的不规则四边形，此时对应的平台部在基底上的正投影的轮廓的形状也为将棱形的4个角弧形化后形成的不规则四边形，并且平台部在基底上的正投影的轮廓的4个角的弧形与透光分区的轮廓的4个角的弧形相同。
还可以理解的是，当透光分区的形状为其他形状时，如透光分区的轮廓的形状为正梯形时，对应的平台部在基底上的正投影的轮廓的形状也为正梯形，并且透光分区的轮廓的上底与对应的平台部在基底上的正投影的轮廓的上底对应，透光分区的轮廓的下底与对应的平台部在基底上的正投影的轮廓的下底对应；当透光分区的形状为圆形时，对应的平台部在基底上的正投影的形状也为圆形，依次类推，在此不一一列举。
在一实施例中，如图4和图5所示，所述平台部181a在所述基底15上的正投影的轮廓的形状为弧形，平台部181a在所述基底15上的正投影的轮廓的形状可以为圆形（图4）、大半圆形、椭圆形（图5）或大半椭圆形等边侧为弧形的形状。
可以理解的是，在阴极抑制层18的制备过程中，平台部181a的形状取决于图案化时使用的掩膜板上开孔的形状，开孔的形状和精度取决于工艺和加工设备的精度，弧形孔的工艺更成熟，加工精度更高，从而使得最终成型的平台部181a的形状的精度更高，从而可以防止最终成型的平台部181a落入像素开口171中或相邻两个透光块181连接，以提升显示面板的制备良率。
如图6和图7所示，所述平台部181a在所述基底15上的正投影的轮廓的形状也可以为方形（图6）、八边形（图7）或三角形等规则或不规则的非弧形形状。
需要说明的是，像素开口171的形状与第一子像素13的形状相匹配，图3至图7仅示意了像素开口171的形状为圆形的情况，在一实施例中，如图8至图10所示，像素开口171的形状还可以为棱形（图8）、方形（图9）或椭圆形（图10）等，所有像素开口171的形状可以相同或不同。
可以理解的是，图8至图9中仅示意了平台部181a在所述基底15上的正投影的轮廓的形状均为圆形的情况，在其他实施例中，当像素开口171的形状为棱形（图8）、方形（图9）或椭圆形（图10）等形状时，平台部181a在所述基底15上的正投影的轮廓也可以为椭圆形、方形、五边形或八边形等其他形状。
还需要说明的是，图3至图10 中仅示意了所有平台部181a的形状和大小均相同的情况，在一实施例中，平台部181a的形状可以均不相同或部分不同，平台部181a的大小可以均不相同或部分不同。
可以理解的是，上述说明了通过对第一显示区11中的阴极层133的部分进行减薄或去除，以提升第一显示区11的透光率的方案，还需要说明的是，还可以通过对第一子像素13的密度进行设计，以调整第一显示区11的透光率。
具体的，第一显示区11中的像素密度可以与第二显示区12中的像素密度相同，也可以不同；例如第一显示区11的像素密度可以小于第二显示区12中的像素密度，以增加第一显示区11的透光率。
如图11所示，在一实施例中，所述阵列层16包括设置于所述基底15上的有源层161、覆盖所述有源层161的第一绝缘层162、设置于所述第一绝缘层162远离所述有源层161的一侧上的第一栅极163、覆盖所述第一栅极163的第二绝缘层164、设置于所述第二绝缘层164远离所述基底15的一侧上的第二栅极165、覆盖所述第二栅极165的层间介质层166、设置于所述层间介质层166远离所述基底15的一侧上的源漏极金属层167，以及，覆盖所述源漏极金属层167的平坦层168。
其中，所述阳极131和所述像素定义层17设置于所述平坦层168远离所述基底15的一侧上，所述源漏极金属层167包括源极和漏极，所述阳极131通过过孔与源极和漏极中的一者触接。
基于上述显示面板，本申请还提供一种显示面板的制备方法，所述显示面板包括第一显示区11和第二显示区12。
如图12所示，所述显示面板的制备方法包括：
S10、在所述基底15的一侧形成像素定义层17；
S20、在所述像素定义层17远离所述基底15的一侧形成位于相邻两所述像素开口171之间的阴极抑制层18，所述阴极抑制层18由透光材料形成；所述阴极抑制层18位于所述第一显示区11，所述阴极抑制层18在所述基底15上的正投影的面积小于或等于所述第一显示区11的面积的0.95倍；
在一实施方式中，所述阴极抑制层在所述基底上的正投影的面积大于或等于所述第一显示区的面积的0.05倍。
在一实施方式中，所述显示面板还包括设置于所述像素定义层17远离所述基底15的一侧的阴极层133，所述阴极层133包括与所述像素开口171一一对应的电极部以及用于连接相邻两个所述电极部的搭接部133a，所述搭接部133a位于所述第一显示区11。
在一实施方式中，所述搭接部133a与所述电极部一体成型；所述阴极抑制层18包括多个相间隔的透光块181，所述第一显示区11包括位于相邻两个所述透光块181之间的搭接区，所述搭接部133a位于所述搭接区。
在一实施方式中，所述第一显示区11包括多个透光分区，每一所述透光分区由所述搭接部133a与多个所述像素开口171中的第一像素开口171a、第二像素开口171b、第三像素开口171c以及第四像素开口171d所围成。
其中，所述第二像素开口171b与所述第一像素开口171a相邻且位于所述第一像素开口171a沿第一方向的侧部，所述第三像素开口171c与所述第二像素开口171b相邻且位于所述第二像素开口171b沿第二方向的侧部，所述第四像素开口171d同时与所述第一像素开口171a和所述第三像素开口171c相邻；所述透光块181与所述透光分区一一对应设置。
在一实施方式中，所述透光块18包括平台部181a和位于所述平台部181a边缘的边缘部181b。
其中，所述平台部181a在所述基底15上的正投影与相邻的像素开口171在所述基底15上的正投影的距离，大于或等于所述边缘部181b的宽度。
在一实施方式中，所述边缘部181b的宽度为2至5微米。
在一实施方式中，所述平台部181a在所述基底15上的正投影的面积大于或等于所述第一显示区11的面积的0.84倍。
在一实施方式中，所述平台部181a在所述基底15上的正投影与相邻的像素开口171在所述基底15上的正投影的距离为2至10微米。
在一实施方式中，所述平台部181a在所述基底15上的正投影的面积大于或等于所述第一显示区11的面积的0.64倍。
在一实施方式中，所述平台部181a在所述基底15上的正投影的面积小于或等于所述第一显示区11的面积的0.90倍。
在一实施方式中，所述透光块181在所述基底15上的正投影与所述阳极131在所述基底15上的正投影相离。
在一实施方式中，所述平台部181a在所述基底15上的正投影的形状与对应的所述透光分区的形状相适配。
在一实施方式中，所述平台部181a在所述基底15上的正投影的轮廓的形状为弧形。
本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的方法及其核心思想；同时，对于本领域的技术人员，依据本申请的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本申请的限制。

Claims (20)

  1. 一种显示面板，其中，所述显示面板包括第一显示区和第二显示区，所述显示面板还包括：
    基底；
    像素定义层，所述像素定义层设置于所述基底的一侧，所述像素定义层上设置有多个相间隔的像素开口；
    其中，相邻两所述像素开口之间设置有由透光材料形成的阴极抑制层，所述阴极抑制层设置于所述像素定义层远离所述基底的一侧；所述阴极抑制层位于所述第一显示区，所述阴极抑制层在所述基底上的正投影的面积小于或等于所述第一显示区的面积的0.95倍。
  2. 根据权利要求1所述的显示面板，其中，所述阴极抑制层在所述基底上的正投影的面积大于或等于所述第一显示区的面积的0.05倍。
  3. 根据权利要求2所述的显示面板，其中，所述显示面板还包括设置于所述像素定义层远离所述基底的一侧的阴极层；所述阴极层包括与所述像素开口一一对应的电极部以及用于连接相邻两个所述电极部的搭接部，所述搭接部位于所述第一显示区。
  4. 根据权利要求3所述的显示面板，其中，所述搭接部与所述电极部一体成型；所述阴极抑制层包括多个相间隔的透光块，所述第一显示区包括位于相邻两个所述电极部之间的搭接区，所述搭接部位于所述搭接区。
  5. 根据权利要求4所述的显示面板，其中，所述第一显示区包括多个透光分区，每一所述透光分区由所述搭接部与多个所述像素开口中的第一像素开口、第二像素开口、第三像素开口以及第四像素开口所围成；
    其中，所述第二像素开口与所述第一像素开口相邻且位于所述第一像素开口沿第一方向的侧部，所述第三像素开口与所述第二像素开口相邻且位于所述第二像素开口沿第二方向的侧部，所述第四像素开口同时与所述第一像素开口和所述第三像素开口相邻；所述透光块与所述透光分区一一对应设置。
  6. 根据权利要求5所述的显示面板，其中，所述透光块包括平台部和位于所述平台部边缘的边缘部；
    其中，所述平台部在所述基底上的正投影与相邻的像素开口在所述基底上的正投影的距离，大于或等于所述边缘部的宽度。
  7. 根据权利要求6所述的显示面板，其中，所述边缘部的宽度为2至5微米。
  8. 根据权利要求7所述的显示面板，其中，所述平台部在所述基底上的正投影的面积大于或等于所述第一显示区的面积的0.84倍。
  9. 根据权利要求6所述的显示面板，其中，所述平台部在所述基底上的正投影与相邻的像素开口在所述基底上的正投影的距离为2至10微米。
  10. 根据权利要求9所述的显示面板，其中，所述平台部在所述基底上的正投影的面积大于或等于所述第一显示区的面积的0.64倍。
  11. 根据权利要求8或10所述的显示面板，其中，所述平台部在所述基底上的正投影的面积小于或等于所述第一显示区的面积的0.90倍。
  12. 根据权利要求6所述的显示面板，其中，所述透光块在所述基底上的正投影与阳极在所述基底上的正投影相离。
  13. 根据权利要求6所述的显示面板，其中，所述平台部在所述基底上的正投影的形状与对应的所述透光分区的形状相适配。
  14. 根据权利要求6所述的显示面板，其中，所述平台部在所述基底上的正投影的轮廓的形状为弧形。
  15. 一种显示面板，其中，所述显示面板包括第一显示区和第二显示区，所述显示面板还包括：
    基底；
    像素定义层，所述像素定义层设置于所述基底的一侧，所述像素定义层上设置有多个相间隔的像素开口；
    其中，相邻两所述像素开口之间设置有由透光材料形成的阴极抑制层，所述阴极抑制层设置于所述像素定义层远离所述基底的一侧；所述阴极抑制层位于所述第一显示区，所述阴极抑制层在所述基底上的正投影的面积小于或等于所述第一显示区的面积的0.95倍；
    所述阴极抑制层在所述基底上的正投影的面积大于或等于所述第一显示区的面积的0.05倍。
  16. 根据权利要求15所述的显示面板，其中，所述显示面板还包括设置于所述像素定义层远离所述基底的一侧的阴极层；所述阴极层包括与所述像素开口一一对应的电极部以及用于连接相邻两个所述电极部的搭接部，所述搭接部位于所述第一显示区。
  17. 根据权利要求16所述的显示面板，其中，所述搭接部与所述电极部一体成型；所述阴极抑制层包括多个相间隔的透光块，所述第一显示区包括位于相邻两个所述电极部之间的搭接区，所述搭接部位于所述搭接区。
  18. 根据权利要求17所述的显示面板，其中，所述第一显示区包括多个透光分区，每一所述透光分区由所述搭接部与多个所述像素开口中的第一像素开口、第二像素开口、第三像素开口以及第四像素开口所围成；
    其中，所述第二像素开口与所述第一像素开口相邻且位于所述第一像素开口沿第一方向的侧部，所述第三像素开口与所述第二像素开口相邻且位于所述第二像素开口沿第二方向的侧部，所述第四像素开口同时与所述第一像素开口和所述第三像素开口相邻；所述透光块与所述透光分区一一对应设置。
  19. 根据权利要求18所述的显示面板，其中，所述透光块包括平台部和位于所述平台部边缘的边缘部；
    其中，所述平台部在所述基底上的正投影与相邻的像素开口在所述基底上的正投影的距离，大于或等于所述边缘部的宽度。
  20. 一种显示面板的制备方法，其中，所述显示面板包括第一显示区和第二显示区，所述显示面板的制备方法包括：
    S10、在基底的一侧形成像素定义层，所述像素定义层上设置有多个相间隔的像素开口；
    S20、在所述像素定义层远离所述基底的一侧形成位于相邻两所述像素开口之间的阴极抑制层，所述阴极抑制层由透光材料形成；所述阴极抑制层位于所述第一显示区，所述阴极抑制层在所述基底上的正投影的面积小于或等于所述第一显示区的面积的0.95倍。
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