WO2022130807A1 - 配線回路基板集合体シート - Google Patents
配線回路基板集合体シート Download PDFInfo
- Publication number
- WO2022130807A1 WO2022130807A1 PCT/JP2021/040204 JP2021040204W WO2022130807A1 WO 2022130807 A1 WO2022130807 A1 WO 2022130807A1 JP 2021040204 W JP2021040204 W JP 2021040204W WO 2022130807 A1 WO2022130807 A1 WO 2022130807A1
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- WO
- WIPO (PCT)
- Prior art keywords
- conductor pattern
- dummy
- area
- wiring circuit
- circuit board
- Prior art date
Links
- 239000004020 conductor Substances 0.000 claims abstract description 236
- 239000000463 material Substances 0.000 claims description 18
- 238000009413 insulation Methods 0.000 abstract description 7
- 230000015572 biosynthetic process Effects 0.000 abstract 4
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- 239000011347 resin Substances 0.000 description 16
- 229920005989 resin Polymers 0.000 description 16
- 238000000034 method Methods 0.000 description 14
- 238000009713 electroplating Methods 0.000 description 12
- 238000012986 modification Methods 0.000 description 12
- 230000004048 modification Effects 0.000 description 12
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- 239000004299 sodium benzoate Substances 0.000 description 8
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- 229910021645 metal ion Inorganic materials 0.000 description 4
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- 239000011888 foil Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
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Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
- H05K1/056—Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an organic insulating layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09218—Conductive traces
- H05K2201/09236—Parallel layout
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/0723—Electroplating, e.g. finish plating
Definitions
- the present invention relates to a wiring circuit board assembly sheet.
- the present invention is a frame that supports a wiring circuit board having an insulating layer, a conductor pattern located on the insulating layer, and the wiring circuit board, and is a dummy made of the same material as the conductor pattern.
- a frame having a conductor pattern is provided, and the wiring circuit board has a first edge located away from the dummy conductor pattern and a second edge located between the first edge and the dummy conductor pattern.
- the frame is a dummy forming region containing the dummy conductor pattern, has a width of 5 mm from the second edge in a direction orthogonal to the second edge, and extends in a direction in which the second edge extends.
- It has a dummy forming region having the same length as the wiring circuit board, and the ratio of the area of the conductor pattern to the area of the insulating layer and the percentage of the area of the dummy conductor pattern to the area of the dummy forming region.
- the thickness of the conductor pattern is made uniform.
- the difference between the percentage of the area of the conductor pattern to the area of the insulating layer and the percentage of the area of the dummy conductor pattern to the area of the dummy forming region is 30% or less.
- the conductor pattern has a first conductor pattern having a first thickness and a second conductor pattern having a second thickness thicker than the first thickness
- the dummy conductor pattern is The wiring circuit board assembly sheet according to the above [1] or [2], which has the first dummy conductor pattern having the first thickness and the second dummy conductor pattern having the second thickness.
- the difference between the area of the first conductor pattern to the area of the insulating layer and the area of the first dummy conductor pattern to the area of the dummy forming region is 0% or more. It is 50% or less, and the difference between the area of the second conductor pattern to the area of the insulating layer and the area of the second dummy conductor pattern to the area of the dummy forming region is 50% or less.
- the wiring circuit board aggregate sheet of the above [3] is included.
- the difference between the area of the first conductor pattern to the area of the insulating layer and the area of the first dummy conductor pattern to the area of the dummy forming region is 30% or less.
- the difference between the percentage of the area of the second conductor pattern to the area of the insulating layer and the percentage of the area of the second dummy conductor pattern to the area of the dummy forming region is 30% or less.
- the wiring circuit board assembly sheet of the present invention it is possible to obtain a wiring circuit board in which the thickness of the conductor pattern is made uniform.
- FIG. 1 is a plan view of a wiring circuit board assembly sheet as an embodiment of the present invention.
- FIG. 2 is an enlarged view of a part of the wiring circuit board assembly sheet shown in FIG.
- FIG. 3 is a cross-sectional view taken along the line AA of the wiring circuit board assembly sheet shown in FIG. 4A to 4C are explanatory views for explaining a method for manufacturing a wiring circuit board assembly sheet
- FIG. 4A shows a first insulating layer forming step
- FIG. 4B shows a plated resist in the resist step
- 4C shows a step of exposing a film of a plated resist in the resist step.
- 5A to 5C are explanatory views for explaining a method of manufacturing a wiring circuit board assembly sheet following FIG. 4C, and FIG.
- FIG. 5A shows a conductor pattern and a dummy conductor by electrolytic plating in a pattern forming step.
- 5B shows a step of forming a pattern
- FIG. 5B shows a step of peeling off the plating resist layer in the pattern forming step
- FIG. 5C shows a second insulating layer forming step.
- FIG. 6 is an explanatory diagram for explaining the first modification.
- FIG. 7 is an explanatory diagram for explaining the second modification.
- FIG. 8 is a cross-sectional view of the wiring circuit board assembly sheet of the third modification.
- 9A to 9D are explanatory views for explaining a method for manufacturing a wiring circuit board assembly sheet of a third modification
- FIG. 9A shows a film of a plated resist is exposed in a first resist step.
- FIG. 9B shows a process
- FIG. 9B shows a process of developing a film of a plated resist in a first resist step
- FIG. 9C shows a first conductor pattern and a first dummy conductor pattern by electrolytic plating in a first pattern forming step.
- the forming step is shown
- FIG. 9D shows a step of peeling off the plating resist layer in the first pattern forming step.
- 10A to 10D are explanatory views for explaining a method of manufacturing a wiring circuit board assembly sheet of a third modification, following FIG. 9D
- FIG. 10A is a plating in a second resist step.
- FIG. 10B shows a step of exposing a film of a resist
- FIG. 10B shows a step of exposing a film of a resist
- FIG. 10B shows a step of developing a film of a plated resist in a second resist step
- FIG. 10C shows a second conductor pattern and a second conductor pattern by electrolytic plating in the second pattern forming step.
- a step of forming the second dummy conductor pattern is shown
- FIG. 10D shows a step of peeling off the plating resist layer in the second pattern forming step.
- FIG. 11 is an explanatory diagram for explaining a fourth modification.
- the wiring circuit board assembly sheet 1 has a sheet shape extending in the first direction and the second direction. The second direction is orthogonal to the first direction.
- the wiring circuit board assembly sheet 1 includes a plurality of wiring circuit boards 2 and a frame 3.
- Wiring Circuit Boards A plurality of wiring circuit boards 2 are arranged at intervals in the first direction and at intervals from each other in the second direction. Hereinafter, one wiring circuit board 2 in the wiring circuit board assembly sheet 1 will be described.
- the wiring circuit board 2 extends in the first direction and the second direction.
- the wiring circuit board 2 has a plurality of edges E1, E2, E3, and E4.
- the wiring circuit board 2 has a substantially rectangular shape.
- the shape of the wiring circuit board 2 is not limited.
- the edge E1 is located at one end of the wiring circuit board 2 in the first direction.
- the edge E2 is located at the other end of the wiring circuit board 2 in the first direction.
- the edge E2 is located away from the edge E1 in the first direction.
- the edge E3 is located at one end of the wiring circuit board 2 in the second direction.
- the edge E4 is located at the other end of the wiring circuit board 2 in the second direction.
- the edge E4 is located away from the edge E3 in the second direction.
- the wiring circuit board 2 has a support layer 21, a base insulating layer 22 as an example of an insulating layer, a conductor pattern 23, and a cover insulating layer 24.
- the support layer 21 supports the base insulating layer 22, the conductor pattern 23, and the cover insulating layer 24.
- the support layer 21 is made of, for example, metal. Examples of the metal include stainless alloys and copper alloys.
- the base insulation layer 22 is located above the support layer 21 in the thickness direction of the wiring circuit board assembly sheet 1.
- the thickness direction is orthogonal to the first direction and the second direction.
- the base insulating layer 22 is located between the support layer 21 and the conductor pattern 23 in the thickness direction.
- the base insulating layer 22 insulates the support layer 21 and the conductor pattern 23.
- the base insulating layer 22 is made of resin. Examples of the resin include polyimide.
- the conductor pattern 23 is located on the base insulating layer 22 in the thickness direction.
- the conductor pattern 23 is located on the opposite side of the support layer 21 with respect to the base insulating layer 22 in the thickness direction.
- the conductor pattern 23 is made of metal. Examples of the metal include copper.
- the conductor pattern 23 includes a plurality of first terminals 231A, 231B, 231C, 231D, a plurality of second terminals 232A, 232B, 232C, 232D, and a plurality of wirings 233A, 233B, 233C, 233D. And have.
- the number of first terminals, the number of second terminals, and the number of wirings are not limited.
- the first terminals 231A, 231B, 231C, and 231D are located at one end of the wiring circuit board 2 in the second direction.
- the first terminals 231A, 231B, 231C, and 231D are arranged in the first direction with a distance from each other.
- Each of the first terminals 231A, 231B, 231C, and 231D has a square land shape.
- the second terminals 232A, 232B, 232C, and 232D are located at the other end of the wiring circuit board 2 in the second direction.
- the second terminals 232A, 232B, 232C, and 232D are arranged in the first direction with a distance from each other.
- Each of the second terminals 232A, 232B, 232C, and 232D has a square land shape.
- the wiring 233A electrically connects the first terminal 231A and the second terminal 232A.
- the wiring 233B electrically connects the first terminal 231B and the second terminal 232B.
- the wiring 233C electrically connects the first terminal 231C and the second terminal 232C.
- the wiring 233D electrically connects the first terminal 231D and the second terminal 232D.
- the difference between the measured value of the thickness of the conductor pattern 23 and the design value is, for example, 10% or less, preferably 5% or less with respect to the design value.
- the lower limit of the difference between the measured value of the thickness of the conductor pattern 23 and the design value is not limited.
- the difference between the measured value of the thickness of the conductor pattern 23 and the design value may be 0%.
- the cover insulating layer 24 covers the wiring 233A, the wiring 233B, the 233C, and the 233D.
- the cover insulating layer 24 is located above the base insulating layer 22 in the thickness direction.
- the cover insulating layer 24 does not cover the first terminals 231A, 231B, 231C, 231D (see FIG. 2) and the second terminals 232A, 232B, 232C, and 232D (see FIG. 2).
- the cover insulating layer 24 is made of resin. Examples of the resin include polyimide.
- the wiring circuit board assembly sheet 1 has a notch 11 and a plurality of connection portions 12A and 12B around the wiring circuit board 2.
- the notch 11 extends along the outer shape of the wiring circuit board 2.
- the notch 11 separates the wiring circuit board 2 and the frame 3.
- the frame 3 surrounds the wiring circuit board 2.
- the frame 3 has a plurality of adjacent portions 3A, 3B, 3C, and 3D around the wiring circuit board 2.
- the adjacent portion 3A is adjacent to the edge E1.
- the adjacent portion 3A extends in the second direction along the edge E1.
- the adjacent portion 3B is located on the opposite side of the adjacent portion 3A with respect to the wiring circuit board 2 in the first direction.
- the adjacent portion 3B is adjacent to the edge E2.
- the adjacent portion 3B extends in the second direction along the edge E2.
- the adjacent portion 3C is adjacent to the edge E3.
- the adjacent portion 3C extends in the first direction along the edge E3.
- the adjacent portion 3D is located on the opposite side of the adjacent portion 3C with respect to the wiring circuit board 2 in the second direction.
- the adjacent portion 3D is adjacent to the edge E4.
- connection portions 12A and 12B connect the wiring circuit board 2 and the frame 3. Specifically, the connecting portion 12A is located between the adjacent portion 3A and the edge E1, and connects the adjacent portion 3A and the edge E1. The connecting portion 12B is located between the adjacent portion 3B and the edge E2, and connects the adjacent portion 3B and the edge E2. As a result, the frame 3 supports the wiring circuit board 2.
- the frame 3 has two dummy forming regions 30A and 30B and two dummy conductor patterns 33A and 33B for one wiring circuit board 2.
- the dummy forming region 30A is a region in which the dummy conductor pattern 33A is formed.
- the dummy forming region 30A is located on one side of the wiring circuit board 2 in the first direction.
- the dummy forming region 30A includes a part of the adjacent portion 3A.
- the dummy forming region 30A is defined with reference to the edge E1 of the wiring circuit board 2.
- the dummy forming region 30A has a width W1 of 5 mm from the edge E1 in the direction orthogonal to the edge E1, and has the same length L1 as the wiring circuit board 2 in the direction in which the edge E1 extends.
- the dummy forming region 30B is a region where the dummy conductor pattern 33B is formed.
- the dummy forming region 30B is located on the other side of the wiring circuit board 2 in the first direction.
- the dummy forming region 30B includes a part of the adjacent portion 3B.
- the dummy forming region 30B has a width W2 of 5 mm from the edge E2 in the direction orthogonal to the edge E2, and has the same length L2 as the wiring circuit board 2 in the direction in which the edge E2 extends.
- the dummy conductor pattern 33A is located in the dummy forming region 30A.
- the dummy forming region 30A includes the dummy conductor pattern 33A.
- the dummy conductor pattern 33A is located on one side of the wiring circuit board 2 in the first direction.
- the edge E2 is located away from the dummy conductor pattern 33A in the first direction.
- the edge E1 is located between the edge E2 and the dummy conductor pattern 33A in the first direction.
- the length of the dummy conductor pattern 33A in the second direction is the same as the length of the conductor pattern 23 in the second direction.
- the dummy conductor pattern 33A may be longer than the conductor pattern 23 in the second direction.
- the shape of the dummy conductor pattern 33A is not limited.
- the shape of the dummy conductor pattern 33A may be different from the shape of the conductor pattern 23.
- the dummy conductor pattern 33A has a plurality of dummy wirings 331A.
- the plurality of dummy wirings 331A are arranged at intervals from each other in the first direction. Each of the plurality of dummy wirings 331A extends in the second direction. Each of the plurality of dummy wirings 331A extends in the direction in which the wirings 233A, 233B, 233C, and 233D of the conductor pattern 23 extend. The length of each of the plurality of dummy wirings 331A in the second direction is the same as the length of the conductor pattern 23 in the second direction. Each of the plurality of dummy wires 331A may be longer than the conductor pattern 23 in the second direction.
- the dummy conductor pattern 33A may have a comb shape in which one end of each of the plurality of dummy wirings 331A is connected to each other.
- the percentage of the area of the conductor pattern 23 with respect to the area of the base insulating layer 22 is defined as the "conductor pattern area ratio”
- the percentage of the area of the dummy conductor pattern 33A with respect to the area of the dummy forming region 30A is defined as the "dummy conductor pattern area ratio”.
- the difference between the conductor pattern area ratio and the dummy conductor pattern area ratio is 50% or less, preferably 30% or less, more preferably 20% or less, more preferably 10% or less, and more preferably. It is 5% or less.
- the lower limit of the difference between the conductor pattern area ratio and the dummy conductor pattern area ratio is not limited.
- the difference between the conductor pattern area ratio and the dummy conductor pattern area ratio may be 0%.
- the dummy conductor pattern 33B is located in the dummy forming region 30B.
- the dummy forming region 30B includes the dummy conductor pattern 33B.
- the dummy conductor pattern 33B is located on the other side of the wiring circuit board 2 in the first direction.
- the edge E1 is located away from the dummy conductor pattern 33B in the first direction.
- the edge E2 is located between the edge E1 and the dummy conductor pattern 33B in the first direction.
- the description of the dummy conductor pattern 33B is the same as the description of the dummy conductor pattern 33A. Therefore, the description of the dummy conductor pattern 33B will be omitted.
- the frame 3 has a frame support layer 31, a frame insulating layer 32, and the above-mentioned dummy conductor patterns 33A and 33B.
- the frame support layer 31 is made of the same material as the support layer 21 of the wiring circuit board 2.
- the frame insulating layer 32 is located above the frame support layer 31 in the thickness direction.
- the frame insulating layer 32 of the adjacent portion 3A is located between the frame support layer 31 and the dummy conductor pattern 33A in the thickness direction.
- the frame insulating layer 32 of the adjacent portion 3A insulates the frame support layer 31 and the dummy conductor pattern 33A.
- the frame insulating layer 32 of the adjacent portion 3B is located between the frame support layer 31 and the dummy conductor pattern 33B in the thickness direction.
- the frame insulating layer 32 of the adjacent portion 3B insulates the frame support layer 31 and the dummy conductor pattern 33B.
- the frame insulating layer 32 is made of the same material as the base insulating layer 22 of the wiring circuit board 2.
- the frame insulating layer 32 may be formed only in the portion where the dummy conductor patterns 33A and 33B are formed.
- Each of the dummy conductor patterns 33A and 33B is located on the frame insulating layer 32 in the thickness direction.
- Each of the dummy conductor patterns 33A and 33B is located on the opposite side of the frame support layer 31 with respect to the frame insulating layer 32 in the thickness direction.
- the dummy conductor patterns 33A and 33B are made of the same material as the conductor pattern 23 of the wiring circuit board 2.
- the frame 3 may have a cover insulating layer that covers the dummy wiring patterns 33A and 33B.
- the cover insulating layer of the frame 3 is located above the frame insulating layer 32 in the thickness direction.
- the cover insulating layer of the frame 3 is made of the same material as the cover insulating layer 24 of the wiring circuit board 2.
- the wiring circuit board assembly sheet 1 is manufactured by the semi-additive method.
- the wiring circuit board assembly sheet 1 may be manufactured by an additive method.
- the method for manufacturing the wiring circuit board assembly sheet 1 includes a first insulating layer forming step (see FIG. 4A), a resist step (see FIGS. 4B and 4C), and a pattern forming step (see FIGS. 5A and 5B). It includes a second insulating layer forming step (see FIG. 5C).
- the base material S is a material for the support layer 21 (see FIG. 3) of the wiring circuit board 2 and the frame support layer 31 (see FIG. 3) of the frame 3.
- the base material S is a metal foil made of a metal forming the support layer 21 and the frame support layer 31.
- the base insulating layer 22 is formed on the product area A1 of the base material S, and the frame insulating layer 32 is formed on the frame area A2 of the base material S.
- the product area A1 is an area that becomes the wiring circuit board 2.
- the frame area A2 is an area that becomes the frame 3.
- the first insulating layer forming step first, a photosensitive resin solution (varnish) is applied onto the base material S and dried to form a photosensitive resin coating film. Next, the coating film of the photosensitive resin is exposed and developed. As a result, the base insulating layer 22 and the frame insulating layer 32 are formed on the base material S.
- a photosensitive resin solution varnish
- the plated resist layer R is formed on the base insulating layer 22 and the frame insulating layer 32.
- a seed layer is formed on the surfaces of the base insulating layer 22 and the frame insulating layer 32.
- the seed layer is formed, for example, by sputtering.
- the seed layer material include chromium, copper, nickel, titanium, and alloys thereof.
- the film F of the plating resist is bonded onto the base insulating layer 22 and the frame insulating layer 32 on which the seed layer is formed.
- the photomask M is superposed on the film F of the plating resist, and the film F of the plating resist is exposed in a state where the conductor pattern 23 and the portions where the dummy conductor patterns 33A and 33B are formed are shielded from light.
- the exposed plating resist film F is developed.
- the plating resist of the light-shielded portion that is, the portion where the conductor pattern 23 and the dummy conductor patterns 33A, 33B are formed is removed, and the exposed portion, that is, the conductor pattern 23 and the dummy conductor patterns 33A, 33B are removed.
- the plating resist of the part that is not formed remains.
- a plated resist layer R having openings R1, R2, and R3 is formed on the base insulating layer 22 and the frame insulating layer 32.
- the opening R1 is formed by removing the plating resist at the portion where the conductor pattern 23 is formed.
- the opening R2 is formed by removing the plating resist at the portion where the dummy conductor pattern 33A is formed.
- the opening R3 is formed by removing the plating resist at the portion where the dummy conductor pattern 33B is formed.
- the seed layer is exposed through the openings R1, R2, R3.
- the percentage of the area of the opening R1 with respect to the area of the base insulating layer 22 is defined as the "conductor pattern aperture ratio", the percentage of the area of the opening R2 with respect to the area of the dummy forming region A11, and the opening R3 with respect to the area of the dummy forming region A12.
- the percentage of the area of is defined as “dummy conductor pattern opening ratio”
- the difference between the conductor pattern opening ratio and the dummy conductor pattern opening ratio is 50% or less, preferably 30% or less, more preferably 20%. Below, it is more preferably 10% or less, and more preferably 5% or less.
- the dummy forming region A11 in the method for manufacturing the wiring circuit board assembly sheet 1 is defined with reference to the product region A1.
- the dummy forming region A11 has a width of 5 mm from the edge E11 in the direction orthogonal to the edge E11 on one side of the product region A1 in the first direction, and the product region A1 in the direction in which the edge E11 extends. Has the same length as. Therefore, the range of the dummy forming region A11 is the same as the range of the dummy forming region 30A (see FIG. 2) described above.
- the dummy forming region A12 has a width of 5 mm from the edge E12 in the direction orthogonal to the edge E12 on the other side of the product region A1 in the first direction, and has the same length as the product region A1 in the direction in which the edge E12 extends. Have.
- the range of the dummy forming region A12 is the same as the range of the dummy forming region 30B (see FIG. 2) described above.
- the conductor pattern 23 is formed together with the dummy conductor patterns 33A and 33B. Therefore, in the plating solution, the metal ion concentration around the product region A1 can be made uniform, and the thickness of the conductor pattern 23 can be made uniform.
- the plating resist layer R is peeled off as shown in FIG. 5B. Then, the seed layer covered with the plating resist layer R is removed by etching.
- the second insulating layer forming step first, a photosensitive resin solution (varnish) is applied onto the base insulating layer 22 and the conductor pattern 23 and dried to form a photosensitive resin coating film. Next, the coating film of the photosensitive resin is exposed and developed. As a result, the cover insulating layer 24 is formed.
- a photosensitive resin solution varnish
- the base material S between the product area A1 (see FIG. 4A) and the frame area A2 (see FIG. 4A) is removed by etching to obtain the wiring circuit board assembly sheet 1 described above. ..
- the density of the dummy conductor pattern 33A in the dummy forming region 30A is close to the density of the conductor pattern 23 in the wiring circuit board 2.
- the thickness of the conductor pattern 23 is made uniform.
- the difference between the conductor pattern opening ratio and the dummy conductor pattern opening ratio of the plated resist layer R is 50% or less in the resist process. It has been adjusted.
- FIG. 5A when electrolytic plating is performed in the pattern forming step, the metal ion concentration around the product region A1 is made uniform in the plating solution, and the thickness of the conductor pattern 23 is made uniform. It is planned.
- the thickness of the conductor pattern 23 is made uniform. ..
- the dummy conductor pattern 33 may be arranged on both sides of the wiring circuit board 2 in the first direction and on both sides of the wiring circuit board 2 in the second direction.
- the dummy conductor pattern 33 may extend in a direction intersecting the direction in which the wirings 233A, 233B, 233C, and 233D of the conductor pattern 23 extend.
- the dummy conductor pattern 33 may not be present between the wiring circuit boards 2.
- the plurality of wiring circuit boards 2 are connected to each other via a connection portion.
- the frame 3 is located on the outer peripheral portion of the wiring circuit board assembly sheet 1.
- the frame 3 surrounds a plurality of wiring circuit boards 2.
- the dummy forming region is defined with reference to the edge of the wiring circuit board 2A closest to the frame 3.
- the wiring density is increased by the adjacent wiring circuit boards 2A and 2B. Uniformity is achieved.
- a dummy forming region is defined with reference to the edge of the wiring circuit board 2A closest to the frame 3, and the wiring density of the dummy conductor pattern 33 in the dummy forming region is set to the wiring density of the conductor pattern 23 of the wiring circuit board 2A. If approximated, the wiring density can be made uniform in all the wiring circuit boards 2 of the wiring circuit board assembly sheet 1.
- the conductor pattern 23 includes a first conductor pattern 41 having a first thickness T1 and a second conductor pattern 42 having a second thickness T2 thicker than the first thickness T1. You may.
- the dummy conductor pattern 33A has a first dummy conductor pattern 51A having a first thickness T1 and a second dummy conductor pattern 52A having a second thickness T2.
- the shapes of the first dummy conductor pattern 51A and the second dummy conductor pattern 52A are not limited.
- the dummy wirings of the first dummy conductor pattern 51A and the second dummy conductor pattern 52A are Dummy wiring may be arranged alternately.
- the difference between the percentage of the area of the first conductor pattern 41 to the area of the base insulating layer 22 and the percentage of the area of the first dummy conductor pattern 51A to the area of the dummy forming region 30A is preferably 50% or less. Is 30% or less, more preferably 20% or less, more preferably 10% or less, and more preferably 5% or less.
- the difference between the percentage of the area of the second conductor pattern 42 to the area of the base insulating layer 22 and the percentage of the area of the second dummy conductor pattern 52A to the area of the dummy forming region 30A is preferably 50% or less. Is 30% or less, more preferably 20% or less, more preferably 10% or less, and more preferably 5% or less.
- the dummy conductor pattern 33B also has a first dummy conductor pattern 51B having a first thickness T1 and a second dummy conductor pattern 52B having a second thickness T2.
- the description of the dummy conductor pattern 33B is the same as the description of the dummy conductor pattern 33A. Therefore, the description of the dummy conductor pattern 33B will be omitted.
- the manufacturing method of this modification is the above-mentioned first insulating layer forming step (see FIG. 4A), the first resist step (see FIGS. 9A and 9B), and the first pattern forming step (see FIGS. 9C and 9D).
- a second resist step see FIGS. 10A and 10B
- a second pattern forming step see FIGS. 10C and 10D
- the above-mentioned second insulating layer forming step see FIG. 5C
- the plated resist layer RA having openings RA1, RA2, and RA3 on the base insulating layer 22 and the frame insulating layer 32 in the same manner as the resist step described above.
- the opening RA1 is formed by removing the plating resist at the portion where the first conductor pattern 41 is formed.
- the opening RA2 is formed by removing the plating resist at the portion where the first dummy conductor pattern 51A is formed.
- the opening RA3 is formed by removing the plating resist at the portion where the first dummy conductor pattern 51B is formed.
- the difference between the percentage of the area of the opening RA1 to the area of the base insulating layer 22 and the percentage of the area of the opening RA2 to the area of the dummy forming region A11 is 50% or less, preferably 30% or less, more preferably 20%. Below, it is more preferably 10% or less, and more preferably 5% or less.
- the difference between the percentage of the area of the opening RA1 to the area of the base insulating layer 22 and the percentage of the area of the opening RA3 to the area of the dummy forming region A12 is 50% or less, preferably 30% or less, more preferably 20%. Below, it is more preferably 10% or less, and more preferably 5% or less.
- the first conductor pattern 41 is formed on the seed layer in the opening RA1 by electrolytic plating, and the first is formed on the seed layer in the opening RA2.
- the dummy conductor pattern 51A is formed, and the first dummy conductor pattern 51B is formed on the seed layer in the opening RA3.
- the first conductor pattern 41 is formed together with the first dummy conductor patterns 51A and 51B.
- the first dummy conductor pattern 51A is formed in the dummy forming region A11 in the above range.
- the first dummy conductor pattern 51B is formed in the dummy forming region A12 in the above range.
- the metal ion concentration around the product area A1 can be made uniform, and the thickness of the first conductor pattern 41 can be made uniform.
- the plating resist layer RA is peeled off as shown in FIG. 9D. Then, the seed layer covered with the plating resist layer RA is removed by etching.
- the plated resist layer RB having openings RB1, RB2, and RB3 on the base insulating layer 22 and the frame insulating layer 32 is similar to the resist step described above.
- the opening RB1 is formed by removing the plating resist at the portion where the second conductor pattern 42 is formed.
- the opening RB2 is formed by removing the plating resist at the portion where the second dummy conductor pattern 52A is formed.
- the opening RB3 is formed by removing the plating resist at the portion where the second dummy conductor pattern 52B is formed.
- the difference between the percentage of the area of the opening RB1 to the area of the base insulating layer 22 and the percentage of the area of the opening RB2 to the area of the dummy forming region A11 is 50% or less, preferably 30% or less, more preferably 20%. Below, it is more preferably 10% or less, and more preferably 5% or less.
- the difference between the percentage of the area of the opening RB1 to the area of the base insulating layer 22 and the percentage of the area of the opening RB3 to the area of the dummy forming region A12 is 50% or less, preferably 30% or less, more preferably 20%. Below, it is more preferably 10% or less, and more preferably 5% or less.
- the second conductor pattern 42 is formed on the seed layer in the opening RB1 by electrolytic plating, and the second conductor pattern 42 is formed on the seed layer in the opening RB2.
- the dummy conductor pattern 52A is formed, and the second dummy conductor pattern 52B is formed on the seed layer in the opening RB3.
- the second conductor pattern 42 is formed together with the second dummy conductor patterns 52A and 52B.
- the second dummy conductor pattern 52A is formed in the dummy forming region A11 in the above range.
- the second dummy conductor pattern 52B is formed in the dummy forming region A12 in the above range.
- the metal ion concentration around the product area A1 can be made uniform, and the thickness of the second conductor pattern 42 can be made uniform.
- the plating resist layer RB is peeled off as shown in FIG. 10D. Then, the seed layer covered with the plating resist layer RB is removed by etching.
- one edge E21 of the wiring circuit board 60 in the first direction has an edge E211 extending in the second direction, an edge E212 inclined with respect to the second direction, and an edge E212 in the second direction.
- the dummy forming region 61 includes a portion 61A extending in the second direction, a portion 61B inclined with respect to the second direction, and a portion 61C extending in the second direction along the edge E21. And include.
- the portion 61A has a width W10 of 5 mm from the edge E211 in a direction orthogonal to the direction in which the edge E211 extends, and has the same length as a portion extending in the second direction of the wiring circuit board 60 in the direction in which the edge E211 extends. Has L10.
- the portion 61B has a width W10 of 5 mm from the edge E212 in a direction orthogonal to the direction in which the edge E212 extends, and a portion extending in a direction inclined from the second direction of the wiring circuit board 60 in the direction in which the edge E212 extends. And have the same length L20.
- the portion 61C has a width W10 of 5 mm from the edge E213 in a direction orthogonal to the direction in which the edge E213 extends, and a portion extending in a direction inclined with the second direction of the wiring circuit board 60 in the direction in which the edge E213 extends. And have the same length L30.
- the dummy forming region 61 has a width W10 of 5 mm from each of the edges E211, E212, and E213 in a direction orthogonal to the direction in which each of the edges E211, E212, and E213 extends, and the edges E211, E212, and E213 have the edges E211, E212, and E213. It has the same length (L10 + L20 + L30) as the wiring circuit board 60 in the extending direction.
- a photosensitive resin solution (varnish) was applied onto a metal foil (base material) and dried to form a photosensitive resin coating film.
- the coating film of the photosensitive resin was exposed and developed to form a base insulating layer and a frame insulating layer on the metal foil (see the first insulating layer forming step, FIG. 4A).
- a seed layer was formed on the surfaces of the base insulating layer and the frame insulating layer by sputtering.
- a plating resist film was laminated on the base insulating layer and the frame insulating layer on which the seed layer was formed.
- the exposed plating resist film was developed to form a plating resist layer (resist process, see FIG. 4C).
- the first opening is formed by removing the plated resist in the portion where the conductor pattern is formed, and the second by removing the plated resist in the portion where the dummy conductor pattern is formed. An opening was formed.
- a conductor pattern was formed on the seed layer in the first opening by electrolytic plating, and a dummy conductor pattern was formed on the seed layer in the second opening (pattern forming step, see FIG. 5A).
- the plating resist layer was peeled off (see FIG. 5B). Then, the seed layer covered with the plating resist layer was removed by etching.
- a photosensitive resin solution (varnish) was applied onto the base insulating layer and the conductor pattern and dried to form a photosensitive resin coating film.
- the coating film of the photosensitive resin was exposed and developed to form a cover insulating layer (see FIG. 5C, second insulating layer forming step).
- the base material was etched along the outer shape of the wiring circuit board to obtain a wiring circuit board assembly sheet.
- ⁇ The difference between the measured value and the design value is larger than 5% and 10% or less with respect to the design value.
- ⁇ The difference between the measured value and the design value is larger than 10% with respect to the design value.
- the wiring circuit board assembly sheet of the present invention is used for manufacturing a wiring circuit board.
- Wiring circuit board assembly sheet 2 Wiring circuit board 3 Frame 22 Base insulation layer 23 Conductor pattern 30A Dummy forming area 33A Dummy conductor pattern 41 1st conductor pattern 42 2nd conductor pattern 51A 1st dummy conductor pattern 52A 2nd dummy conductor pattern E1 Edge E2 Edge W1 Width L1 Length
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Abstract
Description
図1に示すように、配線回路基板集合体シート1は、第1方向および第2方向に延びるシート形状を有する。第2方向は、第1方向と直交する。配線回路基板集合体シート1は、複数の配線回路基板2と、フレーム3とを備える。
複数の配線回路基板2は、第1方向に互いに間隔を隔てて並ぶとともに、第2方向に互いに間隔を隔てて並ぶ。以下、配線回路基板集合体シート1中の1つの配線回路基板2について説明する。
支持層21は、ベース絶縁層22、導体パターン23、および、カバー絶縁層24を支持する。支持層21は、例えば、金属からなる。金属としては、例えば、ステンレス合金、銅合金が挙げられる。
ベース絶縁層22は、配線回路基板集合体シート1の厚み方向において、支持層21の上に位置する。厚み方向は、第1方向および第2方向と直交する。ベース絶縁層22は、厚み方向において、支持層21と導体パターン23との間に位置する。ベース絶縁層22は、支持層21と導体パターン23とを絶縁する。ベース絶縁層22は、樹脂からなる。樹脂としては、例えば、ポリイミドが挙げられる。
導体パターン23は、厚み方向において、ベース絶縁層22の上に位置する。導体パターン23は、厚み方向において、ベース絶縁層22に対して、支持層21の反対側に位置する。導体パターン23は、金属からなる。金属としては、例えば、銅が挙げられる。
図3に示すように、カバー絶縁層24は、配線233A、配線233B、233C、233Dを覆う。カバー絶縁層24は、厚み方向において、ベース絶縁層22の上に位置する。なお、カバー絶縁層24は、第1端子231A、231B、231C、231D(図2参照)、および、第2端子232A、232B、232C、232D(図2参照)を覆わない。カバー絶縁層24は、樹脂からなる。樹脂としては、例えば、ポリイミドが挙げられる。
図2に示すように、配線回路基板集合体シート1は、配線回路基板2の周りにおいて、切欠き11と、複数の接続部12A、12Bとを有する。
ダミー形成領域30Aは、ダミー導体パターン33Aが形成される領域である。ダミー形成領域30Aは、第1方向において、配線回路基板2の一方側に位置する。ダミー形成領域30Aは、隣接部3Aの一部を含む。ダミー形成領域30Aは、配線回路基板2のエッジE1を基準に定義される。ダミー形成領域30Aは、エッジE1と直交する方向において、エッジE1から5mmの幅W1を有し、エッジE1が延びる方向において、配線回路基板2と同じ長さL1を有する。
ダミー導体パターン33Aは、ダミー形成領域30A内に位置する。言い換えると、ダミー形成領域30Aは、ダミー導体パターン33Aを含む。ダミー導体パターン33Aは、第1方向において、配線回路基板2の一方側に位置する。エッジE2は、第1方向において、ダミー導体パターン33Aから離れて位置する。エッジE1は、第1方向において、エッジE2とダミー導体パターン33Aとの間に位置する。第2方向におけるダミー導体パターン33Aの長さは、第2方向における導体パターン23の長さと同じである。ダミー導体パターン33Aは、第2方向において、導体パターン23より長くてもよい。ダミー導体パターン33Aの形状は、限定されない。ダミー導体パターン33Aの形状は、導体パターン23の形状と異なっていてもよい。本実施形態では、ダミー導体パターン33Aは、複数のダミー配線331Aを有する。
図3に示すように、フレーム3は、フレーム支持層31と、フレーム絶縁層32と、上記したダミー導体パターン33A、33Bとを有する。
次に、配線回路基板集合体シート1の製造方法について説明する。
図4Aに示すように、第1絶縁層形成工程では、基材Sの上に、ベース絶縁層22およびフレーム絶縁層32を形成する。
次に、レジスト工程では、ベース絶縁層22およびフレーム絶縁層32の上に、メッキレジスト層Rを形成する。
次に、パターン形成工程では、図5Aに示すように、電解メッキにより、開口R1(図4C参照)内のシード層の上に導体パターン23を形成し、開口R2(図4C参照)内のシード層の上にダミー導体パターン33Aを形成し、開口R3(図4C参照)内のシード層の上にダミー導体パターン33Bを形成する。
次に、第2絶縁層形成工程では、図5Cに示すように、ベース絶縁層22および導体パターン23の上にカバー絶縁層24を形成する。
配線回路基板集合体シート1によれば、図2に示すように、導体パターン面積率とダミー導体パターン面積率との差が、50%以下に調節されている。
以下、図6から図10Dを参照して、配線回路基板集合体シート1の変形例について説明する。以下の変形例において、上記した実施形態と同様の部材には同じ符号を付し、説明を省略する。
このとき、第2導体パターン42は、第2ダミー導体パターン52A、52Bとともに形成される。第2ダミー導体パターン52Aは、上記した範囲のダミー形成領域A11内に形成される。第2ダミー導体パターン52Bは、上記した範囲のダミー形成領域A12内に形成される。
セミアディティブ法により、各実施例および各比較例の配線回路基板集合体シートを製造した。
各実施例および各比較例の配線回路基板集合体シートのそれぞれについて、レーザー顕微鏡(LEXT OLS5000、オリンパス社製)を用いて、導体パターンの厚みを測定し、以下の評価基準に従って評価した。結果を表1に示す。
〇:測定値と設計値との差が、設計値に対して、5%以下である。
2 配線回路基板
3 フレーム
22 ベース絶縁層
23 導体パターン
30A ダミー形成領域
33A ダミー導体パターン
41 第1導体パターン
42 第2導体パターン
51A 第1ダミー導体パターン
52A 第2ダミー導体パターン
E1 エッジ
E2 エッジ
W1 幅
L1 長さ
Claims (5)
- 絶縁層と、前記絶縁層の上に位置する導体パターンとを有する配線回路基板と、
前記配線回路基板を支持するフレームであって、前記導体パターンと同じ材料からなるダミー導体パターンを有するフレームと
を備え、
前記配線回路基板は、前記ダミー導体パターンから離れて位置する第1エッジと、前記第1エッジと前記ダミー導体パターンとの間に位置する第2エッジと、を有し、
前記フレームは、
前記ダミー導体パターンを含むダミー形成領域であって、前記第2エッジと直交する方向において、前記第2エッジから5mmの幅を有し、前記第2エッジが延びる方向において、前記配線回路基板と同じ長さを有するダミー形成領域を有し、
前記絶縁層の面積に対する前記導体パターンの面積の百分率と、前記ダミー形成領域の面積に対する前記ダミー導体パターンの面積の百分率との差が、50%以下である、配線回路基板集合体シート。 - 前記絶縁層の面積に対する前記導体パターンの面積の百分率と、前記ダミー形成領域の面積に対する前記ダミー導体パターンの面積の百分率との差が、30%以下である、請求項1に記載の配線回路基板集合体シート。
- 前記導体パターンは、
第1の厚みの第1導体パターンと、
前記第1の厚みよりも厚い第2の厚みの第2導体パターンと
を有し、
前記ダミー導体パターンは、
前記第1の厚みの第1ダミー導体パターンと、
前記第2の厚みの第2ダミー導体パターンと
を有する、請求項1に記載の配線回路基板集合体シート。 - 前記絶縁層の面積に対する前記第1導体パターンの面積の百分率と、前記ダミー形成領域の面積に対する前記第1ダミー導体パターンの面積の百分率との差が、50%以下であり、
前記絶縁層の面積に対する前記第2導体パターンの面積の百分率と、前記ダミー形成領域の面積に対する前記第2ダミー導体パターンの面積の百分率との差が、50%以下である、請求項3に記載の配線回路基板集合体シート。 - 前記絶縁層の面積に対する前記第1導体パターンの面積の百分率と、前記ダミー形成領域の面積に対する前記第1ダミー導体パターンの面積の百分率との差が、30%以下であり、
前記絶縁層の面積に対する前記第2導体パターンの面積の百分率と、前記ダミー形成領域の面積に対する前記第2ダミー導体パターンの面積の百分率との差が、30%以下である、請求項3に記載の配線回路基板集合体シート。
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JP2010067317A (ja) * | 2008-09-11 | 2010-03-25 | Dainippon Printing Co Ltd | サスペンション用基板 |
JP2012038914A (ja) * | 2010-08-06 | 2012-02-23 | Nitto Denko Corp | 配線回路基板集合体シートおよびその製造方法 |
JP2022007187A (ja) * | 2020-06-25 | 2022-01-13 | 日東電工株式会社 | 配線回路基板集合体シートおよびその製造方法 |
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