WO2022042046A1 - 显示基板及其制备方法、显示装置 - Google Patents

显示基板及其制备方法、显示装置 Download PDF

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Publication number
WO2022042046A1
WO2022042046A1 PCT/CN2021/104525 CN2021104525W WO2022042046A1 WO 2022042046 A1 WO2022042046 A1 WO 2022042046A1 CN 2021104525 W CN2021104525 W CN 2021104525W WO 2022042046 A1 WO2022042046 A1 WO 2022042046A1
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light
layer
sub
pixels
conductive
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PCT/CN2021/104525
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English (en)
French (fr)
Inventor
孔超
杨一帆
张伟
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京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Publication of WO2022042046A1 publication Critical patent/WO2022042046A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass

Definitions

  • This article relates to, but is not limited to, the field of display technology, especially a display substrate, a method for manufacturing the same, and a display device.
  • OLED Organic Light Emitting Diode
  • TFT Thin Film Transistor
  • the present disclosure provides a display substrate, a preparation method thereof, and a display device.
  • the present disclosure provides a display substrate, including: a base substrate.
  • the base substrate includes a display area, and the display area is provided with a plurality of sub-pixels and a conductive protection structure.
  • At least one sub-pixel among the plurality of sub-pixels includes a light-emitting element and a driving circuit for driving the light-emitting element to emit light.
  • the light-emitting element and the conductive protection structure are located on a side of the driving circuit away from the base substrate.
  • the conductive protection structure includes at least one conductive portion, and the at least one conductive portion is located at an interval between portions of the light-emitting elements of at least two adjacent sub-pixels, respectively, for emitting light.
  • the conductive protection structure is electrically connected to a signal terminal, and is configured to reduce carrier transfer between adjacent sub-pixels.
  • the at least one conductive portion is located at an interval between the respective light-emitting portions of the light-emitting elements of at least two adjacent sub-pixels of different colors.
  • the light-emitting element includes an organic functional layer
  • the organic functional layer includes at least two organic layers
  • the at least one conductive portion is in contact with at least one of the organic layers.
  • the at least two organic layers include a first layer, and the projection of the first layer on the base substrate is at least the same as the projection of the light-emitting elements of the two sub-pixels for emitting light. A portion of the projection on the base substrate overlaps, and the first layer is in contact with the at least one conductive portion.
  • the first layer is a common layer between light-emitting elements of a plurality of sub-pixels.
  • the resistivity of the at least one conductive portion is less than the resistivity of the organic layer with which the at least one conductive portion contacts.
  • the display area is further provided with a pixel definition layer, and the pixel definition layer is located on a side of the driving circuit away from the base substrate.
  • the pixel definition layer includes: a plurality of sub-pixel definition parts, pixel definition layer openings are formed between adjacent sub-pixel definition parts, and the light-emitting element is located in the part of the pixel definition layer opening for emitting light.
  • the conductive protection structure is disposed on a side of the sub-pixel definition portion away from the base substrate, and the projection of the sub-pixel definition portion on the base substrate covers the conductive protection structure on the base substrate projection.
  • the light emitting element further includes: a first electrode and a second electrode.
  • the first electrode is disposed on a side of the driving circuit away from the base substrate, and is electrically connected to the driving circuit, and the pixel definition layer opening of the pixel definition layer exposes at least part of the first electrode .
  • the organic functional layer is disposed on a side of the first electrode away from the base substrate, and is in contact with the first electrode through the opening of the pixel definition layer.
  • the second electrode is disposed on a side of the organic functional layer away from the base substrate, and is in contact with the organic functional layer.
  • the organic functional layer includes: a light emitting layer and at least one of the following: a hole injection layer, a hole transport layer, an electron blocking layer, an electron injection layer, an electron transport layer, and a hole blocking layer.
  • the projection of the at least one conductive portion on the base substrate overlaps with the projection of the light-emitting layers of the two sub-pixels on the base substrate, and the opening of the pixel definition layer is located at the base.
  • the projections of the base substrates do not overlap.
  • the light-emitting layers of the two sub-pixels overlap, and the projection of the at least one conductive portion on the base substrate and the overlapping portion of the light-emitting layers of the two sub-pixels are at the same location.
  • the projections of the base substrates overlap.
  • At least one of the hole injection layer, the hole transport layer, the electron blocking layer, the electron injection layer, the electron transport layer, and the hole blocking layer is between light-emitting elements of a plurality of sub-pixels common layer.
  • the conductive protection structure is electrically connected to the signal terminal through the second electrode.
  • the voltage value of the signal terminal is located between the minimum voltage value of the second electrode of the light-emitting element and the maximum voltage value of the first electrode.
  • the conductive protection structure is a mesh structure formed by the at least one conductive portion.
  • the mesh structure includes at least one grid surrounding the light-emitting portion of the light-emitting element of one sub-pixel, or surrounding the light-emitting portion of the light-emitting elements of a plurality of adjacent sub-pixels of the same color.
  • the plurality of sub-pixels in the display area are arranged in the following manner: two first-color sub-pixels, one second-color sub-pixel and one third-color sub-pixel in the first direction
  • the repeating unit arrangement of the two first color sub-pixels is arranged in a second direction perpendicular to the first direction, and the spacing of the sub-pixels of the same color in the first direction is approximately equal to 1 to 1 of the sub-pixel width. 2 times.
  • the portion of the light-emitting elements of the two adjacent first-color sub-pixels that emit light is surrounded by a grid of the conductive protection structure, and the portion of the light-emitting element of the second color sub-pixel that is used to emit light is surrounded by the conductive protection structure.
  • a grid of the protective structure is surrounded, and a part of the light-emitting element of a third color sub-pixel for light emission is surrounded by a grid of the conductive protective structure.
  • the signal terminal provides a constant potential.
  • the base substrate further includes: a peripheral area located at the periphery of the display area, the peripheral area is provided with at least one constant voltage signal line, and the conductive protection structure passes the at least one constant voltage signal The wire is electrically connected to the signal terminal.
  • the present disclosure provides a display device including the display substrate as described above.
  • the present disclosure provides a method for preparing a display substrate, including: providing a base substrate, the base substrate including a display area; forming a plurality of sub-pixels and a conductive protection on the base substrate of the display area structure.
  • At least one sub-pixel includes a light-emitting element and a driving circuit for driving the light-emitting element to emit light, and the light-emitting element and the conductive protection structure are located on a side of the driving circuit away from the base substrate.
  • the conductive protection structure includes at least one conductive portion, and the at least one conductive portion is located at an interval between the light-emitting elements of at least two adjacent sub-pixels, respectively, and the conductive protection structure is electrically connected to a signal terminal. , configured to reduce carrier transport between adjacent subpixels.
  • FIG. 1 is a schematic diagram of a display substrate according to at least one embodiment of the disclosure
  • FIG. 2 is a schematic structural diagram of a plurality of sub-pixels in a display area according to at least one embodiment of the disclosure
  • FIG. 3 is a schematic cross-sectional view along the P-P direction in FIG. 2;
  • FIG. 4 is a schematic diagram of electrical connection of a conductive protection structure of a display substrate according to at least one embodiment of the disclosure
  • FIG. 5 is a schematic diagram of a display substrate after forming a flexible substrate substrate according to at least one embodiment of the present disclosure
  • FIG. 6 is a schematic diagram of a display substrate after forming a driving structure layer according to at least one embodiment of the present disclosure
  • FIG. 7 is a schematic diagram of a display substrate after forming a flat layer pattern according to at least one embodiment of the present disclosure
  • FIG. 8 is a schematic diagram of a display substrate after forming a first electrode pattern according to at least one embodiment of the present disclosure
  • FIG. 9 is a schematic diagram of a display substrate after forming a pixel definition layer pattern according to at least one embodiment of the present disclosure.
  • FIG. 10 is a schematic diagram of a display substrate after forming a spacer column pattern according to at least one embodiment of the present disclosure
  • FIG. 11 is a schematic diagram of a display substrate after forming a conductive protection structure pattern according to at least one embodiment of the present disclosure
  • FIG. 12 is a schematic diagram of a display substrate after forming a second electrode pattern of a light-emitting element according to at least one embodiment of the disclosure
  • FIG. 13 is a schematic diagram of a display substrate after forming an encapsulation layer according to at least one embodiment of the present disclosure
  • FIG. 14 is another schematic cross-sectional view along the P-P direction in FIG. 2;
  • 15 is another schematic diagram of a plurality of sub-pixels in a display area according to at least one embodiment of the disclosure.
  • 16 is another schematic diagram of a plurality of sub-pixels in a display area according to at least one embodiment of the disclosure.
  • 17 is another schematic diagram of a plurality of sub-pixels in a display area according to at least one embodiment of the disclosure.
  • FIG. 18 is another schematic diagram of a plurality of sub-pixels in a display area according to at least one embodiment of the disclosure.
  • 19 is another schematic diagram of a plurality of sub-pixels in a display area according to at least one embodiment of the disclosure.
  • 20 is another schematic diagram of a plurality of sub-pixels in a display area according to at least one embodiment of the disclosure.
  • FIG. 21 is a schematic diagram of a display device according to at least one embodiment of the disclosure.
  • ordinal numbers such as “first”, “second”, and “third” are set to avoid confusion of constituent elements, rather than to limit the quantity.
  • "Plurality” in this disclosure includes two and more than two.
  • the terms “installed”, “connected” and “connected” should be construed broadly unless otherwise expressly specified and limited. For example, it may be a fixed connection, or a detachable connection, or an integral connection; it may be a mechanical connection, or an electrical connection; it may be a direct connection, or an indirect connection through an intermediate piece, or an internal communication between two elements.
  • installed should be construed broadly unless otherwise expressly specified and limited. For example, it may be a fixed connection, or a detachable connection, or an integral connection; it may be a mechanical connection, or an electrical connection; it may be a direct connection, or an indirect connection through an intermediate piece, or an internal communication between two elements.
  • a transistor refers to an element including at least three terminals of a gate electrode, a drain electrode, and a source electrode.
  • a transistor has a channel region between a drain electrode (drain electrode terminal, drain region or drain) and a source electrode (source electrode terminal, source region or source), and current can flow through the drain electrode, the channel region, and the source electrode .
  • the channel region refers to a region through which current mainly flows.
  • the first electrode may be the drain electrode and the second electrode may be the source electrode, or the first electrode may be the source electrode and the second electrode may be the drain electrode.
  • the functions of the "source electrode” and the “drain electrode” may be interchanged when using transistors of opposite polarities or when the direction of the current changes during circuit operation. Therefore, in the present disclosure, “source electrode” and “drain electrode” may be interchanged with each other.
  • electrically connected includes the case where constituent elements are connected together by elements having some electrical function.
  • the "element having a certain electrical effect” is not particularly limited as long as it can transmit and receive electrical signals between the connected constituent elements.
  • Examples of “elements having some electrical function” include not only electrodes and wirings, but also switching elements such as transistors, resistors, inductors, capacitors, other elements having one or more functions, and the like.
  • parallel refers to a state in which the angle formed by two straight lines is -10° or more and 10° or less, and thus can include a state in which the angle is -5° or more and 5° or less.
  • perpendicular refers to a state in which the angle formed by two straight lines is 80° or more and 100° or less, and therefore can include a state in which an angle of 85° or more and 95° or less is included.
  • film and “layer” are interchangeable.
  • conductive layer may sometimes be replaced by “conductive film”.
  • insulating film may be replaced with “insulating layer” in some cases.
  • the OLED light-emitting element includes: an anode (Anode), an organic functional layer and a cathode (Cathode) stacked in sequence.
  • the organic functional layer includes an emitting layer (EML, Emitting Layer) and a hole injection layer (HIL, Hole Injection Layer), a hole transport layer (HTL, Hole Transport Layer), a hole blocking layer (HBL, Hole Block Layer), A multilayer structure composed of one or more film layers in an electron blocking layer (EBL, Electron Block Layer), an electron injection layer (EIL, Electron Injection Layer), and an electron transport layer (ETL, Electron Transport Layer).
  • EBL electron blocking layer
  • EIL Electron Injection Layer
  • ETL Electron Transport Layer
  • ETL Electron Transport Layer
  • OLED light-emitting elements of different colors have different light-emitting layers.
  • a red light-emitting element includes a red light-emitting layer
  • a green light-emitting element includes a green light-emitting layer
  • a blue light-emitting element includes a blue light-emitting layer.
  • the hole injection layer and the hole transport layer on one side of the light-emitting layer usually use a common layer.
  • the hole injection layer is generally composed of a p-dopant (for example, F4- TCNQ) and other materials and hole transport materials are doped according to a certain proportion.
  • the organic functional layer is prepared by evaporation (for example, using a fine metal mask (FMM, Fine Metal Mask) or an open mask (open mask) evaporation)
  • FMM fine metal mask
  • open mask open mask
  • At least one embodiment of the present disclosure provides a display substrate, a method for manufacturing the same, and a display device, which can avoid poor crosstalk and improve display effects.
  • At least one embodiment of the present disclosure provides a display substrate, including: a base substrate, the base substrate includes a display area, and the display area is provided with a plurality of sub-pixels and a conductive protection structure.
  • At least one sub-pixel among the plurality of sub-pixels includes a light-emitting element and a driving circuit for driving the light-emitting element to emit light.
  • the light emitting element and the conductive protection structure are located on the side of the driving circuit away from the base substrate.
  • the conductive protection structure includes at least one conductive portion located at an interval between respective portions of the light-emitting elements of at least two adjacent sub-pixels for emitting light.
  • the conductive protection structure is electrically connected to a signal terminal, and is configured to reduce carrier transfer between adjacent sub-pixels.
  • the display substrate provided in this embodiment, by arranging at least one conductive part in the interval between the light-emitting elements of at least two adjacent sub-pixels, respectively, between the light-emitting parts, the carrier transfer between adjacent sub-pixels can be reduced, and the transmission of carriers between adjacent sub-pixels can be reduced. The current crosstalk between adjacent sub-pixels is avoided, thereby improving the display effect.
  • the at least one conductive portion is located at an interval between the respective light-emitting portions of the light-emitting elements of at least two adjacent sub-pixels of different colors.
  • the present exemplary embodiment can prevent the sub-pixels of this color from affecting sub-pixels of other colors during monochrome display, thereby improving the display color accuracy and effectively improving the display quality.
  • this embodiment does not limit this.
  • the at least one conductive portion may be located at an interval between the respective portions of the light-emitting elements of any two adjacent sub-pixels for emitting light.
  • the light-emitting element includes an organic functional layer
  • the organic functional layer includes at least two organic layers
  • at least one conductive portion is in contact with at least one of the organic layers.
  • at least two organic layers may include a light emitting layer and a hole injection layer, and at least one conductive portion is in contact with the hole injection layer.
  • the at least two organic layers may include a light emitting layer, a hole transport layer and a hole injection layer, and at least one conductive portion is in contact with the hole injection layer.
  • this embodiment does not limit this.
  • the at least two organic layers include a first layer, and the projection of the first layer on the base substrate at least intersects the projection of the light-emitting elements of the two sub-pixels on the base substrate. stacked, the first layer is in contact with the at least one conductive portion.
  • the first layer may be a common layer between the light emitting elements of the plurality of sub-pixels.
  • the first layer may be shared by the light-emitting elements of some of the sub-pixels.
  • the first layer may be a hole injection layer or a hole transport layer. However, this embodiment does not limit this.
  • the resistivity of the at least one conductive portion is less than the resistivity of the organic layer to which the at least one conductive portion contacts.
  • the organic layer contacted by the at least one conductive portion may be a hole injection layer, and the resistivity of the at least one conductive portion is smaller than that of the hole injection layer.
  • this embodiment does not limit this.
  • the organic layer to which at least one conductive portion is in contact may be a hole transport layer.
  • the display area is further provided with a pixel definition layer, and the pixel definition layer is located on a side of the driving circuit away from the base substrate.
  • the pixel definition layer includes a plurality of sub-pixel definition parts, an opening of the pixel definition layer is formed between adjacent sub-pixel definition parts, and the light emitting element is located in the part of the opening of the pixel definition layer for emitting light.
  • the conductive protection structure is arranged on the side of the sub-pixel definition part away from the base substrate, and the projection of the sub-pixel definition part on the base substrate covers the projection of the conductive protection structure on the base substrate.
  • the pixel definition layer within the pixel definition layer opening is removed, corresponding to the light emitting portion of the light emitting element.
  • the conductive protection structure is in direct contact with the subpixel definition portion of the subpixel definition layer, or the conductive protection structure is in direct contact with the spacer column formed on the subpixel definition portion.
  • this embodiment does not limit this.
  • the conductive protection structure is formed on the sub-pixel definition portion, which can simplify the manufacturing process and avoid affecting the normal light emission of the light-emitting element.
  • At least one light-emitting element includes: a first electrode, an organic functional layer, and a second electrode that are stacked in sequence.
  • the first electrode is disposed on a side of the driving circuit away from the base substrate, and is electrically connected to a driving circuit, and at least part of the first electrode is exposed through the pixel definition layer opening of the pixel definition layer.
  • the organic functional layer is disposed on the side of the first electrode away from the base substrate, and is in contact with the first electrode through the opening of the pixel definition layer.
  • the second electrode is disposed on the side of the organic functional layer away from the base substrate, and is in contact with the organic functional layer.
  • the first electrode may be a reflective anode and the second electrode may be a transparent cathode. However, this embodiment does not limit this.
  • the first electrode may be a transparent anode and the second electrode may be a reflective cathode.
  • the organic functional layer may include a light emitting layer and at least one of the following: a hole injection layer, a hole transport layer, an electron blocking layer, an electron injection layer, an electron transport layer, a hole blocking layer.
  • the organic functional layer may include: a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer and an electron injection layer stacked in sequence along a direction away from the base substrate.
  • the organic functional layer may include: a hole injection layer, a hole transport layer, a light emitting layer and an electron transport layer stacked in sequence along a direction away from the base substrate.
  • this embodiment does not limit this.
  • At least one of a hole injection layer, a hole transport layer, an electron blocking layer, an electron injection layer, an electron transport layer, and a hole blocking layer is common among light-emitting elements of a plurality of subpixels Floor.
  • Each common layer is disposed in a plurality of pixel definition layer openings and extends to cover a plurality of sub-pixel definition parts.
  • the crosstalk current in the common layer will flow to the conductive protection structure, so as to block the flow of the crosstalk current to other sub-pixels, avoid crosstalk failure, and improve the display effect.
  • this embodiment does not limit this.
  • the conductive protection structure can shield the crosstalk current caused by the contact between the vapor deposition edges of the organic functional layers of adjacent sub-pixels, and avoid crosstalk defects.
  • the projection of the at least one conductive portion on the base substrate overlaps with the projection of the light-emitting layers of the two sub-pixels on the base substrate, and does not overlap with the projection of the opening of the pixel definition layer on the base substrate .
  • the projection of at least one conductive portion and the portion of the light-emitting element of the sub-pixel used for light-emitting on the base substrate does not overlap, so as to avoid affecting the normal light-emitting of the light-emitting element.
  • this embodiment does not limit this.
  • the projection of the at least one conductive portion on the base substrate may not overlap with the projection of the light-emitting layer of the sub-pixel on the base substrate.
  • the light-emitting layers of the two sub-pixels overlap, and the projection of the at least one conductive portion on the base substrate overlaps the projection of the overlapping portion of the light-emitting layers of the two sub-pixels on the base substrate.
  • the light-emitting layers of adjacent sub-pixels may overlap, and the disposition position of at least one conductive portion in the pixel definition layer may correspond to the overlapping position of the light-emitting layers of adjacent sub-pixels.
  • this embodiment does not limit this.
  • the conductive protection structure may be electrically connected to the signal terminal through the second electrode of the light emitting element.
  • the second electrode of the light-emitting element is electrically connected to a low-potential power supply line (or a ground signal line), and a constant potential can be provided, then by connecting the conductive protection structure and the second electrode of the light-emitting element, the conductive protection structure can be maintained. at a constant potential.
  • this embodiment does not limit this.
  • the voltage value of the signal terminal may be located between the minimum voltage value of the second electrode and the maximum voltage value of the first electrode of the light emitting element.
  • the voltage value of the signal terminal may be greater than or equal to the minimum voltage value of the second electrode and less than the maximum voltage value of the first electrode.
  • this embodiment does not limit this.
  • the voltage value of the signal terminal can be determined according to the display effect.
  • the conductive protective structure is a mesh structure formed by at least one conductive portion.
  • the mesh structure includes at least one grid surrounding the light-emitting portion of the light-emitting element of one sub-pixel, or surrounding the light-emitting portion of the light-emitting elements of a plurality of adjacent sub-pixels of the same color.
  • this embodiment does not limit this.
  • the conductive protection structure is a multi-row and multi-column intersecting structure formed by a plurality of conductive parts; or, the conductive protection structure is a multi-column strip-shaped structure formed by a plurality of conductive parts.
  • the plurality of sub-pixels within the display area are arranged in the following manner: a repetition of two first-color sub-pixels, one second-color sub-pixel, and one third-color sub-pixel in the first direction
  • two sub-pixels of the first color are arranged in a second direction perpendicular to the first direction, and the interval of sub-pixels of the same color in the first direction is approximately equal to 1 to 2 times the width of the sub-pixels.
  • the spacing of sub-pixels of the same color in the first direction is approximately equal to 1.5 times the width of the sub-pixels.
  • the light-emitting elements of two adjacent first-color sub-pixels are surrounded by a grid of conductive protective structures, and the light-emitting elements of a second-color sub-pixel are surrounded by a grid of conductive protective structures.
  • a portion of the light-emitting element of a third-color sub-pixel for emitting light is surrounded by a grid of conductive protective structures.
  • at least one grid of the conductive protection structure surrounds the light-emitting portion of the light-emitting elements of two adjacent first-color sub-pixels, or surrounds the light-emitting portion of one second-color sub-pixel light-emitting elements, or,
  • the light-emitting element surrounding one sub-pixel of the third color is used to emit light.
  • the first direction may be the row direction and the second direction may be the column direction.
  • the first direction may be the column direction
  • the second direction may be the row direction.
  • the first color subpixel may be a green (G) subpixel
  • the second color subpixel may be a red (R) subpixel
  • the third color subpixel may be a blue (B) subpixel. That is, a plurality of sub-pixels in the display area may be arranged in a GGRB pattern.
  • at least one mesh of the conductive protective structure of the mesh structure surrounds the portion for light-emitting of the light-emitting elements of one or two adjacent sub-pixels of the same color.
  • the present embodiment does not limit the arrangement of the plurality of sub-pixels in the display area.
  • the plurality of sub-pixels within the display area may be arranged in an RGB pattern.
  • each row is arranged in repeating units of one red sub-pixel, one green sub-pixel and one blue sub-pixel, and the sub-pixels in each column have the same color.
  • the plurality of sub-pixels of the display area may be arranged in a PenTile pattern.
  • each pixel unit may include a red sub-pixel and a green sub-pixel, or a blue sub-pixel and a green sub-pixel, and each pixel unit may use another color sub-pixel of its adjacent pixel unit to form three primary colors.
  • the signal terminal provides a constant potential. That is, the conductive protection structure is connected to a constant potential.
  • the voltage value of the constant potential may be greater than or equal to the minimum voltage value of the cathode of the light-emitting element and less than the maximum voltage value of the anode.
  • the base substrate further includes: a peripheral area located at the periphery of the display area, the peripheral area is provided with at least one constant voltage signal line, and the conductive protection structure is connected to the signal terminal through the at least one constant voltage signal line electrical connection.
  • the at least one conductive portion of the conductive protection structure may be connected to the at least one constant voltage signal line in the peripheral region through at least one connection electrode.
  • the constant voltage signal line may be a low-voltage power supply line (VSS), or a ground signal line, or various types of voltage lines, as long as the voltage value of the constant potential provided by the constant voltage signal line is greater than or equal to the light-emitting element
  • the minimum voltage value of the second electrode can be smaller than the maximum voltage value of the first electrode.
  • the above-mentioned signal terminal may include: a binding electrode receiving a ground signal.
  • the constant voltage signal line may be connected to a binding electrode connected to a ground signal provided in the binding area on one side of the display area, and the conductive protection structure is connected to the constant voltage signal line to achieve grounding.
  • this embodiment does not limit this.
  • FIG. 1 is a schematic diagram of a display substrate according to at least one embodiment of the disclosure.
  • the display substrate of this embodiment includes: a display area A and a non-display area around the display area A.
  • the non-display area includes a peripheral area B located at the periphery of the display area A, and a binding area (not shown) located on one side of the display area A.
  • the display area A is provided with at least a plurality of sub-pixels, and at least one sub-pixel in the plurality of sub-pixels includes a light-emitting element and a driving circuit for driving the light-emitting element to emit light.
  • the binding area at least includes a binding circuit for connecting the signal lines of the plurality of sub-pixels to the external driving device.
  • the bonding circuit may include a plurality of bonding electrodes bonded to an external circuit board.
  • the peripheral region B at least includes signal lines for transmitting voltage signals to a plurality of sub-pixels, for example, a low-potential power supply line (VSS).
  • VSS low-potential power supply line
  • the present exemplary embodiment does not limit the size and resolution of the display substrate.
  • the size of the display substrate may be a micro display size, a small or medium size, or a large size.
  • the resolution of the display substrate may be at least one of the following: 960 ⁇ 540, 1920 ⁇ 1080, 2560 ⁇ 1440, 3840 ⁇ 2160, 7680 ⁇ 4320.
  • FIG. 2 is a schematic structural diagram of a plurality of sub-pixels in a display area according to at least one embodiment of the present disclosure.
  • FIG. 2 is a partial enlarged schematic diagram of the area S in FIG. 1 .
  • FIG. 3 is a schematic cross-sectional view along the P-P direction in FIG. 2 .
  • a plurality of sub-pixels in the display area are arranged in the following manner: two first-color sub-pixels 21 on each row, one The second-color sub-pixels 22 and one third-color sub-pixel 23 are arranged in repeating units, the two first-color sub-pixels 21 in the repeating unit are arranged in the column direction, and the spacing of the same color sub-pixels in the row direction is approximately equal to 1.5 times the sub-pixel width.
  • the widths of the first color subpixels 21 , the second color subpixels 22 and the third color subpixels 23 in the row direction may be the same.
  • the repeating unit between two adjacent rows has a displacement in the row direction by a distance of 1.5 times the sub-pixel width.
  • the two first-color sub-pixels 21 may be respectively pentagons (eg, rounded pentagons), the two first-color sub-pixels 21 are symmetrical with each other, and the axis of symmetry is parallel to the row direction.
  • the second-color sub-pixels 22 and the third-color sub-pixels 23 are respectively hexagonal (eg, rounded hexagons). The lengths of the second color subpixels 22 and the third color subpixels 23 in the column direction may be the same.
  • the length of the first color subpixels 21 in the column direction may be smaller than the lengths of the second color subpixels 22 and the third color subpixels 23 .
  • the first color subpixel 21 may be a green (G) subpixel
  • the second color subpixel 22 may be a red (R) subpixel
  • the third color subpixel 23 may be a blue (B) subpixel .
  • This embodiment does not limit the shape and arrangement of the plurality of sub-pixels in the display area.
  • the display area is further provided with a conductive protection structure 32 in the form of a mesh structure.
  • the conductive protection structure 32 of the mesh structure may be formed by connecting a plurality of conductive parts (for example, including a first conductive part 321 , a second conductive part 322 , a third conductive part 323 and a fourth conductive part 324 ), and the plurality of conductive parts are located in the The interval between the light-emitting elements of adjacent sub-pixels of different colors, respectively, for light-emitting portions.
  • the light-emitting element of the sub-pixel is located in the portion of the opening 301 of the pixel definition layer for light-emitting.
  • two column directions within one repeating unit are disposed at the interval between the light-emitting portion of the first color sub-pixel 21 and the light-emitting portion of the adjacent second color sub-pixel 22
  • the first conductive part 321 ; the second conductive part 322 is provided at the interval between the light-emitting part of the second color sub-pixel 22 and the light-emitting part of the adjacent third-color sub-pixel 23 .
  • third conductive parts 323 are disposed between adjacent repeating units.
  • fourth conductive parts 324 are disposed between repeating units of adjacent rows.
  • the light-emitting parts of the light-emitting elements of the two first-color sub-pixels 21 are connected as a whole by the first conductive portion 321 , the third conductive portion 323 and the fourth conductive portion 324 on the upper and lower sides.
  • the part of the light-emitting element of a second color sub-pixel 22 for emitting light is surrounded by the first conductive part 321, the second conductive part 322 and the fourth conductive part 324 on the upper and lower sides, and a third color sub-pixel 23
  • the part of the light-emitting element used to emit light is surrounded by the second conductive part 322, the third conductive part 323 and the fourth conductive part 324 on the upper and lower sides.
  • the light-emitting parts of the light-emitting elements of the two first-color sub-pixels 21 are surrounded by one grid of the mesh structure, and the light-emitting elements of the second-color sub-pixels 22 are used for light-emitting parts by a
  • the grid is surrounded, and the part of the light-emitting element of the third color sub-pixel 23 for emitting light is surrounded by a grid.
  • the light-emitting elements of adjacent sub-pixels of different colors are separated by conductive parts, thereby reducing carrier transfer between adjacent sub-pixels of different colors, avoiding current crosstalk, and improving display effects.
  • the grid formed by the connection of the plurality of conductive parts surrounding the portion of the light-emitting element of the sub-pixel for light emission may have a hexagonal shape.
  • this embodiment does not limit this.
  • a grid formed by connecting a plurality of conductive parts and surrounding a part of the light-emitting element of the sub-pixel used for light-emitting may be in other shapes such as a rectangle or a pentagon.
  • the sizes of the conductive parts at different positions of the display area may be the same, for example, the lengths of the conductive parts may be the same in a direction perpendicular to the extending direction of the conductive parts.
  • the display area is further provided with a plurality of spacer pillars 34 .
  • the spacer posts 34 may act as a support layer configured to support the FMM during the evaporation process.
  • a repeating unit is spaced between two adjacent spacer columns 34 .
  • the present embodiment does not limit the installation position of the spacer column.
  • the display area includes: a driving structure layer disposed on the base substrate 10 , and the driving structure layer is disposed away from the base substrate 10 - The light emitting structure layer on the side and the conductive protection structure.
  • the driving structure layer includes a plurality of driving circuits
  • the light-emitting structure layer includes a plurality of light-emitting elements
  • the plurality of light-emitting elements are connected to the plurality of driving circuits in one-to-one correspondence.
  • Each driver circuit includes a plurality of transistors and at least one storage capacitor, and may be of a 2T1C, 3T1C, 5T1C or 7T1C design, for example.
  • FIG. 3 takes three sub-pixels as an example for illustration, and the driving circuit of each sub-pixel only takes one transistor and one storage capacitor as an example for illustration.
  • At least one light emitting element includes: first electrodes (eg, the first anode 213 , the second anode 223 or the first electrode 213 , the second anode 223 or the triple anode 233), hole injection layer 241, hole transport layer 242, light emitting layer (eg, first color light emitting layer 216, second color light emitting layer 226, or third color light emitting layer 236), electron transport layer 243, and third color light emitting layer 236 Two electrodes 244 .
  • the display area is further provided with a pixel definition layer 30 , which is provided on the side of the driving structure layer away from the base substrate 10 .
  • the pixel definition layer 30 includes: a plurality of sub-pixel definition parts 302, pixel definition layer openings are formed between adjacent sub-pixel definition parts 302, and a light-emitting element is located in the part of the pixel definition layer opening for emitting light.
  • the conductive protection structure (for example, including the first conductive part 321 , the second conductive part 322 and the third conductive part 323 shown in FIG. 3 ) is disposed on the side of the sub-pixel definition part 302 away from the base substrate 10 , and the conductive protection structure can be It is in direct contact with the sub-pixel definition part 302 .
  • the projection of the sub-pixel definition portion 302 on the base substrate 10 covers the projection of the conductive protection structure on the base substrate 10 .
  • the projection of the conductive protection structure on the base substrate 10 does not overlap with the projection of the opening of the pixel definition layer on the base substrate.
  • a plurality of first electrodes are disposed on the side of the driving structure layer away from the base substrate 10, and one first electrode is electrically connected to a driving circuit of the driving structure layer, and the pixel definition layer opening of the pixel definition layer 30 exposes the first electrode.
  • the hole injection layer 241 , the hole transport layer 242 , the electron transport layer 243 and the second electrode 244 are common layers of the plurality of light-emitting elements, are disposed in the plurality of pixel definition layer openings, and extend to cover the plurality of sub-pixel definition portions 302 .
  • the light emitting layer may cover the opening of the pixel definition layer and a portion of the sub-pixel definition portion around the opening of the pixel definition layer.
  • the second electrode 244 is disposed on the side of the electron transport layer 243 away from the base substrate 10 and covers the electron transport layer 243 .
  • the first-color light-emitting layer 216 and the second-color light-emitting layer 226 are in direct contact, and the first-color light-emitting layer 216 and the second-color light-emitting layer 216 are in direct contact with each other.
  • the projections of the light emitting layer 216 on the base substrate 10 do not overlap.
  • the second-color light-emitting layer 226 and the third-color light-emitting layer 236 are in direct contact, and the projections of the second-color light-emitting layer 226 and the third-color light-emitting layer 236 on the base substrate 10 do not overlap.
  • the projection of the first conductive portion 321 on the base substrate 10 overlaps with the projection of the first color light emitting layer 216 and the second color light emitting layer 226 on the base substrate 10 .
  • the projection of the second conductive portion 322 on the base substrate 10 overlaps with the projection of the second color light emitting layer 226 and the third color light emitting layer 236 on the base substrate 10 .
  • the projection of the at least one third conductive portion 323 on the base substrate 10 overlaps the projection of the third color light-emitting layer 236 .
  • the projections of the first conductive portion 321 , the second conductive portion 322 and the third conductive portion 323 on the base substrate 10 do not overlap with the opening of the pixel definition layer.
  • the first conductive portion 321 is located in a middle region where the sub-pixel definition portion 302 is located away from the upper surface of the base substrate 10 .
  • this embodiment does not limit this.
  • the first conductive portion 321 may be located in a region of the sub-pixel definition portion 302 away from the upper surface of the base substrate 10 and close to the first color light emitting layer 216 or a region close to the second color light emitting layer 226 .
  • the arrangement positions of the second conductive portion 322 and the third conductive portion 323 may be similar to the arrangement positions of the first conductive portion 321 , and thus will not be repeated here.
  • FIG. 4 is a schematic diagram of electrical connection of a conductive protection structure of a display substrate according to at least one embodiment of the disclosure.
  • a constant voltage signal line 51 providing a constant potential is provided in the peripheral region B.
  • At least one conductive portion located at the outer edge of the conductive protection structure 32 may be electrically connected to the constant voltage signal line 51 in the peripheral region B through one or more connection electrodes 61 .
  • at least one conductive portion on the side of the conductive protection structure 32 near the upper edge of the display area A may be electrically connected to the constant voltage signal line 51 in the peripheral area B through a plurality of connection electrodes 61 .
  • this embodiment does not limit this.
  • the conductive portion located at the left or right edge of the conductive protection structure 32 near the display area A may be electrically connected to the constant voltage signal line 51 of the peripheral area B through one or more connection electrodes 61 .
  • the connection electrode 61 may include the second electrode of the light emitting element.
  • the conductive protection structure 32 can be connected to the constant voltage signal line 51 in the peripheral region B through the second electrode, so as to shield the crosstalk current between adjacent light emitting elements.
  • the constant voltage signal line 51 in the peripheral area B can be connected to a binding electrode receiving a ground signal in the binding circuit of the binding area, and the conductive protection structure 32 is electrically connected to the constant voltage signal line 51, which can realize conductive protection Structure 32 is grounded.
  • the constant voltage signal line may be a voltage line that provides other potentials, as long as the voltage value of the constant potential provided by the constant voltage signal line is greater than or equal to the minimum voltage value of the cathode of the light-emitting element and less than the maximum voltage value of the anode .
  • the constant voltage signal line may be a low potential power line (VSS or VGL) or the like.
  • the first anode 213 of the first color sub-pixel 21 receives the driving generated by the corresponding driving circuit
  • the second anode 223 of the adjacent second color sub-pixel 22 does not receive the driving current generated by the corresponding driving circuit.
  • the hole injection layer 241 is a common layer of a plurality of sub-pixels, the holes flowing out of the first anode 213 of the first color sub-pixel 21 will flow to the adjacent second-color sub-pixels 22 through the common layer.
  • the resistivity of the conductive protection structure 32 is smaller than that of the hole injection layer 241 .
  • the holes flowing out of the first anode 213 of the first color sub-pixel 21 will flow to the conductive protection structure 32 with lower resistivity, and flow to the ground terminal or other constant potential through the conductive protection structure 32
  • the signal terminal does not flow to the light-emitting layer of the second color sub-pixel 22, which can prevent the light-emitting layer of the second color sub-pixel 22 from emitting light under the action of the second electrode and the hole injection layer as a common layer.
  • All the conductive protection structures can play the role of shielding the crosstalk current.
  • the structure of the display substrate according to the embodiment of the present disclosure will be described below by using an example of a preparation process of the display substrate.
  • the "patterning process” referred to in the present disclosure includes processes such as depositing film layers, coating photoresist, mask exposure, developing, etching and stripping photoresist.
  • Deposition can be selected from any one or more of sputtering, evaporation and chemical vapor deposition, coating can be selected from any one or more of spray coating and spin coating, and etching can be selected from dry etching. and any one or more of wet engraving.
  • “Film” refers to a layer of thin film made by depositing or coating a certain material on a substrate.
  • the "film” can also be referred to as a "layer”.
  • the "film” needs a patterning process during the entire production process, it is called a “film” before the patterning process, and a “layer” after the patterning process.
  • the “layer” after the patterning process contains at least one "pattern”.
  • a and B are arranged in the same layer means that A and B are simultaneously formed through the same patterning process.
  • the same layer does not always mean that the thickness of the layer or the height of the layer is the same in the cross-sectional view.
  • the projection of A includes the projection of B means that the projection of B falls within the projection range of A, or the projection of A covers the projection of B.
  • the preparation process of the display substrate of this embodiment may include the following steps (1) to (9).
  • a flexible display substrate with a top emission structure is taken as an example for description.
  • 5 to 13 are schematic cross-sectional views along the P-P direction in FIG. 2 .
  • the base substrate 10 may be a flexible base substrate, for example, including a first flexible material layer, a first inorganic material layer, a semiconductor layer, and a second flexible material layer stacked on the glass carrier 1 and the second inorganic material layer.
  • the materials of the first flexible material layer and the second flexible material layer are polyimide (PI), polyethylene terephthalate (PET), or a surface-treated soft polymer film.
  • the materials of the first inorganic material layer and the second inorganic material layer are silicon nitride (SiNx) or silicon oxide (SiOx), etc., which are used to improve the water and oxygen resistance of the substrate.
  • the layer is also referred to as a barrier layer.
  • the material of the semiconductor layer is amorphous silicon (a-si).
  • the preparation process includes: firstly coating a layer of polyimide on the glass carrier 1, and curing to form a film Then, a first flexible (PI1) layer is formed; then a barrier film is deposited on the first flexible layer to form a first barrier (Barrier1) layer covering the first flexible layer; then an amorphous layer is deposited on the first barrier layer A silicon film to form an amorphous silicon (a-si) layer covering the first barrier layer; then a layer of polyimide is coated on the amorphous silicon layer, and a second flexible (PI2) layer is formed after curing into a film; Then, a barrier film is deposited on the second flexible layer to form a second barrier (Barrier 2 ) layer covering the second flexible layer to complete the preparation of the base substrate 10 , as shown in FIG. 5 .
  • the driving structure layer includes a plurality of driving circuits, each of which includes a plurality of transistors and at least one storage capacitor, such as a 2T1C, 3T1C or 7T1C design. As shown in FIG. 6 , three sub-pixels are taken as an example for illustration, and the driving circuit of each sub-pixel is only illustrated by taking one transistor and one storage capacitor as an example.
  • the preparation process of the driving structure layer may refer to the following description.
  • the manufacturing process of the driving circuit of the first color sub-pixel 21 is taken as an example for description.
  • a first insulating film and an active layer film are sequentially deposited on the base substrate 10, and the active layer film is patterned through a patterning process to form a first insulating layer 11 covering the entire base substrate 10, and a first insulating layer 11 disposed on the first insulating layer
  • the active layer pattern on 11, the active layer pattern includes at least the first active layer.
  • a second insulating film and a first metal film are sequentially deposited, and the first metal film is patterned through a patterning process to form a second insulating layer 12 covering the pattern of the active layer, and a first insulating layer 12 disposed on the second insulating layer 12
  • a gate metal layer pattern, the first gate metal layer pattern at least includes a first gate electrode and a first capacitor electrode.
  • a third insulating film and a second metal film are sequentially deposited, and the second metal film is patterned through a patterning process to form a third insulating layer 13 covering the first gate metal layer, and a third insulating layer 13 disposed on the third insulating layer 13
  • the second gate metal layer pattern at least includes a second capacitor electrode, and the position of the second capacitor electrode corresponds to the position of the first capacitor electrode.
  • a fourth insulating film is deposited, and the fourth insulating film is patterned by a patterning process to form a fourth insulating layer 14 pattern covering the second gate metal layer, and at least two first via holes are opened on the fourth insulating layer 14,
  • the fourth insulating layer 14, the third insulating layer 13 and the second insulating layer 12 in the two first via holes are etched away, exposing the surface of the first active layer.
  • a third metal film is deposited, the third metal film is patterned through a patterning process, and a source-drain metal layer pattern is formed on the fourth insulating layer 14, and the source-drain metal layer at least includes the first source electrode and the first source electrode located in the display area. drain electrode.
  • the first source electrode and the first drain electrode may be connected to the first active layer through first via holes, respectively.
  • the first active layer, the first gate electrode, the first source electrode and the first drain electrode can form the first transistor 210, the first capacitor The electrode and the second capacitor electrode may constitute the first storage capacitor 212 .
  • the driving circuit of the second color sub-pixel 22 and the driving circuit of the third color sub-pixel 23 can be formed at the same time.
  • the first insulating layer 11 , the second insulating layer 12 , the third insulating layer 13 and the fourth insulating layer 14 are silicon oxide (SiOx), silicon nitride (SiNx) and silicon oxynitride ( Any one or more of SiON), which may be a single layer, a multi-layer or a composite layer.
  • the first insulating layer 11 is called a buffer layer, which is used to improve the water and oxygen resistance of the base substrate;
  • the second insulating layer 12 and the third insulating layer 13 are called gate insulating (GI, Gate Insulator) layers;
  • the fourth insulating layer 14 is called an interlayer insulating (ILD, Interlayer Dielectric) layer.
  • the first metal film, the second metal film and the third metal film are made of metal materials, such as any one or more of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti) and molybdenum (Mo).
  • metal materials such as any one or more of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti) and molybdenum (Mo).
  • Various, or alloy materials of the above metals such as aluminum neodymium alloy (AlNd) or molybdenum niobium alloy (MoNb), can be a single-layer structure, or a multi-layer composite structure, such as Ti/Al/Ti and the like.
  • the active layer film is made of amorphous indium gallium zinc oxide (a-IGZO), zinc oxynitride (ZnON), indium zinc tin oxide (IZTO), amorphous silicon (a-Si), polycrystalline silicon (p-Si), One or more materials such as hexathiophene and polythiophene, that is, the present disclosure is applicable to transistors manufactured based on oxide technology, silicon technology and organic matter technology.
  • a-IGZO amorphous indium gallium zinc oxide
  • ZnON zinc oxynitride
  • IZTO indium zinc tin oxide
  • a-Si amorphous silicon
  • p-Si polycrystalline silicon
  • One or more materials such as hexathiophene and polythiophene, that is, the present disclosure is applicable to transistors manufactured based on oxide technology, silicon technology and organic matter technology.
  • a planar thin film of organic material is coated on the base substrate 10 on which the aforementioned patterns are formed, to form a planarization (PLN, Planarization) layer 15 covering the entire base substrate 10, and through masking, exposure, In the developing process, a plurality of second via holes K2 are formed on the flat layer 15 in the display area, as shown in FIG. 7 .
  • PPN Planarization
  • the flat layer 15 in the plurality of second via holes K2 is developed and removed, respectively exposing the surface of the first drain electrode of the first transistor 210 of the driving circuit of the first color sub-pixel 21 and the driving circuit of the second color sub-pixel 22 The surface of the first drain electrode of the first transistor and the surface of the first drain electrode of the first transistor of the driving circuit of the third color sub-pixel 23 .
  • the first electrode is a reflective anode.
  • a conductive thin film is deposited on the base substrate 10 on which the aforementioned patterns are formed, and the conductive thin film is patterned through a patterning process to form the first electrode pattern.
  • the first anode 213 of the first color sub-pixel 21 is connected to the first drain electrode of the first transistor 210 through the second via hole K2, and the second anode 223 of the second color sub-pixel 22 is connected through the second through hole K2.
  • the hole K2 is connected to the first drain electrode of the first transistor of the second color sub-pixel 22, and the third anode 233 of the third color sub-pixel 23 is connected to the first drain electrode of the first transistor of the third color sub-pixel 23 through the second via K2.
  • a drain electrode is connected.
  • the first electrode may employ a metallic material, such as any one or more of magnesium (Mg), silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo).
  • a metallic material such as any one or more of magnesium (Mg), silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo).
  • Various, or alloy materials of the above metals such as aluminum neodymium alloy (AlNd) or molybdenum niobium alloy (MoNb) can be a single-layer structure, or a multi-layer composite structure, such as Ti/Al/Ti, etc., or, a metal and Stacked structures formed of transparent conductive materials, such as reflective materials such as ITO/Ag/ITO, Mo/AlNd/ITO, etc.
  • a pixel definition layer (PDL, Pixel Definition Layer) pattern is formed.
  • a pixel definition film is coated on the base substrate 10 on which the aforementioned pattern is formed, and a pixel definition layer pattern is formed by masking, exposing, and developing processes.
  • the pixel definition layer 30 in the display area includes a plurality of sub-pixel definition parts 302 , a plurality of pixel definition layer openings 301 are formed between adjacent sub-pixel definition parts 302 , and the pixels in the plurality of pixel definition layer openings 301 are formed.
  • the definition layer 30 is developed away, exposing at least part of the surface of the first anode 213 of the first color sub-pixel 21 , at least part of the surface of the second anode 223 of the second color sub-pixel 22 , and the third color sub-pixel 23 , respectively. At least part of the surface of the triple anode 233 .
  • the pixel definition layer 30 may employ polyimide, acrylic, polyethylene terephthalate, or the like.
  • a thin film of organic material is coated on the base substrate 10 formed with the aforementioned pattern, and a pattern of spacer pillars 34 is formed through masking, exposing and developing processes, as shown in FIG. 10 .
  • the spacer posts 34 may act as a support layer configured to support the FMM during the evaporation process.
  • a repeating unit is spaced between two adjacent spacer columns 34 .
  • the spacer columns 34 may be located in adjacent first spacers 34 . Between the color sub-pixel 21 and the third color sub-pixel 23 .
  • a conductive protection structure is formed on the base substrate on which the pattern is formed.
  • a conductive thin film is deposited on the base substrate 10 on which the aforementioned patterns are formed, and the conductive thin film is patterned through a patterning process to form a conductive protection structure pattern, as shown in FIG. 11 .
  • the conductive protection structure 32 includes a plurality of conductive parts (eg, including a first conductive part 321 , a second conductive part 322 , a third conductive part 323 and a fourth conductive part 324 ), and the plurality of conductive parts are connected to form a mesh structure. In some examples, as shown in FIG.
  • the parts of the light-emitting elements of the two first-color sub-pixels 21 for emitting light are surrounded by the first conductive part 321 , the third conductive part 323 and the fourth conductive part 324 as a whole
  • the part of the light-emitting element of the second color sub-pixel 22 for emitting light is surrounded by the first conductive part 321, the second conductive part 322 and the fourth conductive part 324
  • the part of the light-emitting element of the third color sub-pixel 23 used to emit light is surrounded by The second conductive part 322 , the third conductive part 323 and the fourth conductive part 324 are surrounded.
  • At least one third conductive portion 323 is located on the spacer column 34 or the sub-pixel definition portion 302 between adjacent third-color sub-pixels 23 and first-color sub-pixels 21 , and the first The conductive portion 321 is located on the sub-pixel definition portion 302 between the adjacent first-color sub-pixels 21 and the second-color sub-pixels 22 , and the second conductive portion 322 is located on the adjacent second-color sub-pixels 22 and the third-color sub-pixels 22 .
  • the projection of the conductive protection structure 32 on the base substrate 10 is located within the projection of the sub-pixel definition portion 302 on the base substrate 10 .
  • the projection of the conductive protection structure 32 on the base substrate 10 does not overlap with the projection of the pixel definition layer opening 301 on the base substrate 10, and the conductive protection structure 32 does not overlap with the plurality of first electrodes (eg, the first anode 213, the The connection between the second anode 223 and the third anode 233) does not affect the normal display of the light-emitting element.
  • the conductive protection structure may employ a metal material such as any one or more of silver (Ag), gold (Au), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo).
  • a metal material such as any one or more of silver (Ag), gold (Au), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo).
  • Multiple, or alloy materials of the above metals such as aluminum neodymium alloy (AlNd) or molybdenum niobium alloy (MoNb), or transparent conductive materials, such as indium tin oxide (ITO) or indium zinc oxide (IZO), can be single A layered structure, or a multi-layer composite structure, such as a multi-layer metal composite structure, such as Ti/Al/Ti, etc., or a composite structure of a transparent conductive material and a metal material, for example, ITO (thickness ranging from 5 nanometers (nm) to 20
  • the conductive protection structure is connected to a signal terminal that provides a constant potential.
  • the conductive protection structure enables the crosstalk current generated by the common layer of the light-emitting elements to flow to the signal terminal, and shields the crosstalk current between the light-emitting elements of adjacent sub-pixels, thereby improving the color display accuracy.
  • the conductive protection structure is a mesh structure, by connecting the conductive portion of the outer edge of the conductive protection structure with the signal terminal, the entire conductive protection structure can be connected to the signal terminal.
  • the conductive portion of the outer edge of the conductive protection structure can be connected to a constant voltage signal line that provides a constant potential in the peripheral region through the connection electrode.
  • the constant voltage signal line can be connected to the binding electrode in the binding circuit of the binding area that receives the ground signal, and the conductive protection structure realizes grounding by connecting the constant voltage signal line.
  • the connection electrode and the constant voltage signal line may be disposed in the same layer as the source-drain metal layer, and the connection electrode and the constant voltage signal line are electrically connected; the conductive part is connected to the via hole opened on the pixel definition layer and the flat layer.
  • the connection electrodes realize electrical connection. However, this embodiment does not limit this.
  • an organic functional layer and a second electrode are sequentially formed.
  • the second electrode is a transparent cathode.
  • the light-emitting element can emit light from the side away from the base substrate 10 through the transparent cathode to realize top emission.
  • the organic functional layers of the light emitting element include: a hole injection layer, a hole transport layer, a light emitting layer, and an electron transport layer.
  • the hole injection layer 241 and the hole transport layer 242 are sequentially formed by vapor deposition on the base substrate 10 on which the aforementioned patterns are formed by using an open mask, and then the hole injection layer 241 and the hole transport layer 242 are sequentially vapor deposited by using FMM
  • the blue light-emitting layer 236 , the green light-emitting layer 216 and the red light-emitting layer 226 are formed, and then the electron transport layer 243 and the second electrode 244 are formed by successive evaporation using an open mask, as shown in FIG. 12 .
  • the hole injection layer 241 , the hole transport layer 242 , the electron transport layer 243 and the second electrode 244 are all common layers of a plurality of sub-pixels.
  • the organic functional layer may further include: a microcavity adjustment layer between the hole transport layer and the light emitting layer.
  • FMM can be used to sequentially evaporate a blue microcavity adjusting layer, a blue light-emitting layer, a green microcavity adjusting layer, a green light-emitting layer, a red microcavity adjusting layer, and a red light-emitting layer.
  • the organic functional layer is formed in the sub-pixel region to realize the connection between the organic functional layer and the first electrode.
  • the second electrode is formed on the pixel definition layer and connected to the organic functional layer.
  • the second electrode may be made of any one or more of magnesium (Mg), silver (Ag), aluminum (Al), or any one or more of the foregoing metals alloys, or using transparent conductive materials, such as indium tin oxide (ITO), or a multi-layer composite structure of metals and transparent conductive materials.
  • Mg magnesium
  • Ag silver
  • Al aluminum
  • ITO indium tin oxide
  • a light coupling layer may be formed on the side of the second electrode 244 away from the base substrate 10 , and the light coupling layer may be a common layer of a plurality of sub-pixels.
  • the light coupling layer can cooperate with the transparent cathode to increase the light output.
  • the material of the light coupling layer can be a semiconductor material. However, this embodiment does not limit this.
  • an encapsulation layer is formed on the base substrate 10 on which the aforementioned patterns are formed, and the encapsulation layer may include a stacked first encapsulation layer 41 , a second encapsulation layer 42 and a third encapsulation layer 43 , as shown in FIG. 13 shown.
  • the first encapsulation layer 41 is made of inorganic material and covers the cathode 244 in the display area.
  • the second encapsulation layer 42 adopts an organic material.
  • the third encapsulation layer 43 is made of inorganic material and covers the first encapsulation layer 41 and the second encapsulation layer 42 .
  • the encapsulation layer may adopt a five-layer structure of inorganic/organic/inorganic/organic/inorganic.
  • the display substrate provided in this embodiment forms a conductive protection structure with a mesh structure on the pixel definition layer, so that the crosstalk current in the common layer with high conductivity of the light-emitting element flows to the conductive protection structure, and the crosstalk current transmitted by the common layer is shielded. Avoid poor crosstalk display, thereby improving the display effect.
  • the structure of the display substrate and the manufacturing process of the display substrate according to the embodiments of the present disclosure are merely illustrative. In some exemplary embodiments, corresponding structures may be changed and patterning processes may be increased or decreased according to actual needs.
  • the display substrate may be a display substrate of a bottom emission structure.
  • the organic functional layer may further include at least one of the following: an electron blocking layer, a hole blocking layer, and an electron injection layer.
  • a common layer may not be provided in the organic functional layer of the light-emitting element.
  • the present disclosure is not limited herein.
  • FIG. 14 is another schematic cross-sectional view along the P-P direction in FIG. 2 .
  • the first-color light-emitting layer 216 and the second-color light-emitting layer 226 overlap, the second-color light-emitting layer 226 and the third-color light-emitting layer 226 overlap
  • the light emitting layers 236 are overlapped.
  • the projection of the first conductive portion 321 on the base substrate 10 overlaps with the projection of the overlapping portion of the first-color light-emitting layer 216 and the second-color light-emitting layer 226 on the base substrate 10 .
  • the projection of the second conductive portion 322 on the base substrate 10 overlaps with the projection of the overlapping portion of the second-color light-emitting layer 226 and the third-color light-emitting layer 236 on the base substrate 10 .
  • FIG. 15 is another schematic diagram of a plurality of sub-pixels in a display area according to at least one embodiment of the disclosure.
  • the plurality of sub-pixels of the display area are arranged in the following manner: one first-color sub-pixel 21, one second-color sub-pixel 22, and one first-color sub-pixel 22 on each row
  • the repeating units of the three-color sub-pixels 23 are arranged; in the column direction, the sub-pixels of each column have the same color.
  • Each subpixel may be rectangular (eg, a rounded rectangle).
  • the sub-pixels of different colors have substantially the same width along the row direction, and the sub-pixels of different colors have substantially the same length along the column direction.
  • the first color subpixel 21 may be a red subpixel
  • the second color subpixel 22 may be a green subpixel
  • the third color subpixel 23 may be a blue subpixel.
  • this embodiment does not limit this.
  • the conductive protection structure includes at least one first conductive part 741 , at least one second conductive part 742 and at least one third conductive part 743 .
  • At least one first conductive part 741 is located in the interval between the light-emitting elements of the adjacent first color sub-pixels 21 and second color sub-pixels 22 respectively used for light-emitting parts;
  • at least one second conductive part 742 is located in the adjacent The interval between the light-emitting elements of the two-color sub-pixel 22 and the third-color sub-pixel 23 respectively used for light-emitting parts;
  • at least one third conductive portion 743 is located in the third-color sub-pixel 23 and the first color in the adjacent repeating units The intervals between the light-emitting elements of the sub-pixels 21 are respectively used for light-emitting portions.
  • the plurality of first conductive parts 741 located in the same column may have an integrated structure, and the multiple first conductive parts 741 located in the same column may have an integrated structure.
  • the second conductive portions 742 may be of an integrated structure, and the plurality of third conductive portions 743 located in the same column may be of an integrated structure to form a plurality of strip-like structures parallel to the column direction.
  • this embodiment does not limit this.
  • only the first conductive part 741 and the second conductive part 742 may be provided when only the monochrome display of the second color sub-pixel needs to be ensured.
  • each strip-like structure of the conductive protection structure may extend to the peripheral area, respectively, and be connected to a constant voltage signal line that provides a constant potential in the peripheral area. However, this embodiment does not limit this.
  • the structure of the display area in the present exemplary embodiment is similar to the corresponding structure described in the previous embodiments, so it is not repeated here.
  • the structures (or methods) shown in this embodiment mode can be appropriately combined with the structures (or methods) shown in other embodiments.
  • FIG. 16 is another schematic diagram of a plurality of sub-pixels in a display area according to at least one embodiment of the disclosure.
  • the plurality of sub-pixels of the display area are arranged in the following manner: one first-color sub-pixel 21, one second-color sub-pixel 22, and one first-color sub-pixel 22 on each row
  • the repeating units of the three-color sub-pixels 23 are arranged; in the column direction, each column of sub-pixels has the same color.
  • Each subpixel may be rectangular (eg, a rounded rectangle).
  • the widths of the sub-pixels of different colors in the row direction are substantially the same, and the lengths of the sub-pixels of different colors in the column direction are substantially the same.
  • the first color subpixel 21 may be a red subpixel
  • the second color subpixel 22 may be a green subpixel
  • the third color subpixel 23 may be a blue subpixel.
  • this embodiment does not limit this.
  • a conductive portion is provided at the interval between the light-emitting elements of any two adjacent sub-pixels, respectively, between the light-emitting portions.
  • a first conductive part 741 is provided at the interval between the light-emitting elements of the adjacent first-color sub-pixels 21 and the second-color sub-pixels 22 respectively used for light-emitting parts, and the adjacent second-color sub-pixels 22 and the third-color sub-pixels 22
  • the second conductive portion 742 is provided at the interval between the light-emitting elements of the sub-pixels 23 for light-emitting, the third-color sub-pixel 23 in one repeating unit and the first-color sub-pixel 21 in the adjacent repeating unit emit light
  • the third conductive portion 743 is provided at the interval between the respective light-emitting portions of the elements.
  • a fourth conductive portion 744 is provided between repeating units of adjacent rows.
  • the plurality of fourth conductive parts 744 located in the same row may have an integrated structure
  • the plurality of first conductive parts 741 located in the same column can be of an integrated structure
  • the plurality of second conductive parts 742 located in the same column can be of an integrated structure
  • the plurality of third conductive parts 743 located in the same column can be of an integrated structure, thereby Form a multi-row and multi-column intersecting structure.
  • the light-emitting element of each sub-pixel is isolated from the light-emitting portion of the light-emitting element adjacent to its four sides by the conductive protection structure, which shields the crosstalk current of adjacent sub-pixels, thereby improving the display effect.
  • the strip-like structures in any row or any column of the conductive protection structure may extend to the peripheral area, and be connected to the constant voltage signal line that provides a constant potential in the peripheral area.
  • this embodiment does not limit this.
  • the structure of the display area in the present exemplary embodiment is similar to the corresponding structure described in the previous embodiments, so it is not repeated here.
  • the structures (or methods) shown in this embodiment mode can be appropriately combined with the structures (or methods) shown in other embodiments.
  • FIG. 17 is another schematic diagram of a plurality of sub-pixels in a display area according to at least one embodiment of the disclosure.
  • a plurality of sub-pixels in the display area are arranged in the following manner: with one first-color sub-pixel 21 , one second-color sub-pixel 22 and one third-color sub-pixel 23 As a repeating unit, sequentially arranged along a first direction (eg, row direction) and a second direction (eg, column direction) perpendicular to the first direction, within one repeating unit, the first color sub-pixel 21 and the second color
  • the sub-pixels 22 are arranged along the second direction
  • the third-color sub-pixels 23 are arranged on one side of the first-color sub-pixels 21 and the second-color sub-pixels 22 .
  • the lengths of the first color sub-pixel 21, the second color sub-pixel 22 and the third color sub-pixel 23 in the first direction are approximately the same, and the lengths of the first color sub-pixel 21 and the second color sub-pixel 22 in the second direction are approximately the same , and is smaller than the length of the third color sub-pixel 23 along the second direction.
  • the first color subpixel 21 may be a blue subpixel
  • the second color subpixel 22 may be a red subpixel
  • the third color subpixel 23 may be a green subpixel.
  • this embodiment does not limit this.
  • the conductive protection structure 32 includes at least one conductive portion located at an interval between light-emitting portions of the light-emitting elements of at least two adjacent sub-pixels.
  • the conductive protection structure 32 is formed with a plurality of meshes.
  • At least one grid can be rectangular.
  • At least one grid surrounds a portion of the light-emitting element of a first-color sub-pixel 21 for emitting light, or a portion of a light-emitting element of a second-color sub-pixel 22 for light-emitting, or surrounds a portion of a third-color sub-pixel 23 that emits light
  • the element is used for the part that emits light.
  • the portion of the light-emitting element of any sub-pixel used to emit light is the portion located in the opening 301 of the pixel definition layer.
  • the structure of the display area in the present exemplary embodiment is similar to the corresponding structure described in the previous embodiments, so it is not repeated here.
  • the structures (or methods) shown in this embodiment mode can be appropriately combined with the structures (or methods) shown in other embodiments.
  • FIG. 18 is another schematic diagram of a plurality of sub-pixels in a display area according to at least one embodiment of the disclosure.
  • a plurality of sub-pixels of the display area are arranged in the following manner: with one first-color sub-pixel 21 , one second-color sub-pixel 22 and one third-color sub-pixel 23 As a repeating unit, they are sequentially arranged in the row direction, and the interval of the sub-pixels of the same color in the row direction is approximately equal to twice the width of the sub-pixels.
  • the first color sub-pixel 21 , the second color sub-pixel 22 and the third color sub-pixel 23 have substantially the same length in the row direction and substantially the same length in the column direction.
  • the first color subpixel 21 may be a blue subpixel
  • the second color subpixel 22 may be a red subpixel
  • the third color subpixel 23 may be a green subpixel.
  • this embodiment does not limit this.
  • the conductive protection structure 32 includes at least one conductive portion located at an interval between light-emitting portions of the light-emitting elements of at least two adjacent sub-pixels.
  • the conductive protection structure 32 is formed with a plurality of meshes.
  • At least one grid can be rectangular.
  • At least one grid surrounds a portion of the light-emitting element of a first-color sub-pixel 21 for emitting light, or a portion of a light-emitting element of a second-color sub-pixel 22 for light-emitting, or surrounds a portion of a third-color sub-pixel 23 that emits light
  • the element is used for the part that emits light.
  • the portion of the light-emitting element of any sub-pixel used to emit light is the portion located in the opening 301 of the pixel definition layer.
  • the structure of the display area in the present exemplary embodiment is similar to the corresponding structure described in the previous embodiments, so it is not repeated here.
  • the structures (or methods) shown in this embodiment mode can be appropriately combined with the structures (or methods) shown in other embodiments.
  • FIG. 19 is another schematic diagram of a plurality of sub-pixels in a display area according to at least one embodiment of the disclosure.
  • a plurality of sub-pixels in the display area are arranged in the following manner: with one first-color sub-pixel 21 , one second-color sub-pixel 22 and one third-color sub-pixel 23 As a repeating unit, they are sequentially arranged in the row direction, and the interval of the sub-pixels of the same color in the row direction is approximately equal to 1.5 times the width of the sub-pixels.
  • the first color sub-pixel 21 , the second color sub-pixel 22 and the third color sub-pixel 23 have substantially the same length in the row direction and substantially the same length in the column direction.
  • the first color subpixel 21 may be a red subpixel
  • the second color subpixel 22 may be a blue subpixel
  • the third color subpixel 23 may be a green subpixel.
  • this embodiment does not limit this.
  • the conductive protection structure 32 includes at least one conductive portion located at an interval between light-emitting portions of the light-emitting elements of at least two adjacent sub-pixels.
  • the conductive protection structure 32 is formed with a plurality of meshes.
  • At least one grid is rectangular or square.
  • At least one grid surrounds a portion of the light-emitting element of a first-color sub-pixel 21 for emitting light, or a portion of a light-emitting element of a second-color sub-pixel 22 for light-emitting, or surrounds a portion of a third-color sub-pixel 23 that emits light
  • the element is used for the part that emits light.
  • the portion of the light-emitting element of any sub-pixel used to emit light is the portion located in the opening 301 of the pixel definition layer.
  • the structure of the display area in the present exemplary embodiment is similar to the corresponding structure described in the previous embodiments, so it is not repeated here.
  • the structures (or methods) shown in this embodiment mode can be appropriately combined with the structures (or methods) shown in other embodiments.
  • FIG. 20 is another schematic diagram of a plurality of sub-pixels in a display area according to at least one embodiment of the disclosure.
  • a plurality of sub-pixels in the display area may be arranged in a diamond pattern.
  • the first color sub-pixel 21 and the second color sub-pixel 22 are rhombus-shaped, and the third-color sub-pixel 23 is a rounded rectangle.
  • the first-color sub-pixels 21 and the third-color sub-pixels 23 are arranged in a straight line with a clockwise angle of 45 degrees from the horizontal line, and the second-color sub-pixels 22 and the third-color sub-pixels 23 are arranged in a counterclockwise direction with the horizontal line.
  • the angles are arranged in a straight line at 45 degrees.
  • the first color subpixel 21 may be a red subpixel
  • the second color subpixel 22 may be a blue subpixel
  • the third color subpixel 23 may be a green subpixel.
  • this embodiment does not limit this.
  • the conductive protection structure 32 includes a plurality of conductive parts, and at least one conductive part is located at an interval between the light-emitting parts of the light-emitting elements of at least two adjacent sub-pixels.
  • the conductive protection structure 32 is formed with a plurality of meshes.
  • At least one grid has a diamond shape. At least one grid surrounds a portion of the light-emitting element of a first-color sub-pixel 21 for emitting light, or a portion of a light-emitting element of a second-color sub-pixel 22 for light-emitting, or surrounds a portion of a third-color sub-pixel 23 that emits light
  • the element is used for the part that emits light.
  • the conductive protection structure 32 does not overlap with the projections of the anodes of the plurality of light emitting elements (eg, the first anode 213 , the second anode 223 and the third anode 233 ) on the base substrate.
  • the portion of the light-emitting element of any sub-pixel used to emit light is the portion located at the opening of the pixel definition layer.
  • the structure of the display area in the present exemplary embodiment is similar to the corresponding structure described in the previous embodiments, so it is not repeated here.
  • the structures (or methods) shown in this embodiment mode can be appropriately combined with the structures (or methods) shown in other embodiments.
  • At least one embodiment of the present disclosure also provides a method for fabricating a display substrate, including: providing a base substrate, the base substrate including a display area; and forming a plurality of sub-pixels and a conductive protection structure on the base substrate of the display area.
  • At least one sub-pixel in the plurality of sub-pixels includes a light-emitting element and a driving circuit for driving the light-emitting element to emit light, and the light-emitting element and the conductive protection structure are located on a side of the driving circuit away from the base substrate.
  • the conductive protection structure includes at least one conductive portion located at an interval between respective portions of the light-emitting elements of at least two adjacent sub-pixels for emitting light.
  • the conductive protection structure is electrically connected to a signal terminal, and is configured to reduce carrier transfer between adjacent sub-pixels.
  • the manufacturing method further includes: forming a pixel definition layer on a side of the driving circuit away from the base substrate.
  • the pixel definition layer includes a plurality of sub-pixel definition parts, an opening of the pixel definition layer is formed between adjacent sub-pixel definition parts, and the part of the light-emitting element located in the opening of the pixel definition layer is used for light emission.
  • Forming the conductive protection structure on the base substrate in the display area includes: forming the conductive protection structure on the side of the plurality of sub-pixel definition parts of the pixel definition layer that is away from the base substrate. At least part of the conductive protection structure is in direct contact with the plurality of sub-pixel definition parts, and the projection of the plurality of sub-pixel definition parts on the base substrate covers the projection of the conductive protection structure on the base substrate.
  • forming a plurality of sub-pixels on the base substrate of the display area includes: forming a first electrode electrically connected to the driving circuit on a side of the driving circuit away from the base substrate; An organic functional layer is formed on one side of the base substrate, at least a part of the first electrode is exposed by the opening of the pixel definition layer, and the organic functional layer is in contact with the first electrode through the opening of the pixel definition layer; and a side of the organic functional layer away from the base substrate is formed with an organic function layer.
  • the second electrode in contact with the organic functional layer.
  • FIG. 21 is a schematic diagram of a display device according to at least one embodiment of the disclosure.
  • this embodiment provides a display device 91 including: a display substrate 910 .
  • the display substrate 910 is the display substrate provided in the foregoing embodiments.
  • the display substrate 910 may be an OLED display substrate.
  • the display device 91 can be: OLED display device, mobile phone, tablet computer, TV, monitor, notebook computer, digital photo frame, navigator, vehicle display, watch, wristband, etc. any product or component with display function. However, this embodiment does not limit this.

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Abstract

一种显示基板，包括：衬底基板。衬底基板包括显示区域，显示区域设置有多个子像素和一个导电保护结构。多个子像素中的至少一个子像素包括：发光元件以及驱动发光元件发光的驱动电路。发光元件和导电保护结构位于驱动电路远离衬底基板的一侧。导电保护结构包括至少一个导电部，至少一个导电部位于至少两个相邻子像素的发光元件各自用于发光的部分之间的间隔。导电保护结构与一信号端电连接，配置为减少相邻子像素之间的载流子传输。

Description

显示基板及其制备方法、显示装置
本申请要求于2020年8月28日提交中国专利局、申请号为202010892357.0、发明名称为“显示基板及其制备方法、显示装置”的中国专利申请的优先权，其内容应理解为通过引用的方式并入本申请中。
技术领域
本文涉及但不限于显示技术领域，尤指一种显示基板及其制备方法、显示装置。
背景技术
有机发光二极管(OLED，Organic Light Emitting Diode)为主动发光显示器件，具有自发光、广视角、高对比度、低耗电、极高反应速度等优点。随着显示技术的不断发展，以OLED为发光器件、由薄膜晶体管(TFT，Thin Film Transistor)进行信号控制的显示装置已成为目前显示领域的主流产品。
发明内容
以下是对本文详细描述的主题的概述。本概述并非是为了限制权利要求的保护范围。
本公开提供一种显示基板及其制备方法、显示装置。
一方面，本公开提供一种显示基板，包括：衬底基板。所述衬底基板包括显示区域，所述显示区域设置有多个子像素和一个导电保护结构。多个子像素中的至少一个子像素包括：发光元件以及驱动所述发光元件发光的驱动电路。所述发光元件和所述导电保护结构位于所述驱动电路远离所述衬底基板的一侧。所述导电保护结构包括至少一个导电部，所述至少一个导电部位于至少两个相邻子像素的发光元件各自用于发光的部分之间的间隔。所述导电保护结构与一信号端电连接，配置为减少相邻子像素之间的载流子传输。
在一些示例性实施方式中，所述至少一个导电部位于至少两个相邻的不 同颜色的子像素的发光元件各自用于发光的部分之间的间隔。
在一些示例性实施方式中，所述发光元件包括有机功能层，所述有机功能层包括至少两层有机层，所述至少一个导电部与其中至少一层有机层接触。
在一些示例性实施方式中，所述至少两层有机层中包括第一层，所述第一层在所述衬底基板的投影至少与两个所述子像素的发光元件的用于发光的部分在所述衬底基板的投影有交叠，所述第一层与所述至少一个导电部接触。
在一些示例性实施方式中，所述第一层为多个子像素的发光元件之间的共通层。
在一些示例性实施方式中，所述至少一个导电部的电阻率小于所述至少一个导电部所接触的有机层的电阻率。
在一些示例性实施方式中，所述显示区域还设置有像素定义层，所述像素定义层位于所述驱动电路远离所述衬底基板的一侧。所述像素定义层包括：多个子像素定义部，相邻子像素定义部之间形成像素定义层开口，所述发光元件位于所述像素定义层开口的部分用于发光。所述导电保护结构设置在所述子像素定义部远离所述衬底基板的一侧，且所述子像素定义部在所述衬底基板的投影覆盖所述导电保护结构在所述衬底基板的投影。
在一些示例性实施方式中，所述发光元件还包括：第一电极和第二电极。所述第一电极设置在所述驱动电路远离所述衬底基板的一侧，且与所述驱动电路电连接，所述像素定义层的像素定义层开口暴露出所述第一电极的至少部分。所述有机功能层设置在所述第一电极远离所述衬底基板的一侧，并通过所述像素定义层开口与所述第一电极接触。所述第二电极设置在所述有机功能层远离所述衬底基板的一侧，并与所述有机功能层接触。
在一些示例性实施方式中，所述有机功能层包括：发光层以及以下至少之一：空穴注入层、空穴传输层、电子阻挡层、电子注入层、电子传输层、空穴阻挡层。
在一些示例性实施方式中，所述至少一个导电部在所述衬底基底的投影与两个子像素的发光层在所述衬底基板的投影有交叠，且与所述像素定义层开口在所述衬底基板的投影没有交叠。
在一些示例性实施方式中，所述两个子像素的发光层有交叠，且所述至少一个导电部在所述衬底基板的投影与所述两个子像素的发光层的交叠部分在所述衬底基板的投影有交叠。
在一些示例性实施方式中，所述空穴注入层、空穴传输层、电子阻挡层、电子注入层、电子传输层以及空穴阻挡层中的至少一项为多个子像素的发光元件之间的共通层。
在一些示例性实施方式中，所述导电保护结构通过所述第二电极与所述信号端电连接。
在一些示例性实施方式中，所述信号端的电压值位于所述发光元件的第二电极的最小电压值和所述第一电极的最大电压值之间。
在一些示例性实施方式中，所述导电保护结构为由所述至少一个导电部形成的网状结构。所述网状结构包括至少一个网格，所述至少一个网格围绕一个子像素的发光元件的发光的部分，或者围绕多个相邻的相同颜色的子像素的发光元件的发光的部分。
在一些示例性实施方式中，所述显示区域内的多个子像素按照以下方式排布：在第一方向上按照两个第一颜色子像素、一个第二颜色子像素以及一个第三颜色子像素的重复单元排布，所述两个第一颜色子像素在垂直于第一方向的第二方向上排布，且相同颜色的子像素在第一方向上的间距约等于子像素宽度的1至2倍。所述两个相邻的第一颜色子像素的发光元件用于发光的部分被所述导电保护结构的一个网格围绕，一个第二颜色子像素的发光元件用于发光的部分被所述导电保护结构的一个网格围绕，一个第三颜色子像素的发光元件用于发光的部分被所述导电保护结构的一个网格围绕。
在一些示例性实施方式中，所述信号端提供恒定电位。
在一些示例性实施方式中，所述衬底基板还包括：位于显示区域外围的周边区域，所述周边区域设置有至少一条恒压信号线，所述导电保护结构通过所述至少一条恒压信号线与所述信号端电连接。
另一方面，本公开提供一种显示装置，包括如上所述的显示基板。
另一方面，本公开提供一种显示基板的制备方法，包括：提供一衬底基 板，所述衬底基板包括显示区域；在所述显示区域的衬底基板上形成多个子像素和一个导电保护结构。至少一个子像素包括：发光元件以及驱动所述发光元件发光的驱动电路，所述发光元件和导电保护结构位于所述驱动电路远离所述衬底基板的一侧。所述导电保护结构包括至少一个导电部，所述至少一个导电部位于至少两个相邻子像素的发光元件各自用于发光的部分之间的间隔，所述导电保护结构与一信号端电连接，配置为减少相邻子像素之间的载流子传输。
在阅读并理解了附图和详细描述后，可以明白其他方面。
附图说明
附图用来提供对本公开技术方案的进一步理解，并且构成说明书的一部分，与本公开的实施例一起用于解释本公开的技术方案，并不构成对本公开的技术方案的限制。附图中一个或多个部件的形状和大小不反映真实比例，目的只是示意说明本公开内容。
图1为本公开至少一实施例的显示基板的示意图；
图2为本公开至少一实施例的显示区域的多个子像素的一种结构示意图；
图3为图2中沿P-P方向的剖面示意图；
图4为本公开至少一实施例的显示基板的导电保护结构的电连接示意图；
图5为本公开至少一实施例形成柔性衬底基板后的显示基板的示意图；
图6为本公开至少一实施例形成驱动结构层后的显示基板的示意图；
图7为本公开至少一实施例形成平坦层图案后的显示基板的示意图；
图8为本公开至少一实施例形成第一电极图案后的显示基板的示意图；
图9为本公开至少一实施例形成像素定义层图案后的显示基板的示意图；
图10为本公开至少一实施例形成隔垫柱图案后的显示基板的示意图；
图11为本公开至少一实施例形成导电保护结构图案后的显示基板的示意图；
图12为本公开至少一实施例形成发光元件的第二电极图案后的显示基 板的示意图；
图13为本公开至少一实施例形成封装层后的显示基板的示意图；
图14为图2中沿P-P方向的另一剖面示意图；
图15为本公开至少一实施例的显示区域的多个子像素的另一示意图；
图16为本公开至少一实施例的显示区域的多个子像素的另一示意图；
图17为本公开至少一实施例的显示区域的多个子像素的另一示意图；
图18为本公开至少一实施例的显示区域的多个子像素的另一示意图；
图19为本公开至少一实施例的显示区域的多个子像素的另一示意图；
图20为本公开至少一实施例的显示区域的多个子像素的另一示意图；
图21为本公开至少一实施例的显示装置的示意图。
具体实施方式
为使本公开的目的、技术方案和优点更加清楚明白，下文中将结合附图对本公开的实施例进行详细说明。实施方式可以以多个不同形式来实施。所属技术领域的普通技术人员可以很容易地理解一个事实，就是方式和内容可以在不脱离本公开的宗旨及其范围的条件下被变换为一种或多种形式。因此，本公开不应该被解释为仅限定在下面的实施方式所记载的内容中。在不冲突的情况下，本公开中的实施例及实施例中的特征可以相互任意组合。
在附图中，有时为了明确起见，夸大表示了一个或多个构成要素的大小、层的厚度或区域。因此，本公开的一个方式并不一定限定于该尺寸，附图中各部件的形状和大小不反映真实比例。此外，附图示意性地示出了理想的例子，本公开的一个方式不局限于附图所示的形状或数值等。
本公开中的“第一”、“第二”、“第三”等序数词是为了避免构成要素的混同而设置，而不是为了在数量方面上进行限定的。本公开中的“多个”包括两个以及两个以上的数量。
在本公开中，为了方便起见，使用“中部”、“上”、“下”、“前”、“后”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示方位或位置关系的词句以参照 附图说明构成要素的位置关系，仅是为了便于描述本说明书和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本公开的限制。构成要素的位置关系根据描述构成要素的方向适当地改变。因此，不局限于在说明书中说明的词句，根据情况可以适当地更换。
在本公开中，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解。例如，可以是固定连接，或可拆卸连接，或一体地连接；可以是机械连接，或电连接；可以是直接相连，或通过中间件间接相连，或两个元件内部的连通。对于本领域的普通技术人员而言，可以根据情况理解上述术语在本公开中的含义。
在本公开中，晶体管是指至少包括栅电极、漏电极以及源电极这三个端子的元件。晶体管在漏电极(漏电极端子、漏区域或漏极)与源电极(源电极端子、源区域或源极)之间具有沟道区域，并且电流能够流过漏电极、沟道区域以及源电极。在本公开中，沟道区域是指电流主要流过的区域。
在本公开中，第一极可以为漏电极、第二极可以为源电极，或者第一极可以为源电极、第二极可以为漏电极。在使用极性相反的晶体管的情况或电路工作中的电流方向变化的情况等下，“源电极”及“漏电极”的功能有时互相调换。因此，在本公开中，“源电极”和“漏电极”可以互相调换。
在本公开中，“电连接”包括构成要素通过具有某种电作用的元件连接在一起的情况。“具有某种电作用的元件”只要可以进行连接的构成要素间的电信号的授受，就对其没有特别的限制。“具有某种电作用的元件”的例子不仅包括电极和布线，而且还包括晶体管等开关元件、电阻器、电感器、电容器、其它具有一种或多种功能的元件等。
在本公开中，“平行”是指两条直线形成的角度为-10°以上且10°以下的状态，因此，可以包括该角度为-5°以上且5°以下的状态。另外，“垂直”是指两条直线形成的角度为80°以上且100°以下的状态，因此，可以包括85°以上且95°以下的角度的状态。
在本公开中，“膜”和“层”可以相互调换。例如，有时可以将“导电层”换 成为“导电膜”。与此同样，有时可以将“绝缘膜”换成为“绝缘层”。
本公开中的“约”，是指不严格限定界限，允许工艺和测量误差范围内的数值。
OLED发光元件包括：依次叠设的阳极(Anode)、有机功能层以及阴极(Cathode)。有机功能层包括发光层(EML，Emitting Layer)以及包括空穴注入层(HIL，Hole Injection Layer)、空穴传输层(HTL，Hole Transport Layer)、空穴阻挡层(HBL，Hole Block Layer)、电子阻挡层(EBL，Electron Block Layer)、电子注入层(EIL，Electron Injection Layer)、电子传输层(ETL，Electron Transport Layer)中的一个或多个膜层组成的多层结构。例如，在阳极和阴极的电压驱动下，利用有机材料的发光特性根据需要的灰度发光。
不同颜色的OLED发光元件的发光层不同，例如，红色发光元件包括红色发光层，绿色发光元件包括绿色发光层，蓝色发光元件包括蓝色发光层。为了降低工艺难度和提升良率，位于发光层一侧的空穴注入层和空穴传输层通常采用共通层。为了提升显示产品的效率、降低功耗，空穴注入层一般由最低未占分子轨道(LUMO，Lowest Unoccupied Molecular Orbital)能级较深的P型掺杂剂(p-dopant)(例如，F4-TCNQ)等材料与空穴传输材料按照一定比例掺杂组成。这种注入材料和空穴传输材料之间存在显著的自发电荷转移，导致空穴注入层具有较高的电导率。随着分辨率的提高，不同颜色的相邻子像素之间的距离越来越小，而且随着材料技术的发展，为降低电压并减小功耗，材料迁移率不断提高。以上两方面导致的电流可以通过具有较强导电性的共通层(例如，空穴注入层)流向相邻的不需要发光的子像素，导致相邻子像素微亮，出现串扰不良。同样地，当空穴传输层、电子传输层等其他作为共通层的有机功能层的迁移率较高时，也有可能导致此现象。
另外，有机功能层通过蒸镀制备(例如，采用精细金属掩模版(FMM，Fine Metal Mask)或者开放式掩膜版(open mask)蒸镀)时，由于部分材料的迁移率较高，在不同颜色发光区域的间隔，有可能产生串扰电流。在低灰阶下，由于串扰电流造成的亮度偏差会比较明显，导致无法准确显示需要的色彩，严重影响了显示产品在低灰阶下的色彩准确性。
本公开至少一实施例提供一种显示基板及其制备方法、显示装置，可以 避免串扰不良，提升显示效果。
本公开至少一实施例提供一种显示基板，包括：衬底基板，衬底基板包括显示区域，显示区域设置有多个子像素和一个导电保护结构。多个子像素中的至少一个子像素包括：发光元件以及驱动发光元件发光的驱动电路。发光元件和导电保护结构位于驱动电路远离衬底基板的一侧。导电保护结构包括至少一个导电部，所述至少一个导电部位于至少两个相邻子像素的发光元件各自用于发光的部分之间的间隔。导电保护结构与一信号端电连接，配置为减少相邻子像素之间的载流子传输。
本实施例提供的显示基板，通过在至少两个相邻子像素的发光元件各自用于发光的部分之间的间隔设置至少一个导电部，减少相邻子像素之间的载流子传输，可以避免相邻子像素之间产生电流串扰，从而提升显示效果。
在一些示例性实施方式中，所述至少一个导电部位于至少两个相邻的不同颜色的子像素的发光元件各自用于发光的部分之间的间隔。本示例性实施例可以避免单色显示时该颜色的子像素对其他颜色的子像素产生影响，从而提升显示色彩准确性，有效提高显示品质。然而，本实施例对此并不限定。在一些示例中，所述至少一个导电部可以位于任两个相邻子像素的发光元件各自用于发光的部分之间的间隔。
在一些示例性实施方式中，发光元件包括有机功能层，有机功能层包括至少两层有机层，至少一个导电部与其中至少一层有机层接触。例如，至少两层有机层可以包括发光层和空穴注入层，至少一个导电部与空穴注入层接触。又如，至少两层有机层可以包括发光层、空穴传输层和空穴注入层，至少一个导电部与空穴注入层接触。然而，本实施例对此并不限定。
在一些示例性实施方式中，至少两层有机层中包括第一层，第一层在衬底基板的投影至少与两个子像素的发光元件的用于发光的部分在衬底基板的投影有交叠，第一层与至少一个导电部接触。在一些示例中，第一层可以为多个子像素的发光元件之间的共通层。或者，第一层可以由多个子像素中的部分子像素的发光元件共用。例如，第一层可以为空穴注入层或空穴传输层。然而，本实施例对此并不限定。
在一些示例性实施方式中，至少一个导电部的电阻率小于至少一个导电 部所接触的有机层的电阻率。在一些示例中，至少一个导电部所接触的有机层可以为空穴注入层，至少一个导电部的电阻率小于空穴注入层的电阻率。然而，本实施例对此并不限定。例如，至少一个导电部所接触的有机层可以为空穴传输层。
在一些示例性实施方式中，显示区域还设置有像素定义层，像素定义层位于驱动电路远离衬底基板的一侧。像素定义层包括多个子像素定义部，相邻子像素定义部之间形成像素定义层开口，发光元件位于像素定义层开口的部分用于发光。导电保护结构设置在子像素定义部远离衬底基板的一侧，且子像素定义部在衬底基板的投影覆盖导电保护结构在衬底基板的投影。在一些示例中，像素定义层开口内的像素定义层被去除掉，与发光元件的发光部分对应。在一些示例中，导电保护结构与子像素定义层的子像素定义部直接接触，或者，导电保护结构与子像素定义部上形成的隔垫柱直接接触。然而，本实施例对此并不限定。在本示例性实施例中，在子像素定义部上形成导电保护结构，可以简化制备工艺，并避免影响发光元件的正常发光。
在一些示例性实施方式中，至少一个发光元件包括：依次叠设的第一电极、有机功能层以及第二电极。第一电极设置在驱动电路远离衬底基板的一侧，且与一个驱动电路电连接，像素定义层的像素定义层开口暴露出第一电极的至少部分。有机功能层设置在第一电极远离衬底基板的一侧，并通过像素定义层开口与第一电极接触。第二电极设置在有机功能层远离衬底基板的一侧，并与有机功能层接触。在一些示例中，第一电极可以为反射阳极，第二电极可以为透明阴极。然而，本实施例对此并不限定。例如，第一电极可以为透明阳极，第二电极可以为反射阴极。
在一些示例性实施方式中，有机功能层可以包括：发光层以及以下至少之一：空穴注入层、空穴传输层、电子阻挡层、电子注入层、电子传输层、空穴阻挡层。例如，有机功能层可以包括：沿着远离衬底基板的方向依次叠设的空穴注入层、空穴传输层、发光层、电子传输层和电子注入层。又如，有机功能层可以包括：沿着远离衬底基板的方向依次叠设的空穴注入层、空穴传输层、发光层和电子传输层。然而，本实施例对此并不限定。
在一些示例性实施方式中，空穴注入层、空穴传输层、电子阻挡层、电 子注入层、电子传输层以及空穴阻挡层中的至少一项为多个子像素的发光元件之间的共通层。每个共通层设置在多个像素定义层开口内，并延伸覆盖多个子像素定义部。在本示例性实施方式中，共通层中的串扰电流会流向导电保护结构，以阻断串扰电流流向其他子像素，避免产生串扰不良，从而提升显示效果。然而，本实施例对此并不限定。在一些示例中，当有机功能层不设置共通层时，导电保护结构可以屏蔽由于相邻子像素的有机功能层的蒸镀边缘接触产生的串扰电流，避免产生串扰不良。
在一些示例性实施方式中，至少一个导电部在衬底基板的投影与两个子像素的发光层在衬底基板的投影有交叠，且与像素定义层开口在衬底基板的投影没有交叠。在本示例性实施方式中，至少一个导电部与子像素的发光元件用于发光的部分在衬底基板的投影没有交叠，避免影响发光元件的正常发光。然而，本实施例对此并不限定。在一些示例中，至少一个导电部在衬底基板的投影可以与子像素的发光层在衬底基板的投影没有交叠。
在一些示例性实施方式中，两个子像素的发光层有交叠，且至少一个导电部在衬底基板的投影与两个子像素的发光层的交叠部分在衬底基板的投影有交叠。在一些示例中，相邻子像素的发光层会存在交叠，至少一个导电部在像素定义层的设置位置可以与相邻子像素的发光层的交叠位置对应。然而，本实施例对此并不限定。
在一些示例性实施方式中，导电保护结构可以通过发光元件的第二电极与信号端电连接。在一些示例中，发光元件的第二电极与低电位电源线(或接地信号线)电连接，可以提供恒定电位，则通过连接导电保护结构与发光元件的第二电极，可以将导电保护结构保持在恒定电位。然而，本实施例对此并不限定。
在一些示例性实施方式中，信号端的电压值可以位于发光元件的第二电极的最小电压值和第一电极的最大电压值之间。例如，信号端的电压值可以大于或等于第二电极的最小电压值且小于第一电极的最大电压值。然而，本实施例对此并不限定。在一些示例中，信号端的电压值可以根据显示效果确定。
在一些示例性实施方式中，导电保护结构为由至少一个导电部形成的网 状结构。该网状结构包括至少一个网格，所述至少一个网格围绕一个子像素的发光元件的发光的部分，或者围绕多个相邻的相同颜色的子像素的发光元件的发光的部分。然而，本实施例对此并不限定。在一些示例中，导电保护结构为由多个导电部形成的多行和多列的交叉结构；或者，导电保护结构为由多个导电部形成的多列条状结构。
在一些示例性实施方式中，显示区域内的多个子像素按照以下方式排布：在第一方向上按照两个第一颜色子像素、一个第二颜色子像素以及一个第三颜色子像素的重复单元排布，两个第一颜色子像素在垂直于第一方向的第二方向上排布，且相同颜色的子像素在第一方向上的间隔约等于子像素宽度的1至2倍。例如，相同颜色的子像素在第一方向上的间隔约等于子像素宽度的1.5倍。两个相邻的第一颜色子像素的发光元件用于发光的部分被导电保护结构的一个网格围绕，一个第二颜色子像素的发光元件用于发光的部分被导电保护结构的一个网格围绕，一个第三颜色子像素的发光元件用于发光的部分被导电保护结构的一个网格围绕。换言之，导电保护结构的至少一个网格围绕两个相邻的第一颜色子像素的发光元件用于发光的部分，或者，围绕一个第二颜色子像素的发光元件用于发光的部分，或者，围绕一个第三颜色子像素的发光元件用于发光的部分。在一些示例中，第一方向可以为行方向，第二方向可以为列方向。或者，第一方向可以为列方向，第二方向可以为行方向。在一些示例中，第一颜色子像素可以为绿色(G)子像素，第二颜色子像素可以为红色(R)子像素，第三颜色子像素可以为蓝色(B)子像素。即，显示区域的多个子像素可以按照GGRB的图案进行排布。在本示例性实施例中，网状结构的导电保护结构的至少一个网格围绕一个或两个相邻的相同颜色子像素的发光元件用于发光的部分。然而，本实施例对于显示区域的多个子像素的排布方式并不限定。在一些示例中，显示区域内的多个子像素可以按照RGB图案进行排布。例如，在每一行按照一个红色子像素、一个绿色子像素和一个蓝色子像素的重复单元排布，每一列的子像素的颜色相同。或者，在一些示例中，显示区域的多个子像素可以按照PenTile图案排列。例如，每个像素单元可以包括红色子像素和绿色子像素，或者蓝色子像素和绿色子像素，每个像素单元可以借用与其相邻的像素单元的另一颜色子像素来构成三基色。
在一些示例性实施方式中，信号端提供恒定电位。即，导电保护结构连接恒定电位。恒定电位的电压值可以大于或等于发光元件的阴极的最小电压值且小于阳极的最大电压值。
在一些示例性实施方式中，衬底基板还包括：位于显示区域外围的周边区域，周边区域设置有至少一条恒压信号线，导电保护结构通过所述至少一条恒压信号线与所述信号端电连接。在一些示例中，导电保护结构的所述至少一个导电部可以通过至少一个连接电极与周边区域的所述至少一条恒压信号线连接。在一些示例中，恒压信号线可以为低电压电源线(VSS)，或者接地信号线，或者各种类型的电压线，只要满足恒压信号线提供的恒定电位的电压值大于或等于发光元件的第二电极的最小电压值且小于第一电极的最大电压值即可。在一些示例中，上述信号端可以包括：接收接地信号的绑定电极。例如，恒压信号线可以与位于显示区域一侧的绑定区域内设置的连接接地信号的绑定电极连接，导电保护结构通过与恒压信号线连接实现接地。然而，本实施例对此并不限定。
图1为本公开至少一实施例的显示基板的示意图。如图1所示，本实施例的显示基板包括：显示区域A和位于显示区域A周边的非显示区域。非显示区域包括位于显示区域A外围的周边区域B、以及位于显示区域A一侧的绑定区域(图未示)。显示区域A至少设置有多个子像素，多个子像素中的至少一个子像素包括：发光元件以及驱动发光元件发光的驱动电路。绑定区域至少包括将多个子像素的信号线连接至外部驱动装置的绑定电路。绑定电路可以包括与外部的电路板绑定连接的多个绑定电极。周边区域B至少包括向多个子像素传输电压信号的信号线，例如，低电位电源线(VSS)。本示例性实施例对于显示基板的尺寸和分辨率并不限定。例如，显示基板的尺寸可以为微显示尺寸、中小尺寸或大尺寸。例如，显示基板的分辨率可以为以下至少之一：960×540、1920×1080、2560×1440、3840×2160、7680×4320。
图2为本公开至少一实施例的显示区域的多个子像素的结构示意图。图2为图1中区域S的局部放大示意图。图3为图2中沿P-P方向的剖面示意图。
在一些示例性实施方式中，如图2所示，在平行于显示基板的平面上， 显示区域的多个子像素按照以下方式排布：在每一行上按照两个第一颜色子像素21、一个第二颜色子像素22以及一个第三颜色子像素23的重复单元排布，重复单元中的两个第一颜色子像素21在列方向上排布，且相同颜色的子像素在行方向上的间距约等于子像素宽度的1.5倍。在本示例中，第一颜色子像素21、第二颜色子像素22和第三颜色子像素23沿行方向的宽度可以相同。换言之，相邻两行之间的重复单元在行方向上具有子像素宽度的1.5倍距离的移位。两个第一颜色子像素21可以分别呈五边形(例如，圆角五边形)，两个第一颜色子像素21相互对称，且对称轴与行方向平行。第二颜色子像素22和第三颜色子像素23分别呈六边形(例如，圆角六边形)。第二颜色子像素22和第三颜色子像素23沿列方向的长度可以相同。第一颜色子像素21沿列方向的长度可以小于第二颜色子像素22和第三颜色子像素23的长度。在一些示例中，第一颜色子像素21可以为绿色(G)子像素，第二颜色子像素22可以为红色(R)子像素，第三颜色子像素23可以为蓝色(B)子像素。本实施例对于显示区域的多个子像素的形状以及排布方式并不限定。
在一些示例性实施方式中，如图2所示，在平行于显示基板的平面上，显示区域还设置有呈网状结构的导电保护结构32。网状结构的导电保护结构32可以由多个导电部(例如，包括第一导电部321、第二导电部322、第三导电部323以及第四导电部324)连接形成，多个导电部位于不同颜色的相邻子像素的发光元件各自用于发光的部分之间的间隔。子像素的发光元件位于像素定义层开口301的部分用于发光。在一些示例中，在行方向上，一个重复单元内的两个列方向上的第一颜色子像素21的发光的部分与相邻的第二颜色子像素22的发光的部分之间的间隔处设置第一导电部321；第二颜色子像素22的发光的部分与相邻的第三颜色子像素23的发光的部分之间的间隔处设置第二导电部322。在行方向上，相邻的重复单元之间设置有第三导电部323。在列方向上，相邻行的重复单元之间设置有第四导电部324。在一个重复单元内，两个第一颜色子像素21的发光元件用于发光的部分作为一个整体，被第一导电部321、第三导电部323和上下两侧的第四导电部324连接后围绕，一个第二颜色子像素22的发光元件用于发光的部分被第一导电部321、第二导电部322和上下两侧的第四导电部324连接后围绕，一个第三颜色子像素23的发光元件用于发光的部分被第二导电部322、第三导电部323 和上下两侧的第四导电部324连接后围绕。即，在一个重复单元内，两个第一颜色子像素21的发光元件用于发光的部分被网状结构的一个网格围绕，第二颜色子像素22的发光元件用于发光的部分被一个网格围绕，第三颜色子像素23的发光元件用于发光的部分被一个网格围绕。不同颜色的相邻子像素的发光元件用于发光的部分均被导电部隔开，从而减少不同颜色的相邻子像素之间的载流子传输，避免产生电流串扰，以提升显示效果。在一些示例中，多个导电部连接形成的围绕子像素的发光元件用于发光的部分的网格可以呈六边形。然而，本实施例对此并不限定。在一些示例中，多个导电部连接形成的围绕子像素的发光元件用于发光的部分的网格可以为矩形或五边形等其他形状。另外，在一些示例中，在显示区域的不同位置的导电部的尺寸可以相同，例如，在垂直于导电部的延伸方向的方向上，导电部的长度可以相同。
在一些示例性实施方式中，如图2所示，在平行于显示基板的平面上，显示区域还设置有多个隔垫柱34。隔垫柱34可以作为支撑层，配置为在蒸镀过程中支撑FMM。在一些示例中，在子像素排布的行方向上，相邻两个隔垫柱34之间间隔一个重复单元。然而，本实施例对于隔垫柱的设置位置并不限定。
在一些示例性实施方式中，如图3所示，在垂直于显示基板的平面上，显示区域包括：设置在衬底基板10上的驱动结构层，设置在驱动结构层远离衬底基板10一侧的发光结构层以及导电保护结构。驱动结构层包括多个驱动电路，发光结构层包括多个发光元件，多个发光元件与多个驱动电路一一对应连接。每个驱动电路包括多个晶体管和至少一个存储电容，例如可以是2T1C、3T1C、5T1C或7T1C设计。图3中以三个子像素为例进行示意，且每个子像素的驱动电路仅以一个晶体管和一个存储电容为例进行示意。
在一些示例性实施方式中，如图3所示，在垂直于显示基板的平面上，至少一个发光元件包括：依次叠设的第一电极(例如，第一阳极213、第二阳极223或第三阳极233)、空穴注入层241、空穴传输层242、发光层(例如，第一颜色发光层216、第二颜色发光层226或第三颜色发光层236)、电子传输层243以及第二电极244。显示区域还设置有像素定义层30，设置在驱动结构层远离衬底基板10的一侧。像素定义层30包括：多个子像素定义 部302，相邻子像素定义部302之间形成像素定义层开口，一个发光元件位于像素定义层开口的部分用于发光。导电保护结构(例如，包括图3示意的第一导电部321、第二导电部322和第三导电部323)设置在子像素定义部302远离衬底基板10的一侧，且导电保护结构可以与子像素定义部302直接接触。子像素定义部302在衬底基板10的投影覆盖导电保护结构在衬底基板10的投影。导电保护结构在衬底基板10的投影与像素定义层开口在衬底基板的投影没有交叠。多个第一电极设置在驱动结构层远离衬底基板10的一侧，且一个第一电极与驱动结构层的一个驱动电路电连接，像素定义层30的像素定义层开口暴露出第一电极的至少部分。空穴注入层241、空穴传输层242、电子传输层243以及第二电极244为多个发光元件的共通层，设置在多个像素定义层开口内，并延伸覆盖多个子像素定义部302。在一些示例中，发光层可以覆盖像素定义层开口和像素定义层开口周边的部分子像素定义部。第二电极244设置在电子传输层243远离衬底基板10的一侧，并覆盖电子传输层243。
在一些示例性实施方式中，如图3所示，在垂直于显示基板的平面上，第一颜色发光层216和第二颜色发光层226直接接触，且第一颜色发光层216和第二颜色发光层216在衬底基板10的投影没有交叠。第二颜色发光层226和第三颜色发光层236直接接触，且第二颜色发光层226和第三颜色发光层236在衬底基板10的投影没有交叠。第一导电部321在衬底基底10的投影与第一颜色发光层216和第二颜色发光层226在衬底基板10的投影有交叠。第二导电部322在衬底基板10的投影与第二颜色发光层226和第三颜色发光层236在衬底基板10的投影有交叠。至少一个第三导电部323在衬底基板10的投影与第三颜色发光层236的投影有交叠。第一导电部321、第二导电部322和第三导电部323在衬底基板10的投影与像素定义层开口没有交叠。在一些示例中，第一导电部321位于所在的子像素定义部302远离衬底基板10的上表面的中间区域。然而，本实施例对此并不限定。例如，第一导电部321可以位于所在的子像素定义部302远离衬底基板10的上表面靠近第一颜色发光层216的区域或者靠近第二颜色发光层226的区域。第二导电部322和第三导电部323的设置位置可以与第一导电部321的设置位置类似，故于此不再赘述。
图4为本公开至少一实施例的显示基板的导电保护结构的电连接示意图。如图2和图4所示，在一些示例性实施方式中，周边区域B内设置有提供恒定电位的恒压信号线51。位于导电保护结构32的外边缘的至少一个导电部可以通过一个或多个连接电极61与周边区域B的恒压信号线51电连接。在一些示例中，位于导电保护结构32靠近显示区域A的上边缘一侧的至少一个导电部可以通过多个连接电极61与周边区域B的恒压信号线51电连接。然而，本实施例对此并不限定。在一些示例中，位于导电保护结构32靠近显示区域A的左侧或右侧边缘的导电部可以通过一个或多个连接电极61与周边区域B的恒压信号线51电连接。在一些示例中，连接电极61可以包括发光元件的第二电极。换言之，导电保护结构32可以通过第二电极连接周边区域B内的恒压信号线51，从而实现屏蔽相邻发光元件之间的串扰电流。
在一些示例中，周边区域B的恒压信号线51可以与绑定区域的绑定电路内接收接地信号的绑定电极连接，导电保护结构32与恒压信号线51电连接，可以实现导电保护结构32接地。然而，本实施例对此并不限定。在一些示例中，恒压信号线可以为提供其他电位的电压线，只要恒压信号线提供的恒定电位的电压值大于或等于发光元件的阴极的最小电压值且小于阳极的最大电压值即可。例如，恒压信号线可以为低电位电源线(VSS或VGL)等。
在一些示例性实施方式中，如图2至图4所示，当仅第一颜色子像素21被点亮，即第一颜色子像素21的第一阳极213接收到对应的驱动电路产生的驱动电流，而相邻的第二颜色子像素22的第二阳极223没有接收到对应的驱动电路产生的驱动电流。由于空穴注入层241为多个子像素的共通层，第一颜色子像素21的第一阳极213流出的空穴会通过该共通层流向相邻的第二颜色子像素22。在本示例性实施例中，导电保护结构32的电阻率小于空穴注入层241的电阻率。通过导电保护结构32的屏蔽作用，第一颜色子像素21的第一阳极213流出的空穴会流向电阻率更小的导电保护结构32，并通过导电保护结构32流向接地端或其他恒定电位的信号端，而不会流向第二颜色子像素22的发光层，可以避免第二颜色子像素22的发光层在第二电极和作为共通层的空穴注入层的作用下发光。以第一颜色子像素为绿色子像素，第二颜色子像素为红色子像素为例，可以避免在仅点亮绿色子像素时，产生相邻 的红色子像素微弱发光的情况。同样地，在其他颜色的相邻子像素之间，或者，除空穴注入层之外的共通层导电性较高的情况下，或者，发光元件的非共通层导电性较高的情况下，导电保护结构均可以起到屏蔽串扰电流的作用。
下面通过显示基板的制备过程的示例说明本公开实施例的显示基板的结构。本公开所说的“构图工艺”包括沉积膜层、涂覆光刻胶、掩模曝光、显影、刻蚀和剥离光刻胶等处理。沉积可以采用选自溅射、蒸镀和化学气相沉积中的任意一种或多种，涂覆可以采用选自喷涂和旋涂中的任意一种或多种，刻蚀可以采用选自干刻和湿刻中的任意一种或多种。“薄膜”是指将某一种材料在衬底基板上利用沉积或涂覆工艺制作出的一层薄膜。若在整个制作过程当中该“薄膜”无需构图工艺，则该“薄膜”还可以称为“层”。当在整个制作过程当中该“薄膜”还需构图工艺，则在构图工艺前称为“薄膜”，构图工艺后称为“层”。经过构图工艺后的“层”中包含至少一个“图案”。
本公开中所说的“A和B同层设置”是指，A和B通过同一次构图工艺同时形成。“相同层”不总是意味着层的厚度或层的高度在截面图中是相同的。“A的投影包含B的投影”是指，B的投影落入A的投影范围内，或者A的投影覆盖B的投影。
在一些示例性实施方式中，本实施例的显示基板的制备过程可以包括以下步骤(1)至步骤(9)。在本示例性实施例中，以顶发射结构的柔性显示基板为例进行说明。图5至图13均为图2中沿P-P方向的剖面示意图。
(1)、在玻璃载板上制备衬底基板。
在一些示例性实施方式中，衬底基板10可以为柔性衬底基板，例如包括在玻璃载板1上叠设的第一柔性材料层、第一无机材料层、半导体层、第二柔性材料层和第二无机材料层。第一柔性材料层、第二柔性材料层的材料采用聚酰亚胺(PI)、聚对苯二甲酸乙二酯(PET)或经表面处理的聚合物软膜等材料。第一无机材料层、第二无机材料层的材料采用氮化硅(SiNx)或氧化硅(SiOx)等，用于提高衬底基板的抗水氧能力，第一无机材料层、第二无机材料层也称之为阻挡(Barrier)层。半导体层的材料采用非晶硅(a-si)。在一些示例性实施方式中，以叠层结构PI1/Barrier1/a-si/PI2/Barrier2为例，其制备过程包括：先在玻璃载板1上涂布一层聚酰亚胺，固化成膜后形成第一 柔性(PI1)层；随后在第一柔性层上沉积一层阻挡薄膜，形成覆盖第一柔性层的第一阻挡(Barrier1)层；然后在第一阻挡层上沉积一层非晶硅薄膜，形成覆盖第一阻挡层的非晶硅(a-si)层；然后在非晶硅层上再涂布一层聚酰亚胺，固化成膜后形成第二柔性(PI2)层；然后在第二柔性层上沉积一层阻挡薄膜，形成覆盖第二柔性层的第二阻挡(Barrier2)层，完成衬底基板10的制备，如图5所示。
(2)、在衬底基板上制备驱动结构层。驱动结构层包括多个驱动电路，每个驱动电路包括多个晶体管和至少一个存储电容，例如2T1C、3T1C或7T1C设计。如图6所示，以三个子像素为例进行示意，且每个子像素的驱动电路仅以一个晶体管和一个存储电容为例进行示意。
在一些示例性实施方式中，驱动结构层的制备过程可以参照以下说明。以第一颜色子像素21的驱动电路的制备过程为例进行说明。
在衬底基板10上依次沉积第一绝缘薄膜和有源层薄膜，通过构图工艺对有源层薄膜进行构图，形成覆盖整个衬底基板10的第一绝缘层11，以及设置在第一绝缘层11上的有源层图案，有源层图案至少包括第一有源层。
随后，依次沉积第二绝缘薄膜和第一金属薄膜，通过构图工艺对第一金属薄膜进行构图，形成覆盖有源层图案的第二绝缘层12，以及设置在第二绝缘层12上的第一栅金属层图案，第一栅金属层图案至少包括第一栅电极和第一电容电极。
随后，依次沉积第三绝缘薄膜和第二金属薄膜，通过构图工艺对第二金属薄膜进行构图，形成覆盖第一栅金属层的第三绝缘层13，以及设置在第三绝缘层13上的第二栅金属层图案，第二栅金属层图案至少包括第二电容电极，第二电容电极的位置与第一电容电极的位置相对应。
随后，沉积第四绝缘薄膜，通过构图工艺对第四绝缘薄膜进行构图，形成覆盖第二栅金属层的第四绝缘层14图案，第四绝缘层14上开设有至少两个第一过孔，两个第一过孔内的第四绝缘层14、第三绝缘层13和第二绝缘层12被刻蚀掉，暴露出第一有源层的表面。
随后，沉积第三金属薄膜，通过构图工艺对第三金属薄膜进行构图，在第四绝缘层14上形成源漏金属层图案，源漏金属层至少包括位于显示区域的 第一源电极和第一漏电极。第一源电极和第一漏电极可以分别通过第一过孔与第一有源层连接。
如图6所示，显示区域的第一颜色子像素21的驱动电路中，第一有源层、第一栅电极、第一源电极和第一漏电极可以组成第一晶体管210，第一电容电极和第二电容电极可以组成第一存储电容212。在上述制备过程中，可以同时形成第二颜色子像素22的驱动电路以及第三颜色子像素23的驱动电路。
在一些示例性实施方式中，第一绝缘层11、第二绝缘层12、第三绝缘层13和第四绝缘层14采用硅氧化物(SiOx)、硅氮化物(SiNx)和氮氧化硅(SiON)中的任意一种或更多种，可以是单层、多层或复合层。第一绝缘层11称之为缓冲(Buffer)层，用于提高衬底基板的抗水氧能力；第二绝缘层12和第三绝缘层13称之为栅绝缘(GI，Gate Insulator)层；第四绝缘层14称之为层间绝缘(ILD，Interlayer Dielectric)层。第一金属薄膜、第二金属薄膜和第三金属薄膜采用金属材料，如银(Ag)、铜(Cu)、铝(Al)、钛(Ti)和钼(Mo)中的任意一种或更多种，或上述金属的合金材料，如铝钕合金(AlNd)或钼铌合金(MoNb)，可以是单层结构，或者多层复合结构，如Ti/Al/Ti等。有源层薄膜采用非晶态氧化铟镓锌材料(a-IGZO)、氮氧化锌(ZnON)、氧化铟锌锡(IZTO)、非晶硅(a-Si)、多晶硅(p-Si)、六噻吩、聚噻吩等一种或多种材料，即本公开适用于基于氧化物(Oxide)技术、硅技术以及有机物技术制造的晶体管。
(3)、在形成前述图案的衬底基板上形成平坦层。
在一些示例性实施方式中，在形成前述图案的衬底基板10上涂覆有机材料的平坦薄膜，形成覆盖整个衬底基板10的平坦(PLN，Planarization)层15，并通过掩膜、曝光、显影工艺，在显示区域的平坦层15上形成多个第二过孔K2，如图7所示。多个第二过孔K2内的平坦层15被显影掉，分别暴露出第一颜色子像素21的驱动电路的第一晶体管210的第一漏电极的表面、第二颜色子像素22的驱动电路的第一晶体管的第一漏电极的表面以及第三颜色子像素23的驱动电路的第一晶体管的第一漏电极的表面。
(4)、在形成前述图案的衬底基板上，形成第一电极图案。在一些示例中，第一电极为反射阳极。
在一些示例性实施方式中，在形成前述图案的衬底基板10上沉积导电薄膜，通过构图工艺对导电薄膜进行构图，形成第一电极图案。如图8所示，第一颜色子像素21的第一阳极213通过第二过孔K2与第一晶体管210的第一漏电极连接，第二颜色子像素22的第二阳极223通过第二过孔K2与第二颜色子像素22的第一晶体管的第一漏电极连接，第三颜色子像素23的第三阳极233通过第二过孔K2与第三颜色子像素23的第一晶体管的第一漏电极连接。
在一些示例中，第一电极可以采用金属材料，如镁(Mg)、银(Ag)、铜(Cu)、铝(Al)、钛(Ti)和钼(Mo)中的任意一种或更多种，或上述金属的合金材料，如铝钕合金(AlNd)或钼铌合金(MoNb)，可以是单层结构，或者多层复合结构，如Ti/Al/Ti等，或者，是金属和透明导电材料形成的堆栈结构，如ITO/Ag/ITO、Mo/AlNd/ITO等反射型材料。
(5)、在形成前述图案的衬底基板上，形成像素定义(PDL，Pixel Definition Layer)层图案。
在一些示例性实施例方式中，在形成前述图案的衬底基板10上涂覆像素定义薄膜，通过掩膜、曝光、显影工艺，形成像素定义层图案。如图9所示，显示区域的像素定义层30包括多个子像素定义部302，相邻子像素定义部302之间形成有多个像素定义层开口301，多个像素定义层开口301内的像素定义层30被显影掉，分别暴露出第一颜色子像素21的第一阳极213的至少部分表面、第二颜色子像素22的第二阳极223的至少部分表面以及第三颜色子像素23的第三阳极233的至少部分表面。
在一些示例中，像素定义层30可以采用聚酰亚胺、亚克力或聚对苯二甲酸乙二醇酯等。
(6)、在形成前述图案的衬底基板上，形成隔垫柱(PS，Post Spacer)图案。
在一些示例性实施方式中，在形成前述图案的衬底基板10上涂覆有机材料薄膜，通过掩膜、曝光、显影工艺，形成隔垫柱34图案，如图10所示。隔垫柱34可以作为支撑层，配置为在蒸镀过程中支撑FMM。在一些示例中，如图2所示，沿着子像素的行排布方向上，相邻两个隔垫柱34之间间隔一个 重复单元，例如，隔垫柱34可以位于相邻的第一颜色子像素21和第三颜色子像素23之间。
(7)、在形成前述图案的衬底基板上，形成导电保护结构。
在一些示例性实施例方式中，在形成前述图案的衬底基板10上沉积导电薄膜，通过构图工艺对导电薄膜进行构图，形成导电保护结构图案，如图11所示。导电保护结构32包括多个导电部(例如，包括第一导电部321、第二导电部322、第三导电部323和第四导电部324)，多个导电部连接形成网状结构。在一些示例中，如图2所示，两个第一颜色子像素21的发光元件用于发光的部分作为一个整体，被第一导电部321、第三导电部323和第四导电部324围绕，第二颜色子像素22的发光元件用于发光的部分被第一导电部321、第二导电部322和第四导电部324围绕，第三颜色子像素23的发光元件用于发光的部分被第二导电部322、第三导电部323和第四导电部324围绕。
如图2和图11所示，至少一个第三导电部323位于相邻的第三颜色子像素23和第一颜色子像素21之间的隔垫柱34或子像素定义部302上，第一导电部321位于相邻的第一颜色子像素21和第二颜色子像素22之间的子像素定义部302上，第二导电部322位于相邻的第二颜色子像素22和第三颜色子像素23之间的子像素定义部302上。导电保护结构32在衬底基板10的投影位于子像素定义部302在衬底基板10的投影内。换言之，导电保护结构32在衬底基板10的投影与像素定义层开口301在衬底基板10的投影没有交叠，导电保护结构32不与多个第一电极(例如，第一阳极213、第二阳极223和第三阳极233)连接，不影响发光元件的正常显示。
在一些示例中，导电保护结构可以采用金属材料，如银(Ag)、金(Au)、铜(Cu)、铝(Al)、钛(Ti)和钼(Mo)中的任意一种或更多种，或上述金属的合金材料，如铝钕合金(AlNd)或钼铌合金(MoNb)，或者，透明导电材料，例如，氧化铟锡(ITO)或氧化铟锌(IZO)，可以是单层结构，或者多层复合结构，例如多层金属复合结构，比如Ti/Al/Ti等，或者，透明导电材料和金属材料的复合结构，例如，ITO(厚度范围为5纳米(nm)至20nm)/Ag(厚度范围为50至200nm)/ITO(厚度范围为5nm至20nm)。 在一些示例中，导电保护结构的材料可以与第一电极的材料相同。
在一些示例性实施方式中，导电保护结构与提供恒定电位的信号端连接。导电保护结构使得发光元件的共通层产生的串扰电流流向所述信号端，屏蔽相邻子像素的发光元件之间的串扰电流，从而提升色彩显示准确性。在一些示例中，由于导电保护结构为网状结构，通过将导电保护结构的外边缘的导电部与所述信号端连接，可以实现整个导电保护结构连接所述信号端。例如，导电保护结构的外边缘的导电部可以通过连接电极与周边区域提供恒定电位的恒压信号线连接。恒压信号线可以与绑定区域的绑定电路中接收接地信号的绑定电极连接，导电保护结构通过连接恒压信号线实现接地。在一些示例中，连接电极和恒压信号线可以与源漏金属层同层设置，且连接电极与恒压信号线电连接；导电部通过在像素定义层和平坦层上开设的过孔，与连接电极实现电连接。然而，本实施例对此并不限定。
(8)、在形成前述图案的衬底基板上，依次形成有机功能层以及第二电极。在一些示例中，第二电极为透明阴极。发光元件可以通过透明阴极从远离衬底基板10一侧出光，实现顶发射。在一些示例中，发光元件的有机功能层包括：空穴注入层、空穴传输层、发光层以及电子传输层。
在一些示例性实施方式中，在形成前述图案的衬底基板10上采用开放式掩膜版(Open Mask)依次蒸镀形成空穴注入层241和空穴传输层242，然后采用FMM依次蒸镀形成蓝色发光层236、绿色发光层216和红色发光层226，然后采用开放式掩膜版依次蒸镀形成电子传输层243以及第二电极244，如图12所示。空穴注入层241、空穴传输层242、电子传输层243以及第二电极244均为多个子像素的共通层。在一些示例中，有机功能层还可以包括：位于空穴传输层和发光层之间的微腔调节层。例如，可以在形成空穴传输层之后，采用FMM依次蒸镀形成蓝色微腔调节层、蓝色发光层、绿色微腔调节层、绿色发光层、红色微腔调节层、红色发光层。
在一些示例性实施方式中，有机功能层形成在子像素区域内，实现有机功能层与第一电极连接。第二电极形成在像素定义层上，并与有机功能层连接。
在一些示例性实施方式中，第二电极可以采用镁(Mg)、银(Ag)、 铝(Al)中的任意一种或更多种，或采用上述金属中任意一种或多种制成的合金，或者采用透明导电材料，例如，氧化铟锡(ITO)，或者，金属与透明导电材料的多层复合结构。
在一些示例性实施方式中，可以在第二电极244远离衬底基板10的一侧形成光耦合层，光耦合层可以为多个子像素的共通层。光耦合层可以与透明阴极配合，起到增加光输出的作用。例如，光耦合层的材料可以采用半导体材料。然而，本实施例对此并不限定。
(9)、在形成前述图案的衬底基板上，形成封装层。
在一些示例性实施方式中，在形成前述图案的衬底基板10上形成封装层，封装层可以包括叠设的第一封装层41、第二封装层42和第三封装层43，如图13所示。第一封装层41采用无机材料，在显示区域覆盖阴极244。第二封装层42采用有机材料。第三封装层43采用无机材料，覆盖第一封装层41和第二封装层42。然而，本实施例对此并不限定。在一些示例中，封装层可以采用无机/有机/无机/有机/无机的五层结构。
本实施例提供的显示基板通过在像素定义层上形成网状结构的导电保护结构，使得发光元件的导电性较高的共通层中的串扰电流流向导电保护结构，屏蔽共通层传输的串扰电流，避免产生串扰显示不良，从而提升显示效果。本实施例提供的显示基板中，无需降低共通层(例如，空穴注入层)的导电性，可以确保显示基板的功耗，从而提升显示效果。
本公开实施例的显示基板的结构及其制备过程仅仅是一种示例性说明。在一些示例性实施方式中，可以根据实际需要变更相应结构以及增加或减少构图工艺。例如，显示基板可以为底发射结构的显示基板。又如，有机功能层还可以包括以下至少之一：电子阻挡层、空穴阻挡层、电子注入层。又如，发光元件的有机功能层可以不设置共通层。然而，本公开在此不做限定。
图14为图2中沿P-P方向的另一剖面示意图。在一些示例性实施方式中，如图14所示，在垂直于显示基板的平面内，第一颜色发光层216和第二颜色发光层226有交叠，第二颜色发光层226和第三颜色发光层236有交叠。第一导电部321在衬底基板10的投影与第一颜色发光层216和第二颜色发光层226的交叠部分在衬底基板10的投影有交叠。第二导电部322在衬底基板10 的投影与第二颜色发光层226和第三颜色发光层236的交叠部分在衬底基板10的投影有交叠。关于本实施例的其他结构可以参照上述实施例的说明，故于此不再赘述。
图15为本公开至少一实施例的显示区域的多个子像素的另一示意图。在一些示例性实施方式中，如图15所示，显示区域的多个子像素按照以下方式排布：在每一行上按照一个第一颜色子像素21、一个第二颜色子像素22、以及一个第三颜色子像素23的重复单元排布；在列方向上，每一列的子像素的颜色相同。每个子像素可以呈矩形(例如，圆角矩形)。不同颜色的子像素沿行方向的宽度大致均相同，不同颜色的子像素沿列方向的长度大致均相同。在一些示例中，第一颜色子像素21可以为红色子像素，第二颜色子像素22可以为绿色子像素，第三颜色子像素23可以为蓝色子像素。然而，本实施例对此并不限定。
在一些示例性实施方式中，导电保护结构包括至少一个第一导电部741、至少一个第二导电部742以及至少一个第三导电部743。至少一个第一导电部741位于相邻的第一颜色子像素21和第二颜色子像素22的发光元件各自用于发光的部分之间的间隔；至少一个第二导电部742位于相邻的第二颜色子像素22和第三颜色子像素23的发光元件各自用于发光的部分之间的间隔；至少一个第三导电部743位于第三颜色子像素23和相邻重复单元中的第一颜色子像素21的发光元件各自用于发光的部分之间的间隔。在一些示例中，当第一导电部741、第二导电部742和第三导电部743均为多个时，位于同一列的多个第一导电部741可以为一体结构，位于同一列的多个第二导电部742可以为一体结构，位于同一列的多个第三导电部743可以为一体结构，形成多个平行于列方向的条状结构。然而，本实施例对此并不限定。在一些示例中，在仅需确保第二颜色子像素的单色显示时，可以仅设置第一导电部741和第二导电部742。在一些示例中，导电保护结构的每一条状结构可以分别延伸至周边区域，与周边区域内提供恒定电位的恒压信号线连接。然而，本实施例对此并不限定。
在本示例性实施例中，通过在相邻的不同颜色的发光元件之间设置导电部，可以避免单色显示时其他颜色的发光元件被点亮的情况，从而提升显示 效果。
本示例性实施例中的显示区域的结构与前述实施例中描述的相应结构类似，故于此不再赘述。本实施方式所示的结构(或方法)可以与其它实施方式所示的结构(或方法)适当地组合。
图16为本公开至少一实施例的显示区域的多个子像素的另一示意图。在一些示例性实施方式中，如图16所示，显示区域的多个子像素按照以下方式排布：在每一行上按照一个第一颜色子像素21、一个第二颜色子像素22、以及一个第三颜色子像素23的重复单元排布；在列方向上，每一列子像素的颜色相同。每个子像素可以呈矩形(例如，圆角矩形)。不同颜色子像素沿行方向的宽度大致均相同，不同颜色子像素沿列方向的长度大致均相同。在一些示例中，第一颜色子像素21可以为红色子像素，第二颜色子像素22可以为绿色子像素，第三颜色子像素23可以为蓝色子像素。然而，本实施例对此并不限定。
在一些示例性实施方式中，任两个相邻子像素的发光元件各自用于发光的部分之间的间隔处设置有导电部。相邻的第一颜色子像素21和第二颜色子像素22的发光元件各自用于发光的部分之间的间隔处设置第一导电部741，相邻的第二颜色子像素22和第三颜色子像素23的发光元件各自用于发光的部分之间的间隔处设置第二导电部742，一个重复单元中的第三颜色子像素23和相邻重复单元中的第一颜色子像素21的发光元件各自用于发光的部分之间的间隔处设置第三导电部743。相邻行的重复单元之间设置第四导电部744。在一些示例中，当第一导电部741、第二导电部742、第三导电部743和第四导电部744均为多个时，位于同一行的多个第四导电部744可以为一体结构，位于同一列的多个第一导电部741可以为一体结构，位于同一列的多个第二导电部742可以为一体结构，位于同一列的多个第三导电部743可以为一体结构，从而形成多行和多列的交叉结构。如此一来，每个子像素的发光元件用于发光的部分均通过导电保护结构与其四侧相邻的发光元件用于发光的部分隔离开，屏蔽相邻子像素的串扰电流，从而提升显示效果。
在一些示例性实施方式中，导电保护结构的任一行或任一列的条状结构可以延伸至周边区域，与周边区域内提供恒定电位的恒压信号线连接。然而， 本实施例对此并不限定。
本示例性实施例中的显示区域的结构与前述实施例中描述的相应结构类似，故于此不再赘述。本实施方式所示的结构(或方法)可以与其它实施方式所示的结构(或方法)适当地组合。
图17为本公开至少一实施例的显示区域的多个子像素的另一示意图。在一些示例性实施方式中，如图17所示，显示区域的多个子像素按照以下方式排布：以一个第一颜色子像素21、一个第二颜色子像素22和一个第三颜色子像素23作为一个重复单元依次沿第一方向(例如，行方向)和垂直于第一方向的第二方向(例如，列方向)排布，在一个重复单元内，第一颜色子像素21和第二颜色子像素22沿第二方向排布，第三颜色子像素23排布在第一颜色子像素21和第二颜色子像素22的一侧。第一颜色子像素21、第二颜色子像素22和第三颜色子像素23沿第一方向的长度大致相同，第一颜色子像素21和第二颜色子像素22沿第二方向的长度大致相同，且小于第三颜色子像素23沿第二方向的长度。在一些示例中，第一颜色子像素21可以为蓝色子像素，第二颜色子像素22可以为红色子像素，第三颜色子像素23可以为绿色子像素。然而，本实施例对此并不限定。
在一些示例性实施方式中，如图17所示，导电保护结构32包括至少一个导电部，至少一个导电部位于至少两个相邻子像素的发光元件各自用于发光的部分之间的间隔。导电保护结构32形成有多个网格。至少一个网格可以为矩形。至少一个网格围绕一个第一颜色子像素21的发光元件用于发光的部分，或者围绕一个第二颜色子像素22的发光元件用于发光的部分，或者围绕一个第三颜色子像素23的发光元件用于发光的部分。任一子像素的发光元件用于发光的部分为位于像素定义层开口301的部分。
本示例性实施例中的显示区域的结构与前述实施例中描述的相应结构类似，故于此不再赘述。本实施方式所示的结构(或方法)可以与其它实施方式所示的结构(或方法)适当地组合。
图18为本公开至少一实施例的显示区域的多个子像素的另一示意图。在一些示例性实施方式中，如图18所示，显示区域的多个子像素按照以下方式排布：以一个第一颜色子像素21、一个第二颜色子像素22和一个第三颜色 子像素23作为一个重复单元依次沿行方向排布，相同颜色的子像素在行方向的间隔约等于子像素宽度的一倍。第一颜色子像素21、第二颜色子像素22和第三颜色子像素23沿行方向的长度大致相同，沿列方向的长度大致相同。在一些示例中，第一颜色子像素21可以为蓝色子像素，第二颜色子像素22可以为红色子像素，第三颜色子像素23可以为绿色子像素。然而，本实施例对此并不限定。
在一些示例性实施方式中，如图18所示，导电保护结构32包括至少一个导电部，至少一个导电部位于至少两个相邻子像素的发光元件各自用于发光的部分之间的间隔。导电保护结构32形成有多个网格。至少一个网格可以为矩形。至少一个网格围绕一个第一颜色子像素21的发光元件用于发光的部分，或者围绕一个第二颜色子像素22的发光元件用于发光的部分，或者围绕一个第三颜色子像素23的发光元件用于发光的部分。任一子像素的发光元件用于发光的部分为位于像素定义层开口301的部分。
本示例性实施例中的显示区域的结构与前述实施例中描述的相应结构类似，故于此不再赘述。本实施方式所示的结构(或方法)可以与其它实施方式所示的结构(或方法)适当地组合。
图19为本公开至少一实施例的显示区域的多个子像素的另一示意图。在一些示例性实施方式中，如图19所示，显示区域的多个子像素按照以下方式排布：以一个第一颜色子像素21、一个第二颜色子像素22和一个第三颜色子像素23作为一个重复单元依次沿行方向排布，相同颜色的子像素在行方向的间隔约等于子像素宽度的1.5倍。第一颜色子像素21、第二颜色子像素22和第三颜色子像素23沿行方向的长度大致相同，沿列方向的长度大致相同。在一些示例中，第一颜色子像素21可以为红色子像素，第二颜色子像素22可以为蓝色子像素，第三颜色子像素23可以为绿色子像素。然而，本实施例对此并不限定。
在一些示例性实施方式中，如图19所示，导电保护结构32包括至少一个导电部，至少一个导电部位于至少两个相邻子像素的发光元件各自用于发光的部分之间的间隔。导电保护结构32形成有多个网格。至少一个网格呈矩形或正方形。至少一个网格围绕一个第一颜色子像素21的发光元件用于发光 的部分，或者围绕一个第二颜色子像素22的发光元件用于发光的部分，或者围绕一个第三颜色子像素23的发光元件用于发光的部分。任一子像素的发光元件用于发光的部分为位于像素定义层开口301的部分。
本示例性实施例中的显示区域的结构与前述实施例中描述的相应结构类似，故于此不再赘述。本实施方式所示的结构(或方法)可以与其它实施方式所示的结构(或方法)适当地组合。
图20为本公开至少一实施例的显示区域的多个子像素的另一示意图。在一些示例性实施方式中，如图20所示，显示区域的多个子像素可以按照钻石(Diamond)图案排列。第一颜色子像素21和第二颜色子像素22呈菱形，第三颜色子像素23呈圆角矩形。第一颜色子像素21和第三颜色子像素23按照与水平线之间顺时针夹角为45度的直线排列，第二颜色子像素22和第三颜色子像素23按照与水平线之间逆时针夹角为成45度的直线排列。在一些示例中，第一颜色子像素21可以为红色子像素，第二颜色子像素22可以为蓝色子像素，第三颜色子像素23可以为绿色子像素。然而，本实施例对此并不限定。
在一些示例性实施方式中，如图20所示，导电保护结构32包括多个导电部，至少一个导电部位于至少两个相邻子像素的发光元件各自用于发光的部分之间的间隔。导电保护结构32形成有多个网格。至少一个网格呈菱形。至少一个网格围绕一个第一颜色子像素21的发光元件用于发光的部分，或者围绕一个第二颜色子像素22的发光元件用于发光的部分，或者围绕一个第三颜色子像素23的发光元件用于发光的部分。导电保护结构32与多个发光元件的阳极(例如，第一阳极213、第二阳极223和第三阳极233)在衬底基板的投影没有交叠。任一子像素的发光元件用于发光的部分为位于像素定义层开口的部分。
本示例性实施例中的显示区域的结构与前述实施例中描述的相应结构类似，故于此不再赘述。本实施方式所示的结构(或方法)可以与其它实施方式所示的结构(或方法)适当地组合。
本公开至少一实施例还提供一种显示基板的制备方法，包括：提供一衬底基板，衬底基板包括显示区域；在显示区域的衬底基板上形成多个子像素 和一个导电保护结构。多个子像素中的至少一个子像素包括：发光元件以及驱动发光元件发光的驱动电路，发光元件和导电保护结构位于驱动电路远离衬底基板的一侧。导电保护结构包括至少一个导电部，所述至少一个导电部位于至少两个相邻子像素的发光元件各自用于发光的部分之间的间隔。导电保护结构与一信号端电连接，配置为减少相邻子像素之间的载流子传输。
在一些示例性实施方式中，所述制备方法还包括：在驱动电路远离衬底基板的一侧形成像素定义层。像素定义层包括多个子像素定义部，相邻子像素定义部之间形成像素定义层开口，发光元件的位于像素定义层开口的部分用于发光。在显示区域的衬底基板上形成导电保护结构，包括：在像素定义层的多个子像素定义部远离衬底基板的一侧形成导电保护结构。导电保护结构的至少部分与多个子像素定义部直接接触，且多个子像素定义部在衬底基板的投影覆盖导电保护结构在衬底基板的投影。
在一些示例性实施方式中，在显示区域的衬底基板上形成多个子像素，包括：在驱动电路远离衬底基板的一侧形成与驱动电路电连接的第一电极；在第一电极远离衬底基板的一侧形成有机功能层，第一电极的至少部分被像素定义层开口暴露，有机功能层通过像素定义层开口与第一电极接触；在有机功能层远离衬底基板的一侧形成与有机功能层接触的第二电极。
关于本实施例的制备方法可以参照前述实施例的说明，故于此不再赘述。
图21为本公开至少一实施例的显示装置的示意图。如图21所示，本实施例提供一种显示装置91，包括：显示基板910。显示基板910为前述实施例提供的显示基板。在一些示例中，显示基板910可以为OLED显示基板。显示装置91可以为：OLED显示装置、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪、车载显示器、手表、手环等任何具有显示功能的产品或部件。然而，本实施例对此并不限定。
本公开中的附图只涉及本公开涉及到的结构，其他结构可参考通常设计。在不冲突的情况下，本公开的实施例及实施例中的特征可以相互组合以得到新的实施例。本领域的普通技术人员应当理解，可以对本公开的技术方案进行修改或者等同替换，而不脱离本公开技术方案的精神和范围，均应涵盖在本申请的权利要求的范围当中。

Claims (20)

  1. 一种显示基板，包括：
    衬底基板，包括显示区域，所述显示区域设置有多个子像素和一个导电保护结构；所述多个子像素中的至少一个子像素包括：发光元件以及驱动所述发光元件发光的驱动电路，所述发光元件和所述导电保护结构位于所述驱动电路远离所述衬底基板的一侧；
    所述导电保护结构包括至少一个导电部，所述至少一个导电部位于至少两个相邻子像素的发光元件各自用于发光的部分之间的间隔；所述导电保护结构与一信号端电连接，配置为减少相邻子像素之间的载流子传输。
  2. 根据权利要求1所述的显示基板，其中，所述至少一个导电部位于至少两个相邻的不同颜色的子像素的发光元件各自用于发光的部分之间的间隔。
  3. 根据权利要求1所述的显示基板，其中，所述发光元件包括有机功能层，所述有机功能层包括至少两层有机层，所述至少一个导电部与其中至少一层有机层接触。
  4. 根据权利要求3所述的显示基板，其中，所述至少两层有机层中包括第一层，所述第一层在所述衬底基板的投影至少与两个所述子像素的发光元件的用于发光的部分在所述衬底基板的投影有交叠，所述第一层与所述至少一个导电部接触。
  5. 根据权利要求4所述的显示基板，其中，所述第一层为多个子像素的发光元件之间的共通层。
  6. 根据权利要求3所述的显示基板，其中，所述至少一个导电部的电阻率小于所述至少一个导电部所接触的有机层的电阻率。
  7. 根据权利要求3至6中任一项所述的显示基板，其中，所述显示区域还设置有像素定义层，所述像素定义层位于所述驱动电路远离所述衬底基板的一侧，所述像素定义层包括：多个子像素定义部，相邻子像素定义部之间形成像素定义层开口，所述发光元件的位于所述像素定义层开口的部分用于发光；
    所述导电保护结构设置在所述子像素定义部远离所述衬底基板的一侧， 且所述子像素定义部在所述衬底基板的投影覆盖所述导电保护结构在所述衬底基板的投影。
  8. 根据权利要求7所述的显示基板，其中，所述发光元件还包括：第一电极和第二电极；
    所述第一电极设置在所述驱动电路远离所述衬底基板的一侧，且与所述驱动电路电连接，所述像素定义层的像素定义层开口暴露出所述第一电极的至少部分；
    所述有机功能层设置在所述第一电极远离所述衬底基板的一侧，并通过所述像素定义层开口与所述第一电极接触；所述第二电极设置在所述有机功能层远离所述衬底基板的一侧，并与所述有机功能层接触。
  9. 根据权利要求7所述的显示基板，其中，所述有机功能层包括：发光层以及以下至少之一：空穴注入层、空穴传输层、电子阻挡层、电子注入层、电子传输层、空穴阻挡层。
  10. 根据权利要求9所述的显示基板，其中，所述至少一个导电部在所述衬底基底的投影与两个子像素的发光层在所述衬底基板的投影有交叠，且与所述像素定义层开口在所述衬底基板的投影没有交叠。
  11. 根据权利要求9所述的显示基板，其中，所述两个子像素的发光层有交叠，且所述至少一个导电部在所述衬底基板的投影与所述两个子像素的发光层的交叠部分在所述衬底基板的投影有交叠。
  12. 根据权利要求9所述的显示基板，其中，所述空穴注入层、空穴传输层、电子阻挡层、电子注入层、电子传输层以及空穴阻挡层中的至少一项为多个子像素的发光元件之间的共通层。
  13. 根据权利要求8所述的显示基板，其中，所述导电保护结构通过所述第二电极与所述信号端电连接。
  14. 根据权利要求13所述的显示基板，其中，所述信号端的电压值位于所述发光元件的第二电极的最小电压值和所述第一电极的最大电压值之间。
  15. 根据权利要求1所述的显示基板，其中，所述导电保护结构为由所述至少一个导电部形成的网状结构，所述网状结构包括至少一个网格，所述 至少一个网格围绕一个子像素的发光元件的发光的部分，或者围绕多个相邻的相同颜色的子像素的发光元件的发光的部分。
  16. 根据权利要求15所述的显示基板，其中，所述显示区域内的多个子像素按照以下方式排布：在第一方向上按照两个第一颜色子像素、一个第二颜色子像素以及一个第三颜色子像素的重复单元排布，所述两个第一颜色子像素在垂直于第一方向的第二方向上排布，且相同颜色的子像素在第一方向上的间距约等于子像素宽度的1至2倍；
    所述两个相邻的第一颜色子像素的发光元件用于发光的部分被所述导电保护结构的一个网格围绕，一个第二颜色子像素的发光元件用于发光的部分被所述导电保护结构的一个网格围绕，一个第三颜色子像素的发光元件用于发光的部分被所述导电保护结构的一个网格围绕。
  17. 根据权利要求1所述的显示基板，其中，所述信号端提供恒定电位。
  18. 根据权利要求17所述的显示基板，其中，所述衬底基板还包括：位于显示区域外围的周边区域，所述周边区域设置有至少一条恒压信号线，所述导电保护结构通过所述至少一条恒压信号线与所述信号端电连接。
  19. 一种显示装置，包括如权利要求1至18中任一项所述的显示基板。
  20. 一种显示基板的制备方法，包括：
    提供一衬底基板，所述衬底基板包括显示区域；
    在所述显示区域的衬底基板上形成多个子像素和一个导电保护结构；所述多个子像素中的至少一个子像素包括：发光元件以及驱动所述发光元件发光的驱动电路，所述发光元件和导电保护结构位于所述驱动电路远离所述衬底基板的一侧；所述导电保护结构包括至少一个导电部，所述至少一个导电部位于至少两个相邻子像素的发光元件各自用于发光的部分之间的间隔，所述导电保护结构与一信号端电连接，配置为减少相邻子像素之间的载流子传输。
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