WO2021249199A1 - 显示面板及其裂纹检测方法、显示装置 - Google Patents

显示面板及其裂纹检测方法、显示装置 Download PDF

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Publication number
WO2021249199A1
WO2021249199A1 PCT/CN2021/096392 CN2021096392W WO2021249199A1 WO 2021249199 A1 WO2021249199 A1 WO 2021249199A1 CN 2021096392 W CN2021096392 W CN 2021096392W WO 2021249199 A1 WO2021249199 A1 WO 2021249199A1
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WIPO (PCT)
Prior art keywords
crack detection
detection line
area
crack
line
Prior art date
Application number
PCT/CN2021/096392
Other languages
English (en)
French (fr)
Inventor
张昊
刘庭良
杨慧娟
周洋
王予
张鑫
姜晓峰
和玉鹏
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US17/764,991 priority Critical patent/US11887515B2/en
Publication of WO2021249199A1 publication Critical patent/WO2021249199A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/40—OLEDs integrated with touch screens
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04102—Flexible digitiser, i.e. constructional details for allowing the whole digitising part of a device to be flexed or rolled like a sheet of paper
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/12—Test circuits or failure detection circuits included in a display system, as permanent part thereof
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals

Definitions

  • the embodiments of the present disclosure relate to, but are not limited to, display technology, in particular to a display panel, a crack detection method thereof, and a display device.
  • AMOLED Active Matrix Organic Light-Emitting Diode
  • FMLOC Flexible Multi-Layer On Cell
  • an embodiment of the present disclosure provides a display panel that includes a display area and a peripheral area surrounding the display area, and the display area is provided with at least one first data line and at least one second data line ,
  • the peripheral area is provided with a crack detection circuit structure, the crack detection circuit structure includes a first crack detection line, a second crack detection line, a first detection switch circuit electrically connected to the first data line, and The second detection switch circuit electrically connected to the second data line is on a plane perpendicular to the display surface of the display panel.
  • the display panel includes a plurality of functional layers arranged in sequence. The first crack detection line and the The second crack detection line is arranged in different functional layers, among which:
  • the first end of the first crack detection line is configured to be electrically connected to the first test end, the second end of the first crack detection line is electrically connected to the input end of the first detection switch circuit, and the first detection switch The output terminal of the circuit is electrically connected to the first data line;
  • the first end of the second crack detection line is electrically connected to a third node of the first crack detection line, and the third node is different from the first end and the second end of the first crack detection line.
  • the second end of the second crack detection line is electrically connected to the input end of the second detection switch circuit, and the output end of the second detection switch circuit is electrically connected to the second data line;
  • the control terminal of the first detection switch circuit and the control terminal of the second detection switch circuit are configured to be electrically connected to the second test terminal.
  • the peripheral area includes a first area provided with a binding area, a second area disposed opposite to the first area, and a connection between the first area and the second area and The third area and the fourth area set oppositely;
  • the first end and the second end of the first crack detection line are located in the first area; the first crack detection line is located in the first area, the second area, and the third area;
  • the first end of the second crack detection line is located in the second area, the second end is located in the first area, and the first crack detection line is located in the first area, the second area, and the third area.
  • the orthographic projection of the first crack detection line includes the orthographic projection of the second crack detection line.
  • the display area is further provided with at least one third data line and at least one fourth data line
  • the crack detection circuit structure further includes a third crack detection line, a fourth crack detection line, and A third detection switch circuit electrically connected to the third data line and a fourth detection switch circuit electrically connected to the fourth data line, and the third crack detection line and the fourth crack detection line are arranged on the Among the different functional layers of the display panel, among them:
  • the first end of the third crack detection line is electrically connected to the third test end, and the second end of the third crack detection line is electrically connected to the input end of the third detection switch circuit.
  • the output terminal is electrically connected to the third data line;
  • the first end of the fourth crack detection line is electrically connected to the fourth node of the third crack detection line, and the fourth node is different from the first end and the second end of the third crack detection line.
  • the second end of the fourth crack detection line is electrically connected to the input end of the fourth detection switch circuit, and the output end of the fourth detection switch circuit is electrically connected to the fourth data line;
  • control terminal of the third detection switch circuit and the control terminal of the fourth detection switch circuit are electrically connected to the fourth test terminal;
  • the first crack detection line and the second crack detection line are located on one side of the central axis of the display panel, and the third crack detection line and the fourth crack detection line are located on the central axis of the display panel On the other side of, wherein the central axis is the central axis between the third area and the fourth area.
  • first end and the second end of the third crack detection line are located in the first area; the third crack detection line is located in the first area, the second area, and the fourth area. area;
  • the first end of the fourth crack detection line is located in the second area, the second end is located in the first area, and the fourth crack detection line is located in the first area, the second area, and the fourth area.
  • the display panel further includes a first sub-pixel connected to the first data line, a second sub-pixel connected to the second data line, and the first sub-pixel The color is different from the color of the second sub-pixel.
  • the orthographic projection of the third crack detection line includes the orthographic projection of the fourth crack detection line.
  • the third crack detection line is provided in the same layer as the first crack detection line
  • the fourth crack detection line is provided in the same layer as the second crack detection line.
  • the display panel on a plane perpendicular to the display surface of the display panel, includes a display substrate and a touch structure layer arranged in sequence, the first crack detection line and the second One of the crack detection lines is arranged in the peripheral area of the display substrate, and the other is arranged in the peripheral area of the touch structure layer.
  • the first crack detection line is provided in a peripheral area of the touch structure layer, and the second crack detection line is provided in a peripheral area of the display substrate.
  • the display substrate includes a driving structure layer
  • the driving structure layer includes an active layer, a first gate insulating layer, a first gate metal layer, a second gate insulating layer, and a second gate metal layer.
  • An interlayer insulating layer and a source-drain metal layer, the second crack detection line and the source-drain metal layer are arranged in the same layer;
  • the display substrate includes a driving structure layer including an active layer, a first gate insulating layer, a first gate metal layer, a second gate insulating layer, a second gate metal layer, an interlayer insulating layer, and source and drain
  • the metal layer, the second crack detection line and the second gate metal layer are arranged in the same layer.
  • the touch structure layer includes a transfer metal layer, a touch insulation layer, and a touch electrode layer that are sequentially arranged, and the first crack detection line is arranged in the same layer as the touch electrode layer , Or, the first crack detection line and the transition metal layer are provided in the same layer.
  • an embodiment of the present disclosure provides a display device, including the display panel described in the foregoing embodiment.
  • an embodiment of the present disclosure provides a method for detecting cracks in a display panel.
  • the display panel of any one of the above embodiments of the display panel further includes sub-pixels connected to the data line.
  • the crack detection methods include:
  • the crack state information of the display panel is determined according to the light-emitting state of the sub-pixels of the display panel.
  • the determining the crack state information of the display panel according to the light-emitting state of the sub-pixels of the display panel includes:
  • one of the first light-emitting state and the second light-emitting state is a bright state, and the other is a dark state.
  • Figure 1 is a schematic diagram of a display panel provided by a technical solution
  • FIG. 2 is a schematic diagram of a display panel provided by an embodiment of the disclosure.
  • FIG. 3 is a schematic diagram of a display panel provided by an embodiment
  • FIG. 4 is a schematic diagram of a display panel provided by another implementation
  • FIG. 5 is a schematic cross-sectional view of a display panel provided by another embodiment
  • FIG. 6 is a schematic diagram of a display panel provided by still another embodiment
  • FIG. 7 is a schematic diagram of a display panel provided by another embodiment.
  • FIG. 8 is a schematic diagram of a crack detection method of a display panel provided by an embodiment of the disclosure.
  • a transistor refers to an element including at least three terminals of a gate electrode, a drain electrode, and a source electrode.
  • the transistor has a channel region between the drain electrode (drain electrode terminal, drain region, or drain electrode) and the source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, channel region, and source electrode .
  • the channel region refers to a region through which current mainly flows.
  • it may be the drain electrode of the first electrode and the source electrode of the second electrode, or it may be the source electrode of the first electrode and the drain electrode of the second electrode.
  • the functions of the "source electrode” and the “drain electrode” may be interchanged. Therefore, in this specification, “source electrode” and “drain electrode” can be interchanged.
  • the orthographic projection of A includes the orthographic projection of B means that the orthographic projection of B falls within the orthographic projection range of A, or that the orthographic projection of A covers the orthographic projection of B.
  • parallel refers to a state where the angle formed by two straight lines is -10° or more and 10° or less, and therefore, it also includes a state where the angle is -5° or more and 5° or less.
  • perpendicular refers to a state where the angle formed by two straight lines is 80° or more and 100° or less, and therefore also includes a state where an angle of 85° or more and 95° or less is included.
  • Fig. 1 is a schematic diagram of a plane structure of a display panel, which is a display panel adopting FMLOC technology.
  • the display panel may include a display substrate and a touch structure layer on the display substrate.
  • the display substrate may include a base, a driving structure layer, a light emitting structure layer, and an encapsulation layer arranged in sequence.
  • the touch structure layer is located on the side of the packaging layer away from the substrate.
  • the driving structure layer may include an active layer, a first gate insulating layer, a first gate electrode layer, a second gate insulating layer, a second gate electrode layer, an interlayer insulating layer, and a source-drain electrode layer, which are sequentially arranged.
  • the touch structure layer may include a transfer metal layer, a touch insulation layer, and a touch electrode layer that are sequentially arranged.
  • the display panel includes a display area 100 and a peripheral area 200 located at the periphery of the display area 100, and the peripheral area 200 surrounds the display area 100.
  • the display area 100 is also called an active display area (Active Area, AA).
  • the display panel may further include a first crack detection line, which is located in the peripheral area 200 and arranged around the display area 100.
  • the first crack detection line may include a first lead section 11, a second lead section 12 and a fifth lead section 13.
  • the first crack detection line may be provided in the same layer as the source and drain electrode layer or the second gate electrode layer.
  • the display panel may further include a second crack detection line, which is located in the peripheral area 200 and arranged around the display area 100.
  • the second crack detection line may include a third lead section 21 and a fourth lead section 22.
  • the second crack detection line can be arranged in the same layer as the touch electrode layer.
  • the first lead section 11 is electrically connected to the third lead section 21 through a via hole
  • the second lead section 21 is electrically connected to the fourth lead section 22 through a via hole.
  • the test signal starts from an electrical test (ET) unit or a chip on film (COF) unit, and runs along the periphery of the display panel (from the third lead The section 21 to the first lead section 11, from the fourth lead line 22 to the second lead section 12), enter the cell test (CT) unit of the panel, and pass through a number of thin film transistors (TFTs) in the CT unit.
  • ET electrical test
  • COF chip on film
  • first lead section 11 and the third lead section 21 are connected in series as a whole, and the second lead section 12 and the third lead section 22 are connected in series as a whole, it can be judged whether there are cracks on the left and right sides of the display panel. , But it is impossible to determine whether the crack is generated on the display substrate or the touch structure layer.
  • test signal In the module test stage, input test signals from the Panel Crack Detection (PCD) pad on one side, detect the output signal of the PCD pad on the other side, and judge whether there is a crack based on the output signal.
  • the test signal is from The PCD pad on one side sequentially passes through the third lead section 21, the first lead section 11, the fifth lead section 13, the second lead section 12 and the fourth lead section 22 to the PCD pad on the other side to obtain the output signal, according to the output signal
  • the status can be used to determine whether the display panel has cracks.
  • FIG. 2 is a schematic diagram of a planar structure of a display panel provided by an embodiment of the present disclosure.
  • an embodiment of the present disclosure provides a display panel including a display area 100 and a peripheral area 200 surrounding the display area 100.
  • the display area 100 is provided with at least one first data line 101 and at least one first data line 101.
  • Two data lines 102, the peripheral area 200 is provided with a crack detection circuit structure, the crack detection circuit structure includes a first crack detection line, a second crack detection line, and a first detection line electrically connected to the first data line 101
  • the switch circuit 51 and the second detection switch circuit 52 electrically connected to the second data line 102 are on a plane perpendicular to the display surface of the display panel.
  • the display panel shown includes a plurality of functional layers arranged in sequence, so The first crack detection line and the second crack detection line are arranged in different functional layers, wherein:
  • the first end A of the first crack detection line is configured to be electrically connected to the first test end, and the second end C of the first crack detection line is electrically connected to the input end of the first detection switch circuit 51.
  • the output terminal of a detection switch circuit 51 is electrically connected to the first data line 101; the first end A of the first crack detection line is the head end of the first crack detection line, and the second end C is the first end of the first crack detection line.
  • the first end B1 of the second crack detection line is electrically connected to the third node B of the first crack detection line (connected by a via hole), and the third node B is different from the first end B1 of the first crack detection line.
  • One end A and a second end C, the second end A1 of the second crack detection line is electrically connected to the input end of the second detection switch circuit 52, and the output end of the second detection switch circuit 52 is electrically connected to the The second data line 102;
  • the first end B1 of the second crack detection line is the head end of the second crack detection line, and the second end A1 is the end of the second crack detection line;
  • the third node B is The intermediate node of the first crack detection line;
  • the control terminal of the first detection switch circuit 51 and the control terminal of the second detection switch circuit 52 are configured to be electrically connected to the second test terminal.
  • the first crack detection line and the second crack detection line are arranged in different functional layers. After a test signal is applied to the first test terminal, the light-emitting state of the sub-pixel connected to the first data line can be determined. The light-emitting state of the sub-pixel connected to the second data line determines the location of the crack, which realizes the separate detection of the crack at the location of the first crack detection line and the location of the second crack detection line, so that the location of the crack can be detected. It is conducive to the accurate positioning of cracks in the process of product production and related failure analysis, high detection efficiency, improved yield, and improved productivity and product performance.
  • the node positions shown in FIG. 2 are only examples, and the embodiments of the present disclosure are not limited thereto.
  • the first data line 101 may have a one-to-one correspondence with the first detection switch circuit 51; the output terminal of the first detection switch circuit 51 is electrically connected to the corresponding first data line 101;
  • the second data line 102 may have a one-to-one correspondence with the second detection switch circuit 52; the output terminal of the second detection switch circuit 52 is electrically connected to the corresponding first data line 102.
  • FIG. 2 shows only one first data line 101 and one detection switch circuit 51 corresponding to the first data line 101, and one second data line 102 and one detection switch circuit 52 corresponding to the second data line 102.
  • the embodiment of the present disclosure is not limited to this.
  • Each data line connects a column of sub-pixels to control the light-emitting state of the sub-pixels.
  • the peripheral area 200 includes a first area 201 provided with a bonding area (for bonding driver integrated circuits), and a first area 201 disposed opposite to the first area 201.
  • the first end A and the second end C of the first crack detection line may be located in the first area; the first crack detection line may be located in the first area 201, the second area 202, and the third area 203 ;
  • the first end B1 of the second crack detection line may be located in the second area 202, the second end A1 may be located in the first area 201, and the second crack detection line may be located in the first area 201, The second area 202 and the third area 203.
  • the first crack detection line and the second crack detection line may be located on the side of the central axis 300 of the display panel close to the third area 203.
  • the central axis 300 is located between the third area 203 and the fourth area 204.
  • the endpoints B1 and B are as close to the central axis 300 as possible, so that the crack detection range is as large as possible.
  • the embodiment of the present disclosure is not limited to this, and the first crack detection line and the second crack detection line may be distributed in all areas of the peripheral area 200.
  • the orthographic projection of the first crack detection line may include the orthographic projection of the second crack detection line.
  • the orthographic projection of the first end B1 of the second crack detection line and the orthographic projection of the third node B of the first crack detection line can overlap or approximately overlap, and the second end A1 of the second crack detection line
  • the orthographic projection falls into the orthographic projection of the first crack detection line, and the extending direction of the endpoints B1 to A1 is the same as the extending direction of B to A.
  • the orthographic projection of the second crack detection line falls into the orthographic projection of the first crack detection line, that is, the line widths of the first crack detection line and the second crack detection line can be different, but two The orthographic projections of the endpoints of the two coincide, and when the extension directions are the same, it is considered that the orthographic projection of the first crack detection line includes the orthographic projection of the second crack detection line.
  • this solution reduces the area occupied by the crack detection traces, thereby reducing the frame size.
  • the orthographic projection of the second crack detection line may be outside the orthographic projection of the first crack detection line.
  • it may be located on the side of the first crack detection line away from the display area 100, or it may be located on the side of the first crack detection line close to the display area 100.
  • the first crack detection line includes lead segments from A to B and B to C
  • the second crack detection line includes lead segments from B1 to A1, where the lead segments from B to C can be located
  • the lead segments A to B are close to the side of the display area 100, and the orthographic projection of the lead segments A to B can cover the orthographic projection of the end point A1.
  • the first crack detection line may include lead segments from A to B, lead segments from B to B', and lead segments from B'to C, where the lead segments from B to C can be located from A to C.
  • the lead segment of B is close to the side of the display area 100, and the second crack detection line includes the lead segments from endpoints B2 to A2, where endpoint A, endpoint C, and endpoint A2 can be located in the first area 201, endpoint B, endpoint B', and endpoint B2 may be located in the second area 202, the orthographic projection of the end point B2 and the orthographic projection of the end point B′ may overlap, and the orthographic projection of the lead segment from the end point B to the end point C may include the orthographic projection of the end point A2.
  • the terminal A2 is electrically connected to the input terminal of the second detection switch circuit 52.
  • the display area 100 may further include a fifth data line 105
  • the crack detection circuit structure may include a first crack detection line, a second crack detection line, and a fifth crack detection line.
  • the first detection switch circuit 51, the second detection switch circuit 52, and the fifth detection switch circuit 55 wherein the first crack detection line may include a lead segment from end A to end B, a lead segment from end B to end B', and The lead segment from end B'to end C, the second crack detection line may include a lead segment from end B1 to end A1, and the fifth crack detection line may include a lead segment from end B2 to end A2, and the end B1 passes through the via hole.
  • the terminal B2 is electrically connected to the terminal B'through the via hole
  • the terminal C of the first crack detection line is electrically connected to the input terminal of the first detection switch circuit 51
  • the output terminal of the first detection switch circuit 51 is electrically connected to
  • the first data line 101 and the end point A1 of the second crack detection line are electrically connected to the input end of the second detection switch circuit 52
  • the output end of the second detection switch circuit 52 is electrically connected to the second data line 102
  • the terminal A2 of is electrically connected to the input terminal of the fifth detection switch circuit 55
  • the output terminal of the fifth detection switch circuit 55 is electrically connected to the fifth data line 105.
  • the first crack detection line and the second crack detection line may include a serpentine structure (such as S-shaped, W-shaped, Z-shaped wiring, etc.).
  • the display panel may include a display substrate and a touch structure layer 34 arranged in sequence, and the display substrate may include The substrate 30, the driving structure layer 31, the light emitting structure layer 32 and the encapsulation layer 33 are arranged in sequence.
  • the touch structure layer 34 may include a transfer metal layer 341, a touch insulating layer 342 and a touch electrode layer 343 arranged in sequence.
  • One of the first crack detection line and the second crack detection line may be disposed in the peripheral area of the display substrate, and the other may be disposed in the peripheral area of the touch structure layer 34.
  • the first crack detection line may be provided in the peripheral area of the touch structure layer 34, and the second crack detection line may be provided in the peripheral area of the display substrate; or, the second crack detection line may be The first crack detection line may be arranged in the peripheral area of the touch structure layer 34, and the first crack detection line may be arranged in the peripheral area of the display substrate.
  • the embodiments of the present disclosure are not limited to this.
  • the first crack detection line and the second crack detection line can be arranged in the corresponding functional layers.
  • no Limited to setting the first crack detection line and the second crack detection line more crack detection lines can be set to detect corresponding functional layers.
  • the first test terminal may include an ET test pad P1, and the second test terminal may include an ET test pad P2, or the first test terminal may include a module test pad.
  • Disk P3, the second test terminal may include a module test pad P4, or the first test terminal may include an ET test pad P1 and a module test pad P3, and the second test terminal may include ET Test pad P2 and module test pad P4.
  • the ET test pad P1 and the ET test pad P2 can be electrically connected to the detection probe.
  • the ET test pad P1 provides the test signal to the first crack detection line (transmitted from the first crack detection line to the second crack detection line), ET test
  • the pad P2 provides a control signal to the first detection switch circuit 51 and the second detection switch circuit 52 to turn on the detection switch circuit.
  • the module test pad P3 and the module test pad P4 can be electrically connected to the driving integrated circuit, and the module test pad P3 provides test signals to the first crack detection line (transmitted from the first crack detection line to the second crack detection line) , The module test pad P4 provides a control signal to the first detection switch circuit 51 and the second detection switch circuit 52 to turn on the detection switch circuit.
  • the first crack detection line may be provided in the peripheral area of the touch structure layer 34
  • the second crack detection line may be provided in the peripheral area of the display substrate
  • the crack detection process can include:
  • the control signal is loaded to the first detection switch circuit 51 and the second detection switch circuit 52 through the second test terminal, namely the ET test pad P2, to turn on the first detection switch circuit 51 and the second detection switch circuit 51.
  • the detection switch circuit 52 the test signal is loaded to the end point A of the first crack detection line through the first test terminal, namely the ET test pad P1, when there is no crack, the test signal is loaded to the first detection switch circuit 51 through the first crack detection line
  • the connected first data line 101 makes the sub-pixels connected to the first data line 101 present the first light-emitting state, and the test signal passes through the end point A to the end point B, from the end point B to the end point B1 of the second crack detection line, passes
  • the second crack detection line is loaded on the second data line 102 connected to the second detection switch circuit 52, so that the sub-pixels connected to the second data line 102 present the first light-emitting state; the data line not used for crack detection in the display panel is connected The sub-pixels present in
  • the test signal cannot be transmitted to the end point B and the end point C, nor can it be transmitted to the end point B1 and the end point A1, thus the first crack detection
  • the first data line 101 connected by the wire is in the floating state
  • the sub-pixel connected to the first data line 101 is in the second light-emitting state
  • the second data line 102 connected by the second crack detection line is in the floating state
  • the second data line 102 is connected
  • the sub-pixel presents a second light-emitting state
  • the test signal cannot be transmitted to the end point C, and the first data line 101 connected to the end point C is in a floating state.
  • the sub-pixel connected to a data line 101 presents the second light-emitting state, and the test signal can be transmitted through the terminal A to the terminal B, through the terminal B to the terminal B1, and then transmitted to the terminal A1, and the second data line 102 connected to the terminal A1 is connected
  • the test signal is transmitted through the terminal A to the terminal C, and the test signal is transmitted through the terminal C to the terminal connected with the terminal C.
  • the first data line 101, the sub-pixel connected to the first data line 101 presents the first light-emitting state; the test signal cannot be transmitted to the end point A1, the second data line 102 connected to the end point A1 is in a floating state, and the sub-pixel connected to the second data line 102 The pixel presents a second light-emitting state;
  • the first light-emitting state is, for example, a dark state
  • the second light-emitting state is, for example, a bright state
  • the first light-emitting state is, for example, a bright state
  • the second light-emitting state is, for example, For the dark state.
  • the first light-emitting state as the dark state
  • the second light-emitting state as the bright state
  • the sub-pixels connected to the first data line 101 are in the bright state (a column of sub-pixels are in the bright state, and thus bright lines appear on the display panel)
  • the sub-pixels connected to the two data lines 102 are in a bright state (bright lines appear on the display panel)
  • a crack exists between the end point A and the end point B of the touch structure layer 34;
  • the first data line 101 may be arranged on the side of the second data line 102 close to the third area 203, so that the location of the crack can be intuitively determined by the number and position of the bright lines.
  • the first data line 101 and the second data line 102 can be connected to sub-pixels of different colors, and the location of the crack can be intuitively determined based on the number and color of the bright lines.
  • the embodiment of the present disclosure is not limited to this, and the light-emitting color of the sub-pixel connected to the first data line 101 and the light-emitting color of the sub-pixel connected to the second data line 102 may be the same.
  • the second crack detection line may be provided in the peripheral area of the touch structure layer 34
  • the first crack detection line may be provided in the peripheral area of the display substrate
  • the crack detection process includes:
  • the control signal is loaded to the first detection switch circuit 51 and the second detection switch circuit 52 through the ET test pad P2 to turn on the first detection switch circuit 51 and the second detection switch circuit 52,
  • the test signal is loaded to the end point A of the first crack detection line through the ET test pad P1.
  • the test signal is loaded to the first data line 101 connected to the first detection switch circuit 51 through the first crack detection line, so that The sub-pixel connected to the first data line 101 presents the first light-emitting state, and the test signal passes through the end point A to the end point B, from the end point B to the end point B1 of the second crack detection line, and is loaded to the second detection through the second crack detection line
  • the second data line 102 connected to the switch circuit 52 makes the sub-pixels connected to the second data line 102 present the first light-emitting state; the sub-pixels connected to the data lines not used for crack detection in the display panel present the first light-emitting state;
  • the test signal cannot be transmitted to the end point B and the end point C, nor can it be transmitted to the end point B1 and the end point A1, so that the first crack detection line is connected
  • the first data line 101 is in a floating state, the sub-pixels connected to the first data line 101 present a second light-emitting state, the second data line 102 connected to the second crack detection line is in a floating state, and the sub-pixels connected to the second data line 102 present Second light-emitting state;
  • the test signal cannot be transmitted to the end point C, and the first data line 101 connected to the end point C is in a floating state.
  • the sub-pixel connected to 101 presents the second light-emitting state, and the test signal can be transmitted through the terminal A to the terminal B, through the terminal B to the terminal B1, and then to the terminal A1, the sub-pixel connected to the second data line 102 connected to the terminal A1 Present the first light-emitting state;
  • the test signal is transmitted to the end point C through the end point A, and is transmitted to the first data line 101 through the end point C.
  • the sub-pixel connected to a data line 101 presents the first light-emitting state; the test signal cannot be transmitted to the end point A1, the second data line 102 connected to the end point A1 is in a floating state, and the sub-pixel connected to the second data line 102 presents the second light-emitting state.
  • the COF is bound to the driver integrated circuit (Integrate Circuit, IC), the driver IC is bonded to the panel, and the test signal and control signal are input from the driver IC.
  • the crack detection in the module test stage is similar to the crack detection in the ET test stage.
  • the control signal is loaded to the first detection switch circuit 51 and the second detection switch circuit 52 through the module test pad P4 to turn on the first detection switch.
  • the test signal is loaded to the end point A of the first crack detection line through the module test pad P3, and the rest is similar to the crack detection in the ET test stage, and will not be repeated.
  • the driving structure layer 31 may include an active layer 311, a first gate insulating layer 312, a first gate metal layer 313, a second gate insulating layer 314, a second gate metal layer 315, Between the insulating layer 316 and the source/drain metal layer 317, the crack detection line provided on the display substrate can be provided in the same layer as the source/drain metal layer 317. For example, when the second crack detection line is provided on the display substrate, the second crack detection line The same layer as the source and drain metal layer 317 is provided. As shown in FIG. 5, the second crack detection line 112 and the source and drain metal layer 317 are provided in the same layer.
  • the crack detection line provided on the display substrate may be provided in the same layer as the second gate metal layer 315.
  • the second crack detection line is the same as the The second gate metal 315 layer is arranged in the same layer.
  • a part of the crack detection line provided on the display substrate may be provided in the same layer as the source and drain metal layer 317, and a part may be provided in the same layer as the second gate metal layer 315.
  • a part of the second crack detection line may be provided in the same layer as the source and drain metal layer 317, and a part may be provided in the same layer as the second gate metal layer 315.
  • the crack detection line provided on the touch structure layer 34 may be provided in the same layer as the touch electrode layer 343, or may be provided in the same layer as the transfer metal layer 341.
  • the first crack detection line when the first crack detection line is disposed on the touch structure layer 34, the first crack detection line may be disposed in the same layer as the touch electrode layer 343, or the first crack detection line may be disposed on the same layer as the touch electrode layer 343.
  • the transition metal layer 341 is provided in the same layer.
  • the first crack detection line and the touch electrode layer 343 are arranged in the same layer.
  • the first crack detection line includes two inner and outer lead segments 211 (lead segment from end C to end B) and 212 (lead segment from end B to end A) and the touch electrode layer 343 are arranged in the same layer.
  • FIG. 6 is a schematic plan view of a display panel provided by another embodiment.
  • the side of the central axis 300 close to the third area 203 is referred to as the first side
  • the side close to the fourth area 204 is referred to as the second side.
  • crack detection lines are provided on both sides of the central axis 300, wherein the crack detection circuit structure may include a first crack detection line and a second crack detection line provided on the first side of the central axis 300.
  • the first detection switch circuit 51 and the second detection switch circuit 52 refer to the foregoing embodiment, and will not be repeated here.
  • the display panel may further include at least one third data line 103 and at least one fourth data line 104
  • the crack detection circuit structure may further include a third crack detection line and a first crack detection line arranged on the second side of the central axis 300.
  • the four-crack detection line may also include a third detection switch circuit 53 electrically connected to the third data line 103, a fourth detection switch circuit 54 electrically connected to the fourth data line 104, and the third
  • the crack detection line and the fourth crack detection line may be arranged in different functional layers of the display panel, wherein:
  • the first end D of the third crack detection line may be electrically connected to the third test end, and the second end F of the third crack detection line may be electrically connected to the input end of the third detection switch circuit 53.
  • the output terminal of the three detection switch circuit 53 may be electrically connected to the third data line 103;
  • the first end E1 of the fourth crack detection line is electrically connected to the fourth node E of the third crack detection line, and the second end D1 of the fourth crack detection line is electrically connected to the fourth node E of the fourth detection switch circuit 54 Input terminal, the output terminal of the fourth detection switch circuit 54 is electrically connected to the fourth data line 104;
  • the control terminal of the third detection switch circuit 53 and the control terminal of the fourth detection switch circuit 54 are electrically connected to the fourth test terminal;
  • the first end D and the second end F of the third crack detection line may be located in the first area 201; the third crack detection line may be located in the first area 201, the second area 202, and the fourth area 204;
  • the first end E1 of the fourth crack detection line may be located in the second area 202, the second end D1 may be located in the first area 201, and the fourth crack detection line may be located in the first area 201, The second area 202 and the fourth area 204.
  • the first crack detection line and the third crack detection line do not cross each other, and the second crack detection line and the fourth crack detection line do not cross each other.
  • the solution provided in this embodiment can detect the cracks on both sides of the central axis 300 respectively, that is, it can locate whether the crack is on the left or right side of the display panel, and which layer where the crack detection line is located.
  • the panel is divided into multiple regions, and multiple regions correspond to sub-pixel columns. The crack position is judged by the light-emitting state of different sub-pixel columns. The judgment of micro-cracks around the panel is very intuitive and accurate, which facilitates repair and improves yield.
  • first crack detection line, the second crack detection line, the third crack detection line, and the fourth crack detection may not be located on both sides of the central axis 300, and there may be between the third area 203 and the fourth area 204 A separation line, the first crack detection line and the second crack detection line can be located on one side of the separation line, the third crack detection line and the fourth crack detection line can be located on the other side of the separation line, and so on.
  • first crack detection line and the third crack detection line may cross each other, and the second crack detection line and the fourth crack detection line may cross each other.
  • the endpoint B and the endpoint E can be infinitely close to each other. Electrical insulation, the end point B1 and the end point E1 can be infinitely close but electrically insulated from each other, so that the crack detection line can be as full as possible in the surrounding area to ensure a more comprehensive crack detection.
  • the third test terminal may include an ET test pad P5, and the second test terminal may include an ET test pad P6, or the first test terminal may include a module test pad. Disk P7, the second test terminal may include a module test pad P8, or the first test terminal may include an ET test pad P5 and a module test pad P7, and the second test terminal may include ET Test pad P6 and module test pad P8.
  • the ET test pad P5 and the ET test pad P6 can be electrically connected to the detection probes, the ET test pad P5 provides test signals to the third crack detection line, and the ET test pad P6 provides control signals to the third detection switch circuit 53 and the third crack detection line.
  • the four detection switch circuit 54 conducts the detection switch circuit.
  • the module test pad P7 and the module test pad P8 can be electrically connected to the drive integrated circuit.
  • the module test pad P7 provides test signals to the third crack detection line, and the module test pad P8 provides control signals to the third detection switch
  • the circuit 53 and the fourth detection switch circuit 54 turn on the detection switch circuit.
  • the realization of the third crack detection line and the fourth crack detection line is similar to the first crack detection line and the second crack detection line. Therefore, the realization of the first crack detection line and the second crack detection line in the foregoing multiple embodiments It can be applied to the third crack detection line and the third crack detection line, and will not be repeated here.
  • the crack detection method is also similar to the detection method when the first crack detection line and the second crack detection line are used.
  • the third crack detection line and the fourth crack detection line are, for example, serpentine structures (such as S-shaped, W-shaped, Z-shaped traces, etc.).
  • the third crack detection line and the first crack detection line may be symmetrically arranged with respect to the central axis 300, and the fourth crack detection line and the second crack detection line may be arranged relative to the central axis 300.
  • 300 symmetrical settings.
  • the embodiment of the present disclosure is not limited to this, and the crack detection lines on both sides of the central axis 300 may be asymmetrical.
  • the first data line 101 and the second data line 102 may be located on the same side of the central axis 300 as the first crack detection line and the second crack detection line, or on different sides of the central axis 300.
  • the third data line 103 and the fourth data line 104 may be located on the same side of the central axis 300 as the third crack detection line and the fourth crack detection line, or located on different sides of the central axis 300.
  • the orthographic projection of the third crack detection line may include the orthographic projection of the fourth crack detection line.
  • the orthographic projection of the first end E1 of the fourth crack detection line and the orthographic projection of the fourth node E of the third crack detection line can overlap or approximately overlap, and the second end D1 of the fourth crack detection line
  • the orthographic projection falls into the orthographic projection of the third crack detection line, and the extension direction of the end points E1 to D1 is the same as the extension direction of E to D.
  • the line width of the third crack detection line and the fourth crack detection line can be different, but when the orthographic projections of the endpoints of the two overlap or approximately overlap, and the extension directions are the same, the orthographic projection of the third crack detection line is considered to include the fourth crack detection line Orthographic projection.
  • This solution reduces the area occupied by the crack detection traces and can reduce the frame.
  • the orthographic projection of the fourth crack detection line may be at least partially outside the orthographic projection of the third crack detection line.
  • the third crack detection line and the first crack detection line may be provided in the same layer, and the fourth crack detection line and the second crack detection line may be provided in the same layer.
  • the fourth crack detection line 121 and the second crack detection line 112 are arranged in the same layer, and the third crack detection line (the two lead sections 221, 222 of the third crack detection line) is the same as the first crack detection line.
  • the crack detection lines (the two lead segments 211 and 212 of the first crack detection line) are arranged in the same layer.
  • the third crack detection line and the first crack detection line may be arranged in different layers, and the fourth crack detection line and the second crack detection line may Different layer settings.
  • the setting method of the crack detection lines on both sides of the central axis 300 may be irrelevant.
  • the first crack detection line may be set on the display substrate
  • the third crack detection line may be set on the touch structure layer
  • the second crack detection line may be set In the touch structure layer
  • the fourth crack detection line can be provided on the display substrate, and so on.
  • the detection switch circuit (the first detection switch circuit 51 to the fourth detection switch circuit 54) may include at least one thin film transistor, and the control of the thin film transistor is as described above.
  • the control terminal of the detection switch circuit, the first terminal of the thin film transistor is the input terminal of the detection switch circuit, and the second terminal of the thin film transistor is the output terminal of the detection switch circuit.
  • the thin film transistor as a P-channel metal oxide semiconductor field effect transistor (PMOS) as an example
  • PMOS metal oxide semiconductor field effect transistor
  • a low level is applied to the second test terminal P2 to control the conduction of the first detection switch circuit 51 and the second detection
  • the switch circuit 52 is turned on.
  • the embodiments of the present disclosure are not limited thereto.
  • the thin film transistor is, for example, an N-channel metal oxide semiconductor field effect transistor (NMOS).
  • NMOS N-channel metal oxide semiconductor field effect transistor
  • a high level is applied to the second test terminal P2, thereby controlling the first detection switch circuit 51 to conduct and the second detection switch circuit 52 to conduct.
  • the detection switch circuit provided in this embodiment is only an example, and may be other types of switch circuits.
  • the detection switch circuit may include multiple thin film transistors.
  • FIG. 8 is a flowchart of a crack detection method of a display panel provided by an embodiment of the disclosure. As shown in FIG. 8, this embodiment provides a crack detection method for a display panel.
  • the display panel is the display panel described in the above embodiments, and the crack detection method may include:
  • Step 801 Receive a turn-on signal input from the second test terminal and turn on the first detection switch circuit and the second detection switch circuit, and receive a test signal input from the first test terminal, the test signal Satisfaction: when the test signal is loaded on the data line, the sub-pixel connected to the data line presents the first light-emitting state;
  • Step 802 Determine the crack state information of the display panel according to the light-emitting state of the sub-pixels of the display panel.
  • the crack state information may include whether there is a crack in the display panel, and the position of the crack.
  • the determining the crack state information of the display panel according to the light-emitting state of the sub-pixels of the display panel includes:
  • one of the first light-emitting state and the second light-emitting state is a bright state, and the other is a dark state.
  • the display panel when the sub-pixels of the display panel all present the first light-emitting state, the display panel has no cracks.
  • the first light-emitting state is the dark state
  • the sub-pixels of the display panel when the sub-pixels of the display panel are all in the dark state (black screen), the display panel has no cracks; when there are bright lines, according to the position of the bright line or the color or two in the foregoing embodiment The combination of the two to determine the area where the crack is located.
  • the crack detection method of the display panel provided by the embodiment of the present disclosure can determine the functional layer where the crack is located according to the light-emitting state of different sub-pixels, the positioning is more accurate, the repair is convenient, and the yield is improved.
  • the embodiment of the present disclosure also provides a display device including the display panel of the foregoing embodiment.
  • the display device provided in this embodiment can detect cracks in different functional layers, which is convenient for repair and improves the yield rate.
  • the display device may be an OLED display device, or other display devices.
  • the display device may be any product or component with a display function, such as a smart bracelet, a mobile phone, a tablet computer, a TV, a monitor, a notebook computer, a digital photo frame, a navigator, and the like.

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Abstract

一种显示面板及其裂纹检测方法、显示装置，显示面板包括显示区（100）和围绕显示区的周边区（200），显示区（100）设置有至少一条第一数据线（101）和至少一条第二数据线（102），周边区（200）设置有第一裂纹检测线、第二裂纹检测线、第一检测开关电路（51）和第二检测开关电路（52），第一裂纹检测线和第二裂纹检测线设置于不同功能层中，第一裂纹检测线的第一端（A）配置为电连接第一测试端，第二端（C）电连接第一检测开关电路（51），第二裂纹检测线的第一端（B1）电连接第一裂纹检测线的第三节点（B），该第三节点（B）不同于第一裂纹检测线的第一端（A）和第二端（C），第二裂纹检测线的第二端（A1）电连接第二检测开关电路（52）。

Description

显示面板及其裂纹检测方法、显示装置
本申请要求于2020年6月11日提交中国专利局、申请号为202010529509.0、发明名称为“一种显示面板及其裂纹检测方法、显示装置”的中国专利申请的优先权，其内容应理解为通过引用的方式并入本申请中。
技术领域
本公开实施例涉及但不限于显示技术，尤指一种显示面板及其裂纹检测方法、显示装置。
背景技术
随着有源矩阵发光二极管(Active Matrix Organic Light-Emitting Diode，AMOLED)在显示领域的迅猛发展，良率的提升迫在眉睫。由于AMOLED衬底是柔韧性较好的材料，在柔性面板的边缘容易发生微小的裂纹，我们知道，柔性显示使用的是有机发光二极管技术，水和氧对于有机发光二极管会发生具有破坏性的化学反应，而裂纹的存在给水氧提供了途径，最终导致发光区域出现暗点，甚至材料的失效和寿命降低等一系列的问题。
柔性多层一体化集成触控(Flexible Multi-Layer On Cell，FMLOC)技术将屏幕与触控集成为一体，使得显示装置的集成度大幅提高，FMLOC技术已经成为显示行业的发展趋势。使用FMLOC技术时，不仅基板可能存在裂纹，FMLOC也可能存在裂纹。
发明内容
以下是对本文详细描述的主题的概述。本概述并非是为了限制权利要求的保护范围。
一方面，本公开实施例提供了一种显示面板，所述显示面板包括显示区和围绕所述显示区的周边区，所述显示区设置有至少一条第一数据线和至少一条第二数据线，所述周边区设置有裂纹检测电路结构，所述裂纹检测电路 结构包括第一裂纹检测线、第二裂纹检测线、与所述第一数据线电连接的第一检测开关电路和与所述第二数据线电连接的第二检测开关电路，在垂直于所述显示面板的显示面的平面上，所述显示面板包括依次设置的多个功能层，所述第一裂纹检测线和所述第二裂纹检测线设置于不同功能层中，其中：
所述第一裂纹检测线的第一端配置为电连接第一测试端，所述第一裂纹检测线的第二端电连接所述第一检测开关电路的输入端，所述第一检测开关电路的输出端电连接所述第一数据线；
所述第二裂纹检测线的第一端电连接所述第一裂纹检测线的第三节点，所述第三节点不同于所述第一裂纹检测线的第一端和第二端，所述第二裂纹检测线的第二端电连接所述第二检测开关电路的输入端，所述第二检测开关电路的输出端电连接所述第二数据线；
所述第一检测开关电路的控制端和第二检测开关电路的控制端配置为电连接第二测试端。
在一示例性实施例中，所述周边区包括设置有绑定区的第一区域、与所述第一区域相对设置的第二区域，以及连接所述第一区域和所述第二区域且相对设置的第三区域和第四区域；
所述第一裂纹检测线的第一端和第二端位于所述第一区域；所述第一裂纹检测线位于所述第一区域、第二区域和第三区域；
所述第二裂纹检测线的第一端位于所述第二区域，第二端位于所述第一区域，所述第一裂纹检测线位于所述第一区域、第二区域和第三区域。
在一示例性实施例中，在平行于所述显示面板的显示面的平面上，所述第一裂纹检测线的正投影包含所述第二裂纹检测线的正投影。
在一示例性实施例中，所述显示区还设置有至少一条第三数据线和至少一条第四数据线，所述裂纹检测电路结构还包括第三裂纹检测线、第四裂纹检测线、与所述第三数据线电连接的第三检测开关电路和与所述第四数据线电连接的第四检测开关电路，所述第三裂纹检测线和所述第四裂纹检测线设置在所述显示面板的不同功能层中，其中：
所述第三裂纹检测线的第一端电连接第三测试端，所述第三裂纹检测线 的第二端电连接所述第三检测开关电路的输入端，所述第三检测开关电路的输出端电连接所述第三数据线；
所述第四裂纹检测线的第一端电连接所述第三裂纹检测线的第四节点，所述第四节点不同于所述第三裂纹检测线的第一端和第二端，所述第四裂纹检测线的第二端电连接所述第四检测开关电路的输入端，所述第四检测开关电路的输出端电连接所述第四数据线；
所述第三检测开关电路的控制端和第四检测开关电路的控制端电连接第四测试端；
所述第一裂纹检测线和所述第二裂纹检测线位于所述显示面板的中轴线的一侧，所述第三裂纹检测线和所述第四裂纹检测线位于所述显示面板的中轴线的另一侧，其中，所述中轴线为所述第三区域和所述第四区域之间的中轴线。
在一示例性实施例中，所述第三裂纹检测线的第一端和第二端位于所述第一区域；所述第三裂纹检测线位于所述第一区域、第二区域和第四区域；
所述第四裂纹检测线的第一端位于所述第二区域，第二端位于所述第一区域，所述第四裂纹检测线位于所述第一区域、第二区域和第四区域。
在一示例性实施例中，所述显示面板还包括与所述第一数据线连接的第一子像素，与所述第二数据线连接的第二子像素，且所述第一子像素的颜色不同于所述第二子像素的颜色。
在一示例性实施例中，在平行于所述显示面板的显示面的平面上，所述第三裂纹检测线的正投影包含所述第四裂纹检测线的正投影。
在一示例性实施例中，所述第三裂纹检测线与所述第一裂纹检测线同层设置，所述第四裂纹检测线与所述第二裂纹检测线同层设置。
在一示例性实施例中，在垂直于所述显示面板的显示面的平面上，所述显示面板包括依次设置的显示基板和触控结构层，所述第一裂纹检测线和所述第二裂纹检测线其中之一设置在所述显示基板的周边区，另一设置在所述触控结构层的周边区。
在一示例性实施例中，所述第一裂纹检测线设置在所述触控结构层的周 边区，所述第二裂纹检测线设置在所述显示基板的周边区。
在一示例性实施例中，所述显示基板包括驱动结构层，所述驱动结构层包括有源层、第一栅绝缘层、第一栅金属层、第二栅绝缘层、第二栅金属层、层间绝缘层和源漏金属层，所述第二裂纹检测线与所述源漏金属层同层设置；
或者，
所述显示基板包括驱动结构层，所述驱动结构层包括有源层、第一栅绝缘层、第一栅金属层、第二栅绝缘层、第二栅金属层、层间绝缘层和源漏金属层，所述第二裂纹检测线与所述第二栅金属层同层设置。
在一示例性实施例中，所述触控结构层包括依次设置的转接金属层、触控绝缘层和触控电极层，所述第一裂纹检测线与所述触控电极层同层设置，或者，所述第一裂纹检测线与所述转接金属层同层设置。
又一方面，本公开实施例提供一种显示装置，包括上述实施例所述的显示面板。
再一方面，本公开实施例提供一种显示面板的裂纹检测方法，所述显示面板上述任一实施例所述的显示面板，所述显示面板还包括与所述数据线连接的子像素，所述裂纹检测方法包括：
接收从所述第二测试端输入的导通信号并导通所述第一检测开关电路和第二检测开关电路，接收从所述第一测试端输入的测试信号，所述测试信号满足：当所述测试信号加载到所述数据线时，所述数据线所连接的子像素呈现第一发光状态；
根据所述显示面板的子像素的发光状态确定所述显示面板的裂纹状态信息。
在一示例性实施例中，所述根据所述显示面板的子像素的发光状态确定所述显示面板的裂纹状态信息包括：
当所述第一数据线所连接的子像素呈现第二发光状态，且所述第二数据线所连接的子像素呈现第二发光状态时，所述第一裂纹检测线的第一端和第三节点之间存在裂纹；
当所述第一数据线所连接的子像素呈现第二发光状态，所述第二数据线 所连接的子像素呈现第一发光状态时，所述第一裂纹检测线的第一端和第三节点之间无裂纹，所述第三节点和第二端之间存在裂纹，所述第二裂纹检测线的第一端至第二端之间无裂纹；
当所述第一数据线所连接的子像素呈现第一发光状态，所述第二数据线所连接的子像素呈现第二发光状态时，所述第二裂纹检测线第一端和第二端之间存在裂纹，所述第一裂纹检测线的第一端和第二端之间无裂纹；
其中，所述第一发光状态和所述第二发光状态其中之一为亮态，另一为暗态。
本公开的其它特征和优点将在随后的说明书中阐述，并且，部分地从说明书中变得显而易见，或者通过实施本公开而了解。本公开的目的和优点可通过在说明书以及附图中所特别指出的结构来实现和获得。
在阅读并理解了附图和详细描述后，可以明白其他方面。
附图说明
附图用来提供对本公开技术方案的进一步理解，并且构成说明书的一部分，与本公开的实施例一起用于解释技术方案，并不构成对技术方案的限制。
图1为一技术方案提供的显示面板示意图；
图2为本公开实施例提供的显示面板示意图；
图3为一实施例提供的显示面板示意图；
图4为另一实施提供的显示面板示意图；
图5为又一实施例提供的显示面板的剖面示意图；
图6为再一实施例提供的显示面板的示意图；
图7为另一实施例提供的显示面板的示意图；
图8为本公开实施例提供的显示面板的裂纹检测方法示意图。
具体实施方式
下文中将结合附图对本公开实施例进行详细说明。在不冲突的情况下， 本公开实施例及实施例中的特征可以相互任意组合。
在附图的流程图示出的步骤可以在诸如一组计算机可执行指令的计算机系统中执行。并且，虽然在流程图中示出了逻辑顺序，但是在某些情况下，可以以不同于此处的顺序执行所示出或描述的步骤。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
在本说明书中，晶体管是指至少包括栅电极、漏电极以及源电极这三个端子的元件。晶体管在漏电极(漏电极端子、漏区域或漏电极)与源电极(源电极端子、源区域或源电极)之间具有沟道区域，并且电流能够流过漏电极、沟道区域以及源电极。在本说明书中，沟道区域是指电流主要流过的区域。
在本说明书中，可以是第一极为漏电极、第二极为源电极，或者可以是第一极为源电极、第二极为漏电极。在使用极性相反的晶体管的情况或电路工作中的电流方向变化的情况等下，“源电极”及“漏电极”的功能有时互相调换。因此，在本说明书中，“源电极”和“漏电极”可以互相调换。
在本说明书中，“A的正投影包含B的正投影”是指，B的正投影落入A的正投影范围内，或者A的正投影覆盖B的正投影。
在本说明书中，“平行”是指两条直线形成的角度为-10°以上且10°以下的状态，因此，也包括该角度为-5°以上且5°以下的状态。另外，“垂直”是指两条直线形成的角度为80°以上且100°以下的状态，因此，也包括85°以上且95°以下的角度的状态。
图1为一种显示面板的平面结构示意图，该显示面板为采用FMLOC技 术的显示面板。所述显示面板可以包括显示基板和位于显示基板上的触控结构层。显示基板可以包括依次设置的基底、驱动结构层、发光结构层和封装层。触控结构层位于封装层背离基底的一侧。驱动结构层可以包括依次设置的有源层、第一栅绝缘层、第一栅电极层、第二栅绝缘层、第二栅电极层、层间绝缘层和源漏电极层。触控结构层可以包括依次设置的转接金属层、触控绝缘层和触控电极层。如图1所示，显示面板包括显示区100和位于显示区100外围的周边区200，周边区200围绕显示区100。显示区100又称有效显示区域(Active Area，AA)。所述显示面板还可以包括第一裂纹检测线，第一裂纹检测线位于周边区200且围绕显示区100设置。第一裂纹检测线可以包括第一引线段11、第二引线段12和第五引线段13。第一裂纹检测线可以与源漏电极层或第二栅电极层同层设置。所述显示面板还可以包括第二裂纹检测线，第二裂纹检测线位于周边区200且围绕显示区100设置。第二裂纹检测线可以包括第三引线段21、第四引线段22。第二裂纹检测线可以与触控电极层同层设置。第一引线段11通过过孔电连接到所述第三引线段21，第二引线段21通过过孔电连接到所述第四引线段22。
本实施例中，在电性测试阶段，测试信号从电性检测(Electrical Test，ET)单元或者覆晶薄膜(Chip On Film，COF)单元出发，沿着显示面板周边走线(从第三引线段21至第一引线段11，从第四引线线22至第二引线段12)，进入面板的盒测试(Cell Test，CT)单元，经由CT单元中的若干薄膜晶体管(Thin Film Transistor，TFT)接入显示区100的数据线，CT单元的TFT栅极由CTSW信号控制。在进行ET(电性测试)时，当显示区100出现亮线时，判断显示面板产生裂纹。由于第一引线段11和第三引线段21串联为一个整体，第二引线段12和第三引线段22串联为一个整体，因此，虽然可以判断出显示面板的左侧、右侧是否产生裂纹，但无法判断出裂纹产生在显示基板还是触控结构层。
在模组测试阶段，从一侧面板裂纹检测(Panel Crack Detection，PCD)焊盘输入测试信号，检测另一侧PCD焊盘的输出信号，根据输出信号判断是否存在裂纹，此时，测试信号从一侧PCD焊盘依次经过第三引线段21、第一引线段11、第五引线段13、第二引线段12和第四引线段22到达另一侧 PCD焊盘得到输出信号，根据输出信号的状态可以判断显示面板是否产生裂纹。当判断出显示面板的周边区200产生裂纹时，由于第二裂纹检测线和第一裂纹检测线串联为一个整体回路，无法判断出裂纹产生在第一裂纹检测线所在的位置(显示基板)还是第二裂纹检测线所在的位置(触控结构层)。因此，采用图1所示的显示面板，由于面板周边的触控结构层和显示基板的裂纹检测走线串连在一起，因此无法检测裂纹的位置，给改善修复带来很大不便。
图2为本公开实施例提供一种显示面板的平面结构示意图。如图2所示，本公开实施例提供一种显示面板，包括显示区100和围绕所述显示区100的周边区200，所述显示区100设置有至少一条第一数据线101和至少一条第二数据线102，所述周边区200设置有裂纹检测电路结构，所述裂纹检测电路结构包括第一裂纹检测线、第二裂纹检测线、与所述第一数据线101电连接的第一检测开关电路51和与所述第二数据线102电连接的第二检测开关电路52，在垂直于所述显示面板的显示面的平面上，所示显示面板包括依次设置的多个功能层，所述第一裂纹检测线和所述第二裂纹检测线设置于不同功能层中，其中：
所述第一裂纹检测线的第一端A配置为电连接第一测试端，所述第一裂纹检测线的第二端C电连接所述第一检测开关电路51的输入端，所述第一检测开关电路51的输出端电连接所述第一数据线101；所述第一裂纹检测线的第一端A为所述第一裂纹检测线的首端，第二端C为所述第一裂纹检测线的末端；
所述第二裂纹检测线的第一端B1电连接所述第一裂纹检测线的第三节点B(通过过孔连接)，所述第三节点B不同于所述第一裂纹检测线的第一端A和第二端C，所述第二裂纹检测线的第二端A1电连接所述第二检测开关电路52的输入端，所述第二检测开关电路52的输出端电连接所述第二数据线102；所述第二裂纹检测线的第一端B1为所述第二裂纹检测线的首端，第二端A1为所述第二裂纹检测线的末端；第三节点B为所述第一裂纹检测线的中间节点；
所述第一检测开关电路51的控制端和第二检测开关电路52的控制端配 置为电连接第二测试端。
本实施例提供的显示基板，第一裂纹检测线和第二裂纹检测线设置于不同功能层中，在第一测试端施加测试信号后，可以根据第一数据线所连接的子像素的发光状态和第二数据线所连接的子像素的发光状态确定裂纹所在位置，实现了第一裂纹检测线所在位置和第二裂纹检测线所在位置的裂纹的单独检测，从而可以检测出裂纹产生的位置，有利于在对产品生产和相关不良解析过程中对裂纹的准确定位，检测效率高，提升良率，提高了产能和产品性能。
图2中所示的节点位置仅为示例，本公开实施例不限于此。
在一示例性实施例中，所述第一数据线101可以与第一检测开关电路51一一对应；所述第一检测开关电路51的输出端电连接对应的所述第一数据线101；所述第二数据线102可以与第二检测开关电路52一一对应；所述第二检测开关电路52的输出端电连接对应的所述第一数据线102。
图2中仅示出了一条第一数据线101和一个与第一数据线101对应的检测开关电路51，以及，一条第二数据线102和一个与第二数据线102对应的检测开关电路52，但本公开实施例不限于此，可以有多条第一数据线101以及对应的多个检测开关电路51，可以有多条第二数据线102以及对应的多个检测开关电路52。每条数据线连接一列子像素，控制子像素的发光状态。
在一示例性实施例中，如图2所示，所述周边区200包括设置有绑定区(用于绑定驱动集成电路)的第一区域201、与所述第一区域201相对设置的第二区域202，以及连接所述第一区域201和所述第二区域202且相对设置的第三区域203和第四区域204；
所述第一裂纹检测线的第一端A和第二端C可以位于所述第一区域；所述第一裂纹检测线可以位于所述第一区域201、第二区域202和第三区域203；
所述第二裂纹检测线的第一端B1可以位于所述第二区域202，第二端A1可以位于所述第一区域201，所述第二裂纹检测线可以位于所述第一区域201、第二区域202和第三区域203。
在一示例性实施例中，所述第一裂纹检测线和所述第二裂纹检测线可以 位于所述显示面板的中轴线300靠近所述第三区域203一侧。所述中轴线300位于第三区域203和第四区域204之间。所述端点B1和B尽量接近中轴线300，使得裂纹检测范围尽可能大。本公开实施例不限于此，第一裂纹检测线和第二裂纹检测线可以分布在周边区200的所有区域。
在一示例性实施例中，在平行于所述显示面板的显示面的平面上，所述第一裂纹检测线的正投影可以包含所述第二裂纹检测线的正投影。如图2所示，第二裂纹检测线的第一端B1的正投影和第一裂纹检测线的第三节点B的正投影可以重合或近似重合，第二裂纹检测线的第二端A1的正投影落入第一裂纹检测线的正投影，且端点B1到A1的延伸方向与B至A的延伸方向相同。本实施例中，当第二裂纹检测线的线宽大于第一裂纹检测线的线宽时，只要端点A1的正投影落入第一裂纹检测线的正投影，且端点B1到A1的延伸方向与B至A的延伸方向相同，也认为第二裂纹检测线的正投影落入第一裂纹检测线的正投影，即第一裂纹检测线和第二裂纹检测线的线宽可以不同，但二者的端点的正投影重合，延伸方向一致时认为第一裂纹检测线的正投影包含第二裂纹检测线的正投影。本方案相比图1所示方案，减少了裂纹检测走线所占面积，从而可以缩减边框。
在另一实施例中，所述第二裂纹检测线的正投影可以位于第一裂纹检测线的正投影之外。比如，可以位于第一裂纹检测线远离所述显示区100一侧，或者，可以位于第一裂纹检测线靠近所述显示区100一侧。
图2所示方案中，第一裂纹检测线包括A到B的引线段和B到C的引线段，第二裂纹检测线包括B1到A1的引线段，其中，B到C的引线段可以位于A到B的引线段靠近显示区100一侧，A到B引线段的正投影可以覆盖端点A1的正投影。但本公开实施例不限于此。如图3所示，第一裂纹检测线可以包括A到B的引线段、B到B’的引线段，以及，B’到C的引线段，其中，B到C的引线段可以位于A到B的引线段靠近显示区100一侧，第二裂纹检测线包括端点B2到A2的引线段，其中，端点A、端点C、端点A2可以位于第一区域201，端点B、端点B’和端点B2可以位于第二区域202，端点B2的正投影和端点B’的正投影可以重合，端点B到端点C的引线段的正投影可以包含端点A2的正投影。端点A2电连接到第二检测开关电路52 的输入端。
在另一实施例中，如图4所示，显示区100还可以包括第五数据线105，所述裂纹检测电路结构可以包括第一裂纹检测线、第二裂纹检测线和第五裂纹检测线、第一检测开关电路51、第二检测开关电路52以及第五检测开关电路55，其中，第一裂纹检测线可以包括端点A到端点B的引线段，端点B到端点B’的引线段和端点B’到端点C的引线段，所述第二裂纹检测线可以包括端点B1到端点A1的引线段，第五裂纹检测线可以包括端点B2到端点A2的引线段，端点B1通过过孔电连接到端点B，端点B2通过过孔电连接到端点B’，第一裂纹检测线的端点C电连接到第一检测开关电路51的输入端，第一检测开关电路51的输出端电连接到第一数据线101，第二裂纹检测线的端点A1电连接到第二检测开关电路52的输入端，第二检测开关电路52的输出端电连接到第二数据线102，第五裂纹检测线的端点A2电连接到第五检测开关电路55的输入端，第五检测开关电路55的输出端电连接到第五数据线105。
在一示例性实施例中，所述第一裂纹检测线和第二裂纹检测线可以包括蛇形结构(比如S形，W形，Z形走线等等)。
在一示例性实施例中，如图5所示，在垂直于所述显示面板的显示面的平面上，所述显示面板可以包括依次设置的显示基板和触控结构层34，显示基板可以包括依次设置的基底30、驱动结构层31、发光结构层32和封装层33，所述触控结构层34可以包括依次设置的转接金属层341、触控绝缘层342和触控电极层343。所述第一裂纹检测线和所述第二裂纹检测线其中之一可以设置在所述显示基板的周边区，另一可以设置在所述触控结构层34的周边区。比如，所述第一裂纹检测线设置在所述触控结构层34的周边区，所述第二裂纹检测线可以设置在所述显示基板的周边区；或者，所述第二裂纹检测线可以设置在所述触控结构层34的周边区，所述第一裂纹检测线可以设置在所述显示基板的周边区。本公开实施例不限于此，当显示面板存在更多功能层且需定位功能层中是否存在裂纹时，第一裂纹检线和第二裂纹检测线可以设置在相应的功能层中，另外，不限于设置第一裂纹检测线和第二裂纹检测线，可以设置更多裂纹检测线检测相应的功能层。
在一示例性实施例中，所述第一测试端可以包括ET测试焊盘P1，所述第二测试端可以包括ET测试焊盘P2，或者，所述第一测试端可以包括模组测试焊盘P3，所述第二测试端可以包括模组测试焊盘P4，或者，所述第一测试端可以包括ET测试焊盘P1和模组测试焊盘P3，所述第二测试端可以包括ET测试焊盘P2和模组测试焊盘P4。ET测试焊盘P1和ET测试焊盘P2可以电连接检测探针，ET测试焊盘P1提供测试信号至第一裂纹检测线(由第一裂纹检测线传输到第二裂纹检测线)，ET测试焊盘P2提供控制信号至第一检测开关电路51和第二检测开关电路52以导通检测开关电路。模组测试焊盘P3和模组测试焊盘P4可以电连接驱动集成电路，模组测试焊盘P3提供测试信号至第一裂纹检测线(由第一裂纹检测线传输到第二裂纹检测线)，模组测试焊盘P4提供控制信号至第一检测开关电路51和第二检测开关电路52以导通检测开关电路。
在一示例性实施例中，所述第一裂纹检测线可以设置在所述触控结构层34的周边区，所述第二裂纹检测线可以设置在所述显示基板的周边区，且裂纹检测线如图2所示时，裂纹检测过程可以包括：
在ET测试阶段作PCD时，控制信号通过第二测试端即ET测试焊盘P2加载到第一检测开关电路51和第二检测开关电路52以导通所述第一检测开关电路51和第二检测开关电路52，测试信号通过第一测试端即ET测试焊盘P1加载到第一裂纹检测线的端点A，当无裂纹时，测试信号通过第一裂检测线加载到第一检测开关电路51所连接的第一数据线101，使得第一数据线101连接的子像素呈现第一发光状态，以及，测试信号通过端点A到达端点B，从端点B到达第二裂纹检测线的端点B1，通过第二裂纹检测线加载到第二检测开关电路52所连接的第二数据线102，使得第二数据线102连接的子像素呈现第一发光状态；显示面板中不用于裂纹检测的数据线所连接的子像素呈现第一发光状态；
当触控结构层34的端点A至端点B之间存在裂纹，在端点A产生开路，则测试信号无法传输到端点B和端点C，也无法传输到端点B1和端点A1，从而第一裂纹检测线连接的第一数据线101处于悬空状态，第一数据线101连接的子像素呈现第二发光状态，第二裂纹检测线连接的第二数据线102处 于悬空状态，第二数据线102连接的子像素呈现第二发光状态；
当触控结构层34的端点A至端点B之间无裂纹，端点B至端点C之间存在裂纹，则测试信号无法传输到端点C，端点C连接的第一数据线101处于悬空状态，第一数据线101连接的子像素呈现第二发光状态，而测试信号可以通过端点A传输到端点B，通过端点B传输到端点B1，然后传输到端点A1，端点A1连接的第二数据线102连接的子像素呈现第一发光状态；
当显示基板的端点B1至端点A1之间存在裂纹，触控结构层34的端点A至端点C之间无裂纹，则测试信号通过端点A传输到端点C，通过端点C传输到端点C连接的第一数据线101，第一数据线101连接的子像素呈现第一发光状态；测试信号无法传输到端点A1，端点A1连接的第二数据线102处于悬空状态，第二数据线102连接的子像素呈现第二发光状态；
即，
当第一数据线101连接的子像素呈现第二发光状态，第二数据线102连接的子像素呈现第二发光状态时，触控结构层34的端点A至端点B之间存在裂纹；
当第一数据线101连接的子像素呈现第二发光状态，第二数据线102连接的子像素呈现第一发光状态时，判断触控结构层34的端点A至端点B之间无裂纹，端点B至端点C之间存在裂纹，显示基板的端点B1至端点A1之间无裂纹；
当第一数据线101连接的子像素呈现第一发光状态，第二数据线102连接的子像素呈现第二发光状态时，判断显示基板的端点B1至端点A1存在裂纹，触控结构层34的端点A至端点C之间无裂纹。
在一示例性实施例中，所述第一发光状态比如为暗态，所述第二发光状态比如为亮态；或者，所述第一发光状态比如为亮态，所述第二发光状态比如为暗态。
以第一发光状态为暗态，第二发光状态为亮态为例，当第一数据线101连接的子像素呈现亮态(一列子像素呈现亮态，从而显示面板上出现亮线)，第二数据线102连接的子像素呈现亮态(显示面板上出现亮线)时，触控结 构层34的端点A至端点B之间存在裂纹；
当第一数据线101连接的子像素呈现亮态(显示面板上出现亮线)，第二数据线102连接的子像素呈现暗态时，判断触控结构层34的端点A至端点B之间无裂纹，端点B至端点C之间存在裂纹，显示基板的端点B1至端点A1之间无裂纹；
当第一数据线101连接的子像素呈现暗态，第二数据线102连接的子像素呈现亮态(显示面板上出现亮线)时，判断显示基板的端点B1至端点A1存在裂纹，触控结构层34的端点A至端点C无裂纹。
在一示例性实施例中，可以将第一数据线101设置在第二数据线102靠近第三区域203一侧，从而可以通过亮线的数量及位置直观判断裂纹出现的位置。
在一示例性实施例中，第一数据线101和第二数据线102可以连接不同颜色的子像素，则可以通过亮线的数量及颜色直观判断裂纹出现的位置。本公开实施例不限于此，第一数据线101所连接的子像素的发光颜色和第二数据线102所连接的子像素的发光颜色可以相同。
在一示例性实施例中，所述第二裂纹检测线可以设置在所述触控结构层34的周边区，所述第一裂纹检测线可以设置在所述显示基板的周边区，且裂纹检测线如图2所示时，裂纹检测过程包括：
在ET测试阶段作PCD时，控制信号通过ET测试焊盘P2加载到第一检测开关电路51和第二检测开关电路52以导通所述第一检测开关电路51和第二检测开关电路52，测试信号通过ET测试焊盘P1加载到第一裂纹检测线的端点A，当无裂纹时，测试信号通过第一裂检测线加载到第一检测开关电路51所连接的第一数据线101，使得第一数据线101连接的子像素呈现第一发光状态，以及，测试信号通过端点A到达端点B，从端点B到达第二裂纹检测线的端点B1，通过第二裂纹检测线加载到第二检测开关电路52所连接的第二数据线102，使得第二数据线102连接的子像素呈现第一发光状态；显示面板中不用于裂纹检测的数据线所连接的子像素呈现第一发光状态；
当显示基板的端点A至端点B之间存在裂纹，在端点A产生开路，则 测试信号无法传输到端点B和端点C，也无法传输到端点B1和端点A1，从而第一裂纹检测线连接的第一数据线101处于悬空状态，第一数据线101连接的子像素呈现第二发光状态，第二裂纹检测线连接的第二数据线102处于悬空状态，第二数据线102连接的子像素呈现第二发光状态；
当显示基板的端点A至端点B之间无裂纹，端点B至端点C之间存在裂纹，则测试信号无法传输到端点C，端点C连接的第一数据线101处于悬空状态，第一数据线101连接的子像素呈现第二发光状态，而测试信号可以通过端点A传输到端点B，通过端点B传输到端点B1，然后传输到端点A1，端点A1连接的第二数据线102连接的子像素呈现第一发光状态；
当触控结构层34的端点B1至端点A1之间存在裂纹，显示基板端点A至端点C无裂纹，则测试信号通过端点A传输到端点C，通过端点C传输到第一数据线101，第一数据线101连接的子像素呈现第一发光状态；测试信号无法传输到端点A1，端点A1连接的第二数据线102处于悬空状态，第二数据线102连接的子像素呈现第二发光状态。
制成模组后，COF绑定驱动集成电路(Integrate Circuit，IC)，驱动IC与面板贴合，测试信号和控制信号从驱动IC输入。在模组测试阶段的裂纹检测与ET测试阶段的裂纹检测类似，控制信号通过模组测试焊盘P4加载到第一检测开关电路51和第二检测开关电路52以导通所述第一检测开关电路51和第二检测开关电路52，测试信号通过模组测试焊盘P3加载到第一裂纹检测线的端点A，其余与ET测试阶段的裂纹检测类似，不再赘述。
在一示例性实施例中，所述驱动结构层31可以包括有源层311、第一栅绝缘层312、第一栅金属层313、第二栅绝缘层314、第二栅金属层315、层间绝缘层316和源漏金属层317，设置在显示基板的裂纹检测线可以与源漏金属层317同层设置，比如，第二裂纹检测线设置在显示基板时，所述第二裂纹检测线与所述源漏金属层317同层设置。如图5所示，第二裂纹检测线112与所述源漏金属层317同层设置。
在一示例性实施例中，设置在显示基板的裂纹检测线可以与第二栅金属层315同层设置，比如，第二裂纹检测线设置在显示基板时，所述第二裂纹检测线与所述第二栅金属315层同层设置。
在一示例性实施例中，设置在显示基板的裂纹检测线可以一部分与源漏金属层317同层设置，一部分与第二栅金属层315同层设置。比如，第二裂纹检测线设置在显示基板时，所述第二裂纹检测线可以一部分与源漏金属层317同层设置，一部分与第二栅金属层315同层设置。
在一示例性实施例中，设置在所述触控结构层34的裂纹检测线可以与所述触控电极层343同层设置，或者，与所述转接金属层341同层设置。比如，所述第一裂纹检测线设置在触控结构层34时，所述第一裂纹检测线可以与所述触控电极层343同层设置，或者，所述第一裂纹检测线可以与所述转接金属层341同层设置。如图5所示，所述第一裂纹检测线与所述触控电极层343同层设置。第一裂纹检测线包括内外两个引线段211(端点C到端点B的引线段)和212(端点B到端点A的引线段)与触控电极层343同层设置。
图6为另一实施例提供的显示面板平面示意图。如图6所示，将中轴线300靠近第三区域203的一侧称为第一侧，靠近第四区域204的一侧称为第二侧。本实施例提供的显示面板，中轴线300的两侧均设置有裂纹检测线，其中，所述裂纹检测电路结构可以包括设置在所述中轴线300第一侧的第一裂纹检测线、第二裂纹检测线、第一检测开关电路51和第二检测开关电路52，其连接关系参考前述实施例，此处不再赘述。所述显示面板还可以包括至少一条第三数据线103和至少一条第四数据线104、所述裂纹检测电路结构还可以包括设置在所述中轴线300第二侧的第三裂纹检测线、第四裂纹检测线，以及，还可以包括与所述第三数据线103电连接的第三检测开关电路53、与所述第四数据线104电连接的第四检测开关电路54，所述第三裂纹检测线和所述第四裂纹检测线可以设置在所述显示面板的不同功能层中，其中：
所述第三裂纹检测线的第一端D可以电连接第三测试端，所述第三裂纹检测线的第二端F可以电连接所述第三检测开关电路53的输入端，所述第三检测开关电路53的输出端可以电连接所述第三数据线103；
所述第四裂纹检测线的第一端E1电连接所述第三裂纹检测线的第四节点E，所述第四裂纹检测线的第二端D1电连接所述第四检测开关电路54的输入端，所述第四检测开关电路54的输出端电连接所述第四数据线104；
所述第三检测开关电路53的控制端和第四检测开关电路54的控制端电 连接第四测试端；
所述第三裂纹检测线的第一端D和第二端F可以位于所述第一区域201；所述第三裂纹检测线可以位于所述第一区域201、第二区域202和第四区域204；
所述第四裂纹检测线的第一端E1可以位于所述第二区域202，第二端D1可以位于所述第一区域201，所述第四裂纹检测线可以位于所述第一区域201、第二区域202和第四区域204。
本实施例中，第一裂纹检测线和第三裂纹检测线相互之间不交叉，第二裂纹检测线和第四裂纹检测线相互之间不交叉。本实施例提供的方案，可以实现分别对中轴线300两侧的裂纹进行检测，即可以定位裂纹是在显示面板的左侧还是右侧，以及，哪个裂纹检测线所在的层出现裂纹，本实施例把面板分成多个区域，多个区域与子像素列对应，通过不同子像素列的发光状态判断裂纹位置，对于面板周边微裂纹的判断非常直观准确，给修复带来便利，提高良率。
在其他实施例中，第一裂纹检测线、第二裂纹检测线与第三裂纹检测线、第四裂纹检测可以不是位于中轴线300两侧，第三区域203和第四区域204之间可以存在一分隔线，第一裂纹检测线和第二裂纹检测线可以位于分隔线一侧，第三裂纹检测线和第四裂纹检测线可以位于分隔线另一侧，等等。在另一实施例中，第一裂纹检测线和第三裂纹检测线相互之间可以交叉，第二裂纹检测线和第四裂纹检测线相互之间可以交叉。
在一示例性实施例中，当第一裂纹检测线和第三裂纹检测线同层设置，第二裂纹检测线和第四裂纹检测线同层设置时，端点B和端点E可以无限接近但彼此电气绝缘，端点B1和端点E1可以无限接近但彼此电气绝缘，从而，裂纹检测线可以尽可能布满周边区，保证裂纹检测更加全面。
在一示例性实施例中，所述第三测试端可以包括ET测试焊盘P5，所述第二测试端可以包括ET测试焊盘P6，或者，所述第一测试端可以包括模组测试焊盘P7，所述第二测试端可以包括模组测试焊盘P8，或者，所述第一测试端可以包括ET测试焊盘P5和模组测试焊盘P7，所述第二测试端可以包括ET测试焊盘P6和模组测试焊盘P8。ET测试焊盘P5和ET测试焊盘 P6可以电连接检测探针，ET测试焊盘P5提供测试信号至第三裂纹检测线，ET测试焊盘P6提供控制信号至第三检测开关电路53和第四检测开关电路54以导通检测开关电路。模组测试焊盘P7和模组测试焊盘P8可以电连接驱动集成电路，模组测试焊盘P7提供测试信号至第三裂纹检测线，模组测试焊盘P8提供控制信号至第三检测开关电路53和第四检测开关电路54以导通检测开关电路。
所述第三裂纹检测线和第四裂纹检测线的实现类似第一裂纹检测线和第二裂纹检测线，因此，前述多个实施例中第一裂纹检测线和第二裂纹检测线的实现方式可以应用到第三裂纹检测线和第三裂纹检测线，此处不再赘述，裂纹检测方法同样类似于使用第一裂纹检测线和第二裂纹检测线时的检测方式。
在一示例性实施例中，第三裂纹检测线和第四裂纹检测线比如为蛇形结构(比如S形，W形，Z形走线等等)。
在一示例性实施例中，所述第三裂纹检测线和所述第一裂纹检测线可以相对中轴线300对称设置，所述第四裂纹检测线和所述第二裂纹检测线可以相对中轴线300对称设置。但本公开实施例不限于此，中轴线300两侧的裂纹检测线可以是不对称的。所述第一数据线101以及所述第二数据线102可以和第一裂纹检测线以及第二裂纹检测线位于所述中轴线300的同侧，或者，位于所述中轴线300的不同侧。所述第三数据线103以及所述第四数据线104可以和第三裂纹检测线以及第四裂纹检测线位于所述中轴线300的同侧，或者，位于所述中轴线300的不同侧。
在一示例性实施例中，在平行于所述显示面板的显示面的平面上，所述第三裂纹检测线的正投影可以包含所述第四裂纹检测线的正投影。如图6所示，第四裂纹检测线的第一端E1的正投影和第三裂纹检测线的第四节点E的正投影可以重合或近似重合，第四裂纹检测线的第二端D1的正投影落入第三裂纹检测线的正投影，且端点E1到D1的延伸方向与E至D的延伸方向相同。第三裂纹检测线和第四裂纹检测线的线宽可以不同，但当二者的端点的正投影重合或近似重合，延伸方向一致时认为第三裂纹检测线的正投影包含第四裂纹检测线的正投影。本方案减少了裂纹检测走线所占面积，可以 缩减边框。在另一实施例中，所述第四裂纹检测线的正投影可以至少部分位于所述第三裂纹检测线的正投影之外。
在一示例性实施例中，所述第三裂纹检测线与所述第一裂纹检测线可以同层设置，所述第四裂纹检测线与所述第二裂纹检测线可以同层设置。如图5所示，第四裂纹检测线121和第二裂纹检测线112同层设置，所述第三裂纹检测线(第三裂纹检测线的两个引线段221、222)与所述第一裂纹检测线(第一裂纹检测线的两个引线段211、212)同层设置。本公开实施例不限于此，在其他实施例中，所述第三裂纹检测线与所述第一裂纹检测线可以不同层设置，所述第四裂纹检测线与所述第二裂纹检测线可以不同层设置。即中轴线300两侧的裂纹检测线的设置方式可以不相关，比如，第一裂纹检测线可以设置在显示基板，第三裂纹检测线可以设置在触控结构层，第二裂纹检测线可以设置在触控结构层，第四裂纹检测线可以设置在显示基板，等等。
在一示例性实施例中，如图7所示，所述检测开关电路(第一检测开关电路51至第四检测开关电路54)可以包括至少一个薄膜晶体管，所述薄膜晶体管的控制极为所述检测开关电路的控制端，所述薄膜晶体管的第一极为所述检测开关电路的输入端，所述薄膜晶体管的第二极为所述检测开关电路的输出端。以薄膜晶体管为P沟道金属氧化物半导体场效应晶体管(PMOS)为例，在ET测试阶段，第二测试端P2上施加低电平，从而控制第一检测开关电路51导通和第二检测开关电路52导通。本公开实施例不限于此，在另一实施例中，所述薄膜晶体管比如为N沟道金属氧化物半导体场效应晶体管(NMOS)。此时，在ET测试阶段，第二测试端P2上施加高电平，从而控制第一检测开关电路51导通和第二检测开关电路52导通。本实施提供的检测开关电路仅为示例，可以是其他类型的开关电路，比如检测开关电路可以包括多个薄膜晶体管。
图8为本公开实施例提供的显示面板的裂纹检测方法流程图。如图8所示，本实施例提供一种显示面板的裂纹检测方法，所述显示面板为上述多个实施例所述的显示面板，所述裂纹检测方法可以包括：
步骤801，接收从所述第二测试端输入的导通信号并导通所述第一检测开关电路和第二检测开关电路，接收从所述第一测试端输入的测试信号，所 述测试信号满足：当所述测试信号加载到所述数据线时，所述数据线所连接的子像素呈现第一发光状态；
步骤802，根据所述显示面板的子像素的发光状态确定所述显示面板的裂纹状态信息。所述裂纹状态信息可以包括所述显示面板是否存在裂纹，以及裂纹位置等。
在一示例性实施例中，所述根据所述显示面板的子像素的发光状态确定所述显示面板的裂纹状态信息包括：
当所述第一数据线所连接的子像素呈现第二发光状态，且所述第二数据线所连接的子像素呈现第二发光状态时，所述第一裂纹检测线的第一端和第三节点之间存在裂纹；
当所述第一数据线所连接的子像素呈现第二发光状态，所述第二数据线所连接的子像素呈现第一发光状态时，所述第一裂纹检测线的第一端和第三节点之间无裂纹，所述第三节点和第二端之间存在裂纹，所述第二裂纹检测线的第一端至第二端之间无裂纹；
当所述第一数据线所连接的子像素呈现第一发光状态，所述第二数据线所连接的子像素呈现第二发光状态时，所述第二裂纹检测线第一端和第二端之间存在裂纹，所述第一裂纹检测线的第一端和第二端之间无裂纹；
其中，所述第一发光状态和所述第二发光状态其中之一为亮态，另一为暗态。
在一示例性实施例中，显示面板的子像素均呈现第一发光状态时，所述显示面板无裂纹。比如，第一发光状态为暗态时，当显示面板的子像素均为暗态(黑色画面)时，显示面板无裂纹；当存在亮线时，根据前述实施例中亮线位置或者颜色或者二者结合确定裂纹所在区域。
本公开实施例提供的显示面板的裂纹检测方法，可以根据不同子像素的发光状态确定裂纹所在的功能层，定位更为准确，便于修复，提高了良率。
基于本公开实施例的技术构思，本公开实施例还提供了一种显示装置，包括前述实施例的显示面板。本实施例提供的显示装置，可以对不同功能层的裂纹进行检测，便于修复，提高了良率。所述显示装置可以是OLED显示 装置，或者，其他显示装置。所述显示装置可以为：智能手环，手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
有以下几点需要说明：
(1)本公开实施例附图只涉及到与本公开实施例涉及到的结构，其他结构可参考通常设计。
(2)为了清晰起见，在用于描述本公开实施例的附图中，层或区域的厚度被放大或缩小，即这些附图并非按照实际的比例绘制。可以理解，当诸如层、膜、区域或基板之类的元件被称作位于另一元件“上”或“下”时，该元件可以“直接”位于另一元件“上”或“下”，或者可以存在中间元件。
(3)在不冲突的情况下，本公开实施例及实施例中的特征可以相互组合以得到新的实施例。
虽然本公开所揭露的实施方式如上，但所述的内容仅为便于理解本公开而采用的实施方式，并非用以限定本公开。任何本公开所属领域内的技术人员，在不脱离本公开所揭露的精神和范围的前提下，可以在实施的形式及细节上进行任何的修改与变化，但本公开的专利保护范围，仍须以所附的权利要求书所界定的范围为准。

Claims (15)

  1. 一种显示面板，包括：显示区和围绕所述显示区的周边区，所述显示区设置有至少一条第一数据线和至少一条第二数据线，所述周边区设置有裂纹检测电路结构，所述裂纹检测电路结构包括第一裂纹检测线、第二裂纹检测线、与所述第一数据线电连接的第一检测开关电路和与所述第二数据线电连接的第二检测开关电路，在垂直于所述显示面板的显示面的平面上，所述显示面板包括依次设置的多个功能层，所述第一裂纹检测线和所述第二裂纹检测线设置于不同功能层中，其中：
    所述第一裂纹检测线的第一端配置为电连接第一测试端，所述第一裂纹检测线的第二端电连接所述第一检测开关电路的输入端，所述第一检测开关电路的输出端电连接所述第一数据线；
    所述第二裂纹检测线的第一端电连接所述第一裂纹检测线的第三节点，所述第三节点不同于所述第一裂纹检测线的第一端和第二端，所述第二裂纹检测线的第二端电连接所述第二检测开关电路的输入端，所述第二检测开关电路的输出端电连接所述第二数据线；
    所述第一检测开关电路的控制端和第二检测开关电路的控制端配置为电连接第二测试端。
  2. 根据权利要求1所述的显示面板，其中，所述周边区包括设置有绑定区的第一区域、与所述第一区域相对设置的第二区域，以及连接所述第一区域和所述第二区域且相对设置的第三区域和第四区域；
    所述第一裂纹检测线的第一端和第二端位于所述第一区域；所述第一裂纹检测线位于所述第一区域、第二区域和第三区域；
    所述第二裂纹检测线的第一端位于所述第二区域，第二端位于所述第一区域，所述第二裂纹检测线位于所述第一区域、第二区域和第三区域。
  3. 根据权利要求1所述的显示面板，其中，在平行于所述显示面板的显示面的平面上，所述第一裂纹检测线的正投影包含所述第二裂纹检测线的正投影。
  4. 根据权利要求2所述的显示面板，其中，
    所述显示区还设置有至少一条第三数据线和至少一条第四数据线，所述裂纹检测电路结构还包括第三裂纹检测线、第四裂纹检测线、与所述第三数据线电连接的第三检测开关电路和与所述第四数据线电连接的第四检测开关电路，所述第三裂纹检测线和所述第四裂纹检测线设置在所述显示面板的不同功能层中，其中：
    所述第三裂纹检测线的第一端电连接第三测试端，所述第三裂纹检测线的第二端电连接所述第三检测开关电路的输入端，所述第三检测开关电路的输出端电连接所述第三数据线；
    所述第四裂纹检测线的第一端电连接所述第三裂纹检测线的第四节点，所述第四节点不同于所述第三裂纹检测线的第一端和第二端，所述第四裂纹检测线的第二端电连接所述第四检测开关电路的输入端，所述第四检测开关电路的输出端电连接所述第四数据线；
    所述第三检测开关电路的控制端和第四检测开关电路的控制端电连接第四测试端；
    所述第一裂纹检测线和所述第二裂纹检测线位于所述显示面板的中轴线的一侧，所述第三裂纹检测线和所述第四裂纹检测线位于所述显示面板的中轴线的另一侧，其中，所述中轴线为所述第三区域和所述第四区域之间的中轴线。
  5. 根据权利要求4所述的显示面板，其特征在于，所述第三裂纹检测线的第一端和第二端位于所述第一区域；所述第三裂纹检测线位于所述第一区域、第二区域和第四区域；
    所述第四裂纹检测线的第一端位于所述第二区域，第二端位于所述第一区域，所述第四裂纹检测线位于所述第一区域、第二区域和第四区域。
  6. 根据权利要求4所述的显示面板，其中，在平行于所述显示面板的显示面的平面上，所述第三裂纹检测线的正投影包含所述第四裂纹检测线的正投影。
  7. 根据权利要求4所述的显示面板，其中，所述第三裂纹检测线与所述 第一裂纹检测线同层设置，所述第四裂纹检测线与所述第二裂纹检测线同层设置。
  8. 根据权利要求1至7任一所述的显示面板，其特征在于，所述显示面板还包括与所述第一数据线连接的第一子像素，与所述第二数据线连接的第二子像素，且所述第一子像素的颜色不同于所述第二子像素的颜色。
  9. 根据权利要求1至7任一所述的显示面板，其中，在垂直于所述显示面板的显示面的平面上，所述显示面板包括依次设置的显示基板和触控结构层，所述第一裂纹检测线和所述第二裂纹检测线其中之一设置在所述显示基板的周边区，另一设置在所述触控结构层的周边区。
  10. 根据权利要求9所述的显示面板，其中，所述第一裂纹检测线设置在所述触控结构层的周边区，所述第二裂纹检测线设置在所述显示基板的周边区。
  11. 根据权利要求9所述的显示面板，其中，
    所述显示基板包括驱动结构层，所述驱动结构层包括有源层、第一栅绝缘层、第一栅金属层、第二栅绝缘层、第二栅金属层、层间绝缘层和源漏金属层，所述第二裂纹检测线与所述源漏金属层同层设置；
    或者，
    所述显示基板包括驱动结构层，所述驱动结构层包括有源层、第一栅绝缘层、第一栅金属层、第二栅绝缘层、第二栅金属层、层间绝缘层和源漏金属层，所述第二裂纹检测线与所述第二栅金属层同层设置。
  12. 根据权利要求9所述的显示面板，其中，所述触控结构层包括依次设置的转接金属层、触控绝缘层和触控电极层，所述第一裂纹检测线与所述触控电极层同层设置，或者，所述第一裂纹检测线与所述转接金属层同层设置。
  13. 一种显示装置，包括如权利要求1至12任一所述的显示面板。
  14. 一种显示面板的裂纹检测方法，所述显示面板为权利要求1至12任一所述的显示面板，所述显示面板还包括与所述数据线连接的子像素，所述裂纹检测方法包括：
    接收从所述第二测试端输入的导通信号并导通所述第一检测开关电路和第二检测开关电路，接收从所述第一测试端输入的测试信号，所述测试信号满足：当所述测试信号加载到所述数据线时，所述数据线所连接的子像素呈现第一发光状态；
    根据所述显示面板的子像素的发光状态确定所述显示面板的裂纹状态信息。
  15. 根据权利要求14所述的显示面板的裂纹检测方法，其中，所述根据所述显示面板的子像素的发光状态确定所述显示面板的裂纹状态信息包括：
    当所述第一数据线所连接的子像素呈现第二发光状态，且所述第二数据线所连接的子像素呈现第二发光状态时，所述第一裂纹检测线的第一端和第三节点之间存在裂纹；
    当所述第一数据线所连接的子像素呈现第二发光状态，所述第二数据线所连接的子像素呈现第一发光状态时，所述第一裂纹检测线的第一端和第三节点之间无裂纹，所述第三节点和第二端之间存在裂纹，所述第二裂纹检测线的第一端至第二端之间无裂纹；
    当所述第一数据线所连接的子像素呈现第一发光状态，所述第二数据线所连接的子像素呈现第二发光状态时，所述第二裂纹检测线的第一端和第二端之间存在裂纹，所述第一裂纹检测线的第一端和第二端之间无裂纹；
    其中，所述第一发光状态和所述第二发光状态其中之一为亮态，另一为暗态。
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Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111564130B (zh) * 2020-06-11 2023-05-12 京东方科技集团股份有限公司 一种显示面板及其裂纹检测方法、显示装置
CN112328112B (zh) * 2020-11-10 2024-03-15 京东方科技集团股份有限公司 触控显示面板及其制备方法、触控显示装置
CN112419947B (zh) * 2020-11-20 2023-05-26 武汉天马微电子有限公司 一种显示面板及其裂纹检测方法、显示装置
CN112581893B (zh) * 2020-12-16 2023-03-10 京东方科技集团股份有限公司 一种显示面板及显示装置
CN112863410A (zh) * 2021-01-11 2021-05-28 京东方科技集团股份有限公司 显示基板、其裂纹检测方法及显示装置
CN112885844B (zh) * 2021-01-14 2024-02-09 京东方科技集团股份有限公司 显示面板及显示装置
CN112905050B (zh) * 2021-02-18 2024-04-19 京东方科技集团股份有限公司 一种显示面板及其制作方法、显示装置
CN113485578B (zh) * 2021-06-30 2023-09-22 昆山国显光电有限公司 触控显示面板及其检测方法和制备方法、显示装置
CN113590398B (zh) * 2021-07-28 2023-10-03 武汉华星光电半导体显示技术有限公司 触控显示面板及其裂纹检测方法
CN114093289B (zh) * 2021-11-19 2023-12-12 京东方科技集团股份有限公司 显示面板及其裂纹检测方法、显示装置
US20240211061A1 (en) * 2021-12-23 2024-06-27 Chengdu Boe Optoelectronics Technology Co., Ltd. Display panel and display apparatus
CN114944111B (zh) * 2022-05-23 2023-12-05 京东方科技集团股份有限公司 显示面板及显示装置
CN115968231A (zh) * 2022-11-29 2023-04-14 京东方科技集团股份有限公司 显示面板和显示装置
CN118244162A (zh) * 2023-12-25 2024-06-25 芃晟科技(东莞)有限公司 一种柔屏裂纹检测方法及装置

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104240625A (zh) * 2014-08-19 2014-12-24 合肥鑫晟光电科技有限公司 一种显示装置及其检测方法
US20180182274A1 (en) * 2016-12-27 2018-06-28 Samsung Display Co., Ltd. Display panel and method for detecting cracks in display panel
CN108417561A (zh) * 2018-03-06 2018-08-17 京东方科技集团股份有限公司 一种显示面板以及显示装置
CN108922909A (zh) * 2018-07-26 2018-11-30 京东方科技集团股份有限公司 一种阵列基板、显示面板以及显示装置
CN110021641A (zh) * 2018-01-10 2019-07-16 三星显示有限公司 显示设备
CN111048021A (zh) * 2020-01-02 2020-04-21 京东方科技集团股份有限公司 显示装置、显示面板及其检测方法
CN111564130A (zh) * 2020-06-11 2020-08-21 京东方科技集团股份有限公司 一种显示面板及其裂纹检测方法、显示装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102446857B1 (ko) 2015-05-26 2022-09-23 삼성디스플레이 주식회사 표시 장치
US10522608B2 (en) * 2016-12-06 2019-12-31 Samsung Display Co., Ltd. Display device
CN108831362B (zh) * 2018-08-20 2022-11-04 京东方科技集团股份有限公司 一种显示面板、其驱动方法及显示装置
CN209764965U (zh) * 2019-03-25 2019-12-10 昆山国显光电有限公司 显示屏及显示装置
CN110993659B (zh) * 2019-11-29 2022-11-04 京东方科技集团股份有限公司 触控面板及显示装置
CN111256957B (zh) * 2020-03-06 2021-09-03 武汉华星光电半导体显示技术有限公司 显示面板及显示面板裂纹的检测方法

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104240625A (zh) * 2014-08-19 2014-12-24 合肥鑫晟光电科技有限公司 一种显示装置及其检测方法
US20180182274A1 (en) * 2016-12-27 2018-06-28 Samsung Display Co., Ltd. Display panel and method for detecting cracks in display panel
CN110021641A (zh) * 2018-01-10 2019-07-16 三星显示有限公司 显示设备
CN108417561A (zh) * 2018-03-06 2018-08-17 京东方科技集团股份有限公司 一种显示面板以及显示装置
CN108922909A (zh) * 2018-07-26 2018-11-30 京东方科技集团股份有限公司 一种阵列基板、显示面板以及显示装置
CN111048021A (zh) * 2020-01-02 2020-04-21 京东方科技集团股份有限公司 显示装置、显示面板及其检测方法
CN111564130A (zh) * 2020-06-11 2020-08-21 京东方科技集团股份有限公司 一种显示面板及其裂纹检测方法、显示装置

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