WO2021227717A1 - 发光基板及其制造方法、显示装置 - Google Patents

发光基板及其制造方法、显示装置 Download PDF

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Publication number
WO2021227717A1
WO2021227717A1 PCT/CN2021/085977 CN2021085977W WO2021227717A1 WO 2021227717 A1 WO2021227717 A1 WO 2021227717A1 CN 2021085977 W CN2021085977 W CN 2021085977W WO 2021227717 A1 WO2021227717 A1 WO 2021227717A1
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Prior art keywords
substrate
conductive pad
light
protective glue
bonding wire
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PCT/CN2021/085977
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English (en)
French (fr)
Inventor
梁轩
王美丽
王飞
董学
齐琪
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京东方科技集团股份有限公司
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Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to JP2022532132A priority Critical patent/JP2023524192A/ja
Priority to KR1020227017856A priority patent/KR20230009352A/ko
Priority to US17/434,835 priority patent/US12046591B2/en
Priority to EP21804562.3A priority patent/EP4050667A4/en
Publication of WO2021227717A1 publication Critical patent/WO2021227717A1/zh
Priority to US18/749,794 priority patent/US20240339444A1/en

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Definitions

  • the present disclosure relates to the field of display technology, and in particular to a light-emitting substrate, a manufacturing method thereof, and a display device.
  • the light-emitting diode (Light Emitting Diode, abbreviated as LED in English) technology has been developed for nearly 30 years, and its application range has continued to expand. For example, it can be applied to the display field, used as a backlight source of a display device or used as an LED display screen.
  • Mini Light Emitting Diode (Mini LED) display technology and Micro Light Emitting Diode (Micro LED) display technology have gradually become a hot spot in display devices.
  • LED has the advantages of self-illumination, wide viewing angle, fast response, simple structure, long life, etc.
  • Mini LED/Micro LED display screens can realize large-size display through splicing, so they have a good market prospect.
  • the structure and manufacturing process of Mini LED/Micro LED display devices are one of the important topics that R&D personnel pay attention to.
  • embodiments of the present disclosure provide a light-emitting substrate, a manufacturing method thereof, and a display device.
  • a light-emitting substrate including:
  • the first substrate, the first substrate includes:
  • a light emitting diode provided on the first substrate
  • a first conductive pad provided on the first substrate
  • a second conductive pad provided on the second substrate
  • a bonding wire structure the bonding wire structure includes a bonding wire
  • the first conductive pad is located on the surface of the first substrate away from the second substrate
  • the second conductive pad is located on the surface of the second substrate away from the first substrate
  • the bonding wire is electrically conductive. Connecting the first conductive pad and the second conductive pad.
  • the bonding wire structure further includes a first solder joint and a second solder joint, and the first solder joint is a solder joint of one end of the bonding wire to the first conductive pad.
  • the second solder joint is a solder joint where the other end of the bonding wire is soldered to the second conductive pad.
  • the light-emitting substrate further includes a back glue, wherein the back glue is disposed between the first substrate and the second substrate for connecting the first substrate and the second substrate.
  • the second substrates are attached together.
  • the light-emitting substrate further includes a first protective glue layer
  • the first substrate includes a first side wall adjacent to the first conductive pad
  • the second substrate includes a second side wall adjacent to the second conductive pad
  • the first protective glue layer at least contacts the The first side wall and the second side wall.
  • the adhesive includes a third side wall, and orthographic projections of the first side wall, the second side wall, and the third side wall on the first substrate are mutually coincide.
  • the first protective glue layer also contacts the third sidewall.
  • the light-emitting substrate further includes a second protective glue layer
  • the bonding wire is sandwiched between the first protective glue layer and the second protective glue layer.
  • the projection of the second protective glue layer in a direction perpendicular to the first sidewall covers a projection of the bonding wire in a direction perpendicular to the first sidewall.
  • the orthographic projection of the second protective glue layer on the first substrate covers the first conductive pad, the first solder joint, the second conductive pad, and the The orthographic projection of each of the second solder joints on the first substrate.
  • the surface of the first protective glue layer away from the first side wall contacts the bonding wire, and the surface of the second protective glue layer close to the first side wall contacts The bonding wire.
  • the bonding wire at the first solder joint and the second solder joint respectively has a certain angle with the plane of the first substrate and/or a curved arc. part.
  • the projection of the first protective glue layer in a direction perpendicular to the first side wall does not overlap with the projection of the third side wall in a direction perpendicular to the first side wall .
  • the light-emitting substrate further includes a first solder joint protective glue disposed at the first solder joint and a second solder joint protective glue disposed at the second solder joint,
  • the orthographic projection of the first solder joint protective glue on the first substrate at least covers the orthographic projection of the first solder joint on the first substrate
  • the second solder joint protective glue is on the The orthographic projection on the first substrate at least covers the orthographic projection of the second solder joint on the first substrate.
  • the orthographic projection of the first solder joint protective glue on the first substrate covers the orthographic projection of the first conductive pad on the first substrate
  • the second The orthographic projection of the solder joint protective glue on the first substrate covers the orthographic projection of the second conductive pad on the first substrate.
  • the bonding wire is located on a side of the first protective glue layer away from the first sidewall, and the first protective glue layer and the bonding wire are perpendicular to the There is a gap in the direction of the first side wall.
  • the light-emitting substrate further includes a second protective glue layer, wherein the second protective glue layer covers the bonding wires, and also fills the first protective glue layer and the bond wires. The gap between the bonding wires.
  • the orthographic projection of the second protective glue layer on the first substrate covers the orthographic projection of the bonding wire on the first substrate, and the second protective glue
  • the projection of the layer in the direction perpendicular to the first side wall covers the projection of the bonding wire in the direction perpendicular to the first side wall.
  • the orthographic projection of the second protective glue layer on the first substrate covers each of the first solder joint protective glue and the second solder joint protective glue.
  • the size of the second protective glue layer in a direction perpendicular to the first sidewall is equal to a size of the first protective glue layer in a direction perpendicular to the first sidewall.
  • the size of the first protective glue layer along a direction perpendicular to the first sidewall is between 5 and 500 microns, and/or, the first protective glue layer and the The Young's modulus of the rubber material included in each of the second protective rubber layers is between 0.1Mpa and 80Gpa.
  • the light-emitting diode is a sub-millimeter light-emitting diode or a miniature light-emitting diode.
  • both the first protective glue layer and the second protective glue layer include insulating glue.
  • the second protective glue layer includes a black glue material.
  • the diameter of the bonding wire is between 10 and 500 microns.
  • the number of the light-emitting diode, the first conductive pad, the second conductive pad, and the bonding wire is multiple, and the multiple bonding wires are electrically connected to each other.
  • a display device which includes a plurality of light-emitting substrates as described above.
  • a method for manufacturing a light-emitting substrate including:
  • the first substrate including a first substrate and a first conductive pad provided on the first substrate;
  • the second substrate including a second substrate and a second conductive pad provided on the second substrate;
  • the bonding wire structure includes a bonding wire, and the bonding wire is electrically connected to the first conductive pad and the second conductive pad.
  • the first substrate A substrate and the second substrate are separated by a predetermined distance, so that the first conductive pad and the second conductive pad are separated by a predetermined distance, and the first conductive pad is far from the first substrate of the first substrate.
  • the surface and the second surface of the second conductive pad away from the second substrate are on the same horizontal plane.
  • the manufacturing method further includes:
  • a first protective glue layer is formed in the gap between the first conductive pad and the second conductive pad, so that the orthographic projection of the first protective glue layer on the carrier covers the gap in the The orthographic projection of the gap on the carrier, and the third surface of the first protective glue layer away from the carrier is on the same horizontal plane as the first surface.
  • the bonding wire in the step of forming the bonding wire structure, is formed in a plane where the first conductive pad and the second conductive pad are located.
  • the manufacturing method further includes:
  • a second protective glue layer is formed on the surface of each of the first conductive pad, the second conductive pad, and the bonding wire away from the first substrate or the second substrate, so that the The projection of the second protective glue layer in the direction perpendicular to the first surface covers each of the first conductive pad, the second conductive pad and the bonding wire when perpendicular to the first The projection on the direction of the surface.
  • the first substrate A substrate and the second substrate are separated by a predetermined distance, so that the first conductive pad and the second conductive pad are separated by a predetermined distance, and the first conductive pad is far from the first substrate of the first substrate.
  • the surface and the second surface of the second conductive pad away from the second substrate are on a different level.
  • the manufacturing method further includes:
  • a first protective glue layer is formed so that the first protective glue layer at least covers the first sidewall of the first substrate adjacent to the first conductive pad and the second substrate of the second substrate adjacent to the second conductive pad. Side wall.
  • one end of the bonding wire is soldered to the first conductive pad to form a first solder joint at the first conductive pad, and The other end of the bonding wire is soldered to the second conductive pad to form a second solder joint at the second conductive pad,
  • the bonding wire has a certain angle and/or a curved arc at the first welding point and the second welding point, respectively.
  • the manufacturing method further includes:
  • Dispensing treatment is performed on the areas where the first solder joint and the second solder joint are located, so as to form a first solder joint protective glue and a second solder joint in the area where the first solder joint and the second solder joint are located, respectively Two solder joint protective glue.
  • the manufacturing method further includes:
  • a second protective glue layer is formed so that the second protective glue layer covers the first conductive pad, the bonding wire and the second conductive pad.
  • the manufacturing method before the step of turning the second substrate toward the first substrate, the manufacturing method further includes:
  • a back glue is attached to one of the surface of the first substrate away from the first conductive pad and the surface of the second substrate away from the second conductive pad,
  • the surface of the first substrate away from the first conductive pad and the surface of the second substrate away from the second conductive pad is attached to the back glue.
  • the first substrate includes a first side wall adjacent to the at least one first conductive pad
  • the second substrate includes a second side wall adjacent to the at least one second conductive pad
  • the first protective glue layer is made to contact at least the first side wall and the second side wall.
  • the distance between the first substrate and the second substrate is greater than the sum of the thickness of the first substrate and the thickness of the second substrate.
  • the step of forming the first protective glue layer specifically includes:
  • a first protective glue layer is formed on the first substrate, the first protective glue layer covers at least the first sidewall of the first substrate adjacent to the first conductive pad, and the first protective glue material
  • the orthographic projection of the layer on the first substrate also at least partially overlaps the orthographic projection of each of the first conductive pad and the protective coating on the first substrate;
  • At least a part of the protective coating film and the overlapping portion of the first protective adhesive material layer and the protective coating film are removed to expose the first conductive pad.
  • FIG. 1 is a schematic plan view of a light-emitting substrate according to some exemplary embodiments of the present disclosure. It should be noted that, for illustration, FIG. 1 shows a state of a first substrate and a second substrate included in the light-emitting substrate before being folded or turned over. ;
  • FIG. 2 is a flowchart of a method of manufacturing a light-emitting substrate according to some exemplary embodiments of the present disclosure
  • 3A to 3H are cross-sectional views schematically showing the structure formed after some steps of the manufacturing method of the light-emitting substrate are performed;
  • FIGS. 4A and 4B are schematic diagrams schematically showing the state before and after the 3-layer laminated structure is bent
  • FIG. 5 is a flowchart of a method of manufacturing a light-emitting substrate according to some exemplary embodiments of the present disclosure
  • 6A to 6H are cross-sectional views schematically showing the structure formed after some steps of the manufacturing method of the light-emitting substrate are performed;
  • 7A to 7D are cross-sectional views schematically showing a structure formed after one step of the manufacturing method of the light-emitting substrate is performed;
  • FIG. 8 is a schematic diagram schematically showing a frame area of a light emitting substrate according to an embodiment of the present disclosure
  • FIG. 9 is a schematic diagram of the arrangement of light-emitting units of the light-emitting substrate shown in FIG. 1;
  • FIG. 10 is a schematic diagram of a light-emitting unit in the light-emitting substrate shown in FIG. 9;
  • 11 and 12 are schematic diagrams of display devices according to some exemplary embodiments of the present disclosure, respectively.
  • the size and relative size of elements may be enlarged for clarity and/or description purposes. As such, the size and relative size of each element need not be limited to the size and relative size shown in the drawings.
  • a specific process sequence may be performed differently from the described sequence. For example, two consecutively described processes may be performed substantially simultaneously or in an order opposite to the described order.
  • the same reference numerals denote the same elements.
  • the X axis, the Y axis, and the Z axis are not limited to the three axes of the Cartesian coordinate system, and can be interpreted in a broader meaning.
  • the X axis, the Y axis, and the Z axis may be perpendicular to each other, or may represent different directions that are not perpendicular to each other.
  • X, Y, and Z and "at least one selected from the group consisting of X, Y, and Z” may be interpreted as only X, only Y, only Z, or Any combination of two or more of X, Y, and Z such as XYZ, XYY, YZ, and ZZ.
  • the term “and/or” includes any and all combinations of one or more of the listed related items.
  • first, second, etc. may be used herein to describe different elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element.
  • first element may be named as the second element, and similarly, the second element may be named as the first element.
  • inorganic light-emitting diodes refer to light-emitting elements made of inorganic materials, among which, LEDs refer to inorganic light-emitting elements that are different from OLEDs.
  • the inorganic light emitting element may include a sub-millimeter light emitting diode (Mini Light Emitting Diode, English abbreviation Mini LED) and a micro light emitting diode (Micro Light Emitting Diode, English abbreviation Micro LED).
  • micro light-emitting diodes i.e.
  • Micro LED refer to ultra-small light-emitting diodes with a grain size of less than 100 microns
  • sub-millimeter light-emitting diodes i.e. Mini LED
  • the die size of the Mini LED can be between 100 and 300 microns
  • the die size of the Micro LED can be between 10 and 100 microns.
  • Some exemplary embodiments of the present disclosure provide a light-emitting substrate, a manufacturing method thereof, and a display device including the light-emitting substrate.
  • a light emitting substrate including: a first substrate, the first substrate including: a first substrate; a light emitting diode provided on the first substrate; and a light emitting diode provided on the first substrate; A first conductive pad on the first substrate; a second substrate, the second substrate is disposed opposite to the first substrate, the second substrate includes: a second substrate; and a second substrate disposed on the second substrate A second conductive pad on the bottom; and a bonding wire structure, the bonding wire structure includes a bonding wire, wherein the first conductive pad is located on the surface of the first substrate away from the second substrate, the The second conductive pad is located on the surface of the second substrate away from the first substrate, and the bonding wire is electrically connected to the first conductive pad and the second conductive pad.
  • Wire Bonding is a process that uses heat, pressure or ultrasonic energy to make metal bonding wires and substrate pads tightly welded.
  • wire bonding can be used to connect the semiconductor chip pad and the I/O bonding wire of the microelectronic package or the metal wiring pad on the substrate with metal filaments.
  • the principle of wire bonding is to destroy the oxide layer and pollution on the welded surface by heating, pressurizing or ultrasonic, and produce plastic deformation, so that the metal bonding wire and the welded surface are in close contact, reaching the range of gravitational force between atoms and causing the interface The inter-atoms diffuse to form welded joints.
  • FIG. 1 is a schematic plan view of a light-emitting substrate according to some exemplary embodiments of the present disclosure. It should be noted that, for illustration, FIG. 1 shows a state of a first substrate and a second substrate included in the light-emitting substrate before being folded or turned over. .
  • FIG. 2 is a flowchart of a method of manufacturing a light-emitting substrate according to some exemplary embodiments of the present disclosure.
  • 3A to 3H are cross-sectional views schematically showing a structure formed after some steps of the method of manufacturing the light-emitting substrate are performed. 1 to 3H in combination, the manufacturing method of the light-emitting substrate can be performed according to the following steps.
  • step S101 a first substrate 100 is provided.
  • the first substrate 100 may include a first substrate 1 and a plurality of first electrodes 2 and a plurality of first conductive pads 3 disposed on the first substrate 1.
  • a plurality of first conductive pads 3 are located at the edge of the first substrate 100.
  • a plurality of first conductive pads 3 are located in the fan-out area (ie fan-out area) of the first substrate 100, and are used to connect signal lines located on the first substrate 100 (for example, as shown schematically in FIG. 1). It is shown that part of the signal line 150) is electrically connected to an external driving circuit.
  • the material of the first substrate 1 may include, but is not limited to, glass, quartz, plastic, silicon, polyimide, and the like.
  • the first electrode 2 and the first conductive pad 3 may have a columnar structure.
  • the materials of the first electrode 2 and the first conductive pad 3 may include conductive materials, such as metal materials, etc., specifically, gold, silver, copper, aluminum, molybdenum, gold alloys, silver alloys, copper alloys, aluminum alloys, and molybdenum. At least one selected from alloys and the like or a combination of at least two are not limited in the embodiments of the present disclosure.
  • the first substrate 100 may further include a driving circuit 4 electrically connected to the plurality of first electrodes 2, and the driving circuit 4 is provided on the first substrate 1.
  • the driving circuit 4 can be used to provide electrical signals to the light-emitting diode chips subsequently formed on the plurality of first electrodes 2 to control their light-emitting brightness.
  • the driving circuit 4 may be a plurality of pixel driving circuits connected in a one-to-one correspondence with each light-emitting diode chip, or a plurality of micro integrated circuit chips connected in a one-to-one correspondence with each light-emitting diode chip, etc.
  • the structure can control each light-emitting diode chip to emit different brightness gray scales.
  • the specific circuit structure of the driving circuit 4 on the first substrate 100 can be set according to actual needs, which is not limited in the embodiments of the present disclosure. In the following, the driving circuit 4 will be exemplified in conjunction with the drawings.
  • step S102 a plurality of light-emitting diodes 5 are transferred and bound to the first substrate 100.
  • each of the plurality of light emitting diodes 5 includes an N electrode and a P electrode, the N electrode and P electrode of the light emitting diode 5 are respectively connected to the corresponding first electrode 2, and the plurality of first conductive The surface of the pad 3 is exposed.
  • a plurality of light emitting diodes are arranged in an array along a first direction X and a second direction Y.
  • first direction X is the row direction
  • second direction Y is the column direction.
  • first direction and the second direction can be arbitrary directions, and the first direction and the second direction only need to be crossed.
  • the multiple light-emitting diodes are not limited to being arranged along a straight line, and can also be arranged along a curve, in a ring, or in any manner, which may be determined according to actual needs, and the embodiments of the present disclosure do not limit this.
  • the plurality of first conductive pads 3 are arranged at the edge position of the first substrate 100 along the first direction X, that is, the plurality of first conductive pads 3 constitute a first conductive pad row.
  • a plurality of first conductive pads 3 are arranged at equal intervals along the first direction X.
  • the size of each first conductive pad 3 along the first direction X is L1, and the distance between two adjacent first conductive pads 3 along the first direction X is D1.
  • the sum of the dimension L1 of any first conductive pad 3 along the first direction X and the distance D1 between two adjacent first conductive pads 3 along the first direction X may be referred to as the arrangement period of the first conductive pad 3. In some examples, the arrangement period is greater than 40 microns.
  • the light emitting diode may include a micro light emitting diode (Micro-LED) or a sub-millimeter light emitting diode (Mini-LED).
  • Micro-LED micro light emitting diode
  • Mini-LED sub-millimeter light emitting diode
  • step S103 a second substrate 200 is provided, and the first substrate 100 and the second substrate 200 are placed on the carrier 300.
  • the second substrate 200 may be a circuit board, such as PCB (Printed Circuit Board), FPC (Flexible Printed Circuit, Flexible Circuit Board), or COF (Chip On Film, Chip on Film), etc.
  • PCB Printed Circuit Board
  • FPC Flexible Printed Circuit Board
  • COF Chip On Film, Chip on Film
  • the second substrate 200 may include a second substrate 6 and a plurality of second conductive pads 7 disposed on the second substrate 6.
  • the plurality of second conductive pads 7 may be arranged along the first direction X (the direction perpendicular to the paper surface in FIG. 3C), that is, the plurality of second conductive pads 7 constitute a second conductive pad row.
  • the plurality of second conductive pads 7 may correspond to the plurality of first conductive pads 3 one-to-one. That is, the arrangement period of the second conductive pad 7 is the same as the arrangement period of the first conductive pad 3.
  • the second substrate 200 may also include an external driving circuit, such as an integrated circuit chip, provided on the second substrate 6, but the embodiment of the present disclosure is not limited thereto.
  • the carrier 300 is used to space and fix the first substrate 100 and the second substrate 200 to maintain the relative positional relationship between them.
  • the first conductive pad 3 provided on the first substrate 100 has a first surface 31 (the upper surface shown in the figure) away from the first substrate 1, and the second conductive pad 7 provided on the second substrate 200 There is a second surface 71 (shown as the upper surface in the figure) away from the second substrate 6.
  • the first substrate 100 and the second substrate 200 are separated by a predetermined distance.
  • the first conductive pad row where the first conductive pad 3 is located and the second conductive pad where the second conductive pad 7 is located are also separated by a predetermined distance, and the first surface 31 of the first conductive pad 3 and the second surface 71 of the second conductive pad 7 are on the same horizontal plane to ensure that the subsequent bonding wires are led out in a plane.
  • the prescribed distance may be greater than or equal to the sum of the thicknesses of the first substrate 100 and the second substrate 200, and less than 1.5 of the sum of the thicknesses of the first substrate 100 and the second substrate 200. Times.
  • the prescribed distance may be substantially equal to the sum of the thicknesses of the first substrate 100 and the second substrate 200.
  • step S104 with reference to FIGS. 3C and 3D, a first protective glue is formed in the gap 400 between the first conductive pad row where the first conductive pad 3 is located and the second conductive pad row where the second conductive pad 7 is located.
  • a certain thickness of protective glue can be coated in the gap 400, the protective glue at least fills the gap 400, and due to the limitation of coating precision, the protective glue may also cover the first conductive pad 3 and the first conductive pads 3 and located on both sides of the gap 400. At least a part of the surface of the second conductive pad 7, but the protective glue can be removed later by laser ablation or film removal to cover the first conductive pad 3 and the second conductive pad 7, so as not to affect the subsequent process, thereby obtaining Only the first protective glue layer 8 filled in the gap 400. It can be understood that the orthographic projection of the first protective glue layer 8 on the carrier 300 covers the orthographic projection of the gap 400 on the carrier 300.
  • the sidewall of the first protective glue layer 8 close to the first substrate 100 contacts the first conductive pad 3, and the sidewall of the first protective glue layer 8 close to the second substrate 100 contacts the second conductive pad 7.
  • the first protective glue layer 8 includes a third surface 81 away from the carrier 300.
  • the third surface 81, the first surface 31, and the second surface 71 are substantially on the same horizontal plane to ensure that subsequent bonding wires are formed on a relatively flat surface.
  • the thickness of the first protective glue layer 8 is in the range of 5 to 500 microns, and the specific value is the same as the thickness of the first conductive pad 3 and/or the second conductive pad 7.
  • the material of the first protective glue layer 8 is The Young's modulus can be between 0.1Mpa and 80Gpa.
  • the material can be silica gel or polydimethylsiloxane (ie, PDMS).
  • step S105 a bonding wire 9 is formed so that the bonding wire 9 is electrically connected to the first conductive pad 3 and the second conductive pad 7.
  • the bonding wire 9 is formed such that one end 91 of the bonding wire 9 is connected to the first conductive pad 3, and the other end 92 is connected to the second conductive pad 7. That is, one end 91 of the bonding wire 9 is welded to the first conductive pad 3 and the other end 92 is welded to the second conductive pad 7.
  • the solder joint of the terminal 91 on the first conductive pad 3 is called the first solder joint 911
  • the solder joint of the terminal 92 on the second conductive pad 7 is called the second solder joint 921, refer to FIG. 3H.
  • the bonding wire 9 basically extends in the plane where the first conductive pad 3 and the second conductive pad 7 are located, which facilitates the subsequent bending process.
  • the first solder joint 911 may be a wedge solder joint, that is, the shape of the orthographic projection of the first solder joint 911 on the first substrate 1 is a wedge shape.
  • the height of the first solder joint 911 on the first conductive pad 3 can be controlled between 1-10 microns.
  • the diameter of the bonding wire 9 can be between 10 and 500 microns.
  • the height of the first solder joint 911 on the first conductive pad 3 is smaller than the diameter of the bonding wire 9. In this way, the bonding wire 9 can be realized to extend substantially in the plane where the first conductive pad 3 and the second conductive pad 7 are located.
  • the bonding wire 9 may use metals such as Cu, Al, Au, Ag, or their alloys.
  • each bonding wire 9 is electrically connected to a first conductive pad 3 and a second conductive pad 7 corresponding to it, respectively. Since the plurality of first conductive pads 3 are arranged at equal intervals along the first direction X, the plurality of bonding wires 9 are also arranged at equal intervals along the first direction X.
  • the diameter of the bonding wire 9 may be between 10 and 500 microns.
  • the above-mentioned size L1 is about 1.2 to 3 times the diameter of the bonding wire.
  • the arrangement period of the plurality of first conductive pads 3 is related to the diameter of the bonding wire 9 and also related to the wiring design on the first substrate 100.
  • the thickness of the second protective glue layer 11 may be substantially equal to the thickness of the first protective glue layer 8. In this way, it can be ensured that the bonding wire 9 is at the neutral layer of the upper and lower protective glue layers.
  • the bonding wire 9 is sandwiched between the first protective glue layer 8 and the second protective glue layer 11 to form a laminated structure.
  • the second protective glue layer 11 located above is subjected to tensile stress
  • the first protective glue layer 8 located below is subjected to compressive stress. Since the thickness of the second protective glue layer 11 is substantially equal to the thickness of the first protective glue layer 8, the stress on the bonding wire 9 at the middle position is substantially zero, that is, the bonding wire 9 is at the bending neutral layer. . In this way, the amount of deformation of the bonding wire can be reduced, so that the reliability can be improved.
  • step S107 the adhesive 12 is attached to any one of the surface of the first substrate 1 away from the first conductive pad 3 and the surface of the second substrate 6 away from the second conductive pad 7.
  • the adhesive 12 is attached to the surface of the first substrate 1 away from the first conductive pad 3.
  • step S108 referring to FIG. 3G and FIG. 3H in combination, the second substrate 200 is turned toward the first substrate 100 so that the surface of the second substrate 6 away from the second conductive pad 7 is attached to the adhesive 12.
  • the second substrate 200 can be rotated to the lower surface of the first substrate 100 by the carrier 300 with a fixed rotation track to ensure the stability of the turning process and reduce the bonding wires 9 Risk of breakage.
  • step S108 the second substrate 200 is turned over, so that the surface of the first protective glue layer 8 away from the bonding wire 9 contacts the first substrate 100, the back glue 12 and the second substrate 200. Specifically, the surface of the first protective glue layer 8 away from the bonding wire 9 contacts the sidewalls of the first substrate 100, the sidewalls of the back glue 12 and the sidewalls of the second substrate 200. In this way, the side walls of the first substrate 100, the side walls of the adhesive 12, and the side walls of the second substrate 200 completely support the first protective glue layer 8, thereby completely supporting the bonding wires 9 to improve reliability .
  • the wire bonding process is used to fabricate the bonding wire, and the substrate is turned over to realize the upper and lower substrate stacked structure, which can reduce the process complexity and reduce the manufacturing cost.
  • the first substrate 100 may include a first substrate 1 and a plurality of first electrodes 2 and a plurality of conductive pads 3 disposed on the first substrate 1.
  • a plurality of first conductive pads 3 are located at the edge of the first substrate 100.
  • each of the plurality of light emitting diodes 5 includes an N electrode and a P electrode, the N electrode and the P electrode of the light emitting diode 5 are respectively connected to the corresponding first electrode 2, and the plurality of first conductive pads The surface of 3 is exposed.
  • the first substrate 100 and the second substrate 200 are separated by a certain distance in the second direction Y and the third direction Z.
  • the third direction Z may be a direction perpendicular to the plane where the first direction X and the second direction Y are located, and is shown as the height direction in FIG. 6C.
  • the distance between the first substrate 100 and the second substrate 200 in the second direction Y is S1 (hereinafter referred to as the first separation distance), and the distance between the first substrate 100 and the second substrate 200 in the third direction Z Is S2 (hereinafter referred to as the second separation distance).
  • the first conductive pad 3, the edge portion 102, the first sidewall 101, the second conductive pad 7, the edge portion 202, and the second sidewall 201 may be coated with a certain thickness of protective glue. Then, the part of the protective glue covering the first conductive pad 3 and the second conductive pad 7 can be removed by laser ablation or film removal, so as not to affect the subsequent process.
  • a first protective glue layer 8" is formed on the first substrate 100.
  • the first protective glue layer 8" at least covers the first sidewall 101 of the first substrate 100 adjacent to the first conductive pad 3.
  • the orthographic projection of the first protective glue layer 8" on the first substrate 1 and the orthographic projection of the first conductive pad 3 on the first substrate 1 at least partially overlap. That is, the first protective glue layer The orthographic projection of 8" on the first substrate 1 and the orthographic projection of the protective coating 801 on the first substrate 1 at least partially overlap. In other words, the first protective glue layer 8" covers a part of the protective film 801.
  • the part of the protective film 801 covering the multiple light-emitting diodes may be removed at the same time, as shown in FIG. 7D.
  • step S205 a bonding wire 9 is formed so that the bonding wire 9 is electrically connected to the first conductive pad 3 and the second conductive pad 7.
  • the bonding wire 9 is formed such that one end 91 of the bonding wire 9 is connected to the first conductive pad 3, and the other end 92 is connected to the second conductive pad 7. That is, one end 91 of the bonding wire 9 is welded to the first conductive pad 3 and the other end 92 is welded to the second conductive pad 7.
  • the solder joint of the terminal 91 on the first conductive pad 3 is called a first solder joint 911
  • the solder joint of the terminal 92 on the second conductive pad 7 is called a second solder joint 921.
  • the bonding wire 9 is a bonding wire having a certain arc. Specifically, the bonding wire 9 has portions at the first solder joint 911 and the second solder joint 921 that form a certain angle with the plane of the first substrate and/or have a curved arc. In this way, the processing difficulty can be reduced.
  • the bonding wire 9 may use metals such as Cu, Al, Au, Ag, or their alloys.
  • the diameter of the bonding wire 9 may be between 10 and 500 microns.
  • the above-mentioned size L1 is approximately 2 to 5 times the diameter of the bonding wire.
  • the arrangement period of the plurality of first conductive pads 3 is related to the diameter of the bonding wire 9 and also related to the wiring design on the first substrate 100.
  • step S206 referring to FIG. 6F, glue dispensing is performed on the area where the first solder joint 911 and the second solder joint 921 are located.
  • protective glue is applied to the areas where the first solder joint 911 and the second solder joint 921 are located, so as to form a second solder joint in the area where the first solder joint 911 and the second solder joint 921 are located.
  • the orthographic projection of the first solder joint protective glue 912 on the first substrate 100 covers the orthographic projection of the first solder joint 911 on the first substrate 100
  • the orthographic projection of the second solder joint protective glue 922 on the second substrate 200 covers The orthographic projection of the second solder joint 921 on the second substrate 200.
  • the first solder joint protective glue 912 and the second solder joint protective glue 922 are viscous and insulating glues to better protect the first solder joint and the second solder joint.
  • step S207 the adhesive 12 is attached to any one of the surface of the first substrate 1 away from the first conductive pad 3 and the surface of the second substrate 6 away from the second conductive pad 7.
  • the adhesive 12 is attached to the surface of the first substrate 1 away from the first conductive pad 3.
  • the second substrate 200 can be bent to the back of the first substrate 100, and the two substrates 100 and 200 can be attached together by the adhesive 12.
  • the second substrate 200 can be rotated to the lower surface of the first substrate 100 by the carrier 300 with a fixed rotation track, so as to ensure the stability of the turning process and reduce the bonding wire 9 Risk of breakage.
  • the first protective adhesive layer 8' did not cover the sidewall of the adhesive 12.
  • the first separation distance S1 between the two substrates is greater than the sum of the thickness of the first substrate 100 and the thickness of the second substrate 200. Accordingly, the length of the formed bonding wire 9 is greater than the thickness of the first substrate 100 And the thickness of the second substrate 200. In this way, during the process of turning over the second substrate 200, it can be ensured that the bonding wires 9 are not pulled off, thereby reducing the risk of the bonding wires 9 being broken.
  • the thickness of the second protective glue layer 11' is in the range of 5 to 500 microns, and the Young's modulus of the material used to form the second protective glue layer 11' can be between 0.1Mpa and 80Gpa.
  • the material It can be silica gel or polydimethylsiloxane (ie PDMS).
  • the protective film 801 may not be removed to cover the parts of the multiple light-emitting diodes.
  • the removal of the protective film 801 covering the parts of the plurality of light-emitting diodes may be performed after step S209. In this way, the light-emitting diode can be protected during the manufacturing process.
  • step S209 due to the accuracy control of the glue dispensing process, excess protective glue may be introduced in the area where the light emitting diode is located.
  • step S209 the part of the protective film 801 covering the multiple light-emitting diodes can be removed, and the excess protective glue can be removed at the same time to realize the overall peeling of the protective cover and the excess protective glue thereon.
  • the wire bonding process is used to fabricate the bonding wire, and the substrate is turned over to realize the upper and lower substrate stacked structure, which can reduce the process complexity and reduce the manufacturing cost.
  • the first substrate 100 includes: a first substrate 1; a plurality of light emitting diodes provided on the first substrate 1; and at least one first conductive pad 3 provided on the first substrate 1.
  • the first conductive pad 3 is located on the surface of the first substrate 100 away from the second substrate 200.
  • the light-emitting substrate further includes at least one bonding wire structure 90, and the bonding wire structure 90 electrically connects the first conductive pad 3 and the second conductive pad 7.
  • Each bonding wire structure 90 includes a bonding wire 9, a first solder joint 911 and a second solder joint 921.
  • the first solder joint 911 is a solder joint where one end of the bonding wire 9 is soldered to the first conductive pad 3
  • the second solder joint 921 is a solder joint where the other end of the bonding wire 9 is soldered to the second conductive pad 7.
  • the light-emitting substrate further includes a first protective glue layer 8, the first protective glue layer 8 at least contact the first side wall 101 of the first substrate 100 and the second side of the second substrate 200 ⁇ 201.
  • the first sidewall 101 is a sidewall of the first substrate 100 adjacent to the first conductive pad 3.
  • the second side wall 201 is the side wall of the second substrate 200 adjacent to the second conductive pad 7.
  • the first protective adhesive layer 8 also contacts the sidewalls of the adhesive 12, and the sidewalls of the adhesive 12, the first sidewall 101, and the second sidewall 201 are on the first substrate 100 The orthographic projections coincide with each other.
  • the projection of the second protective glue layer 11 in the direction perpendicular to the first sidewall 101 covers the projection of the bonding wire 9 in the direction perpendicular to the first sidewall 101.
  • the orthographic projection of the second protective glue layer 11 on the first substrate 1 covers the orthographic projection of each of the first conductive pad 3 and the second conductive pad 7 on the first substrate 1. In this way, the second protective glue layer 11 can protect the bonding wire, the solder joint, and the conductive pad.
  • the size (ie thickness) of the second protective glue layer 11 in the direction perpendicular to the first sidewall 101 is equal to the size (ie thickness) of the first protective glue layer 8 in the direction perpendicular to the first sidewall 101.
  • the bonding wire 9 has a certain arc at both the first solder joint 911 and the second solder joint 921.
  • the light-emitting substrate further includes a first protective glue layer 8', and the first protective glue layer 8 at least contacts the first sidewall 101 of the first substrate 100 and the second sidewall 201 of the second substrate 200.
  • the first protective glue layer 8' does not contact the sidewall of the back glue 12. That is, the projection of the first protective glue layer 8'in the direction perpendicular to the first side wall 101 and the projection of the back glue 12 in the direction perpendicular to the first side wall 101 do not overlap.
  • the second protective adhesive layer 11' also covers the first sidewall 101 of the first substrate 100, the sidewall of the adhesive 12, and the second sidewall 201 of the second substrate 200. That is, the projection of the second protective glue layer 11' in a direction perpendicular to the first side wall 101 covers each of the first side wall 101, the side wall of the adhesive 12, and the second side wall 201.
  • the first protective glue layer, the second protective glue layer and the solder joint protective glue layer are all insulating glue materials.
  • the second protective glue layer may be a black glue material, so as to prevent the light reflected by the conductive pad and the bonding wire from interfering with the display light.
  • the second protective adhesive layer may be a non-black adhesive material. In this case, the entire surface of the module may be blackened.
  • the backplane according to the embodiments of the present disclosure may include those known in the art. Drive backplanes of various types and structures.
  • the first substrate 100 may include a first substrate 1 and a plurality of light emitting units 140 arranged in an array on the first substrate 1.
  • the plurality of light emitting units 140 are arranged in N rows and M columns, N is an integer greater than 0, and M is an integer greater than 0.
  • the number of light-emitting units 140 may be determined according to actual requirements, such as the size of the light-emitting substrate and the required brightness. Although only 3 rows and 5 columns of light-emitting units 140 are shown in FIG. 9, it should be understood that the light-emitting units The number of 140 is not limited to this.
  • each row of light-emitting units 140 is arranged along the first direction X, and each column of light-emitting units 140 is arranged along the second direction Y.
  • the driving circuit 4 includes a first input terminal Di, a second input terminal Pwr, an output terminal OT, and a common voltage terminal GND.
  • the first input terminal Di receives a first input signal
  • the first input signal is, for example, an address signal, which is used to select the drive circuit 4 of the corresponding address.
  • the addresses of different driving circuits 4 may be the same or different.
  • the first input signal may be an 8-bit address signal, and the address to be transmitted can be obtained by parsing the address signal.
  • the second input terminal Pwr receives a second input signal.
  • the second input signal is, for example, a power line carrier communication signal.
  • the second input signal not only provides power to the driving circuit 4, but also transmits communication data to the driving circuit 4, and the communication data can be used to control the light-emitting duration of the corresponding light-emitting unit 140, thereby controlling its visual light-emitting brightness.
  • the output terminal OT can respectively output different signals in different time periods, for example, respectively output a relay signal and a driving signal.
  • the relay signal is an address signal provided to other drive circuits 4, that is, the first input terminal Di of the other drive circuit 4 receives the relay signal as the first input signal, thereby obtaining the address signal.
  • the driving signal may be a driving current for driving the light emitting diode 5 to emit light.
  • the common voltage terminal GND receives a common voltage signal, such as a ground signal.
  • the driving circuit 4 is configured to output a relay signal through the output terminal OT in the first period according to the first input signal received by the first input terminal Di and the second input signal received by the second input terminal Pwr, and to pass through the
  • the output terminal OT provides a driving signal to a plurality of light-emitting diodes 5 connected in series.
  • the output terminal OT outputs a relay signal, and the relay signal is provided to the other drive circuits 4 so that the other drive circuits 4 obtain address signals.
  • the output terminal OT outputs a driving signal, which is provided to a plurality of light-emitting diodes 5 connected in series, so that the light-emitting diodes 5 emit light in the second time period.
  • each light-emitting diode 5 includes an anode (+) and a cathode (-) (or, it may be called an anode and a cathode, or may be called a P electrode and an N electrode), and the anode and the cathode of the plurality of light-emitting diodes 5 depend on The sequence is connected in series from end to end, thereby forming a current path between the driving voltage terminal Vled and the output terminal OT.
  • the driving voltage terminal Vled provides a driving voltage, for example, a high voltage during the period (the second period) where the light emitting diode 5 needs to emit light, and a low voltage in other periods. Therefore, in the second time period, the driving signal (for example, the driving current) sequentially flows from the driving voltage terminal Vled through the plurality of light emitting diodes 5 and then flows into the output terminal OT of the driving circuit 4.
  • the multiple light-emitting diodes 5 emit light when the driving current flows. By controlling the duration of the driving current, the light-emitting duration of the light-emitting diodes 5 can be controlled, thereby controlling the visual light-emitting brightness.
  • the number of light-emitting diodes 5 in each light-emitting unit 140 is not limited, and can be any number such as 4, 5, 7, 8, etc., and is not limited to 6. .
  • the plurality of light emitting diodes 5 can be arranged in any manner, for example, according to a required pattern, and is not limited to a matrix arrangement.
  • the placement position of the driving circuit 4 is not limited, and can be placed in any gap between the light-emitting diodes 5, which can be determined according to actual requirements, and the embodiment of the present disclosure does not limit this.
  • the driving circuit 4 may include a thin film transistor array layer.
  • the thin film transistor array layer may specifically include an active layer, a gate insulating layer, a gate electrode, a source electrode, a drain electrode, a flat layer, and the like.
  • the specific film structure of the driving circuit 4 can refer to the film structure used in the existing array substrate, which will not be repeated here.
  • Some exemplary embodiments of the present disclosure also provide a display device.
  • 11 and 12 are schematic diagrams of display devices according to some exemplary embodiments of the present disclosure.
  • the display device includes at least two light-emitting substrates as described above. At least two light-emitting substrates as described above are spliced to form a display device.
  • the display device has all the features and advantages of the above-mentioned light-emitting substrate, and these features and advantages can be referred to the above description of the light-emitting substrate, which will not be repeated here.
  • the terms “substantially”, “approximately”, “approximately” and other similar terms are used as approximate terms rather than as terms of degree, and they are intended to explain what will be recognized by those of ordinary skill in the art The inherent deviation of the measured or calculated value. Taking into account factors such as process fluctuations, measurement problems, and errors related to the measurement of a specific quantity (ie, the limitations of the measurement system), as used herein, “approximately” or “approximately” includes the stated value and means that the value is The specific value determined by a person of ordinary skill in the art is within an acceptable deviation range. For example, “about” can mean within one or more standard deviations, or within ⁇ 10% or ⁇ 5% of the stated value.

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Abstract

一种发光基板及其制造方法和显示装置。所述发光基板包括：第一基板（100），所述第一基板（100）包括：第一衬底（1）；设置在所述第一衬底（1）上的发光二极管（5）；和设置在所述第一衬底（1）上的第一导电垫（3）；第二基板（200），所述第二基板（200）与所述第一基板（100）相对设置，所述第二基板（200）包括：第二衬底（6）；和设置在所述第二衬底（6）上的第二导电垫（7）；以及键合引线结构（90），所述键合引线结构包括键合引线（9），其中，所述第一导电垫（3）位于所述第一基板（100）远离所述第二基板（200）的表面，所述第二导电垫（7）位于所述第二基板（200）远离所述第一基板（100）的表面，所述键合引线（9）电连接所述第一导电垫（3）与所述第二导电垫（7）。

Description

发光基板及其制造方法、显示装置 技术领域
本公开涉及显示技术领域，尤其涉及一种发光基板及其制造方法、显示装置。
背景技术
发光二极管(Light Emitting Diode，英文缩写为LED)技术发展了近三十年，其应用范围不断扩展，例如，其可以应用于显示领域，用作显示装置的背光源或用作LED显示屏。随着技术的发展，次毫米发光二极管(Mini Light Emitting Diode，英文缩写为Mini LED)显示技术和微型发光二极管(Micro Light Emitting Diode，英文缩写为Micro LED)显示技术逐渐成为显示装置的一个热点。LED具有自发光、广视角、快速响应、结构简单、寿命长等优点，而且，Mini LED/Micro LED显示屏可以通过拼接方式实现大尺寸显示，所以，它们具有较好的市场前景。目前，Mini LED/Micro LED显示装置的结构及其制造工艺，是研发人员关注的重要课题之一。
在本部分中公开的以上信息仅用于对本公开的发明构思的背景的理解，因此，以上信息可包含不构成现有技术的信息。
发明内容
为了解决上述问题的至少一个方面，本公开实施例提供一种发光基板及其制造方法和显示装置。
在一个方面，提供一种发光基板，包括：
第一基板，所述第一基板包括：
第一衬底；
设置在所述第一衬底上的发光二极管；和
设置在所述第一衬底上的第一导电垫；
第二基板，所述第二基板与所述第一基板相对设置，所述第二基板包括：
第二衬底；和
设置在所述第二衬底上的第二导电垫；以及
键合引线结构，所述键合引线结构包括键合引线，
其中，所述第一导电垫位于所述第一基板远离所述第二基板的表面，所述第二导电垫位于所述第二基板远离所述第一基板的表面，所述键合引线电连接所述第一导电垫与所述第二导电垫。
根据一些示例性的实施例，所述键合引线结构还包括第一焊点和第二焊点，所述第一焊点为所述键合引线的一端焊接至所述第一导电垫的焊点，所述第二焊点为所述键合引线的另一端焊接至所述第二导电垫的焊点。
根据一些示例性的实施例，所述发光基板还包括背胶，其中，所述背胶设置在所述第一基板与所述第二基板之间，用于将所述第一基板与所述第二基板贴附在一起。
据一些示例性的实施例，所述发光基板还包括第一保护胶层，
其中，所述第一基板包括邻近所述第一导电垫的第一侧壁，所述第二基板包括邻近所述第二导电垫的第二侧壁，所述第一保护胶层至少接触所述第一侧壁和所述第二侧壁。
据一些示例性的实施例，所述背胶包括第三侧壁，所述第一侧壁、所述第二侧壁和所述第三侧壁在所述第一衬底上的正投影彼此重合。
据一些示例性的实施例，所述第一保护胶层还接触所述第三侧壁。
据一些示例性的实施例，所述发光基板还包括第二保护胶层，
其中，所述键合引线被夹在所述第一保护胶层与所述第二保护胶层之间。
据一些示例性的实施例，所述第二保护胶层沿垂直于所述第一侧壁的方向的投影覆盖所述键合引线沿垂直于所述第一侧壁的方向的投影。
据一些示例性的实施例，所述第二保护胶层在所述第一衬底上的正投影覆盖所述第一导电垫、所述第一焊点、所述第二导电垫和所述第二焊点中的每一个在所述第一衬底上的正投影。
据一些示例性的实施例，所述第一保护胶层远离所述第一侧壁的表面接触所述键合引线，并且，所述第二保护胶层靠近所述第一侧壁的表面接触所述键合引线。
据一些示例性的实施例，所述键合引线在所述第一焊点和所述第二焊点处分别具有与所述第一衬底所在平面呈一定夹角和/或具有弯曲弧度的部分。
据一些示例性的实施例，所述第一保护胶层沿垂直于所述第一侧壁的方向的投影与所述第三侧壁沿垂直于所述第一侧壁的方向的投影不重合。
据一些示例性的实施例，所述发光基板还包括设置在所述第一焊点处的第一焊点保护胶和设置在所述第二焊点处的第二焊点保护胶，
其中，所述第一焊点保护胶在所述第一衬底上的正投影至少覆盖所述第一焊点在所述第一衬底上的正投影，所述第二焊点保护胶在所述第一衬底上的正投影至少覆盖所述第二焊点在所述第一衬底上的正投影。
据一些示例性的实施例，所述第一焊点保护胶在所述第一衬底上的正投影覆盖所述第一导电垫在所述第一衬底上的正投影，所述第二焊点保护胶在所述第一衬底上的正投影覆盖所述第二导电垫在所述第一衬底上的正投影。
据一些示例性的实施例，所述键合引线位于所述第一保护胶层远离所述第一侧壁的一侧，并且所述第一保护胶层与所述键合引线在垂直于所述第一侧壁的方向上存在间隙。
据一些示例性的实施例，所述发光基板还包括第二保护胶层，其中，所述第二保护胶层覆盖所述键合引线，并且还填充所述第一保护胶层与所述键合引线之间的间隙。
据一些示例性的实施例，所述第二保护胶层在所述第一衬底上的正投影覆盖所述键合引线在所述第一衬底上的正投影，所述第二保护胶层沿垂直于所述第一侧壁的方向的投影覆盖所述键合引线沿垂直于所述第一侧壁的方向的投影。
据一些示例性的实施例，所述第二保护胶层在所述第一衬底上的正投影覆盖所述第一焊点保护胶和所述第二焊点保护胶中的每一个在所述第一衬底上的正投影。
据一些示例性的实施例，所述第二保护胶层沿垂直于所述第一侧壁的方向的尺寸等于所述第一保护胶层沿垂直于所述第一侧壁的方向的尺寸。
据一些示例性的实施例，所述第一保护胶层沿垂直于所述第一侧壁的方向的尺寸在5～500微米之间，和/或，所述第一保护胶层和所述第二保护胶层中的每一个包括的胶材的杨氏模量在0.1Mpa～80Gpa之间。
据一些示例性的实施例，所述发光二极管为次毫米发光二极管或微型发光二极管。
据一些示例性的实施例，所述第一保护胶层和所述第二保护胶层均包括绝缘性胶材。
据一些示例性的实施例，所述第二保护胶层包括黑色胶材。
据一些示例性的实施例，所述键合引线的直径在10～500微米之间。
据一些示例性的实施例，所述发光二极管、所述第一导电垫、所述第二导电垫和 所述键合引线的数量均为多个，多个所述键合引线分别电连接多个所述第一导电垫与多个所述第二导电垫。
在另一方面，提供一种显示装置，包括多个如上所述的发光基板。
在又一方面，提供一种发光基板的制造方法，包括：
提供第一基板，所述第一基板包括第一衬底和设置在所述第一衬底上的第一导电垫；
绑定发光二极管至所述第一基板上；
提供第二基板，所述第二基板包括第二衬底和设置在所述第二衬底上的第二导电垫；
将所述第一基板和所述第二基板置于载具上，以保持所述第一基板和所述第二基板的相对位置；
形成键合引线结构，以电连接所述第一导电垫与所述第二导电垫；以及
朝着所述第一基板翻转所述第二基板，使得所述第二衬底远离所述第二导电垫的表面朝向所述第一基板，从而使得所述第一导电垫位于所述第一基板远离所述第二基板的表面，所述第二导电垫位于所述第二基板远离所述第一基板的表面，
其中，所述键合引线结构包括键合引线，所述键合引线电连接所述第一导电垫与所述第二导电垫。
据一些示例性的实施例，在将所述第一基板和所述第二基板置于载具上，以保持所述第一基板和所述第二基板的相对位置的步骤中，所述第一基板和所述第二基板间隔规定的距离，使得所述第一导电垫与所述第二导电垫间隔规定的距离，并且所述第一导电垫的远离所述第一衬底的第一表面与所述第二导电垫的远离所述第二衬底的第二表面处于同一水平面。
据一些示例性的实施例，在将所述第一基板和所述第二基板置于载具上的步骤与形成键合引线结构的步骤之间，所述制造方法还包括：
在所述第一导电垫与所述第二导电垫之间的间隙内形成第一保护胶层，使得所述第一保护胶层在所述载具上的正投影覆盖所述间隙在所述间隙在所述载具上的正投影，并且所述第一保护胶层远离所述载具的第三表面与所述第一表面处于同一水平面。
据一些示例性的实施例，在形成键合引线结构的步骤中，在所述第一导电垫和所述第二导电垫所在的平面内形成所述键合引线。
据一些示例性的实施例，在形成键合引线结构的步骤与朝着所述第一基板翻转所述第二基板的步骤之间，所述制造方法还包括：
在所述第一导电垫、所述第二导电垫和所述键合引线中的每一个远离所述第一衬底或所述第二衬底的表面上形成第二保护胶层，使得所述第二保护胶层在垂直于所述第一表面的方向上的投影覆盖所述第一导电垫、所述第二导电垫和所述键合引线中的每一个在垂直于所述第一表面的方向上的投影。
据一些示例性的实施例，在将所述第一基板和所述第二基板置于载具上，以保持所述第一基板和所述第二基板的相对位置的步骤中，所述第一基板和所述第二基板间隔规定的距离，使得所述第一导电垫与所述第二导电垫间隔规定的距离，并且所述第一导电垫的远离所述第一衬底的第一表面与所述第二导电垫的远离所述第二衬底的第二表面处于不同的水平面。
据一些示例性的实施例，在将所述第一基板和所述第二基板置于载具上的步骤与形成键合引线结构的步骤之间，所述制造方法还包括：
形成第一保护胶层，使得所述第一保护胶层至少覆盖所述第一基板邻近所述第一导电垫的第一侧壁以及所述第二基板邻近所述第二导电垫的第二侧壁。
据一些示例性的实施例，在形成键合引线结构的步骤中，所述键合引线的一端焊接至所述第一导电垫，以在所述第一导电垫处形成第一焊点，并且所述键合引线的另一端焊接至所述第二导电垫，以在所述第二导电垫处形成第二焊点，
其中，所述键合引线在所述第一焊点和所述第二焊点处分别具有与所述第一衬底所在平面呈一定夹角和/或具有弯曲弧度的部分。
据一些示例性的实施例，在形成键合引线结构的步骤与朝着所述第一基板翻转所述第二基板的步骤之间，所述制造方法还包括：
对所述第一焊点和所述第二焊点所在的区域进行点胶处理，以在所述第一焊点和所述第二焊点所在的区域分别形成第一焊点保护胶和第二焊点保护胶。
据一些示例性的实施例，在朝着所述第一基板翻转所述第二基板的步骤之后，所述制造方法还包括：
形成第二保护胶层，使得所述第二保护胶层覆盖所述第一导电垫、所述键合引线和所述第二导电垫。
据一些示例性的实施例，在朝着所述第一基板翻转所述第二基板的步骤之前，所 述制造方法还包括：
在所述第一衬底远离所述第一导电垫的表面和所述第二衬底远离所述第二导电垫的表面中的一个上贴附背胶，
其中，在朝着所述第一基板翻转所述第二基板的步骤中，所述第一衬底远离所述第一导电垫的表面和所述第二衬底远离所述第二导电垫的表面中的另一个贴附至所述背胶。
据一些示例性的实施例，所述第一基板包括邻近所述至少一个第一导电垫的第一侧壁，所述第二基板包括邻近所述至少一个第二导电垫的第二侧壁，
在朝着所述第一基板翻转所述第二基板的步骤中，使得所述第一保护胶层至少接触所述第一侧壁和所述第二侧壁。
据一些示例性的实施例，所述第一基板和所述第二基板之间间隔的距离大于所述第一基板的厚度与所述第二基板的厚度之和。
据一些示例性的实施例，形成第一保护胶层的步骤具体包括：
在所述第一基板上形成保护覆膜，所述保护覆膜覆盖所述发光二极管和所述第一导电垫；
在所述第一基板上形成第一保护胶材层，所述第一保护胶材层至少覆盖所述第一基板邻近所述第一导电垫的第一侧壁，所述第一保护胶材层在所述第一衬底上的正投影还与所述第一导电垫和所述保护覆膜中的每一个在所述第一衬底上的正投影至少部分重叠；以及
至少去除所述保护覆膜的一部分以及所述第一保护胶材层与所述保护覆膜重叠的部分，以露出所述第一导电垫。
附图说明
通过下文中参照附图对本公开所作的描述，本公开的其它目的和优点将显而易见，并可帮助对本公开有全面的理解。
图1是根据本公开的一些示例性实施例的发光基板的平面示意图，需要说明的是，为了说明，图1示出了发光基板包括的第一基板和第二基板在折叠或翻转之前的状态；
图2是根据本公开的一些示例性实施例的发光基板的制造方法的流程图；
图3A至图3H是示意性示出所述发光基板的制造方法的一些步骤被执行后形成的 结构的截面图；
图4A和图4B是示意性示出3层叠层结构受弯折之前和之后的状态的示意图；
图5是根据本公开的一些示例性实施例的发光基板的制造方法的流程图；
图6A至图6H是示意性示出所述发光基板的制造方法的一些步骤被执行后形成的结构的截面图；
图7A至图7D是示意性示出所述发光基板的制造方法的一个步骤被执行后形成的结构的截面图；
图8是示意性示出根据本公开实施例的发光基板的边框区域的示意图；
图9为图1所示的发光基板的发光单元的排列示意图；
图10为图9所示的发光基板中一个发光单元的示意图；以及
图11和图12分别是根据本公开的一些示例性实施例的显示装置的示意图。
需要注意的是，为了清晰起见，在用于描述本公开的实施例的附图中，层、结构或区域的尺寸可能被放大或缩小，即这些附图并非按照实际的比例绘制。
具体实施方式
在下面的描述中，出于解释的目的，阐述了许多具体细节以提供对各种示例性实施例的全面的理解。然而，明显的是，在不具有这些具体细节或者具有一个或多个等同布置的情况下，可以实施各种示例性实施例。在其它情况下，以框图形式示出了公知的结构和装置，以避免使各种示例性实施例不必要地模糊。此外，各种示例性实施例可以是不同的，但不必是排他的。例如，在不脱离发明构思的情况下，可以在另一示例性实施例中使用或实施示例性实施例的具体形状、配置和特性。
在附图中，为了清楚和/或描述的目的，可以放大元件的尺寸和相对尺寸。如此，各个元件的尺寸和相对尺寸不必限于图中所示的尺寸和相对尺寸。当可以不同地实施示例性实施例时，可以与描述的顺序不同地执行具体的工艺顺序。例如，可以基本上同时执行或者以与描述的顺序相反的顺序执行两个连续描述的工艺。此外，同样的附图标记表示同样的元件。
当元件被描述为“在”另一元件“上”、“连接到”另一元件或“结合到”另一元件时，所述元件可以直接在所述另一元件上、直接连接到所述另一元件或直接结合到所述另一元件，或者可以存在中间元件。然而，当元件被描述为“直接在”另一元件 “上”、“直接连接到”另一元件或“直接结合到”另一元件时，不存在中间元件。用于描述元件之间的关系的其他术语和/或表述应当以类似的方式解释，例如，“在……之间”对“直接在……之间”、“相邻”对“直接相邻”或“在……上”对“直接在……上”等。此外，术语“连接”可指的是物理连接、电连接、通信连接和/或流体连接。此外，X轴、Y轴和Z轴不限于直角坐标系的三个轴，并且可以以更广泛的含义解释。例如，X轴、Y轴和Z轴可彼此垂直，或者可代表彼此不垂直的不同方向。出于本公开的目的，“X、Y和Z中的至少一个”和“从由X、Y和Z构成的组中选择的至少一个”可以被解释为仅X、仅Y、仅Z、或者诸如XYZ、XYY、YZ和ZZ的X、Y和Z中的两个或更多个的任何组合。如文中所使用的，术语“和/或”包括所列相关项中的一个或多个的任何组合和所有组合。
应该理解的是，尽管在这里可使用术语第一、第二等来描述不同的元件，但是这些元件不应受这些术语的限制。这些术语仅是用来将一个元件与另一个元件区分开来。例如，在不脱离示例实施例的范围的情况下，第一元件可以被命名为第二元件，类似地，第二元件可以被命名为第一元件。
在本文中，无机发光二极管是指利用无机材料制成的发光元件，其中，LED表示有别于OLED的无机发光元件。具体地，无机发光元件可以包括次毫米发光二极管(Mini Light Emitting Diode，英文缩写为Mini LED)和微型发光二极管(Micro Light Emitting Diode，英文缩写为Micro LED)。其中，微型发光二极管(即Micro LED)指的是晶粒尺寸在100微米以下的超小型发光二极管，次毫米发光二极管(即Mini LED)是指晶粒尺寸在Micro LED与传统LED之间的小型发光二极管，例如，Mini LED的晶粒尺寸可以在100～300微米之间，Micro LED的晶粒尺寸可以在10～100微米之间。
本公开的一些示例性实施例提供了一种发光基板及其制造方法和包括所述发光基板的显示装置。例如，本公开的一些实施例提供了一种发光基板，包括：第一基板，所述第一基板包括：第一衬底；设置在所述第一衬底上的发光二极管；和设置在所述第一衬底上的第一导电垫；第二基板，所述第二基板与所述第一基板相对设置，所述第二基板包括：第二衬底；和设置在所述第二衬底上的第二导电垫；以及键合引线结构，所述键合引线结构包括键合引线，其中，所述第一导电垫位于所述第一基板远离所述第二基板的表面，所述第二导电垫位于所述第二基板远离所述第一基板的表面，所述键合引线电连接所述第一导电垫与所述第二导电垫。这样，可以简化发光基板的 结构和降低工艺复杂度，从而提高产品良率，节省制造成本。
引线键合(Wire Bonding)是一种利用热、压力或超声波能量使金属键合引线与基板焊盘紧密焊合的工艺。例如，在IC封装中，可以利用引线键合，将半导体芯片焊区与微电子封装的I/O键合引线或基板上的金属布线焊区用金属细丝连接起来。引线键合的原理是采用加热、加压或超声波等方式破坏被焊表面的氧化层和污染，产生塑性变形，使得金属键合引线与被焊面亲密接触，达到原子间的引力范围并导致界面间原子扩散而形成焊合点。
图1是根据本公开的一些示例性实施例的发光基板的平面示意图，需要说明的是，为了说明，图1示出了发光基板包括的第一基板和第二基板在折叠或翻转之前的状态。图2是根据本公开的一些示例性实施例的发光基板的制造方法的流程图。图3A至图3H是示意性示出所述发光基板的制造方法的一些步骤被执行后形成的结构的截面图。结合参照图1至图3H，所述发光基板的制造方法可以按照以下步骤执行。
在步骤S101中，提供第一基板100。
参照图1和图3A，第一基板100可以包括第一衬底1以及设置在第一衬底1上的多个第一电极2和多个第一导电垫3。多个第一导电垫3位于所述第一基板100的边缘位置。例如，多个第一导电垫3位于所述第一基板100的扇出区(即fan-out区)，用于将位于所述第一基板100上的信号线(例如，图1中示意性示出了部分信号线150)电连接至外部驱动电路。
例如，第一衬底1的材料可以包括但不限于玻璃，石英，塑料，硅，聚酰亚胺等。第一电极2和第一导电垫3可以为柱状结构。第一电极2和第一导电垫3的材料可以包括导电材料，例如金属材料等，具体地，可以为金、银、铜、铝、钼、金合金、银合金、铜合金、铝合金、钼合金等中选择的至少一种或者至少两种的组合，本公开的实施例对此不作限制。
例如，所述第一基板100还可以包括与多个第一电极2电连接的驱动电路4，该驱动电路4设置在第一衬底1上。该驱动电路4可以用于向后续形成在多个第一电极2上的发光二极管芯片提供电信号，控制其发光亮度。例如，在一些示例中，该驱动电路4可以为与每个发光二极管芯片一一对应连接的多个像素驱动电路，或者是与每个发光二极管芯片一一对应连接的多个微型集成电路芯片等结构，可以控制每个发光二极管芯片发出不同的亮度灰阶。需要说明的是，第一基板100上的驱动电路4的具 体电路结构可以根据实际需要进行设置，本公开的实施例对此不作限制。在下文中，将结合附图对驱动电路4进行示例性说明。
在步骤S102中，将多个发光二极管5转移并绑定至所述第一基板100上。
参照图1和图3B，将多个发光二极管5中的每个都包括N电极和P电极，发光二极管5的N电极和P电极分别连接到对应的第一电极2，而多个第一导电垫3的表面裸露在外。
参照图1，多个发光二极管沿第一方向X和第二方向Y成阵列地排列。例如，第一方向X为行方向且第二方向Y为列方向。当然，本公开的实施例不限于此，第一方向和第二方向可以为任意的方向，只需使第一方向和第二方向交叉即可。并且，多个发光二极管也不限于沿直线排列，也可以沿曲线排列、沿环形排列或按照任意的方式排列，这可以根据实际需求而定，本公开的实施例对此不作限制。
多个第一导电垫3沿所述第一方向X排列在所述第一基板100的边缘位置，即多个第一导电垫3构成第一导电垫行。例如，多个第一导电垫3沿所述第一方向X等间距地布置。每一个第一导电垫3沿第一方向X的尺寸为L1，相邻的2个第一导电垫3之间沿第一方向X的距离为D1。任一个第一导电垫3沿第一方向X的尺寸L1与相邻的2个第一导电垫3之间沿第一方向X的距离D1之和可以称为第一导电垫3的排列周期。在一些示例中，该排列周期大于40微米。
例如，所述发光二极管可以包括微型发光二极管(Micro-LED)或次毫米发光二极管(Mini-LED)。
在步骤S103中，提供第二基板200，并将所述第一基板100和第二基板200置于载具300上。
例如，第二基板200可以为电路板，例如，PCB(Printed Circuit Board，即印刷电路板)、FPC(Flexible Printed Circuit，即柔性电路板)或COF(Chip On Film，即膜上芯片)等。
参照图3C，第二基板200可以包括第二衬底6和设置在第二衬底6上的多个第二导电垫7。例如，多个第二导电垫7可以沿第一方向X(在图3C中为垂直于纸面的方向)排列，即，多个第二导电垫7构成第二导电垫行。例如，多个第二导电垫7可以与多个第一导电垫3一一对应。即，第二导电垫7的排列周期与第一导电垫3的排列周期相同。
当然，第二基板200还可以包括设置在第二衬底6上的外部驱动电路，例如，集成电路芯片，但本公开的实施例不局限于此。
载具300用于间隔并固定第一基板100和第二基板200，以保持二者的相对位置关系。参照图3C，第一基板100上设置的第一导电垫3具有远离第一衬底1的第一表面31(图中示出为上表面)，第二基板200上设置的第二导电垫7具有远离第二衬底6的第二表面71(图中示出为上表面)。在载具300的固定作用下，第一基板100与第二基板200间隔规定的距离，相应地，第一导电垫3所在的第一导电垫行与第二导电垫7所在的第二导电垫行也间隔规定的距离，并且第一导电垫3的第一表面31与第二导电垫7的第二表面71处于同一水平面，以保证后续的键合引线是在一个平面内引出的。例如，在一些示例性的实施例中，所述规定的距离可以大于等于第一基板100与第二基板200的厚度之和，并且小于第一基板100与第二基板200的厚度之和的1.5倍。再例如，所述规定的距离可以基本等于第一基板100与第二基板200的厚度之和。
在步骤S104中，结合参照图3C和图3D，在第一导电垫3所在的第一导电垫行与第二导电垫7所在的第二导电垫行之间的间隙400内形成第一保护胶层8。
例如，可以在间隙400内涂布一定厚度的保护胶，该保护胶至少充满间隙400，并且，由于涂布精度的限制，保护胶还可能会覆盖位于间隙400两侧的第一导电垫3和第二导电垫7的表面的至少一部分，但之后可以通过激光烧蚀或去膜的方式去除该保护胶覆盖第一导电垫3和第二导电垫7的部分，以免影响后续的工艺，从而得到只填充在间隙400的第一保护胶层8。可以理解，第一保护胶层8在载具300上的正投影覆盖间隙400在载具300上的正投影。
参照图3D，第一保护胶层8靠近第一基板100的侧壁接触第一导电垫3，第一保护胶层8靠近第二基板100的侧壁接触第二导电垫7。
例如，第一保护胶层8包括远离载具300的第三表面81。第三表面81、第一表面31和第二表面71基本处于同一水平面，以保证后续的键合引线形成在较为平整的表面上。
例如，第一保护胶层8的厚度在5～500微米的范围内，具体取值与第一导电垫3和/或第二导电垫7的厚度相同，第一保护胶层8的所用材料的杨氏模量可以在0.1Mpa～80Gpa之间，例如，所述材料可以为硅胶或聚二甲基硅氧烷(即PDMS)。
在步骤S105中，形成键合引线9，使得所述键合引线9电连接第一导电垫3与第 二导电垫7。
参照图3E，形成键合引线9，使得键合引线9的一端91连接第一导电垫3，另一端92连接第二导电垫7。即，键合引线9的一端91焊接在第一导电垫3上，另一端92焊接在第二导电垫7上。端91焊接在第一导电垫3上的焊点称为第一焊点911，端92在第二导电垫7上的焊点称为第二焊点921，参照图3H。
在图3E所示的实施例中，键合引线9基本在第一导电垫3和第二导电垫7所在的平面内延伸，利于后续的弯折工艺。
例如，第一焊点911可以为楔形焊点，即，第一焊点911在第一衬底1上的正投影的形状为楔形。在该情况下，第一焊点911在第一导电垫3上的高度可以控制在1～10微米之间。键合引线9的直径可以在10～500微米之间。第一焊点911在第一导电垫3上的高度比键合引线9的直径小，这样，可以实现键合引线9基本在第一导电垫3和第二导电垫7所在的平面内延伸。
例如，键合引线9可以采用Cu、A1、Au、Ag等金属或其合金。
结合参照图1和图3E，每一根键合引线9分别电连接一个第一导电垫3和与它对应的第二导电垫7。由于多个第一导电垫3沿所述第一方向X等间距地布置，所以，多根键合引线9也沿第一方向X等间距地排列。
例如，键合引线9的直径可以在10～500微米之间。当第一焊点911为楔形焊点时，上述尺寸L1约为键合引线的直径的1.2～3倍。
应该理解，多个第一导电垫3的排列周期与键合引线9的直径相关，还与第一基板100上的走线设计相关。
在步骤S106中，在第一导电垫3、第二导电垫7和键合引线9中的每一个远离第一衬底1和第二衬底6的表面上形成第二保护胶层11。
参照图3F，第二保护胶层11在垂直于所述第一表面31的方向上的正投影覆盖第一导电垫3、第二导电垫7和键合引线9中的每一个在垂直于所述第一表面31的方向上的正投影。这样，可以保护键合引线9以及第一导电垫3和第二导电垫7中的每一个与键合引线9的焊点。
例如，第二保护胶层11的厚度在5～500微米的范围内，第二保护胶层11所用的材料的杨氏模量可以在0.1Mpa～80Gpa之间，例如，所述材料可以为硅胶或聚二甲基硅氧烷(即PDMS)。
在一些示例中，第二保护胶层11的厚度可以基本等于第一保护胶层8的厚度。这样，可以确保键合引线9处于上下两个保护胶层的中性层处。
具体地，参照图4A和图4B，键合引线9被夹在第一保护胶层8与第二保护胶层11之间，以形成叠层结构。当该叠层结构被弯折时，位于上方的第二保护胶层11受拉应力作用，位于下方的第一保护胶层8受压应力作用。由于第二保护胶层11的厚度基本等于第一保护胶层8的厚度，所以，位于中间位置处的键合引线9受到的应力基本为零，即键合引线9处于弯折中性层处。以此方式，可以减小键合引线的变形量，从而可以提高信赖性。
在步骤S107中，在第一衬底1远离第一导电垫3的表面和第二衬底6远离第二导电垫7的表面中的任一个上贴附背胶12。例如，参照图3G，在第一衬底1远离第一导电垫3的表面上贴附背胶12。
在步骤S108中，结合参照图3G和图3H，朝着第一基板100翻转第二基板200，使得第二衬底6远离第二导电垫7的表面贴附至所述背胶12。
以此方式，可以将第二基板200弯折至第一基板100的背面，并且两个基板100和200可以通过背胶12贴附在一起。
例如，在翻转第二基板200的过程中，可通过具有固定旋转轨迹的载具300将第二基板200旋转至第一基板100的下表面，以确保翻转过程的稳定性，降低键合引线9断裂的风险。
继续参照图3H，在步骤S108中，翻转第二基板200，还使得第一保护胶层8远离键合引线9的表面接触第一基板100、背胶12和第二基板200。具体地，第一保护胶层8远离键合引线9的表面接触第一基板100的侧壁、背胶12的侧壁和第二基板200的侧壁。通过这样的方式，第一基板100的侧壁、背胶12的侧壁和第二基板200的侧壁完整地支撑第一保护胶层8，从而完整地支撑键合引线9，以提高信赖性。
在根据本公开实施例的发光基板的制造方法中，利用引线键合工艺制作键合引线，并翻转基板实现上下基板叠层结构，能够降低工艺复杂度，并且降低制造成本。
图5是根据本公开的一些示例性实施例的发光基板的制造方法的流程图。图6A至图6H是示意性示出所述发光基板的制造方法的一些步骤被执行后形成的结构的截面图。结合参照图1、图5至图6H，所述发光基板的制造方法可以按照以下步骤执行。
需要说明的是，下面将重点说明与图2至图3H所示的实施例的不同之处，对于 相同的部分，可以参照上文的描述。
在步骤S201中，提供第一基板100。
参照图1和图6A，第一基板100可以包括第一衬底1以及设置在第一衬底1上的多个第一电极2和多个导电垫3。多个第一导电垫3位于所述第一基板100的边缘位置。
在步骤S202中，将多个发光二极管5转移并绑定至所述第一基板100上。
参照图1和图6B，多个发光二极管5中的每个都包括N电极和P电极，发光二极管5的N电极和P电极分别连接到对应的第一电极2，而多个第一导电垫3的表面裸露在外。
在步骤S203中，提供第二基板200，并将所述第一基板100和第二基板200置于载具300’上。
载具300’用于间隔并固定第一基板100和第二基板200，以保持二者的相对位置关系。参照图6C，第一基板100上设置的第一导电垫3具有远离第一衬底1的第一表面31(图中示出为上表面)，第二基板200上设置的第二导电垫7具有远离第二衬底6的第二表面71(图中示出为上表面)。在载具300’的固定作用下，第一基板100与第二基板200间隔规定的距离，相应地，第一导电垫3所在的第一导电垫行与第二导电垫7所在的第二导电垫行也间隔规定的距离。
具体地，第一基板100与第二基板200在第二方向Y和第三方向Z上均间隔一定的距离。其中，第三方向Z可以为垂直于第一方向X和第二方向Y所在的平面的方向，在图6C中示出为高度方向。例如，第一基板100与第二基板200在第二方向Y上间隔的距离为S1(下文称为第一间隔距离)，第一基板100与第二基板200在第三方向Z上间隔的距离为S2(下文称为第二间隔距离)。
例如，第一间隔距离S1可以大于等于第一基板100的厚度与第二基板200的厚度之和，并且小于第一基板100与第二基板200的厚度之和的1.5倍。再例如，所述第一间隔距离S1可以基本等于第一基板100与第二基板200的厚度之和。
第一基板100与第二基板200之间存在第二间隔距离S2，相应地，第一导电垫3的第一表面31与第二导电垫7的第二表面71不处于同一水平面，二者存在高度差。在图6C的示例中，第一表面31高于第二表面71，二者的高度差即为第二间隔距离S2。需要说明的是，此处的第二间隔距离S2主要是由第一衬底1与第二衬底6之间的 厚度差导致的。例如，此处的第二间隔距离S2可以在0～2毫米之间，例如可以为1毫米左右。
在步骤S204中，继续参照图6C和图6D，形成第一保护胶层8’，使得第一保护胶层8’至少覆盖第一基板100邻近第一导电垫3的第一侧壁101以及第二基板200邻近第二导电垫7的第二侧壁201。
进一步地，第一保护胶层8’还覆盖并直接接触第一基板100的位于第一导电垫3与第一侧壁101之间的边缘部分102，以及覆盖并直接接触第二基板200的位于第二导电垫7与第二侧壁201之间的边缘部分202。
例如，可以在第一导电垫3、边缘部分102、第一侧壁101、第二导电垫7、边缘部分202以及第二侧壁201上都涂布一定厚度的保护胶。然后，可以通过激光烧蚀或去膜的方式去除该保护胶覆盖第一导电垫3和第二导电垫7的部分，以免影响后续的工艺。
例如，第一保护胶层8’的厚度在5～500微米的范围内，具体取值与第一导电垫3和/或第二导电垫7的厚度相同，第一保护胶层8’的所用材料的杨氏模量可以在0.1Mpa～80Gpa之间，例如，所述材料可以为硅胶或聚二甲基硅氧烷(即PDMS)。
可选地，步骤S204具体可以按照以下步骤执行。
在步骤S2041中，参照图7A，在第一基板100形成保护覆膜801。保护覆膜801可以覆盖第一基板100的整个表面，即保护覆膜801在第一衬底1上的正投影覆盖多个发光二极管在第一衬底1上的正投影，还覆盖多个第一导电垫3在第一衬底1上的正投影。例如，保护覆膜801的厚度可以在1～100微米之间。
需要说明的是，在发光二极管5远离第一衬底1的一侧可以设置封装层501，如图7A所示。
在步骤S2042中，在第一基板100上形成第一保护胶材层8”。第一保护胶材层8”至少覆盖第一基板100邻近第一导电垫3的第一侧壁101。
参照图7B，第一保护胶材层8”在第一衬底1上的正投影与第一导电垫3在第一衬底1上的正投影至少部分重叠。即，第一保护胶材层8”在第一衬底1上的正投影与保护覆膜801在第一衬底1上的正投影至少部分重叠。或者说，第一保护胶材层8”覆盖保护覆膜801的一部分。
在步骤S2043中，至少去除保护覆膜801的一部分，以露出第一导电垫3。
例如，可以采用激光切割以及激光剥离(例如LLO工艺)的方式去除保护覆膜801覆盖第一导电垫3的部分，这样，也同时去除了第一保护胶材层8”与保护覆膜801交叠的部分，从而能够露出第一导电垫3。或者，可以直接采用激光烧蚀的方式同时去除第一保护胶材层8”和保护覆膜801覆盖第一导电垫3的部分，也实现了露出第一导电垫3的目的。
可选地，在该步骤S2043中，可以同时去除保护覆膜801覆盖多个发光二极管的部分，如图7D所示。
在步骤S205中，形成键合引线9，使得所述键合引线9电连接第一导电垫3与第二导电垫7。
参照图6E，形成键合引线9，使得键合引线9的一端91连接第一导电垫3，另一端92连接第二导电垫7。即，键合引线9的一端91焊接在第一导电垫3上，另一端92焊接在第二导电垫7上。端91焊接在第一导电垫3上的焊点称为第一焊点911，端92在第二导电垫7上的焊点称为第二焊点921。
在图6E所示的实施例中，键合引线9为具有一定弧度的键合引线。具体地，键合引线9在第一焊点911和第二焊点921处分别具有与所述第一衬底所在平面呈一定夹角和/或具有弯曲弧度的部分。这样，可以降低加工难度。
例如，第一焊点911可以为球形焊点，即第一焊点911在第一衬底1上的正投影的形状可以为圆形或近似圆形。在该情况下，由于焊接工艺的热效应，从第一焊点911延伸出的键合引线9具有与所述第一衬底所在平面呈一定夹角和/或具有弯曲弧度的部分，如图6E所示。在一些示例性的实施例中，该部分与第一衬底所在平面的方向上的距离h1和/或h2在100微米以上，例如，在100～500微米的范围内。
例如，键合引线9可以采用Cu、Al、Au、Ag等金属或其合金。
结合参照图1和图6E，每一根键合引线9分别电连接一个第一导电垫3和与它对应的第二导电垫7。由于多个第一导电垫3沿所述第一方向X等间距地布置，所以，多根键合引线9也沿第一方向X等间距地排列。
例如，键合引线9的直径可以在10～500微米之间。当第一焊点911为球形焊点时，上述尺寸L1约为键合引线的直径的2～5倍。
应该理解，多个第一导电垫3的排列周期与键合引线9的直径相关，还与第一基板100上的走线设计相关。
在步骤S206中，参照图6F，对所述第一焊点911和所述第二焊点921所在的区域进行点胶处理。
例如，在所述第一焊点911和所述第二焊点921所在的区域均涂布保护胶，以在所述第一焊点911和所述第二焊点921所在的区域分别形成第一焊点保护胶912和第二焊点保护胶922。第一焊点保护胶912在第一基板100上的正投影覆盖第一焊点911在第一基板100上的正投影，并且第二焊点保护胶922在第二基板200上的正投影覆盖第二焊点921在第二基板200上的正投影。以此方式，可以保护第一焊点和第二焊点。例如，第一焊点保护胶912和第二焊点保护胶922为粘性且绝缘的胶，以较好地保护第一焊点和第二焊点。
在步骤S207中，在第一衬底1远离第一导电垫3的表面和第二衬底6远离第二导电垫7的表面中的任一个上贴附背胶12。例如，参照图6G，在第一衬底1远离第一导电垫3的表面上贴附背胶12。
在步骤S208中，结合参照图6G和图6H，朝着第一基板100翻转第二基板200，使得第二衬底6远离第二导电垫7的表面贴附至所述背胶12。
以此方式，可以将第二基板200弯折至第一基板100的背面，并且两个基板100和200可以通过背胶12贴附在一起。
例如，在翻转第二基板200的过程中，可通过具有固定旋转轨迹的载具300将第二基板200旋转至第一基板100的下表面，以确保翻转过程的稳定性，降低键合引线9断裂的风险。
参照图6H，在翻转第二基板200使得第二衬底6远离第二导电垫7的表面贴附至所述背胶12之后，第一保护胶层8’不覆盖背胶12的侧壁。
如上所述，两个基板之间的第一间隔距离S1大于第一基板100的厚度与第二基板200的厚度之和，相应地，形成的键合引线9的长度大于第一基板100的厚度与第二基板200的厚度之和。这样，在翻转第二基板200的过程中，可以确保键合引线9不被拉断，从而降低键合引线9断裂的风险。
在步骤S209中，参照图6H，形成第二保护胶层11’，使得第二保护胶层11’覆盖第一导电垫3、键合引线9和第二导电垫7。
进一步地，第二保护胶层11’还覆盖第一基板100的侧壁、背胶12的侧壁以及第二基板200的侧壁。
例如，第二保护胶层11’的厚度在5～500微米的范围内，构成第二保护胶层11’的所用材料的杨氏模量可以在0.1Mpa～80Gpa之间，例如，所述材料可以为硅胶或聚二甲基硅氧烷(即PDMS)。
可选地，在上述步骤S2043中，可以不去除保护覆膜801覆盖多个发光二极管的部分。去除保护覆膜801覆盖多个发光二极管的部分可以在步骤S209之后执行。这样，可以在制造过程中保护发光二极管。
例如，在步骤S209中，受限于点胶工艺的精度控制问题，可能在发光二极管所在的区域引入多余的保护胶。可以在步骤S209之后，去除保护覆膜801覆盖多个发光二极管的部分，可以同时去除该多余的保护胶，实现了保护覆盖以及其上的多余的保护胶的整体剥离。
在根据本公开实施例的发光基板的制造方法中，利用引线键合工艺制作键合引线，并翻转基板实现上下基板叠层结构，能够降低工艺复杂度，并且降低制造成本。
本公开的一些示例性实施例还提供了一种发光基板。例如，参照图3H和图6H，所述发光基板包括：层叠设置的第一基板100、第二基板200和背胶12，所述背胶12设置在第一基板100与第二基板200之间，以将第一基板100与第二基板200贴附在一起。
第一基板100包括：第一衬底1；设置在第一衬底1上的多个发光二极管；和设置在第一衬底1上的至少一个第一导电垫3。所述第一导电垫3位于第一基板100远离第二基板200的表面上。
第二基板200包括：第二衬底6；和设置在第二衬底2上的至少一个第二导电垫7。所述第二导电垫7位于第二基板200远离第一基板100的表面上。
所述发光基板还包括至少一个键合引线结构90，所述键合引线结构90将第一导电垫3与第二导电垫7电连接。
每一个键合引线结构90包括键合引线9、第一焊点911和第二焊点921，所述第一焊点911为键合引线9的一端焊接至第一导电垫3的焊点，所述第二焊点921为键合引线9的另一端焊接至第二导电垫7的焊点。
参照图3H，所述发光基板还包括第一保护胶层8，所述第一保护胶层8至少接触所述第一基板100的第一侧壁101和所述第二基板200的第二侧壁201。第一侧壁101为第一基板100邻近第一导电垫3的侧壁。第二侧壁201为第二基板200邻近第二导 电垫7的侧壁。
继续参照图3H，第一保护胶层8还接触背胶12的侧壁，所述背胶12的侧壁、所述第一侧壁101和所述第二侧壁201在第一基板100上的正投影彼此重合。
所述发光基板还包括第二保护胶层11。键合引线9被夹在第一保护胶层8与第二保护胶层11之间。
继续参照图3H，第二保护胶层11沿垂直于第一侧壁101的方向的投影覆盖键合引线9沿垂直于第一侧壁101的方向的投影。并且，第二保护胶层11在第一衬底1上的正投影覆盖第一导电垫3和第二导电垫7中的每一个在第一衬底1上的正投影。以此方式，第二保护胶层11可以保护所述键合引线、所述焊点和所述导电垫。
第一保护胶层8远离第一侧壁101的表面接触键合引线9，并且，第二保护胶层11靠近第一侧壁101的表面接触键合引线9。以此方式，键合引线9被夹在第一保护胶层8与第二保护胶层11之间，从而得到较好的保护。
例如，第二保护胶层11沿垂直于第一侧壁101的方向的尺寸(即厚度)等于第一保护胶层8沿垂直于第一侧壁101的方向的尺寸(即厚度)。
参照图6H，键合引线9在第一焊点911和第二焊点921处均具有一定的弧度。
所述发光基板还包括第一保护胶层8’，所述第一保护胶层8至少接触所述第一基板100的第一侧壁101和所述第二基板200的第二侧壁201。第一保护胶层8’不接触背胶12的侧壁。即，第一保护胶层8’沿垂直于第一侧壁101的方向的投影与背胶12沿垂直于第一侧壁101的方向的投影不重叠。
所述发光基板还包括第一焊点保护胶912和第二焊点保护胶922。第一焊点保护胶912在第一衬底1上的正投影至少覆盖第一焊点911在第一衬底1上的正投影，第二焊点保护胶922在第一衬底1上的正投影至少覆盖第二焊点921在第一衬底1上的正投影。可选地，第一焊点保护胶912在第一衬底1上的正投影覆盖第一导电垫3在第一衬底1上的正投影，第二焊点保护胶922在第一衬底1上的正投影覆盖第二导电垫7在第一衬底1上的正投影。
所述发光基板还包括第二保护胶层11’。所述第二保护胶层11’至少覆盖第一导电垫3、键合引线9和第二导电垫7。即，第二保护胶层11’在第一衬底1上的正投影覆盖第一导电垫3和第二导电垫7中的每一个在第一衬底1上的正投影，第二保护胶层11’在第一衬底1上的正投影覆盖键合引线9在第一衬底1上的正投影，第二保护胶层 11’沿垂直于第一侧壁101的方向的投影覆盖键合引线9沿垂直于第一侧壁101的方向的投影。
进一步地，第二保护胶层11’还覆盖第一基板100的第一侧壁101、背胶12的侧壁以及第二基板200的第二侧壁201。即，第二保护胶层11’沿垂直于第一侧壁101的方向的投影覆盖第一侧壁101、背胶12的侧壁以及第二侧壁201中的每一个。
例如，在本公开的实施例中，所述第一保护胶层、所述第二保护胶层和所述焊点保护胶层均为绝缘性胶材。
例如，所述第二保护胶层可以为黑色胶材，从而可以防止由所述导电垫和所述键合引线反射的光对显示用光造成干扰。可选地，所述第二保护胶层可以为非黑色胶材，在该情况下，可以对模组表面整体做黑化处理。
所述第一基板100可以为用于发光二极管显示面板的背板。所述第一基板100包括但不限于下面的背板：被动驱动背板，或者包含薄膜晶体管的有源驱动背板，或者由微型IC驱动的的有源驱动背板。
下面，将以一个具体的示例来说明所述第一基板100，但是，下面的具体示例不应视为对本公开的实施例的限制，根据本公开实施例的背板可以包括本领域中已知的各种类型和各种结构的驱动背板。
图9为图1所示的发光基板的发光单元的排列示意图，图10为图9所示的发光基板中一个发光单元的示意图。如图1、图9和图10所示，第一基板100可以包括第一衬底1和在第一衬底1上阵列排布的多个发光单元140。例如，多个发光单元140排列为N行M列，N为大于0的整数，M为大于0的整数。例如，发光单元140的数量可以根据实际需求而定，例如根据发光基板的尺寸和所需要的亮度而定，虽然图9中仅示出了3行5列发光单元140，但是应当理解，发光单元140的数量不限于此。
例如，每一行发光单元140沿第一方向X排列，每一列发光单元140沿第二方向Y排列。
每个发光单元140包括驱动电路4、多个发光二极管5和驱动电压端Vled。
驱动电路4包括第一输入端Di、第二输入端Pwr、输出端OT和公共电压端GND。第一输入端Di接收第一输入信号，该第一输入信号例如为地址信号，以用于选通相应地址的驱动电路4。例如，不同的驱动电路4的地址可以相同或不同。第一输入信号可以为8bit的地址信号，通过解析该地址信号可以获知待传输的地址。第二输入端Pwr 接收第二输入信号，第二输入信号例如为电力线载波通信信号。例如，第二输入信号不仅为驱动电路4提供电能，还向驱动电路4传输通信数据，该通信数据可用于控制相应的发光单元140的发光时长，进而控制其视觉上的发光亮度。输出端OT可在不同的时段内分别输出不同的信号，例如分别输出中继信号和驱动信号。例如，中继信号为提供给其他驱动电路4的地址信号，也即是，其他驱动电路4的第一输入端Di接收该中继信号以作为第一输入信号，从而获取地址信号。例如，驱动信号可以为驱动电流，用于驱动发光二极管5发光。公共电压端GND接收公共电压信号，例如接地信号。
驱动电路4配置为根据第一输入端Di接收的第一输入信号和第二输入端Pwr接收的第二输入信号在第一时段内通过输出端OT输出中继信号，以及在第二时段内通过输出端OT提供驱动信号至依次串联的多个发光二极管5。在第一时段内，输出端OT输出中继信号，该中继信号被提供给其他驱动电路4以使其他驱动电路4获得地址信号。在第二时段内，输出端OT输出驱动信号，该驱动信号被提供给依次串联的多个发光二极管5，使得发光二极管5在第二时段内发光。例如，第一时段与第二时段为不同的时段，第一时段例如可以早于第二时段。第一时段可以与第二时段连续相接，第一时段的结束时刻即为第二时段的开始时刻；或者，第一时段与第二时段中间还可以有其他时段，该其他时段可以用于实现其他需要的功能，该其他时段也可以仅用于使第一时段和第二时段间隔开，以避免输出端OT在第一时段和第二时段的信号彼此干扰。
例如，如图10所示，多个发光二极管5依次串联，并且串联连接在驱动电压端Vled和输出端OT之间。例如，每个发光二极管5包括正极(+)和负极(-)(或者，可称为阳极和阴极，或者，也可称为P电极和N电极)，多个发光二极管5的正极和负极依序首尾串联，从而在驱动电压端Vled和输出端OT之间形成电流路径。驱动电压端Vled提供驱动电压，例如在需要使发光二极管5发光的时段(第二时段)内为高电压，而在其他时段内为低电压。由此，在第二时段内，驱动信号(例如驱动电流)从驱动电压端Vled依次流经多个发光二极管5，然后流入驱动电路4的输出端OT。多个发光二极管5在驱动电流流过时发光，通过控制驱动电流的持续时间，可以控制发光二极管5的发光时长，从而控制视觉上的发光亮度。
需要说明的是，本公开的实施例中，每个发光单元140中的发光二极管5的数量 不受限制，可以为4个、5个、7个、8个等任意数量，而不限于6个。多个发光二极管5可以采用任意的排列方式，例如按照所需要的图案排列，而不限于矩阵排列方式。驱动电路4的设置位置不受限制，可以设置在发光二极管5彼此之间的任意空隙中，这可以根据实际需求而定，本公开的实施例对此不作限制。
例如，返回参照图1，各个发光单元140中的驱动电路4可以通过信号线150引至位于扇出区的第一导电垫3，然后通过键合引线9、第二导电垫7被引至外部驱动电路。
例如，所述驱动电路4可以包括薄膜晶体管阵列层。该薄膜晶体管阵列层可具体包括有源层、栅极绝缘层、栅极、源极、漏极和平坦层等。驱动电路4的具体膜层结构可以参照已有的阵列基板中应用的膜层结构，在此不再赘述。
本公开的一些示例性实施例还提供一种显示装置。图11和图12是根据本公开的一些示例性实施例的显示装置的示意图。参照图11和图12，所述显示装置包括至少2个如上所述的发光基板。至少2个如上所述的发光基板拼接形成显示装置。
图8是示意性示出根据本公开实施例的发光基板的边框区域的示意图。结合参照图8、图11和图12，S3为发光二极管绑定区域和硅胶封装的边缘区域的宽度，S4为第一导电垫的宽度，其可控制在键合引线9的直径的1.5～2.5倍之间，S5为键合引线涂胶保护的整体胶厚，即，第一保护胶层和第二保护胶层的厚度之和。这样，一个发光基板的边框区域的宽度基本为S3、S4和S5之和。它大约可以控制在0.08～1.5毫米之间。所以，在本公开实施例的显示装置中，拼接区宽度为2*(S3+S4+S5)，即，所述显示装置可以实现0.16～3毫米的拼接区宽度，从而能够减小拼接区的宽度，有利于实现大尺寸的显示装置。
需要说明的是，上述制造方法的一些步骤可以单独执行或组合执行，以及可以并行执行或顺序执行，并不局限于图中所示的具体操作顺序。
应该理解，根据本公开的一些示例性实施例的显示装置具有上述发光基板的所有特点和优点，这些特点和优点可以参照上文针对发光基板的描述，在此不再赘述。
如这里所使用的，术语“基本上”、“大约”、“近似”和其它类似的术语用作近似的术语而不是用作程度的术语，并且它们意图解释将由本领域普通技术人员认识到的测量值或计算值的固有偏差。考虑到工艺波动、测量问题和与特定量的测量有关的误差(即，测量系统的局限性)等因素，如这里所使用的“大约”或“近似”包括所陈述 的值，并表示对于本领域普通技术人员所确定的特定值在可接受的偏差范围内。例如，“大约”可以表示在一个或更多个标准偏差内，或者在所陈述的值的±10％或±5％内。
虽然根据本公开的总体发明构思的一些实施例已被图示和说明，本领域普通技术人员将理解，在不远离本公开的总体发明构思的原则和精神的情况下，可对这些实施例做出改变，本公开的范围以权利要求和它们的等同物限定。

Claims (31)

  1. 一种发光基板，包括：
    第一基板，所述第一基板包括：
    第一衬底；
    设置在所述第一衬底上的发光二极管；和
    设置在所述第一衬底上的第一导电垫；
    第二基板，所述第二基板与所述第一基板相对设置，所述第二基板包括：
    第二衬底；和
    设置在所述第二衬底上的第二导电垫；以及
    键合引线结构，所述键合引线结构包括键合引线，
    其中，所述第一导电垫位于所述第一基板远离所述第二基板的表面，所述第二导电垫位于所述第二基板远离所述第一基板的表面，所述键合引线电连接所述第一导电垫与所述第二导电垫。
  2. 根据权利要求1所述的发光基板，其中，所述键合引线结构还包括第一焊点和第二焊点，所述第一焊点为所述键合引线的一端焊接至所述第一导电垫的焊点，所述第二焊点为所述键合引线的另一端焊接至所述第二导电垫的焊点。
  3. 根据权利要求2所述的发光基板，还包括背胶，
    其中，所述背胶设置在所述第一基板与所述第二基板之间，用于将所述第一基板与所述第二基板贴附在一起。
  4. 根据权利要求3所述的发光基板，还包括第一保护胶层，
    其中，所述第一基板包括邻近所述第一导电垫的第一侧壁，所述第二基板包括邻近所述第二导电垫的第二侧壁，所述第一保护胶层至少接触所述第一侧壁和所述第二侧壁。
  5. 根据权利要求4所述的发光基板，其中，所述背胶包括第三侧壁，所述第一侧壁、所述第二侧壁和所述第三侧壁在所述第一衬底上的正投影彼此重合。
  6. 根据权利要求5所述的发光基板，其中，所述第一保护胶层还接触所述第三侧壁。
  7. 根据权利要求4-6中任一项所述的发光基板，还包括第二保护胶层，
    其中，所述键合引线被夹在所述第一保护胶层与所述第二保护胶层之间。
  8. 根据权利要求7所述的发光基板，其中，所述第二保护胶层沿垂直于所述第一侧壁的方向的投影覆盖所述键合引线沿垂直于所述第一侧壁的方向的投影。
  9. 根据权利要求8所述的发光基板，其中，所述第二保护胶层在所述第一衬底上的正投影覆盖所述第一导电垫、所述第一焊点、所述第二导电垫和所述第二焊点中的每一个在所述第一衬底上的正投影。
  10. 根据权利要求7-9中任一项所述的发光基板，其中，所述第一保护胶层远离所述第一侧壁的表面接触所述键合引线，并且，所述第二保护胶层靠近所述第一侧壁的表面接触所述键合引线。
  11. 根据权利要求5所述的发光基板，其中，所述键合引线在所述第一焊点和所述第二焊点处分别具有与所述第一衬底所在平面呈一定夹角和/或具有弯曲弧度的部分。
  12. 根据权利要求11所述的发光基板，其中，所述第一保护胶层沿垂直于所述第一侧壁的方向的投影与所述第三侧壁沿垂直于所述第一侧壁的方向的投影不重合。
  13. 根据权利要求11或12所述的发光基板，还包括设置在所述第一焊点处的第一焊点保护胶和设置在所述第二焊点处的第二焊点保护胶，
    其中，所述第一焊点保护胶在所述第一衬底上的正投影至少覆盖所述第一焊点在所述第一衬底上的正投影，所述第二焊点保护胶在所述第一衬底上的正投影至少覆盖所述第二焊点在所述第一衬底上的正投影。
  14. 根据权利要求13所述的发光基板，其中，所述第一焊点保护胶在所述第一衬底上的正投影覆盖所述第一导电垫在所述第一衬底上的正投影，所述第二焊点保护胶在所述第一衬底上的正投影覆盖所述第二导电垫在所述第一衬底上的正投影。
  15. 根据权利要求11、12或14所述的发光基板，其中，所述键合引线位于所述第一保护胶层远离所述第一侧壁的一侧，并且所述第一保护胶层与所述键合引线在垂直于所述第一侧壁的方向上存在间隙。
  16. 根据权利要求15所述的发光基板，还包括第二保护胶层，
    其中，所述第二保护胶层覆盖所述键合引线，并且还填充所述第一保护胶层与所述键合引线之间的间隙。
  17. 根据权利要求16所述的发光基板，其中，所述第二保护胶层在所述第一衬底上的正投影覆盖所述键合引线在所述第一衬底上的正投影，所述第二保护胶层沿垂直于所述第一侧壁的方向的投影覆盖所述键合引线沿垂直于所述第一侧壁的方向的投影。
  18. 根据权利要求17所述的发光基板，其中，所述第二保护胶层在所述第一衬底上的正投影覆盖所述第一焊点保护胶和所述第二焊点保护胶中的每一个在所述第一衬底上的正投影。
  19. 根据权利要求7或16所述的发光基板，其中，所述第二保护胶层沿垂直于所述第一侧壁的方向的尺寸等于所述第一保护胶层沿垂直于所述第一侧壁的方向的尺寸。
  20. 根据权利要求19所述的发光基板，其中，所述第一保护胶层沿垂直于所述第一侧壁的方向的尺寸在5～500微米之间，和/或，所述第一保护胶层和所述第二保护胶层中的每一个的所用材料的杨氏模量在0.1Mpa～80Gpa之间。
  21. 根据权利要求1-6中任一项所述的发光基板，其中，所述发光二极管为次毫米发光二极管或微型发光二极管。
  22. 根据权利要求7或16所述的发光基板，其中，所述第一保护胶层和所述第二保护胶层均包括绝缘性胶材。
  23. 根据权利要求7或16所述的发光基板，其中，所述第二保护胶层包括黑色胶材。
  24. 根据权利要求1-6中任一项所述的发光基板，其中，所述键合引线的直径在10～500微米之间。
  25. 根据权利要求1-6中任一项所述的发光基板，其中，所述发光二极管、所述第一导电垫、所述第二导电垫和所述键合引线的数量均为多个，多个所述键合引线分别电连接多个所述第一导电垫与多个所述第二导电垫。
  26. 一种显示装置，包括多个根据权利要求1-25中任一项所述的发光基板。
  27. 一种发光基板的制造方法，包括：
    提供第一基板，所述第一基板包括第一衬底和设置在所述第一衬底上的第一导电垫；
    将发光二极管转移且绑定至所述第一基板上；
    提供第二基板，所述第二基板包括第二衬底和设置在所述第二衬底上的第二导电垫；
    将所述第一基板和所述第二基板置于载具上，以保持所述第一基板和所述第二基板的相对位置；
    形成键合引线结构，以电连接所述第一导电垫与所述第二导电垫；以及
    朝着所述第一基板翻转所述第二基板，使得所述第二衬底远离所述第二导电垫的表面朝向所述第一基板，从而使得所述第一导电垫位于所述第一基板远离所述第二基板的表面，所述第二导电垫位于所述第二基板远离所述第一基板的表面，
    其中，所述键合引线结构包括键合引线，所述键合引线电连接所述第一导电垫与所述第二导电垫。
  28. 根据权利要求27所述的制造方法，其中，在将所述第一基板和所述第二基板置于载具上，以保持所述第一基板和所述第二基板的相对位置的步骤中，所述第一基板和所述第二基板间隔规定的距离，使得所述第一导电垫与所述第二导电垫间隔规定的距离，并且所述第一导电垫的远离所述第一衬底的第一表面与所述第二导电垫的远离所述第二衬底的第二表面处于同一水平面。
  29. 根据权利要求28所述的制造方法，其中，在将所述第一基板和所述第二基板置于载具上的步骤与形成键合引线结构的步骤之间，所述制造方法还包括：
    在所述第一导电垫与所述第二导电垫之间的间隙内形成第一保护胶层，使得所述第一保护胶层在所述载具上的正投影覆盖所述间隙在所述间隙在所述载具上的正投影，并且所述第一保护胶层远离所述载具的第三表面与所述第一表面处于同一水平面。
  30. 根据权利要求29所述的制造方法，其中，在形成键合引线结构的步骤中，在所述第一导电垫和所述第二导电垫所在的平面内形成所述键合引线。
  31. 根据权利要求27所述的制造方法，其中，在将所述第一基板和所述第二基板置于载具上的步骤与形成键合引线结构的步骤之间，所述制造方法还包括：
    形成第一保护胶层，使得所述第一保护胶层至少覆盖所述第一基板邻近所述第一导电垫的第一侧壁以及所述第二基板邻近所述第二导电垫的第二侧壁。
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KR20230009352A (ko) 2023-01-17
EP4050667A1 (en) 2022-08-31
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CN113644181B (zh) 2024-04-16
US12046591B2 (en) 2024-07-23
CN113644181A (zh) 2021-11-12
US20240339444A1 (en) 2024-10-10
EP4050667A4 (en) 2023-06-07

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