WO2021179672A1 - 封装结构及其形成方法 - Google Patents

封装结构及其形成方法 Download PDF

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Publication number
WO2021179672A1
WO2021179672A1 PCT/CN2020/130381 CN2020130381W WO2021179672A1 WO 2021179672 A1 WO2021179672 A1 WO 2021179672A1 CN 2020130381 W CN2020130381 W CN 2020130381W WO 2021179672 A1 WO2021179672 A1 WO 2021179672A1
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Prior art keywords
substrate
groove
chip
package structure
underfill
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PCT/CN2020/130381
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English (en)
French (fr)
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张志伟
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长鑫存储技术有限公司
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Priority to EP20923924.3A priority Critical patent/EP3933897B1/en
Priority to US17/396,691 priority patent/US20210366798A1/en
Publication of WO2021179672A1 publication Critical patent/WO2021179672A1/zh

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    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
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    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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Definitions

  • the invention relates to the field of chip packaging, in particular to a packaging structure and a forming method thereof.
  • the packaged chip needs to be wrapped by injection molding to protect the chip.
  • the chip and the substrate are connected to the circuit on the substrate through solder balls.
  • the plastic packaging process it is necessary to wrap the entire chip with a plastic molding compound to fill the gap between the chip and the substrate. Because the chip and the substrate are directly connected by solder balls or other solder bumps, the gap is small, and the distance between the connection points is also small. Therefore, the air is not easy to be discharged when the plastic compound is filled, and it is easy to be between the chip and the substrate. Air bubbles are generated in the molding compound, which affects the stability of the flip chip. For example, due to thermal expansion and contraction, the bubbles will expand and the flip chip will be separated from the substrate.
  • FIG. 1 is a schematic top view of a substrate 100 formed with air holes 101 in the prior art.
  • FIG. 1 is a schematic top view of a substrate 100 formed with air holes 101 in the prior art.
  • multiple air holes are usually formed on the substrate.
  • the area where the air holes can be formed is small and a larger number of air holes are formed. , So that the size of each pore is smaller.
  • the exhaust position can be increased, but because the pore size is small, it will be easily blocked by the plastic encapsulant, and the improvement of the exhaust effect is limited. And because the pores penetrate the substrate, they will occupy the area of the substrate for circuit formation, resulting in limited circuit design in the substrate, especially the number and position distribution of the solder balls formed on the back of the substrate will be greatly affected, resulting in the substrate The area of the connection area on the back side is reduced.
  • the technical problem to be solved by the present invention is to provide a packaging structure and a forming method thereof, which can improve the reliability of the packaging structure without affecting the connection area on the back of the substrate.
  • the present invention provides a package structure, including a substrate, the substrate has a first surface and a second surface opposite to each other, and the first surface of the substrate has at least one elongated groove, Both ends of the groove extend to the edge of the substrate and are open ports, the depth of the groove is less than the thickness of the substrate; a chip, the chip is flip-chip fixed on the first surface of the substrate through solder bumps , By forming an electrical connection between the solder bumps and the substrate, the groove is at least partially located in the projection of the chip on the substrate; an underfill layer is filled with the chip and the substrate The gap between the first surface; a plastic encapsulation layer, covering the underfill layer, and wrapping the chip.
  • the width of the groove is smaller than the fillable width of the material of the underfill layer in a liquid state.
  • the width of the groove is less than 4 ⁇ m.
  • the depth of the groove is 1%-70% of the thickness of the substrate.
  • the depth of the groove is 80 ⁇ m to 0.5 mm.
  • the groove is linear or curvilinear.
  • At least one groove is located at the position of the symmetry axis of the substrate.
  • At least one of the grooves extends along the length direction of the substrate.
  • the top of the groove is closed by the underfill layer, and a continuous gas passage is formed inside.
  • it further includes: solder balls formed on the second surface of the substrate.
  • the technical solution of the present invention also provides a method for forming a package structure, including: providing a packaged chip, the packaged chip comprising a substrate and a chip fixed on the substrate; the substrate has a first surface and a second surface opposite to each other At least one above-mentioned groove is formed in the first surface of the substrate; the chip is fixed on the first surface of the substrate by solder bumps of the flip chip process, and the solder bumps are between the solder bumps and the substrate.
  • An electrical connection is formed between the chip, the groove is at least partially located in the projection of the chip on the substrate; the packaged chip is injection molded to form a filling between the chip and the first surface of the substrate An underfill layer in the gap, and a plastic encapsulation layer covering the underfill layer and wrapping the chip.
  • the gas inside the packaging structure is discharged through the groove.
  • the method for injection molding the packaged chip includes: providing an injection mold, the injection mold including a chassis and a cover, the cover is used to cover the chassis, and the chassis Forming a cavity; placing the packaged chip in the cavity, and placing the substrate on the surface of the chassis; using the capillary effect to fill the underfill into the gap between the bottom of the chip and the substrate to form Underfill layer; inject liquid molding compound into the cavity until the liquid molding compound fills the cavity; heat treatment to solidify the liquid molding compound and underfill to form a solid molding layer and bottom Filling layer.
  • the cover is provided with at least one opening, and the opening communicates with the cavity and the outside; and the liquid molding compound is injected into the cavity through the at least one opening.
  • the cover has at least two openings, and further includes: during the injection molding process, exhausting the gas in the cavity to the outside through at least one of the openings.
  • the underfill cannot be filled into the groove and can only close the groove.
  • a continuous gas passage is formed inside the groove.
  • the method further includes: forming solder balls on the second surface of the substrate.
  • a groove with open ends is formed in the first surface of the substrate to discharge gas during the process of forming the underfill layer; and the depth of the groove is smaller than the depth of the substrate, and does not affect the second surface of the substrate.
  • the distribution of upper metal wires and solder balls improves the utilization rate of the second surface of the substrate.
  • the width of the groove is smaller than the fillable width of the underfill layer. During the injection molding process, the underfill cannot fill the groove to avoid blockage of the groove and improve the exhaust effect of the groove. .
  • FIG. 1 is a schematic top view of a substrate with multiple air holes
  • FIGS. 2A to 2C are structural schematic diagrams of a substrate of a packaging structure according to a specific embodiment of the present invention.
  • 3A to 3B are schematic diagrams of a substrate of a package structure according to a specific embodiment of the present invention.
  • FIG. 4 is a schematic structural diagram of a substrate of a package structure according to a specific embodiment of the present invention.
  • FIG. 5 is a schematic structural diagram of a substrate of a packaging structure according to a specific embodiment of the present invention.
  • FIG. 6 is a schematic structural diagram of a substrate of a packaging structure according to a specific embodiment of the present invention.
  • FIGS. 2A to 2C are structural schematic diagrams of a substrate of a package structure according to a specific embodiment of the present invention, wherein FIG. 2A is a schematic top view of the substrate, and FIG. A schematic cross-sectional view. FIG. 2C is a schematic cross-sectional view of the substrate along the direction BB' in FIG. 2A.
  • the substrate 200 has a first surface and a second surface opposite to each other.
  • the first surface is used to fix a chip
  • the second surface is used to form solder balls connected to other circuit boards.
  • the substrate 200 is a circuit board, and electrical connection structures (not shown in the figure) such as interconnect circuits and solder pads are formed on the surface and/or inside of the substrate 200, which are used to form electrical connections with the chip and input electrical signals to the chip. Or output the electrical signal generated by the chip.
  • electrical connection structures such as interconnect circuits and solder pads are formed on the surface and/or inside of the substrate 200, which are used to form electrical connections with the chip and input electrical signals to the chip. Or output the electrical signal generated by the chip.
  • the first surface of the substrate 200 has a long groove 201.
  • the two ends of the groove 201 extend to the edge of the substrate 200 and are open ports.
  • the depth of the groove 201 is less than the thickness of the substrate. .
  • the groove 201 is a long straight groove with the same width at each position.
  • the bottom of the groove 201 is located inside the substrate 200.
  • the groove 201 serves as a channel for discharging the gas inside the package structure during the injection molding process of the packaged chip, and the gas is discharged from the open ports at both ends of the groove 201 located at the edge of the substrate 200.
  • the width of the groove 201 is smaller than the fillable width, the liquid injection material cannot be filled into the groove under the action of the surface tension due to the high viscosity of the injection molding material.
  • the width of the groove 201 is less than 4 ⁇ m, preferably, it may be 2 ⁇ m, or may be 3 ⁇ m, 1 ⁇ m, or the like.
  • Those skilled in the art can reasonably set the width of the groove 201 under the condition of less than the fillable width, so that the groove 201 not only has a higher exhaust effect, but also prevents injection molding material from being filled into the groove.
  • the cross-sectional area of the groove 201 in the direction perpendicular to the length determines the gas discharge efficiency during discharge.
  • the venting effect of the groove 201 can be adjusted by further setting the depth of the groove 201.
  • the depth of the groove 201 is firstly smaller than the depth of the substrate 200, so that the second surface of the substrate 200 remains intact and does not affect the distribution of solder joints, solder balls and other structures on the second surface of the substrate 200.
  • the depth of the groove 201 should not be too large, so as not to affect the strength of the substrate 200 and avoid problems such as breakage. In some specific embodiments, the depth of the groove 201 may be 1% to 70% of the thickness of the substrate 200. In some specific embodiments, the depth of the groove 201 is 80 ⁇ m to 0.5 mm.
  • the substrate 200 is rectangular, and the longitudinal direction of the groove 201 is consistent with the longitudinal direction of the substrate 200.
  • the gas is less likely to be discharged during the injection molding process. Therefore, arranging the groove 201 along the long side direction of the substrate 200 can improve the exhaust effect.
  • the substrate is rectangular, at least one of the grooves extends along the length of the substrate.
  • the groove 201 is also arranged on the symmetry axis of the substrate 200, which can improve the structural symmetry of the substrate 200, improve the symmetry of the stress distribution in the substrate 200, and improve the stability of the package structure. .
  • FIG. 3A and FIG. 3B are schematic cross-sectional views of the package structure of this embodiment along the A-A' direction and the B-B' direction of the substrate, respectively.
  • the packaging structure includes the substrate 200, a chip 210, an underfill layer 221 filling the gap between the chip 210 and the substrate 200, and a plastic encapsulation layer covering the underfill layer 221 and wrapping the chip 210 222.
  • the underfill layer 221 fills between the chip 210 and the substrate 200, and also covers the substrate 200 other than the chip 210, and the plastic encapsulation layer 222 covers the underfill layer.
  • the edge of the substrate 200 is not covered by the underfill layer 221, but is directly covered by the plastic encapsulation layer 222, and the plastic encapsulation layer 222 covers part of the surface and sidewalls of the underfill layer 221 .
  • the underfill layer 221 may also be located only under the chip 210, and the plastic encapsulation layer 222 covers the sidewall of the underfill layer 221.
  • the chip 210 is flip-chip fixed on the first surface of the substrate 200 through solder bumps, and an electrical connection is formed between the solder bumps and the substrate 200, and the groove 201 is at least partially located in the chip. 210 is in the projection on the substrate 200.
  • the surface of the chip 210 has a passivation layer 211, and the passivation layer covers the bonding pad 212 of the chip 210.
  • the solder bumps include an under-bump metal layer 213 formed on the surface of the bonding pad 212 in the passivation layer 211 and a solder ball 214 formed on the surface of the under-bump metal layer 213.
  • the solder bumps may also include structures such as metal pillars.
  • the solder ball 214 is connected to the circuit inside the chip 210 through the solder pad 212.
  • a connection structure 202 such as a bonding pad or a metal wire, is formed on the first surface of the substrate 200, and the chip 210 is welded and fixed to the connection structure 202 by solder balls 214 to achieve electrical connection.
  • a connecting structure 203 and solder balls 204 formed on the connecting structure 203 are formed on the second surface of the substrate 200, and the solder balls 204 are used to solder the package structure to other circuit boards.
  • An interconnection structure 205 is also formed inside the substrate 200, such as a connecting pillar penetrating through the substrate 200, for forming an electrical connection between the connection structure 202 on the first surface of the substrate 200 and the connection structure 203 on the second surface. connect.
  • the circuit connection method in the above-mentioned substrate 200 can be designed according to the specific chip, which is not limited here.
  • the underfill layer 221 of the packaging structure Since the width of the groove 201 is smaller than the fillable width of the material of the underfill layer 211 in the liquid state, the underfill layer 221 of the packaging structure only closes the top opening of the groove 201.
  • the inside of 201 is still a continuous gas passage. This enables the groove 201 to always play a better role of exhaust during the process of injecting the underfill layer 211.
  • the distribution and area of the connection area on the second surface of the substrate 200 are not affected, and the entire second surface of the substrate 200 can be used as an interface with other circuit boards.
  • the connected connection area forms the solder balls 204, so that the distribution of the solder balls 204 is more flexible, and the circuit routing inside the substrate 200 is also more flexible.
  • the spacing between the solder balls 204 can be set to be larger, which reduces the difficulty in soldering subsequent mounting of the package structure to other circuit boards.
  • FIG. 4 is a schematic top view of a substrate 400 used in a package structure according to another embodiment of the present invention.
  • the surface of the substrate 400 has three elongated grooves 401 arranged in parallel, and the three grooves 401 are all long and straight and are evenly distributed in the substrate 400. And one of the grooves 401 is provided at the position of the symmetry axis of the substrate 400.
  • the distance between the adjacent grooves 401 may be 50 ⁇ m to 5 mm, which can not only have a better exhaust effect, but also enable the substrate 400 to maintain a higher strength.
  • the distance between adjacent grooves 401 can also reasonably set the distance between adjacent grooves 401 based on factors such as the actual thickness and size of the substrate and under the premise of achieving a higher exhaust effect.
  • two or more grooves may be formed in the substrate of the packaging structure to improve the exhaust effect during injection molding.
  • Different grooves can be arranged in parallel or cross-connected with each other.
  • Each groove can be set with different depth and width.
  • the cross section of the groove in the vertical length direction may be rectangular or bowl-shaped.
  • FIG. 5 is a schematic top view of a substrate 500 used in a package structure of another embodiment of the present invention.
  • the substrate 500 has a groove 501 and a groove 502, the groove 501 is arranged along the length direction of the substrate 500, the groove 502 is arranged along the width direction of the substrate 500, and the groove 502 is arranged along the width direction of the substrate 500.
  • the groove 501 and the groove 502 are respectively provided at the positions of the two opposing axes of the substrate 500.
  • the groove 501 and the groove 502 are vertically and cross-connected.
  • the substrate 600 has a groove 601 in it, and the groove 601 is curved.
  • the curved shape of the groove 601 can increase the length of the groove, so as to pass through more areas under the chip, which is more conducive to exhaust gas.
  • the specific embodiment of the present invention also provides a method for forming the above-mentioned package structure.
  • the method of forming the packaging structure includes the following steps:
  • Step 1 Provide a packaged chip.
  • the packaged chip includes a substrate and a chip fixed on the substrate; the substrate has a first surface and a second surface opposite to each other, and at least one recess is formed in the first surface of the substrate. Groove; the chip is fixed on the first surface of the substrate by solder bumps of the flip chip process, the solder bumps are electrically connected to the substrate, and the groove is at least partially located in the chip Within the projection on the substrate.
  • the groove is elongated, with two ends extending to the edge of the substrate, and is an open port, and the depth of the groove is less than the thickness of the substrate.
  • the width of the groove is less than 4 ⁇ m.
  • the depth of the groove is 1%-70% of the thickness of the substrate. In some specific embodiments, the depth of the groove is 80 ⁇ m to 0.5 mm.
  • the groove is linear or curved.
  • At least one groove is located at the position of the symmetry axis of the substrate.
  • At least one of the grooves extends along the length direction of the substrate.
  • Step 2 Perform injection processing on the packaged chip to form an underfill layer filled in the gap between the chip and the first surface of the substrate, and a plastic package covering the underfill layer and wrapping the chip Floor.
  • the capillary effect can be used. After the underfill is provided at the edge of the substrate, the capillary effect is used to automatically fill the underfill into the gap between the chip and the substrate. In this case, the gas between the chip and the substrate can pass through the groove on the first surface of the substrate and be discharged from the edge of the substrate.
  • the method for injection molding the packaged chip includes: providing an injection mold, the injection mold including a chassis and a cover, the cover is used to cover the chassis, and A cavity is formed between the chassis; the packaged chip is placed in the cavity, and the substrate is placed on the surface of the chassis; the capillary effect is used to fill the underfill between the bottom of the chip and the substrate In the gap; inject liquid molding compound into the cavity until the liquid molding compound fills the cavity; heat treatment to solidify the liquid molding compound and underfill to form a solid molding layer and bottom Filling layer.
  • the underfill layer and the plastic encapsulation layer may use the same or different injection molding materials.
  • the cover is provided with at least one opening, and the opening connects the cavity with the outside; and the liquid molding compound is injected into the cavity through the at least one opening.
  • the cover may include a separable side wall and a top cover, the at least one opening may be opened on the side wall, and the bottom may be injected into the cavity through the opening.
  • the filler and the liquid molding compound specifically, first slowly inject an underfill into the cavity through the opening. After the underfill reaches the substrate, it is filled between the chip and the substrate by capillary effect ; Then inject the liquid molding compound to fill the entire cavity.
  • the cover has at least two openings, which further includes: during the injection molding process, exhausting the gas in the cavity to the outside through at least one of the openings.
  • the opening for exhaust may be provided on the side wall or the top cover of the cover.
  • the liquid molding compound cannot be filled into the groove and can only close the top of the groove.
  • a continuous gas passage is formed inside the groove, so that the groove can play a role of exhaust during the entire injection molding process.
  • the filling layer is formed by capillary effect, and the molding layer is formed by the molding compound filling the cavity.
  • a filling layer is formed between the chip and the substrate by capillary effect, and then the packaged chip is placed in the package mold to form the upper part of the packaged chip.
  • the plastic encapsulation layer is formed between the chip and the substrate by capillary effect, and then the packaged chip is placed in the package mold to form the upper part of the packaged chip.
  • Step 3 After the injection molded packaged chip is taken out of the cavity, solder balls are formed on the second surface of the substrate.
  • the solder balls may be distributed on the entire second surface of the substrate.
  • the solder ball may be a lead solder ball or a lead-free solder ball. Subsequently, the package structure can be mounted on other electronic components such as other circuit boards through the solder balls 203 through a reflow soldering process.
  • a plurality of chips may be formed on the surface of the substrate at the same time, and the plurality of chips and the substrate may be plastic-encapsulated at the same time. After the plastic-encapsulation is completed, solder balls and other structures on the second surface of the substrate are formed, and then divided , Forming a package structure as shown in Figure 3A.
  • the gas inside the packaging structure can be discharged through the groove with the open port in the substrate.
  • the depth of the groove is less than the depth of the substrate, so it does not affect the second surface of the substrate and does not occupy the area of the second surface for forming solder balls.
  • the width of the groove is small, and the underfill cannot fill the groove during the injection molding process, which prevents the groove from being blocked and can improve the venting effect of the groove.

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Abstract

一种封装结构及其形成方法,所述封装结构包括:基板(200),所述基板(200)具有相对的第一表面和第二表面,所述基板(200)的第一表面内具有至少一个长条状的凹槽(201),所述凹槽(201)的两端延伸至基板(200)边缘,为开放端口,所述凹槽(201)的深度小于所述基板(200)的厚度;芯片(210),所述芯片(210)通过焊接凸点倒装固定于所述基板(200)的第一表面上,通过所述焊接凸点与所述基板(200)之间形成电连接,所述凹槽(201)至少部分位于所述芯片(210)在所述基板(200)上的投影内;底部填充层(221),填充满所述芯片(210)与所述基板(200)的第一表面之间的间隙;塑封层(222),覆盖所述底部填充层(221),并包裹所述芯片(210)。所述封装结构在注塑过程中能够有效排出内部气体,且不影响基板(200)背面的连接面积。

Description

封装结构及其形成方法
相关申请引用说明
本申请要求于2020年03月13日递交的中国专利申请号202010174461.6,申请名为“封装结构及其形成方法”的优先权,其全部内容以引用的形式附录于此。
技术领域
本发明涉及芯片封装领域,尤其涉及一种封装结构及其形成方法。
背景技术
芯片在封装完成后,需要通过注塑将封装完成后的芯片进行包裹,从而对芯片进行保护。
对于通过倒装工艺(Flip chip)封装的芯片,芯片与基板之间通过焊球与基板上的电路连接。塑封过程,需要将塑封料包裹整个芯片,填充满芯片与基板之间的间隙。由于芯片与基板之间直接通过焊球或其他焊接凸点连接,间隙较小,连接点之间间隔距离也较小,因此,塑封料在填充时空气不易排出,容易在芯片与基板之间的塑封料内产生气泡,影响倒装芯片的稳定性,例如因为热胀冷缩会导致气泡膨胀使倒装芯片脱离基板。
现有技术中,为了便于在注塑过程中有利于气体的排出,会在封装基板上设置多个气孔,从而在注塑过程中,随着塑封料的填充,气体自基板上的气孔排出。请参考图1,为现有技术中形成有气孔101的基板100的俯视示意图。为了具有较好的排气效果,通常会在基板上形成多个气孔,但是由于基板上大部分区域都要用于与芯片连接,因此,能够形成气孔的面积较小,形成较多数量的气孔,使得每个气孔的尺寸都较小,虽然气孔数量增多,可以增加排气位置,但是由于气孔尺寸小又会很容易被塑封料堵住,对排气效果的改善有限。并且由于气孔贯穿所述基板,会占据基板内用于形成线路的面积,导致基板内的电路设计受限,特别是在基板背面形成焊球的数量及位置分布会受到较大的影响,导致基板背面的连接区域面积减小。
因此,如何在注塑过程中,避免封装结构内气体残留的同时,不影响在封 装芯片的基板背面的连接区域是亟需解决的问题。
发明内容
本发明所要解决的技术问题是,提供一种封装结构及其形成方法,提高封装结构的可靠性,且不影响基板背面的连接区域。
为了解决上述问题,本发明提供了一种封装结构,包括:基板,所述基板具有相对的第一表面和第二表面,所述基板的第一表面内具有至少一个长条状的凹槽,所述凹槽的两端延伸至基板边缘,为开放端口,所述凹槽的深度小于所述基板的厚度;芯片,所述芯片通过焊接凸点倒装固定于所述基板的第一表面上,通过所述焊接凸点与所述基板之间形成电连接,所述凹槽至少部分位于所述芯片在所述基板上的投影内;底部填充层,填充满所述芯片与所述基板的第一表面之间的间隙;塑封层,覆盖所述底部填充层,并包裹所述芯片。
可选的,所述基板的第一表面内具有两个以上的所述凹槽,不同凹槽之间平行排列或相互交叉连通。
可选的,所述凹槽的宽度小于底部填充层的材料在液态状态下的可填充宽度。
可选的,所述凹槽的宽度小于4μm。
可选的,所述凹槽的深度为基板厚度的1%-70%。
可选的,所述凹槽的深度为80μm~0.5mm。
可选的,所述凹槽为直线形或曲线形。
可选的,至少一个凹槽位于所述基板的对称轴位置处。
可选的,所述基板为矩形时,至少一个所述凹槽沿所述基板的长度方向延伸。
可选的,所述凹槽顶部被所述底部填充层封闭,内部形成一连续气体通路。
可选的,还包括:焊球,形成于所述基板的第二表面。
本发明的技术方案还提供一种封装结构的形成方法,包括:提供封装芯片,所述封装芯片包括基板和固定于所述基板上的芯片;所述基板具有相对的第一表面和第二表面,所述基板的第一表面内形成有至少一个上述的凹槽;所述芯片通过倒装工艺的焊接凸点固定于所述基板的第一表面上,所述焊接凸点与所 述基板之间形成电连接,所述凹槽至少部分位于所述芯片在所述基板上的投影内;对所述封装芯片进行注塑处理,形成填充于所述芯片与所述基板的第一表面之间的间隙内的底部填充层,以及覆盖所述底部填充层并包裹所述芯片的塑封层。
可选的,在形成底部填充层的过程中,通过所述凹槽排出封装结构内部的气体。
可选的,对所述封装芯片进行注塑处理的方法包括:提供注塑模具,所述注塑模具包括底盘和封盖,所述封盖用于盖合于所述底盘上,与所述底盘之间形成空腔;将所述封装芯片置于所述空腔内,所述基板放置于所述底盘表面;利用毛细效应,将底部填充剂填充进所述芯片底部与基板之间的间隙内,形成底部填充层;向所述空腔内注入液态塑封料,直至所述液态塑封料填充满所述空腔;进行热处理,使所述液态塑封料和底部填充剂固化,形成固态的塑封层和底部填充层。
可选的,所述封盖上具有至少一个开孔,所述开孔连通所述空腔与外界;通过至少一个所述开孔向所述空腔内注入液态塑封料。
可选的,所述封盖上具有至少两个开孔,还包括:在注塑处理过程中,通过其中至少一个开孔向外界排出所述空腔内的气体。
可选的,注塑过程中,由于所述凹槽的宽度小于塑封料在液态状态下的可填充宽度,使得所述底部填充剂无法填入所述凹槽内,仅能封闭所述凹槽的顶部,使得所述凹槽内部形成一连续气体通路。
可选的,还包括:在所述基板的第二表面形成焊球。
本发明的封装结构,在基板的第一表面内形成有两端开放的凹槽,用于在形成底部填充层的过程中排出气体;且凹槽深度小于基板深度,不影响基板的第二表面上金属线及焊球的分布,提高了基板第二表面的利用率。
进一步的,所述凹槽的宽度小于底部填充层的可填充宽度,注塑过程中,底部填充剂无法填充所述凹槽,避免所述凹槽发生堵塞,可以提高所述凹槽的排气效果。
附图说明
图1为具有多个气孔的基板的俯视示意图;
图2A至图2C为本发明一具体实施方式的封装结构的基板的结构示意图;
图3A至图3B为本发明一具体实施方式的封装结构的基板示意图;
图4为本发明一具体实施方式的封装结构的基板的结构示意图;
图5为本发明一具体实施方式的封装结构的基板的结构示意图;
图6为本发明一具体实施方式的封装结构的基板的结构示意图。
具体实施方式
请参考图2A至图2C为本发明一具体实施方式的封装结构的基板的结构示意图,其中图2A为所述基板的俯视示意图,图2B为所述基板沿图2A中A-A’方向的剖面示意图,图2C为所述基板沿图2A中B-B’方向的剖面示意图。
所述基板200,所述基板200具有相对的第一表面和第二表面,所述第一表面上用于固定芯片,所述第二表面上用于形成与其他电路板连接的焊球。
所述基板200为电路板,所述基板200表面和/或内部形成有互连电路、焊垫等电连接结构(图中未示出),用于与芯片形成电连接,向芯片输入电信号或输出芯片产生的电信号。
所述基板200的第一表面内具有一个长条状的凹槽201,所述凹槽201的两端延伸至基板200边缘,为开放端口,所述凹槽201的深度小于所述基板的厚度。
该具体实施方式中,所述凹槽201为各位置处宽度相同的长直形的凹槽。所述凹槽201的底部位于所述基板200内部。所述凹槽201作为封装芯片在注塑过程中,排出封装结构内部气体的通道,气体自凹槽201位于基板200边缘的两端开放端口排出。为了避免在注塑过程中,注塑材料进入所述凹槽201内,堵塞所述凹槽201,影响排气效果,需要使得所述凹槽201的宽度小于注塑材料在液态状态下的可填充宽度。当所述凹槽201宽度小于所述可填充宽度时,由于注塑材料的粘度较大,在表面张力作用下,液态注塑材料将无法填充入所述凹槽内。具体的,所述凹槽201的宽度小于4μm,较佳的,可以为2μm,还可以为3μm、1μm等。本领域技术人员,可以在小于可填充宽度的条件下,合理设置所述凹槽201的宽度,使得所述凹槽201既具有较高的排气效果,又 避免注塑材料填充入所述凹槽201内。
所述凹槽201在垂直于长度方向上的横截面面积决定了排气时的气体排出效率。在凹槽201宽度受限的情况下,可以进一步通过设置所述凹槽201的深度,调整所述凹槽201的排气效果。所述凹槽201的深度首先小于所述基板200的深度,使得所述基板200的第二表面保持完整,不影响所述基板200的第二表面上焊点、焊球等结构的分布。
所述凹槽201的深度不能过大,以免使得基板200的强度受到影响,避免发生断裂等问题。在一些具体实施方式中,所述凹槽201的深度可以为所述基板200厚度的1%~70%。在一些具体实施方式中,所述凹槽201的深度为80μm~0.5mm。
该具体实施方式中,所述基板200为矩形,所述凹槽201的长度方向与所述基板200的长边方向一致。由于在基板的长边方向上,注塑过程中,气体更不易排出,因此,沿基板200的长边方向设置所述凹槽201能够提高排气效果。在其他具体实施方式中,若所述基板为矩形,至少一个所述凹槽沿所述基板的长度方向延伸。
该具体实施方式中,所述凹槽201还设置在所述基板200的对称轴上,能够提高所述基板200的结构对称性,提高基板200内应力分布的对称性,提高封装结构的稳定性。
请参考图3A和图3B,为该具体实施方式的封装结构分别沿基板A-A’方向和B-B’方向上的剖面示意图。
所述封装结构包括所述基板200、芯片210、填充于所述芯片210与所述基板200之间的间隙的底部填充层221、覆盖所述底部填充层221并包裹所述芯片210的塑封层222。
该具体实施方式中,所述底部填充层221填充所述芯片210与所述基板200之间,而且还覆盖所述芯片210以外的基板200,所述塑封层222覆盖于在所述底部填充层221的表面。在其他具体实施方式中,所述基板200边缘未被所述底部填充层221覆盖,而直接由所述塑封层222覆盖,所述塑封层222覆盖所述底部填充层221的部分表面以及侧壁。在另一些具体实施方式中,所述底部填充层221也可以仅位于所述芯片210下方,所述塑封层222覆盖所述底部 填充层221的侧壁。
所述芯片210通过焊接凸点倒装固定于所述基板200的第一表面上,通过所述焊接凸点与所述基板200之间形成电连接,所述凹槽201至少部分位于所述芯片210在所述基板200上的投影内。
具体的,所述芯片210的表面具有钝化层211,所述钝化层覆盖芯片210的焊垫212。所述焊接凸点包括位于所述钝化层211内形成于所述焊垫212表面的凸点下金属层213以及形成于所述凸点下金属层213表面的焊球214。在其他具体实施方式中,所述焊接凸点还可以包括金属柱等结构。所述焊球214通过所述焊垫212连接至所述芯片210内部的电路。
所述基板200的第一表面上形成有连接结构202,例如焊垫或金属线等,所述芯片210通过焊球214与所述连接结构202焊接固定,实现电连接。所述基板200的第二表面上形成有连接结构203以及形成与所述连接结构203上的焊球204,所述焊球204用于将所述封装结构焊接至其他的电路板上。所述基板200内部还形成有互连结构205,例如贯穿所述基板200的连接柱等,用于将基板200的第一表面的连接结构202与第二表面上的连接结构203之间形成电连接。
上述基板200内的电路连接方式可以根据具体芯片进行设计,在此不作限定。
由于所述凹槽201的宽度小于底部填充层211的材料在液态时的可填充宽度,因此,所述封装结构的底部填充层221仅封闭了所述凹槽201的顶部开口,所述凹槽201内部依然为一连续的气体通路。这就使得在注形成所述底部填充层211的过程中,所述凹槽201始终能够起到较好的排气作用。
由于所述凹槽201底部位于所述基板200内部,因此,所述基板200的第二表面连接区域的分布和面积不受影响,所述基板200的整个第二表面都可以作为与其他电路板连接的连接区域,以形成所述焊球204,使得所述焊球204的分布更灵活,以及所述基板200内部的电路走线也更灵活。例如,各个焊球204之间的间距可以设置的更大,减少后续将封装结构贴装至其他电路板上的焊接难度。
请参考图4,为本发明另一具体实施方式的封装结构所采用的基板400的 俯视示意图。
该具体实施方式中,所述基板400表面具有三条平行排列的长条状凹槽401,且所述三个凹槽401均为长直形,均匀分布于所述基板400内。且其中一个凹槽401设置于所述基板400的对称轴位置处。
相邻所述凹槽401之间的间距如果过大会导致排气效果较差,无法将气体及时排出;相邻所述凹槽401之间的间距如果过小又会导致基板400内应力分布不均匀,使得基板400的强度受到影响。较佳的,相邻所述凹槽401之间的间距可以为50μm~5mm,既能够具有较好的排气效果,又使得基板400保持较高的强度。本领域的技术人员,也可以根据基板的实际厚度、尺寸等因素,在实现较高排气效果的前提下,合理设置相邻凹槽401之间的间距。
在其他具体实施方式中,所述封装结构的基板内还可以形成有两条或更多数量的凹槽,以提高注塑时的排气效果。不同凹槽之间可以平行排列或相互交叉连通。各个凹槽可以分别设置不同的深度、宽度。所述凹槽在垂直长度方向的横截面可以为矩形、也可以为碗状。
请参考图5,为本发明另一具体实施方式的封装结构所采用的基板500的俯视示意图。
该具体实施方式中,所述基板500内具有凹槽501和凹槽502,所述凹槽501沿基板500的长度方向设置,所述凹槽502沿基板500的宽度方向设置,并且所述凹槽501和凹槽502分别设置在所述基板500的两条对阵轴位置处。所述凹槽501和所述凹槽502垂直交叉连通。
请参考图6,该具体实施方式中,所述基板600内具有凹槽601,所述凹槽601为曲线形。凹槽601为曲线形可以提高凹槽的长度,从而经过芯片下方更多的区域,更利于排出气体。
本发明的具体实施方式,还提供一种上述封装结构的形成方法。
所述封装结构的形成方法包括如下步骤:
步骤1:提供封装芯片,所述封装芯片包括基板和固定于所述基板上的芯片;所述基板具有相对的第一表面和第二表面,所述基板的第一表面内形成有至少一个凹槽;所述芯片通过倒装工艺的焊接凸点固定于所述基板的第一表面上,所述焊接凸点与所述基板之间形成电连接,所述凹槽至少部分位于所述芯 片在所述基板上的投影内。
具体的,所述凹槽为长条状,两端延伸至基板边缘,为开放端口,所述凹槽的深度小于所述基板的厚度。
较佳的,所述基板的第一表面内具有两个以上的所述凹槽,不同凹槽之间平行排列或相互交叉连通。
较佳的,所述凹槽的宽度小于4μm。
较佳的,所述凹槽的深度为基板厚度的1%-70%。在一些具体实施方式中,所述凹槽的深度为80μm~0.5mm。
较佳的,所述凹槽为直线形或曲线形。
较佳的,至少一个凹槽位于所述基板的对称轴位置处。
较佳的,所述基板为矩形时,至少一个所述凹槽沿所述基板的长度方向延伸。
所述凹槽可以参考前述具体实施方式的描述,在此不再赘述。
步骤2:对所述封装芯片进行注塑处理,形成填充于所述芯片与所述基板的第一表面之间的间隙内的底部填充层,以及覆盖所述底部填充层并包裹所述芯片的塑封层。
由于所述基板与芯片之间的间隙较小,可以利用毛细效应,在基板边缘提供底部填充剂之后,利用毛细效应,使得底部填充剂自动填充入芯片与基板之间的间隙内,在填充过程中,芯片与基板之间的气体可以通过所述基板第一表面的凹槽,自基板边缘排出。
具体的,在一个具体实施方式中,所述封装芯片进行注塑处理的方法包括:提供注塑模具,所述注塑模具包括底盘和封盖,所述封盖用于盖合于所述底盘上,与所述底盘之间形成空腔;将所述封装芯片置于所述空腔内,所述基板放置于所述底盘表面;利用毛细效应,将底部填充剂填充进所述芯片底部与基板之间的间隙内;向所述空腔内注入液态塑封料,直至所述液态塑封料填充满所述空腔;进行热处理,使所述液态塑封料和底部填充剂固化,形成固态的塑封层和底部填充层。所述底部填充层可以与所述塑封层采用相同或不同的注塑材料。
所述封盖上具有至少一个开孔,所述开孔连通所述空腔与外界;通过至少 一个所述开孔向所述空腔内注入液态塑封料。在一个具体实施方式中,所述封盖可以包括可分离的侧壁与顶盖,所述至少一个开孔可以开设于所述侧壁上,通过所述开孔向所述空腔内注入底部填充剂和所述液态塑封料,具体的,首先通过所述开孔向所述空腔内缓慢注入底部填充剂,所述底部填充剂到达基板后,通过毛细效应,填充于芯片与基板之间;然后再注入液态塑封料,填充满整个空腔。
在一些具体实施方式中,所述封盖上具有至少两个开孔,还包括:在注塑处理过程中,通过其中至少一个开孔向外界排出所述空腔内的气体。用于排气的开孔可以开设于所述封盖的侧壁或顶盖上。
在注塑过程中,由于所述凹槽的宽度小于底部填充剂在液态状态下的可填充宽度,使得所述液态塑封料无法填入所述凹槽内,仅能封闭所述凹槽的顶部,使得所述凹槽内部形成一连续气体通路,使得所述凹槽在整个注塑过程中都能够起到排气作用。
在上述实施方式中,在将封装芯片放置于封装模具后,再依次通过毛细效应形成填充层,以及通过填充空腔的塑封料形成塑封层。
在另一些具体实施方式中,还可以在将封装芯片置于封装模具之前,首先通过毛细效应在芯片与基板之间形成填充层后,再将封装芯片置于封装模具内,形成包裹芯片上部分的塑封层。
步骤3:将注塑后的封装芯片自空腔内取出后,在所述基板的第二表面形成焊球。所述焊球可以分布于基板的整个第二表面上。
所述焊球可以为焊铅锡球或无铅锡球等。后续可以通过回流焊工艺,通过所述焊球203将封装结构贴装于其他电路板等其他电子元件上。
本发明的具体实施方式中,基板表面可以同时形成有多个芯片,同时对所述多个芯片及基板进行塑封处理,塑封完成后再形成位于基板第二表面的焊球等结构,再进行分割,形成如图3A所示的封装结构。
上述封装结构的形成方法,在注塑过程中,可以通过基板内具有开放端口的凹槽排出封装结构内部的气体。凹槽深度小于基板深度,因此不会影响到基板第二表面,不会占据第二表面用于形成焊球的面积。
进一步的,所述凹槽的宽度较小,注塑过程中,底部填充剂无法填充所述 凹槽,避免所述凹槽发生堵塞,可以提高所述凹槽的排气效果。
以上所述仅是本发明的优选实施方式,应当指出,对于本技术领域的普通技术人员,在不脱离本发明原理的前提下,还可以做出若干改进和润饰,这些改进和润饰也应视为本发明的保护范围。

Claims (18)

  1. 一种封装结构,其特征在于,包括:
    基板,所述基板具有相对的第一表面和第二表面,所述基板的第一表面内具有至少一个长条状的凹槽,所述凹槽的两端延伸至基板边缘,为开放端口,所述凹槽的深度小于所述基板的厚度;
    芯片,所述芯片通过焊接凸点倒装固定于所述基板的第一表面上,通过所述焊接凸点与所述基板之间形成电连接,所述凹槽至少部分位于所述芯片在所述基板上的投影内;
    底部填充层,填充满所述芯片与所述基板的第一表面之间的间隙;
    塑封层,覆盖所述底部填充层,并包裹所述芯片。
  2. 根据权利要求1所述的封装结构,其特征在于,所述基板的第一表面内具有两个以上的所述凹槽,不同凹槽之间平行排列或相互交叉连通。
  3. 根据权利要求1所述的封装结构,其特征在于,所述凹槽的宽度小于底部填充层的材料在液态状态下的可填充宽度。
  4. 根据权利要求1所述的封装结构,其特征在于,所述凹槽的宽度小于4μm。
  5. 根据权利要求1所述的封装结构,其特征在于,所述凹槽的深度为基板厚度的1%-70%。
  6. 根据权利要求1所述的封装结构,其特征在于,所述凹槽的深度为80μm~0.5mm。
  7. 根据权利要求1所述的封装结构,其特征在于,所述凹槽为直线形或曲线形。
  8. 根据权利要求1所述的封装结构,其特征在于,至少一个凹槽位于所述基板的对称轴位置处。
  9. 根据权利要求1所述的封装结构,其特征在于,所述基板为矩形时,至少一个所述凹槽沿所述基板的长度方向延伸。
  10. 根据权利要求1所述的封装结构,其特征在于,所述凹槽顶部被所述底部填充层封闭,内部形成一连续气体通路。
  11. 根据权利要求1所述的封装结构,其特征在于,还包括:焊球,形成于所述基板的第二表面。
  12. 一种封装结构的形成方法,其特征在于,包括:
    提供封装芯片,所述封装芯片包括基板和固定于所述基板上的芯片;所述基板具有相对的第一表面和第二表面,所述基板的第一表面内形成有至少一个如权利要求1至11中任一项中所述的凹槽;所述芯片通过倒装工艺的焊接凸点固定于所述基板的第一表面上,所述焊接凸点与所述基板之间形成电连接,所述凹槽至少部分位于所述芯片在所述基板上的投影内;
    对所述封装芯片进行注塑处理,形成填充于所述芯片与所述基板的第一表面之间的间隙内的底部填充层,以及覆盖所述底部填充层并包裹所述芯片的塑封层。
  13. 根据权利要求12所述的形成方法,其特征在于,在形成底部填充层的过程中,通过所述凹槽排出封装结构内部的气体。
  14. 根据权利要求12所述的形成方法,其特征在于,对所述封装芯片进行注塑处理的方法包括:提供注塑模具,所述注塑模具包括底盘和封盖,所述封盖用于盖合于所述底盘上,与所述底盘之间形成空腔;将所述封装芯片置于所述空腔内,所述基板放置于所述底盘表面;利用毛细效应,将底部填充剂填充进所述芯片底部与基板之间的间隙内;向所述空腔内注入液态塑封料,直至所述液态塑封料填充满所述空腔;进行热处理,使所述液态塑封料和底部填充剂固化,形成固态的塑封层和底部填充层。
  15. 根据权利要求14所述的形成方法,其特征在于,所述封盖上具有至少一个开孔,所述开孔连通所述空腔与外界;通过至少一个所述开孔向所述空腔内注入液态塑封料。
  16. 根据权利要求15所述的形成方法,其特征在于,所述封盖上具有至少两个开孔,还包括:在注塑处理过程中,通过其中至少一个开孔向外界排出所述空腔内的气体。
  17. 根据权利要求12所述的形成方法,其特征在于,注塑过程中,由于所述凹槽的宽度小于塑封料在液态状态下的可填充宽度,使得所述底部填充剂无法填入所述凹槽内,仅能封闭所述凹槽的顶部,使得所述凹槽内部形成一连续气体通路。
  18. 根据权利要求12所述的形成方法,其特征在于,还包括:在所述基板的第二表面形成焊球。
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CN113394118A (zh) 2021-09-14
EP3933897A4 (en) 2022-06-29

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