WO2021147038A1 - 显示面板及显示装置 - Google Patents

显示面板及显示装置 Download PDF

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Publication number
WO2021147038A1
WO2021147038A1 PCT/CN2020/073909 CN2020073909W WO2021147038A1 WO 2021147038 A1 WO2021147038 A1 WO 2021147038A1 CN 2020073909 W CN2020073909 W CN 2020073909W WO 2021147038 A1 WO2021147038 A1 WO 2021147038A1
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WO
WIPO (PCT)
Prior art keywords
layer
electrical connection
connection structure
insulating layer
area
Prior art date
Application number
PCT/CN2020/073909
Other languages
English (en)
French (fr)
Inventor
马宏伟
董向丹
程博
都蒙蒙
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to PCT/CN2020/073909 priority Critical patent/WO2021147038A1/zh
Priority to US17/295,559 priority patent/US20220328594A1/en
Priority to EP20886208.6A priority patent/EP4095920A4/en
Priority to CN202080000060.7A priority patent/CN113498553B/zh
Publication of WO2021147038A1 publication Critical patent/WO2021147038A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0446—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04103—Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/311—Flexible OLED
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/40—OLEDs integrated with touch screens

Definitions

  • the present disclosure relates to the field of display technology, in particular to a display panel and a display device.
  • the present invention discloses a display panel and a display device, which aim to improve the layer structure of the binding area and avoid the occurrence of defects caused by corrosion of connection terminals.
  • the embodiment of the present disclosure provides a display panel, including:
  • a base substrate has a display area and a binding area located on one side of the display area, the binding area is divided into a first binding area and a second binding area, the first binding The area is located between the display area and the second binding area;
  • connection terminals are located in the binding area, and each connection terminal includes a first electrical connection structure and a second electrical connection structure that are sequentially stacked on the base substrate; the multiple connection terminals include A plurality of first connection terminals in the first binding area and a plurality of second connection terminals in the second binding area;
  • the first insulating layer is arranged between the layer where the first electrical connection structure is located and the layer where the second electrical connection structure is located, and the orthographic projection of the first insulating layer on the base substrate and the first connection terminal
  • the orthographic projection on the base substrate does not overlap, the first insulating layer overlaps the second binding area, and is provided with a plurality of first openings corresponding to the plurality of second connection terminals, each The orthographic projection of each of the first openings on the base substrate is located within the orthographic projection of the first electrical connection structure of the corresponding second connection terminal on the base substrate; the second The first electrical connection structure and the second electrical connection structure of the connection terminal are connected through the first opening;
  • the second insulating layer is disposed on the side of the layer where the second electrical connection structure is located away from the base substrate, and the second insulating layer overlaps the bonding area and is provided with the plurality of connections
  • a plurality of second openings corresponding to the terminals, the orthographic projection of each of the second openings on the base substrate is located on the front of the corresponding second electrical connection structure of the connection terminal on the base substrate Within the projection.
  • the first bonding area is a chip bonding area
  • the second bonding area is a flexible circuit board bonding area
  • the display panel further includes a first lead arranged between the first connection terminal and the second connection terminal, and the first lead and the second electrical connection structure are arranged on the same layer;
  • the second electrical connection structure of the first connection terminal and the second electrical connection structure of the second connection terminal are connected by the first lead.
  • the display panel also includes:
  • the first layer of source and drain electrodes are located in the display area, and the first layer of source and drain electrodes are arranged between the base substrate and the first insulating layer; the first electrical connection structure is connected to the first insulating layer.
  • a layer of source and drain electrodes are prepared in the same layer;
  • the second layer of source and drain electrodes are located in the display area, and the second layer of source and drain electrodes are arranged between the first insulating layer and the second insulating layer; the second electrical connection structure is connected to the The source and drain electrodes of the second layer are prepared in the same layer;
  • the first insulating layer is a passivation layer; the second insulating layer is a flat layer.
  • the second insulating layer includes a first thinned portion overlapping with the first binding area and a second thinned portion overlapping with the second binding area; the second insulating layer
  • the thickness of the first thinned portion of the layer is smaller than the thickness of the portion surrounding the first thinned portion, and the thickness of the second thinned portion of the second insulating layer is smaller than the thickness of the portion surrounding the second thinned portion .
  • connection terminal further includes a third electrical connection structure disposed on the second opening of the second insulating layer, and the third electrical connection structure and the second electrical connection structure of the connection terminal pass through The second opening is connected;
  • the display panel further includes a touch electrode located in the display area, the touch electrode being disposed on a side of the second insulating layer away from the base substrate; the third electrical connection structure and the The touch electrodes are prepared in the same layer.
  • the orthographic projections of the first electrical connection structure and the second electrical connection structure of the second connection terminal on the base substrate overlap, and the first opening is
  • the orthographic projection on the base substrate coincides with the orthographic projection of the second opening on the base substrate.
  • the orthographic projection of the first electrical connection structure and the second electrical connection structure on the base substrate is located within the orthographic projection of the third electrical connection structure on the base substrate.
  • the display panel further includes a pixel defining layer disposed between the second insulating layer and the layer where the touch electrode is located, and the pixel defining layer is located in the display area.
  • the display panel further includes an organic protective layer disposed on a side of the layer where the touch electrode is located away from the base substrate; the organic protective layer is provided with a third opening exposing the first binding region; Exposing the fourth opening of the second binding zone;
  • the orthographic projection of the first thinned portion on the base substrate is located in the orthographic projection of the third opening on the base substrate;
  • the orthographic projection of the fourth opening on the base substrate is located within the orthographic projection of the second thinned portion on the base substrate.
  • the display panel further includes a third insulating layer disposed between the first insulating layer and the layer where the source and drain electrodes of the second layer are located, the third insulating layer is a flat layer and is located in the display Area.
  • the first electrical connection structure and the second electrical connection structure are both a titanium/aluminum/titanium laminated structure.
  • a display device includes the display panel described in any one of the above.
  • FIG. 1 is a schematic structural diagram of a display panel provided by an embodiment of the disclosure
  • FIG. 2 is a schematic cross-sectional structure diagram of the display panel in FIG. 1 along the A1-A2 direction;
  • FIG. 3 is a schematic cross-sectional structure diagram of the display panel in FIG. 1 along the direction B1-B2;
  • 4a is a schematic cross-sectional structure diagram of a connection terminal of a display panel provided by an embodiment of the present disclosure when part of the structure is corroded;
  • 4b is a schematic cross-sectional structure diagram of a part of the structure of the connection terminal of a display panel provided by an embodiment of the disclosure being corroded and causing a bad situation;
  • FIG. 5 is a schematic diagram of a cross-sectional structure of the display panel in FIG. 1 along the C1-C2 direction.
  • FIGS. 1 to 5 Please refer to FIGS. 1 to 5. Specifically, the cross-sectional views of the display panel in the direction of A1-A2, B1-B2, and C1-C2 in FIG. 1 correspond to FIG. 2, FIG. 3, and FIG. 5, respectively.
  • an embodiment of the present disclosure provides a display panel, including:
  • the base substrate 1, the base substrate 1 has a display area 12 and a binding area 11 on one side of the display area 12.
  • the binding area 11 is divided into a first binding area 111 and a second binding area 112.
  • the area 111 is located between the display area 12 and the second binding area 112;
  • connection terminals are located in the bonding area 11.
  • Each connection terminal includes a first electrical connection structure 21 and a second electrical connection structure 22 that are sequentially stacked on the base substrate 1;
  • the first insulating layer 31 is disposed between the layer where the first electrical connection structure 21 is located and the layer where the second electrical connection structure 22 is located.
  • the orthographic projection of the first insulating layer 31 on the base substrate 1 and the first connection terminal 2001 are in the liner
  • the second insulating layer 32 is disposed on the side of the layer of the second electrical connection structure 22 away from the base substrate 1, the second insulating layer 32 overlaps the bonding area 11, and the second insulating layer 32 is provided with a plurality of connections A plurality of second openings 321 corresponding to the terminals (a plurality of first connecting terminals 2001 and a plurality of second connecting terminals 2002), and the orthographic projection of each second opening 321 on the base substrate 1 is located at the second of the corresponding connecting terminal.
  • the electrical connection structure 22 is within the orthographic projection on the base substrate 1.
  • connection terminals of the binding area 11 include two layers of a first electrical connection structure 21 and a second electrical connection structure 22, and there is a layer between the first electrical connection structure 21 and the second electrical connection structure 22.
  • the first insulating layer 31 and the second electrical connection structure 22 are provided with a second insulating layer 32 on the side away from the base substrate 1.
  • the first insulating layer 31 is provided with a first opening 311 to allow the two-layer structure of the second connection terminal 2002 (the first electrical connection structure 21 and the second electrical connection structure 22) to be electrically connected.
  • the size of the first opening 31 is smaller than the size of the first electrical connection structure 21, that is, the first insulating layer 31 wraps the side of the first electrical connection structure 21 of the second connection terminal 2002, so as to ensure the first connection of the second connection terminal 2002.
  • the side surface of an electrical connection structure 21 will not be corroded during the subsequent manufacturing process of the display panel; similarly, the second insulating layer 32 is provided with a second opening 41 so that the upper portion of the second electrical connection structure 22 of the second connection terminal 2002 is exposed for use.
  • the second connection terminal 2002 in the second binding area 112 is not prone to the problem of connection terminal corrosion, and the occurrence of defects due to the connection terminal corrosion can be avoided.
  • the orthographic projection of the first insulating layer 31 and the first connecting terminal 2001 does not overlap, that is, the first insulating layer 31 does not cover the side surface of the first electrical connection structure 21 of the first connecting terminal 2001,
  • the second electrical connection structure 22 of the first connection terminal 2001 directly covers the first electrical connection structure 21;
  • the second insulating layer 32 is provided with a second opening 41 so that the upper portion of the second electrical connection structure 22 of the first connection terminal 2001 is exposed, It is used for the bonding connection of the connecting terminal, or for the connection between the third layer structure of the connecting terminal formed later and the two-layer structure below, and the size of the second opening 41 is smaller than that of the second connecting terminal 2001.
  • the first connecting terminal 2001 in 111 is not prone to the problem of connecting terminal corrosion, which can avoid the occurrence of defects due to the corrosion of the connecting terminal.
  • the first insulating layer 31 does not overlap the orthographic projection of the first connecting terminal 2001, that is, the first insulating layer 31 does not cover the edge of the first electrical connection structure 21 of the first connecting terminal 2001, and the first connecting terminal 2001
  • the second electrical connection structure 22 directly covers the first electrical connection structure 21. Therefore, the height difference of the first connection terminal 2001 is small, and it is more suitable for binding that requires a higher height difference of the connection terminal, such as the binding of integrated circuit chips.
  • the display panel of the present disclosure includes a first binding area 111 and a second binding area 112.
  • the sides of the connection terminals in the first binding area 111 and the second binding area 112 are all wrapped and protected, which is not easy to occur.
  • the problem of the corrosion of the connection terminal can avoid defects (such as poor bonding contact or poor short circuit) due to corrosion of the side of the connection terminal (for example, lateral corrosion of the connection terminal in the subsequent anode wet etching process), and improve the yield rate of the display panel.
  • the film design of the first connection terminal 2001 in the first bonding area 111 and the second connection terminal 2002 in the second bonding area 112 are different, and the height difference is different, which can be applied to different The bonding connection required by the height difference is conducive to improving the yield rate of the bonding connection.
  • the first bonding area 111 is a chip bonding area (COP), and the second bonding area 112 is a flexible circuit board bonding area (FOP).
  • COP chip bonding area
  • FOP flexible circuit board bonding area
  • the pitch of the pads in the FOP area is relatively large and the requirement for the height difference of the pads is not high. Therefore, the second binding area 112 is suitable to be configured as the FOP area.
  • the pads in the COP area are relatively small in pitch and require high pad height differences, so the first binding area 111 is suitable to be configured as a COP area.
  • the display panel further includes a first lead 221 disposed between the first connection terminal 2001 and the second connection terminal 2002, and the first lead 221 and the second electrical connection
  • the connection structure 22 is arranged in the same layer;'same layer arrangement' means that it can be formed in the same layer in the manufacturing process, for example, the same material layer is formed through a patterning process.
  • the second electrical connection structure 22 of the first connection terminal 2001 and the second electrical connection structure 22 of the second connection terminal 2002 are connected by a first lead 221.
  • the display panel further includes a first layer of source and drain electrodes 51 and a second layer of source and drain electrodes (lap electrode layer) 52 located in the display area; specifically, the first layer
  • the source and drain electrodes 51 are arranged between the base substrate 1 and the first insulating layer 31; the second layer of source and drain electrodes 52 are arranged between the first insulating layer 31 and the second insulating layer 32; as shown in FIGS. 2 and 3 ,
  • the first electrical connection structure 21 and the first layer of source and drain electrodes 51 are prepared in the same layer; the second electrical connection structure 22 and the second layer of source and drain electrodes 52 are prepared in the same layer.
  • the first insulating layer 31 is a passivation layer (PVX), which is mainly used for insulation between the first layer of source and drain electrodes 51 and the second layer of source and drain electrodes 52, and at the same time protects the first layer of source and drain electrodes 51 Role;
  • the second insulating layer 32 is a flat layer, playing a flattening role and protecting the underlying metal electrodes and wiring.
  • the display panel provided by the embodiment of the present invention includes a plurality of pixel structures located in the display area 12.
  • the pixel structure includes a pixel driving circuit, and the pixel driving circuit may include a thin film transistor 501, a storage capacitor 502, etc.
  • the pixel driving circuit may include an active layer 53, a first gate insulating layer 34, a gate 54 and a first capacitor electrode 55, a second gate insulating layer 35, and a second capacitor electrode, which are sequentially disposed on the buffer layer 33. 56.
  • the gate electrode 54 may be arranged in the same layer as the second lead 541 located between the display area and the first bonding area; the source and drain electrodes 51 of the first layer may be arranged in the same layer as in the bonding area.
  • the first electrical connection structure 21 is arranged in the same layer; the source and drain electrodes 52 of the second layer can be arranged in the same layer as the second electrical connection structure 22 and the first lead 221 in the bonding area.
  • the second gate insulating layer 35 extends into the bonding area to protect the second lead 541 from being corroded;
  • the first insulating layer 31 is configured as a passivation layer and extends into the first bonding area 111 to cover the first electrical connection
  • the side surface of the structure 21 can protect the side surface of the first electrical connection structure 21 from being corroded;
  • the second insulating layer 32 is configured as a flat layer and extends into the first bonding area 111 and the second bonding area 112 to protect the first
  • the side surfaces of the lead 221 and the second electrical connection structure 22 of the connection terminal are not corroded.
  • the embodiment of the present disclosure is a double-layer source and drain electrode (SD) drive panel, and the connection terminal has a two-layer structure (first electrical connection structure 21 and second electrical connection structure 22) prepared in the same layer as the double-layer source and drain electrode (SD) , Can increase the thickness of the connection terminal, reduce the resistance, that is, reduce the resistance drop (IR Drop), reduce the attenuation of the signal, and improve the uniformity of the display.
  • the double-layer source and drain electrode (SD) backplane needs to add 2 to 3 mask processes, and the film layer stack structure is relatively complicated.
  • the first electrical connection structure 21 and the second electrical connection structure 22 are the same as the source and drain electrode materials, and both are titanium/aluminum/titanium (Ti/Al/Ti) composite materials, That is, it includes two titanium material layers 202 and an aluminum material layer 201 located in the middle of the two titanium material layers 202, which is a titanium/aluminum/titanium (Ti/Al/Ti) laminated structure.
  • Ti/Al/Ti titanium/aluminum/titanium
  • the side surface of the first electrical connection structure 21 is wrapped and protected by the first insulating layer 31, and the second electrical connection
  • the side surface of the connection structure 22 is wrapped and protected by the second insulating layer 32, which can effectively avoid the occurrence of defects caused by the above-mentioned corrosion situation;
  • the side surface of the first electrical connection structure 21 is wrapped and protected, and the side surface of the second electrical connection structure 22 is wrapped and protected by the second insulating layer 32, which can also effectively avoid the occurrence of defects caused by the above-mentioned corrosion situation.
  • the display panel in the embodiment of the present disclosure may further include a third insulating layer 37 disposed between the first insulating layer 31 and the second layer of source and drain electrodes 52,
  • the third insulating layer 37 is a flat layer and is located in the display area 12.
  • the third insulating layer 6 is an organic flat layer, which mainly plays a flat role and protects the source and drain electrodes 51 of the first layer.
  • a passivation layer (first insulating layer 31) and an organic flat layer (third insulating layer 37) between the first layer of source and drain electrodes 51 and the second layer of source and drain electrodes 52.
  • Insulating layer the thickness of the passivation layer (first insulating layer 31) is thinner than that of the organic flat layer (third insulating layer 37).
  • the passivation layer (first insulating layer 31) is used to protect the second connection terminal
  • the first electrical connection structure 21 of 2002 instead of the organic flat layer (the third insulating layer 37), can avoid the influence of the bonding of the second connection terminal 2002 due to the large edge thickness of the second connection terminal 2002.
  • the third insulating layer (organic flat layer) 37 is only provided in the display area 11 and does not cover the bonding area 11, which can further avoid the influence of the bonding area due to the thickness of the insulating layer 11 being too large, which can greatly reduce the The module binding problem caused by the complexity of SD film stacking.
  • the passivation layer (the first insulating layer 31) covers the second bonding area and covers the edge of the second connection terminal 2002, and at the same time, the passivation layer (the first insulating layer 31) and the second bonding area A bonding area does not overlap, that is, it does not cover the first bonding area and does not cover the edge of the first connection terminal 2001, so that the requirements of the COP area and the FOP area for the film thickness and the height difference of the connection terminals can be matched as much as possible. Improve binding yield.
  • the base substrate 1 may further include a bending area 13 located between the first bonding area 111 and the display area 12, and the second lead 541 straddles the bending area 13, and both ends are electrically connected to the pixel driving circuit of the display area 12 and the first connection terminal 2001 of the first binding area 111; after binding, the base substrate 1 can be moved along the bending area. 13 is bent to bend the binding area 11 to the back of the display panel.
  • the first insulating layer (passivation layer) 31 does not cover the bending area 13, so that the bending stress and bending radius can be reduced. This makes the bending operation of the display panel easier, and can prevent defects such as film layer or wire breakage in the bending area 13.
  • the second insulating layer 32 includes a first thinned portion 321 that overlaps the first bonding region 111 and a first thinned portion 321 that overlaps the second bonding region 112.
  • the second thinned portion 322 as shown in FIG.
  • the thickness of the first thinned portion 321 of the second insulating layer 32 is smaller than the thickness of the portion surrounding the first thinned portion 321, and the second thinned portion of the second insulating layer 32
  • the thickness of the portion 322 is smaller than the thickness of the portion surrounding the second thinned portion 322, that is, the thickness of the portion of the second insulating layer 32 in the first bonding region 111 and the second bonding region 112 is thinner.
  • the second insulating layer 32 is an organic layer that plays a flat and protective role. The thickness is generally large. The thickness of the second insulating layer 32 in the bonding area 11 can be reduced to reduce the thickness of the second insulating layer 32 effectively. Therefore, it can not only protect the side of the connecting terminal, but also greatly reduce the module binding problem caused by the complexity of dual SD film stacking.
  • a halftone mask (Halftone) process can be used to make the thickness of the second insulating layer in the first bonding region and the second bonding region smaller than the periphery, so that the thickness of the second insulating layer in the first bonding region and the second bonding region The thickness of the second insulating layer is reduced.
  • connection terminal further includes a third electrical connection structure 23 disposed on the second opening 321 of the second insulating layer 32, and the third electrical connection structure of the connection terminal 23 and the second electrical connection structure 22 are connected through the second opening 321.
  • the display panel further includes touch electrodes 7 located in the display area 12, and the touch electrodes 7 are arranged on the side of the second insulating layer 32 away from the base substrate 1;
  • the connection structure 23 and the touch electrode 7 are prepared in the same layer.
  • the display panel of the embodiment of the present disclosure adopts an in-cell touch technology (FMLOC, Flexible Multi Layer On Cell Touch), and a touch sensor is formed through a film deposition process.
  • FMLOC Flexible Multi Layer On Cell Touch
  • the first electrical connection structure 21, the second electrical connection structure 22, and the third electrical connection structure 23 are integrated in the connection terminal of the embodiment of the present disclosure, which can be used for the transmission connection of display signals. , Can also be used for touch signal transmission connection.
  • the connection terminals in the embodiments of the present disclosure a part of the connection terminals are used as connection terminals for displaying signals, and the second lead 541 connected to this part of the connection terminals is connected to the first lead 541 in the display area 12.
  • the source and drain electrodes 51 of a layer are electrically connected, and there is no electrical connection with the touch electrode 7.
  • connection terminal for touch signals
  • second lead 541 connected to this part of the connection terminal is connected to the display
  • the touch electrode 7 in the area 12 is electrically connected, and there is no electrical connection between the double-layer source and drain electrodes (51, 52).
  • the connection between the second lead 541 and the electrodes of different layers may be achieved through vias in the interlayer insulating layer.
  • the first electrical connection structure 21 and the second electrical connection structure 22 of the second connection terminal 2002 are located on the base substrate 1.
  • the orthographic projections coincide, and the orthographic projection of the first opening 31 on the base substrate 1 and the orthographic projection of the second opening 41 on the base substrate 1 coincide.
  • the orthographic projection of the first electrical connection structure 21 and the second electrical connection structure 22 on the base substrate 1 is located on the front of the third electrical connection structure 23 on the base substrate 1.
  • the third electrical connection structure 23 completely covers the first electrical connection structure 21 and the second electrical connection structure 22, which can increase the bonding contact area of the connection terminal 2 and improve the bonding yield.
  • the display panel further includes a pixel definition layer (PDL) 8 disposed between the second insulating layer 32 and the layer where the touch electrode 7 is located.
  • PDL pixel definition layer
  • the pixel defining layer 8 (organic layer) is only in the display area 12 and does not cover the bonding area 11, which can further avoid that the insulating layer thickness of the bonding area 11 is too large to affect the bonding, which can greatly reduce the complexity of double SD film stacking. And the problem of module binding.
  • a light-emitting element 4 is further provided in the display area of the base substrate 1, and the light-emitting element 4 is formed on the driving pixel circuit, that is, the light-emitting element 4 is provided on the second insulating layer (flat layer) 32 away from The base substrate 1 side.
  • the light-emitting element 4 includes a first electrode 41, a light-emitting layer 42 and a second electrode 43.
  • the first electrode 41 of the light-emitting element 4 is electrically connected to the source and drain electrodes (lap electrode layer) 52 of the second layer through the via holes in the second insulating layer (flat layer) 32.
  • the pixel defining layer 8 is disposed on the first electrode 41, the pixel defining layer 8 includes a plurality of openings to define a plurality of pixel units, each of the plurality of openings exposes a first electrode 41, and the light emitting layer 42 is disposed on the pixel defining layer 8. Of multiple openings.
  • the second electrode 43 may be disposed in a part or the entire display area, so that it may be formed on the entire surface during the manufacturing process.
  • an encapsulation layer 91 is further provided on the light-emitting element 4.
  • the encapsulation layer 91 includes a first organic layer 911, an inorganic layer 912, and a second organic layer 913.
  • the encapsulation layer 91 does not cover the binding Zone, that is, there is no overlap with the binding zone.
  • the touch electrode 7 is arranged on the side of the packaging layer 91 away from the base substrate 1.
  • the display panel may further include an organic protective layer (OC, Over Coating) 9 disposed on the side of the layer where the touch electrode 7 is located away from the base substrate 1; FIGS. 1 and 2 As shown, the organic protection layer 92 is provided with a third opening 921 exposing the first binding area 111 and a fourth opening 922 exposing the second binding area 112.
  • O Organic protective layer
  • the organic protective layer is provided with openings that avoid the first binding area and the second binding area, and does not cover the first binding area and the second binding area, which can prevent the binding due to the thickness of the insulating layer in the binding area from being too large.
  • the organic protective layer only avoids the binding area and covers all other areas, which can play a good role in protecting the underlying metal traces.
  • the orthographic projection of the first thinned portion 321 of the second insulating layer 32 on the base substrate 1 is located within the orthographic projection of the third opening 921 of the organic protective layer 92 on the base substrate 1.
  • the orthographic projection of the fourth opening 922 of the organic protective layer 92 on the base substrate 1 is located in the orthographic projection of the second thinned portion 322 of the second insulating layer 32 on the base substrate 1.
  • the opening boundary of the organic protective layer 92 (the fourth opening 922 boundary) surrounds the edge of the thinned area of the second insulating layer 32 (the edge of the second thinned portion 322);
  • the edge of the thinned area of the second insulating layer 32 (the edge of the first thinned portion 321) surrounds the opening boundary of the organic protective layer 92 (the boundary of the third opening 921).
  • the opening boundary (the boundary of the third opening 921) of the organic protective layer 92 may also surround the edge of the thinned area of the second insulating layer 32 (
  • the edge of the first thinned portion 321), at the COP area may also be the edge of the thinned area of the second insulating layer 32 (edge of the second thinned portion 322) surrounding the opening boundary of the organic protective layer 92 (the boundary of the fourth opening 922) ).
  • the display panel of the embodiment of the present disclosure may be a flexible AMOLED display panel, and the base substrate is a flexible base, which may include a double-layer polyimide (PI) and an inorganic layer located in the middle of the double-layer PI; or, the implementation of the present disclosure
  • the display panel of the example may also be a rigid panel, and the base substrate is glass.
  • an embodiment of the present disclosure also provides a display device including any of the above-mentioned display panels.
  • the display device provided by the embodiment of the present disclosure has the same beneficial effects as the display panel of the embodiment of the present disclosure, and will not be repeated here.

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Abstract

一种显示面板及显示装置，所述显示面板包括：衬底基板（1），具有第一和第二绑定区（111,112）；连接端子，位于绑定区内，包括依次层叠的第一电连接结构（21）和第二电连接结构（22），具体包括分别位于第一绑定区（111）和第二绑定区（112）内的第一连接端子（2001）和第二连接端子（2002）；第一绝缘层（31），位于第一电连接结构（21）和第二电连接结构（22）之间，与第一连接端子（2001）无交叠，并设有与第二连接端子（2002）对应的第一开口（311），各第一开口（311）的投影位于对应的第一电连接结构（21）的投影之内，第二连接端子（2002）的第一电连接结构（21）和第二电连接结构（22）之间通过第一开口（311）相连；第二绝缘层（32）位于第二电连接结构（22）背离衬底基板（1）一侧，设有与连接端子对应的第二开口（41），各第二开口（41）的投影位于对应连接端子的第二电连接结构（22）投影之内。

Description

显示面板及显示装置 技术领域
本公开涉及显示技术领域，尤指一种显示面板及显示装置。
背景技术
在背板上采用双层源漏电极(SD)工艺，会使显示器件的叠层结构增加，特别是在绑定区域，膜层结构设计对绑定效果的影响非常明显，随之而来的工艺问题是我们必须要考虑应对的；比如，在柔性基板的柔性线路板绑定(FOP，FPC on PI)区域，通常会遇到的连接端子(Pad)金属层腐蚀问题，即在FPC绑定区域，由于Pad金属截面裸露，容易出现pad侧边的腐蚀，会影响绑定的效果及良率，严重者，腐蚀造成的金属离子析出会导致显示区线路的短路等，造成比较严重的显示问题。
发明内容
本发明公开了一种显示面板及显示装置，目的是改善绑定区域层结构，避免因连接端子腐蚀而产生的不良的发生。
本公开实施例提供了一种显示面板，包括：
衬底基板，所述衬底基板具有显示区和位于所述显示区一侧的绑定区，所述绑定区划分为第一绑定区和第二绑定区，所述第一绑定区位于所述显示区与所述第二绑定区之间；
多个连接端子，位于所述绑定区内，每个连接端子包括在所述衬底基板上依次层叠的第一电连接结构和第二电连接结构；所述多个连接端子包括位于所述第一绑定区内的多个第一连接端子和位于所述第二绑定区内的多个第二连接端子；
第一绝缘层，设置在所述第一电连接结构所在层和所述第二电连接结构所在层之间，所述第一绝缘层在衬底基板上的正投影与所述第一连接端子在 衬底基板上的正投影没有交叠，所述第一绝缘层与所述第二绑定区相交叠、且设有与所述多个第二连接端子对应的多个第一开口，每个所述第一开口在所述衬底基板上的正投影位于对应的所述第二连接端子的所述第一电连接结构在所述衬底基板上的正投影之内；所述第二连接端子的第一电连接结构和第二电连接结构之间通过所述第一开口相连；
第二绝缘层，设置在所述第二电连接结构所在层背离所述衬底基板的一侧，所述第二绝缘层与所述绑定区相交叠，且设有与所述多个连接端子对应的多个第二开口，每个所述第二开口在所述衬底基板上的正投影位于对应的所述连接端子的所述第二电连接结构在所述衬底基板上的正投影之内。
可选的，所述第一绑定区为芯片绑定区，所述第二绑定区为柔性电路板绑定区。
可选的，显示面板还包括设置于所述第一连接端子与所述第二连接端子之间的第一引线，所述第一引线与所述第二电连接结构同层设置；
所述第一连接端子的第二电连接结构与所述第二连接端子的第二电连接结构通过所述第一引线相连。
可选的，显示面板还包括：
第一层源漏电极，位于所述显示区内，所述第一层源漏电极设置在所述衬底基板和所述第一绝缘层之间；所述第一电连接结构与所述第一层源漏电极同层制备；
第二层源漏电极，位于所述显示区内，所述第二层源漏电极设置在所述第一绝缘层和所述第二绝缘层之间；所述第二电连接结构与所述第二层源漏电极同层制备；
所述第一绝缘层为钝化层；所述第二绝缘层为平坦层。
可选的，所述第二绝缘层包括与所述第一绑定区交叠的第一减薄部以及与所述第二绑定区交叠的第二减薄部；所述第二绝缘层的第一减薄部的厚度小于包围所述第一减薄部的部分的厚度，所述第二绝缘层的第二减薄部的厚度小于包围所述第二减薄部的部分的厚度。
可选的，所述连接端子还包括设置在所述第二绝缘层的第二开口上的第三电连接结构，所述连接端子的第三电连接结构和第二电连接结构之间通过所述第二开口相连；
所述显示面板还包括触控电极，位于所述显示区内，所述触控电极设置在所述第二绝缘层背离所述衬底基板的一侧；所述第三电连接结构与所述触控电极同层制备。
可选的，所述第二绑定区内，所述第二连接端子的第一电连接结构和第二电连接结构在所述衬底基板上的正投影重合，且所述第一开口在所述衬底基板上的正投影和所述第二开口在所述衬底基板上的正投影重合。
可选的，所述第一电连接结构和所述第二电连接结构在所述衬底基板上的正投影位于所述第三电连接结构在所述衬底基板上的正投影内。
可选的，显示面板还包括设置在所述第二绝缘层与所述触控电极所在层之间的像素界定层，所述像素界定层位于所述显示区内。
可选的，显示面板还包括设置在所述触控电极所在层背离所述衬底基板一侧的有机保护层；所述有机保护层设有暴露所述第一绑定区的第三开口以及暴露所述第二绑定区的第四开口；
所述第一减薄部在所述衬底基板上的正投影位于所述第三开口在所述衬底基板上的正投影内；
所述第四开口在所述衬底基板上的正投影位于所述第二减薄部在所述衬底基板上的正投影内。
可选的，显示面板还包括设置在所述第一绝缘层和所述第二层源漏电极所在层之间的第三绝缘层，所述第三绝缘层为平坦层，且位于所述显示区内。
可选的，所述第一电连接结构和所述第二电连接结构均为钛/铝/钛叠层结构。
一种显示装置，包括上述任一项所述的显示面板。
附图说明
图1为本公开实施例提供的一种显示面板的结构示意图；
图2为图1中的显示面板沿A1-A2方向的截面结构示意图；
图3为图1中的显示面板沿B1-B2方向的截面结构示意图；
图4a为本公开实施例提供的一种显示面板的连接端子中部分结构被腐蚀情况下的截面结构示意图；
图4b为本公开实施例提供的一种显示面板的连接端子中部分结构被腐蚀产生不良情况的截面结构示意图；
图5为图1中的显示面板沿C1-C2方向的截面结构示意图。
具体实施方式
下面将结合本公开实施例中的附图，对本公开实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本公开保护的范围。
请参考图1至图5，具体的，图1中显示面板沿A1-A2、B1-B2、C1-C2方向的截面图分别对应图2、图3和图5。
如图1和图2所示，本公开实施例提供了一种显示面板，包括：
衬底基板1，衬底基板1具有显示区12和位于显示区12一侧的绑定区11，绑定区11划分为第一绑定区111和第二绑定区112，第一绑定区111位于显示区12与第二绑定区112之间；
多个连接端子，位于绑定区11内，每个连接端子包括在衬底基板1上依次层叠的第一电连接结构21和第二电连接结构22；上述多个连接端子包括位于第一绑定区111内的多个第一连接端子2001和位于第二绑定区112内的多个第二连接端子2002；
第一绝缘层31，设置在第一电连接结构21所在层和第二电连接结构22所在层之间，第一绝缘层31在衬底基板1上的正投影与第一连接端子2001 在衬底基板1上的正投影没有交叠，第一绝缘层31与第二绑定区112相交叠、且设有与多个第二连接端子2002对应的多个第一开口31，每个第一开口311在衬底基板1上的正投影位于对应的第二连接端子2002的第一电连接结构21在衬底基板1上的正投影之内；第二连接端子2002的第一电连接结构21和第二电连接结构22之间通过第一开口311相连；
第二绝缘层32，设置在第二电连接结构22所在层背离衬底基板1的一侧，第二绝缘层32与绑定区11相交叠，且第二绝缘层32设有与多个连接端子(多个第一连接端子2001和多个第二连接端子2002)对应的多个第二开口321，每个第二开口321在衬底基板1上的正投影位于对应的连接端子的第二电连接结构22在衬底基板1上的正投影之内。
上述显示面板中，绑定区11的连接端子包括第一电连接结构21和第二电连接结构22两层，第一电连接结构21所在层和第二电连接结构22所在层之间设有第一绝缘层31，第二电连接结构22所在层背离衬底基板1的一侧设有第二绝缘层32。
具体的，在第二绑定区112内，第一绝缘层31设有第一开口311以使第二连接端子2002的两层结构(第一电连接结构21和第二电连接结构22)电连接，并且第一开口31尺寸小于第一电连接结构21的尺寸，即第一绝缘层31将第二连接端子2002的第一电连接结构21侧面包裹，从而可以保证第二连接端子2002的第一电连接结构21侧面不会在显示面板后续制备过程中被腐蚀；同理，第二绝缘层32设有第二开口41使得第二连接端子2002的第二电连接结构22上方暴露，以用于连接端子的绑定连接，或者用于后续形成的连接端子的第三层结构(例如后面提到的第三电连接结构23)与下方两层结构之间的连接，并且，第二开口41尺寸小于第二电连接结构22开口尺寸，即第二绝缘层32将第二连接端子2002的第二电连接结构22侧面包裹，从而可以保证第二电连接结构22的侧面在后续制备过程中不会被腐蚀。因此，第二绑定区112内的第二连接端子2002不易发生连接端子腐蚀的问题，可以避免因连接端子腐蚀而产生的不良发生。
在第一绑定区111内，第一绝缘层31与第一连接端子2001的正投影没有交叠，即第一绝缘层31未包覆第一连接端子2001的第一电连接结构21侧面，第一连接端子2001的第二电连接结构22直接覆盖在第一电连接结构21上；第二绝缘层32设有第二开口41使得第一连接端子2001的第二电连接结构22上方暴露，以用于连接端子的绑定连接，或者用于后续形成的连接端子的第三层结构与下方两层结构之间的连接，并且，第二开口41的尺寸小于第一连接端子2001的第二电连接结构22开口尺寸，即第二绝缘层32将第一连接端子2001的侧面包裹，从而保证第二电连接结构22的侧面在后续制备过程中不会被腐蚀；因此，第一绑定区111内的第一连接端子2001也不易发生连接端子腐蚀的问题，可以避免因连接端子腐蚀而产生的不良发生。同时，由于第一绝缘层31与第一连接端子2001正投影没有交叠，即第一绝缘层31没有包覆第一连接端子2001的第一电连接结构21边缘，第一连接端子2001的第二电连接结构22直接覆盖在第一电连接结构21上，因此，第一连接端子2001的高度差较小，比较适合于对连接端子高度差要求比较高的绑定，如集成电路芯片的绑定。
综上所述，本公开的显示面板包括第一绑定区111和第二绑定区112，第一绑定区111和第二绑定区112内的连接端子侧面均被包裹保护，不易发生连接端子腐蚀的问题，可以避免因连接端子侧面被腐蚀(例如后续阳极湿刻工艺中连接端子出现侧向腐蚀)而产生不良(如绑定接触不良或者短路不良)，提高显示面板良率。并且，根据绑定工艺要求不同，第一绑定区111中的第一连接端子2001和第二绑定区112中的第二连接端子2002的膜层设计不同，高度差不同，可以适用于不同高度差要求的绑定连接，有利于提高绑定连接的良率。
一种具体的实施例中，如图1所示，第一绑定区111为芯片绑定区(COP)，第二绑定区112为柔性电路板绑定区(FOP)。
具体的，FOP区域的连接端子(pad)间距(pitch)较大且对Pad高度差的要求不高，因此，第二绑定区112适合被配置为FOP区域。而COP区域的 连接端子(pad)间距(pitch)较小且对Pad高度差的要求高，故第一绑定区111适合被配置为COP区域。
一种具体的实施例中，如图1和图2所示，显示面板还包括设置于第一连接端子2001与第二连接端子2002之间的第一引线221，第一引线221与第二电连接结构22同层设置；‘同层设置’，即可以在制备工艺中同层形成，例如采用同一材料层通过构图工艺形成。
第一连接端子2001的第二电连接结构22与第二连接端子2002的第二电连接结构22通过第一引线221相连。
一种具体的实施例中，如图3所示，显示面板还包括位于显示区内第一层源漏电极51和第二层源漏电极(搭接电极层)52；具体的，第一层源漏电极51设置在衬底基板1和第一绝缘层31之间；第二层源漏电极52设置在第一绝缘层31和第二绝缘层32之间；如图2和图3所示，第一电连接结构21与第一层源漏电极51同层制备；第二电连接结构22与第二层源漏电极52同层制备。
具体的，第一绝缘层31为钝化层(PVX)，主要用于第一层源漏电极51和第二层源漏电极52之间的绝缘，同时对第一层源漏电极51起保护作用；第二绝缘层32为平坦层，起平坦作用和保护下层金属电极和走线的作用。
如图1和图3所示，本发明实施例提供的显示面板包括位于显示区12内的多个像素结构，像素结构包括像素驱动电路，像素驱动电路中可以包括薄膜晶体管501、存储电容502等，具体的，像素驱动电路可以包括依次设置于缓冲层33上的有源层53、第一栅绝缘层34、栅极54和第一电容电极55、第二栅绝缘层35、第二电容电极56、层间绝缘层36、第一层源漏电极51(包括源极511及漏极512)、第一绝缘层(钝化层)31、第二层源漏电极52，以及第二绝缘层(平坦层)32。
具体的，如图2和图3所示，栅极54可以与位于显示区和第一邦定区之间的第二引线541同层设置；第一层源漏电极51可以与邦定区中的第一电连接结构21同层设置；第二层源漏电极52可以与邦定区中的第二电连接结构 22以及第一引线221同层设置。第二栅绝缘层35延伸至绑定区内，可以保护第二引线541不被腐蚀；第一绝缘层31配置为钝化层，延伸至第一邦定区111内，包覆第一电连接结构21的侧面，可以保护第一电连接结构21的侧面不被腐蚀；第二绝缘层32配置为平坦层，延伸至第一邦定区111和第二绑定区112内，可以保护第一引线221以及连接端子的第二电连接结构22侧面不被腐蚀。
本公开实施例为双层源漏电极(SD)驱动面板，连接端子具有与双层源漏电极(SD)同层制备的两层结构(第一电连接结构21和第二电连接结构22)，可以增加连接端子厚度，降低电阻，即降低电阻压降(IR Drop)，减小信号的衰减，提高显示均匀性。具体的，相对于常规的单层源漏电极(SD)的背板，双层源漏电极(SD)的背板需要增加2至3道掩膜(mask)工艺，膜层堆叠结构相对复杂。
示例性的，如图4a和图4b所示，第一电连接结构21和第二电连接结构22与源漏电极材料相同，均为钛/铝/钛(Ti/Al/Ti)复合材料，即包括两层钛材料层202和位于两层钛材料层202中间的铝材料层201，为钛/铝/钛(Ti/Al/Ti)层叠结构。
具体的，如图4a所示，当电连接结构的侧面裸露时，该电连接结构中间的铝材料层201很容易被侧向腐蚀，导致顶层的钛材料层202悬空，如图4b所示，在后面的高压工艺中，顶层钛材料层202边缘容易脱落，产生金属颗粒物(particle)203，如果这些脱落的金属颗粒物203残留在信号线处，将会出现短路(short)，导致显示不良。如图2和图5所示，本公开的显示面板，对于第二绑定区中的第二连接端子2002，第一电连接结构21的侧面通过第一绝缘层31进行包裹保护、第二电连接结构22的侧面通过第二绝缘层32进行包裹保护，可以有效地避免上述腐蚀情况所导致的不良发生；对于第一绑定区中的第一连接端子2001，第一电连接结构21的侧面通过第二电连接结构22进行包裹保护、第二电连接结构22的侧面通过第二绝缘层32进行包裹保护，也可以有效地避免上述腐蚀情况所导致的不良发生。
一种具体的实施例中，如图3所示，本公开实施例中的显示面板，还可以包括设置在第一绝缘层31和第二层源漏电极52之间的第三绝缘层37，第三绝缘层37为平坦层，位于显示区12内。
具体的，第三绝缘层6为有机平坦层，主要起平坦作用和保护第一层源漏电极51的作用。
如图2和图3所示，第一层源漏电极51和第二层源漏电极52之间具有钝化层(第一绝缘层31)和有机平坦层(第三绝缘层37)两层绝缘层，钝化层(第一绝缘层31)厚度相比于有机平坦层(第三绝缘层37)更薄，本公开中，采用钝化层(第一绝缘层31)保护第二连接端子2002的第一电连接结构21，而不是有机平坦层(第三绝缘层37)，可以避免因为第二连接端子2002边缘厚度较大而影响第二连接端子2002的绑定(Bonding)。并且，第三绝缘层(有机平坦层)37仅设置在显示区11内，不覆盖绑定区11，可以进一步避免由于绑定区11的绝缘层厚度太大影响绑定，可以大大降低因双SD膜层堆叠复杂性而带来的模组绑定问题。
具体的，如图2所示，钝化层(第一绝缘层31)覆盖第二绑定区并包覆第二连接端子2002的边缘，同时，钝化层(第一绝缘层31)与第一绑定区没有交叠，即未覆盖第一绑定区且未包覆第一连接端子2001的边缘，这样可以尽可能匹配COP区域和FOP区域对于膜层厚度和连接端子高度差的要求，提高绑定良率。
一种具体的实施例中，如图1所示，本发明的显示面板中，衬底基板1还可以包括位于第一绑定区111与显示区12之间的弯折区13，第二引线541跨越该弯折区13，两端分别与显示区12的像素驱动电路和第一绑定区111的第一连接端子2001电连接；在绑定后可将衬底基板1沿该弯折区13弯折、以将绑定区11弯折至显示面板的背面。
具体的，该弯折区13中没有第一绝缘层(钝化层)31，即第一绝缘层(钝化层)31未覆盖弯折区13，这样可以减小弯折应力和弯折半径，使得显示面板的弯折操作更加容易，且能够防止弯折区13出现膜层或走线断裂等不良问 题。
一种具体的实施例中，如图1和图2所示，第二绝缘层32包括与第一绑定区111交叠的第一减薄部321以及与第二绑定区112交叠的第二减薄部322；如图2所示，第二绝缘层32的第一减薄部321的厚度小于包围第一减薄部321的部分的厚度，第二绝缘层32的第二减薄部322的厚度小于包围第二减薄部322的部分的厚度，即第二绝缘层32在第一绑定区111和第二绑定区112内的部分厚度较薄。第二绝缘层32为起到平坦和保护作用的有机层，厚度一般较大，将绑定区11内的第二绝缘层32厚度减薄，可以有效减小第二绝缘层32的厚度对于绑定的影响，从而既可以对连接端子的侧面起到保护作用，又可以大大降低因双SD膜层堆叠复杂性而带来的模组绑定问题。
具体的，可以采用半色调掩膜(Halftone)工艺使得第一绑定区和第二绑定区内的第二绝缘层厚度小于周边，从而使得第一绑定区和第二绑定区内的第二绝缘层厚度减薄。
一种具体的实施例中，如图2和图5所示，连接端子还包括设置在第二绝缘层32的第二开口321上的第三电连接结构23，连接端子的第三电连接结构23和第二电连接结构22之间通过第二开口321相连。
具体的，如图1至图3所示，显示面板还包括位于显示区12内的触控电极7，触控电极7设置在第二绝缘层32背离衬底基板1的一侧；第三电连接结构23与触控电极7同层制备。
本公开实施例的显示面板，采用内嵌式的触控技术(FMLOC，Flexible Multi Layer On Cell Touch)，通过膜层沉积工艺形成触控传感器。
具体的，如图2所示，本公开实施例的连接端子中同时集成有第一电连接结构21、第二电连接结构22和第三电连接结构23，既可以用于显示信号的传输连接，也可以用于触控信号的传输连接。例如，如图1至图3所示，本公开实施例的所有连接端子中，一部分连接端子用作于显示信号的连接端子，和该部分连接端子相连的第二引线541与显示区12内第一层源漏电极51电连接，与触控电极7之间没有电连接，进一步地，另一部分连接端子用作 于触控信号的连接端子，和该部分连接端子相连的第二引线541与显示区12内触控电极7电连接，与双层源漏电极(51、52)之间没有电连接。示例性的，第二引线541与不同层的电极之间可以通过层间绝缘层中的过孔实现连接。
一种具体的实施例中，如图2和图5所示，第二绑定区内，第二连接端子2002的第一电连接结构21和第二电连接结构22在衬底基板1上的正投影重合，且第一开口31在衬底基板1上的正投影和第二开口41在衬底基板1上的正投影重合。上述设置，可以方便连接端子进行小型化设计，保证连接端子各层的接触良率。
示例性的，如图2和图5所示，第一电连接结构21和第二电连接结构22在衬底基板1上的正投影位于第三电连接结构23在衬底基板1上的正投影内。即第三电连接结构23完全覆盖第一电连接结构21和第二电连接结构22，这样可以增加连接端子2绑定接触面积，提高绑定良率。
一种具体的实施例中，如图1和图3所示，显示面板还包括设置在第二绝缘层32与触控电极7所在层之间的像素界定层(PDL，Pixel Definition Layer)8。像素界定层8(有机层)仅在显示区12内，不覆盖绑定区11，可以进一步避免绑定区11的绝缘层厚度太大影响绑定，可以大大降低因双SD膜层堆叠复杂性而带来的模组绑定问题。
具体的，如图3所示，衬底基板1的显示区内还设有发光元件4，发光元件4形成在驱动像素电路上，即发光元件4设置在第二绝缘层(平坦层)32远离衬底基板1一侧。发光元件4包括第一电极41、发光层42及第二电极43。发光元件4的第一电极41通过第二绝缘层(平坦层)32中的过孔与第二层源漏电极(搭接电极层)52电连接。像素界定层8设置在第一电极41上，像素界定层8包括多个开口，以限定多个像素单元，多个开口的每个暴露一个第一电极41，发光层42设置在像素界定层8的多个开口中。第二电极43可以设置在部分或整个显示区域中，从而在制备工艺中可以整面形成。
进一步地，如图3所示，在发光元件4上还设有封装层91，该封装层91 包括第一有机层911、无机层912和第二有机层913，该封装层91不覆盖绑定区，即与绑定区没有交叠。具体的，触控电极7设置在封装层91背离衬底基板1的一侧。
进一步地，如图2和图3所示，显示面板还可以包括设置在触控电极7所在层背离衬底基板1一侧的有机保护层(OC，Over Coating)9；如图1和图2所示，有机保护层92设有暴露第一绑定区111的第三开口921以及暴露第二绑定区112的第四开口922。
有机保护层设有避让第一绑定区和第二绑定区的开口，不覆盖第一绑定区和第二绑定区，可以避免因绑定区的绝缘层厚度太大影响绑定，另外，有机保护层仅避让绑定区，将其他区域均覆盖，可以对下层金属走线起到良好的保护作用。
具体的，如图2所示，第二绝缘层32的第一减薄部321在衬底基板1上的正投影位于有机保护层92的第三开口921在衬底基板1上的正投影内；有机保护层92的第四开口922在衬底基板1上的正投影位于第二绝缘层32的第二减薄部322在衬底基板1上的正投影内。即，在第一绑定区(COP区域)处，有机保护层92的开口边界(第四开口922边界)包围第二绝缘层32的减薄区域边缘(第二减薄部322边缘)；在第二绑定区(FOP区域)处，第二绝缘层32的减薄区域边缘(第一减薄部321边缘)包围有机保护层92的开口边界(第三开口921边界)。
当然，实际产品并不限于上述情况，在实际显示面板产品中，FOP区域处，也可以是有机保护层92的开口边界(第三开口921边界)包围第二绝缘层32的减薄区域边缘(第一减薄部321边缘)，在COP区域处，也可以是第二绝缘层32的减薄区域边缘(第二减薄部322边缘)包围有机保护层92的开口边界(第四开口922边界)。
具体的，本公开实施例的显示面板可以为柔性AMOLED显示面板，衬底基板为柔性基底，可以包含双层聚酰亚胺(PI)及位于双层PI中间的无机层；或者，本公开实施例的显示面板也可以为刚性面板，衬底基板为玻璃。
另外，本公开实施例还提供一种显示装置，包括上述任一项的显示面板。
本公开实施例提供的显示装置，具有本公开实施例的显示面板相同的有益效果，此处不在赘述。
显然，本领域的技术人员可以对本公开实施例进行各种改动和变型而不脱离本公开的精神和范围。这样，倘若本公开的这些修改和变型属于本公开权利要求及其等同技术的范围之内，则本公开也意图包含这些改动和变型在内。

Claims (13)

  1. 一种显示面板，包括：
    衬底基板，所述衬底基板具有显示区和位于所述显示区一侧的绑定区，所述绑定区划分为第一绑定区和第二绑定区，所述第一绑定区位于所述显示区与所述第二绑定区之间；
    多个连接端子，位于所述绑定区内，每个连接端子包括在所述衬底基板上依次层叠的第一电连接结构和第二电连接结构；所述多个连接端子包括位于所述第一绑定区内的多个第一连接端子和位于所述第二绑定区内的多个第二连接端子；
    第一绝缘层，设置在所述第一电连接结构所在层和所述第二电连接结构所在层之间，所述第一绝缘层在衬底基板上的正投影与所述第一连接端子在衬底基板上的正投影没有交叠，所述第一绝缘层与所述第二绑定区相交叠、且设有与所述多个第二连接端子对应的多个第一开口，每个所述第一开口在所述衬底基板上的正投影位于对应的所述第二连接端子的所述第一电连接结构在所述衬底基板上的正投影之内；所述第二连接端子的第一电连接结构和第二电连接结构之间通过所述第一开口相连；
    第二绝缘层，设置在所述第二电连接结构所在层背离所述衬底基板的一侧，所述第二绝缘层与所述绑定区相交叠，且设有与所述多个连接端子对应的多个第二开口，每个所述第二开口在所述衬底基板上的正投影位于对应的所述连接端子的所述第二电连接结构在所述衬底基板上的正投影之内。
  2. 如权利要求1所述的显示面板，其中，所述第一绑定区为芯片绑定区，所述第二绑定区为柔性电路板绑定区。
  3. 如权利要求1所述的显示面板，其中，还包括设置于所述第一连接端子与所述第二连接端子之间的第一引线，所述第一引线与所述第二电连接结构同层设置；
    所述第一连接端子的第二电连接结构与所述第二连接端子的第二电连接 结构通过所述第一引线相连。
  4. 如权利要求1至3任一项所述的显示面板，其中，还包括：
    第一层源漏电极，位于所述显示区内，所述第一层源漏电极设置在所述衬底基板和所述第一绝缘层之间；所述第一电连接结构与所述第一层源漏电极同层制备；
    第二层源漏电极，位于所述显示区内，所述第二层源漏电极设置在所述第一绝缘层和所述第二绝缘层之间；所述第二电连接结构与所述第二层源漏电极同层制备；
    所述第一绝缘层为钝化层；所述第二绝缘层为平坦层。
  5. 如权利要求4所述的显示面板，其中，所述第二绝缘层包括与所述第一绑定区交叠的第一减薄部以及与所述第二绑定区交叠的第二减薄部；所述第二绝缘层的第一减薄部的厚度小于包围所述第一减薄部的部分的厚度，所述第二绝缘层的第二减薄部的厚度小于包围所述第二减薄部的部分的厚度。
  6. 如权利要求5所述的显示面板，其中，所述连接端子还包括设置在所述第二绝缘层的第二开口上的第三电连接结构，所述连接端子的第三电连接结构和第二电连接结构之间通过所述第二开口相连；
    所述显示面板还包括触控电极，位于所述显示区内，所述触控电极设置在所述第二绝缘层背离所述衬底基板的一侧；所述第三电连接结构与所述触控电极同层制备。
  7. 如权利要求6所述的显示面板，其中，所述第二绑定区内，所述第二连接端子的第一电连接结构和第二电连接结构在所述衬底基板上的正投影重合，且所述第一开口在所述衬底基板上的正投影和所述第二开口在所述衬底基板上的正投影重合。
  8. 如权利要求6所述的显示面板，其中，所述第一电连接结构和所述第二电连接结构在所述衬底基板上的正投影位于所述第三电连接结构在所述衬底基板上的正投影内。
  9. 如权利要求6所述的显示面板，其中，还包括设置在所述第二绝缘层 与所述触控电极所在层之间的像素界定层，所述像素界定层位于所述显示区内。
  10. 如权利要求6所述的显示面板，其中，还包括设置在所述触控电极所在层背离所述衬底基板一侧的有机保护层；所述有机保护层设有暴露所述第一绑定区的第三开口以及暴露所述第二绑定区的第四开口；
    所述第一减薄部在所述衬底基板上的正投影位于所述第三开口在所述衬底基板上的正投影内；
    所述第四开口在所述衬底基板上的正投影位于所述第二减薄部在所述衬底基板上的正投影内。
  11. 如权利要求4所述的显示面板，其中，还包括设置在所述第一绝缘层和所述第二层源漏电极所在层之间的第三绝缘层，所述第三绝缘层为平坦层，且位于所述显示区内。
  12. 如权利要求4所述的显示面板，其中，所述第一电连接结构和所述第二电连接结构均为钛/铝/钛叠层结构。
  13. 一种显示装置，包括如权利要求1-12任一项所述的显示面板。
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