WO2021039498A1 - Circuit de suppression de sonnerie - Google Patents

Circuit de suppression de sonnerie Download PDF

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Publication number
WO2021039498A1
WO2021039498A1 PCT/JP2020/031113 JP2020031113W WO2021039498A1 WO 2021039498 A1 WO2021039498 A1 WO 2021039498A1 JP 2020031113 W JP2020031113 W JP 2020031113W WO 2021039498 A1 WO2021039498 A1 WO 2021039498A1
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WIPO (PCT)
Prior art keywords
suppression
period
ringing
impedance
control unit
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PCT/JP2020/031113
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English (en)
Japanese (ja)
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修一 中村
岸上　友久
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株式会社デンソー
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Publication of WO2021039498A1 publication Critical patent/WO2021039498A1/fr

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines

Definitions

  • the present disclosure relates to a ringing suppression circuit that suppresses ringing that occurs due to transmission of a differential signal via a pair of communication lines.
  • the impedance between communication buses is set to a constant relatively low impedance (for example, equivalent to 120 ⁇ ) throughout the suppression period in which the suppression operation for suppressing ringing is executed.
  • the magnitude of ringing tends to be greatest immediately after the level of the differential signal changes.
  • the size of ringing changes according to various conditions such as the form of the bus network, the length of the wiring connecting the nodes, and the number of nodes.
  • the conventional ringing suppression circuit could not completely suppress the largest ringing depending on various conditions, and as a result, there was a possibility that the distortion of the waveform did not converge by the sampling timing. Further, with the recent trend of increasing the communication speed such as CAN communication, the time constraint required for ringing suppression has become stricter, and a technique for more effectively suppressing ringing is required.
  • An object of the present disclosure is to provide a ringing suppression circuit capable of suppressing ringing more effectively.
  • the ringing suppression circuit is provided in a node provided with a communication circuit that communicates with another node by transmitting a differential signal via a pair of communication lines, and suppresses the ringing. It is provided with a unit and an operation control unit. By connecting an impedance element between the pair of communication lines, the suppression unit can perform a suppression operation that suppresses ringing that occurs with the transmission of the differential signal.
  • the operation control unit controls the operation of the suppression unit, and when it detects that the signal level of the differential signal has changed recessively, the suppression operation by the suppression unit is started.
  • the operation control unit sets the impedance value of the impedance element to the first set value in the first period including the start time of the suppression operation in the suppression period in which the suppression operation is executed, and in the second period after the first period. Switch so that the second set value is higher than the first set value.
  • the magnitude of ringing generated by the transmission of the differential signal tends to be the largest immediately after the level of the differential signal changes to recessive, in other words, immediately after the suppression operation is started.
  • the impedance value of the impedance element is switched to a relatively low first set value in the first period including the start time of the suppression operation among the suppression periods in which the suppression operation is executed, so that it can be the largest. Sexual ringing is effectively suppressed.
  • the size of ringing gradually decreases. If the impedance value of the impedance element is made too low during the period in which ringing is reduced in this way, the effect of suppressing ringing due to secondary and tertiary reflected waves may be reduced.
  • the impedance value of the impedance element is switched to a relatively high second set value in the second period, ringing in such a second period is also effectively suppressed. As described above, according to the above configuration, an excellent effect that ringing can be suppressed more effectively can be obtained as compared with the conventional configuration.
  • FIG. 1 is a diagram schematically showing a configuration of a communication network according to the first embodiment.
  • FIG. 2 is a diagram schematically showing a configuration of a transceiver including a ringing suppression circuit according to the first embodiment.
  • FIG. 3 is a diagram showing a specific first configuration example of the suppression unit according to the first embodiment.
  • FIG. 4 is a diagram showing a specific second configuration example of the suppression unit according to the first embodiment.
  • FIG. 5 is a timing chart for explaining the suppression operation by the suppression unit according to the first embodiment, and is a diagram schematically showing waveforms of differential voltage and line impedance.
  • FIG. 1 is a diagram schematically showing a configuration of a communication network according to the first embodiment.
  • FIG. 2 is a diagram schematically showing a configuration of a transceiver including a ringing suppression circuit according to the first embodiment.
  • FIG. 3 is a diagram showing a specific first configuration example of the suppression unit according to the first embodiment.
  • FIG. 4 is a diagram
  • FIG. 6 is a diagram showing the result of simulating the operation according to the configuration of the first comparative example.
  • FIG. 7 is a diagram showing the results of simulating the operation of the ringing suppression circuit according to the second comparative example and the first embodiment.
  • FIG. 8 is a diagram schematically showing the configuration of the ringing suppression circuit according to the second embodiment.
  • FIG. 9 is a timing chart for explaining the suppression operation by the suppression unit according to the second embodiment, and is a diagram schematically showing the state of each switch and the waveform of the line impedance.
  • FIG. 10 is a diagram showing the results of simulating the operation of the ringing suppression circuit according to the second comparative example and the second embodiment.
  • FIG. 11 is a diagram schematically showing the configuration of the ringing suppression circuit according to the third embodiment.
  • FIG. 12 is a timing chart for explaining the suppression operation by the suppression unit according to the third embodiment, and is a diagram schematically showing the state of each MOS transistor, the waveform of the gate voltage, and the waveform of the line impedance.
  • FIG. 13 is a diagram schematically showing the configuration of the ringing suppression circuit according to the fourth embodiment.
  • FIG. 14 is a diagram schematically showing the relationship between the voltage and the on-resistance of each part according to the fourth embodiment.
  • FIG. 15 is a timing chart for explaining the suppression operation by the suppression unit according to the fourth embodiment, and is a diagram schematically showing the state of the switch, the state of the OP amplifier, and the waveform of the line impedance.
  • FIG. 12 is a timing chart for explaining the suppression operation by the suppression unit according to the third embodiment, and is a diagram schematically showing the state of each MOS transistor, the waveform of the gate voltage, and the waveform of the line impedance.
  • FIG. 13 is a diagram schematically showing the configuration of the
  • FIG. 16 is a diagram schematically showing a configuration of a transceiver including a ringing suppression circuit according to a fifth embodiment.
  • FIG. 17 is a diagram showing a result of simulating the operation of the ringing suppression circuit according to the fifth embodiment, and is a diagram showing waveforms of differential voltage at the time of transmission of the own node and the time of transmission of another node.
  • the communication network 1 shown in FIG. 1 is a network in which the nodes 2 are connected via a transmission line 3 composed of twisted pair lines for control communication between a plurality of nodes 2 mounted on the vehicle.
  • Each node 2 is an electronic control device that controls an actuator based on sensors for detecting the state of the vehicle and information from the sensors.
  • Each node 2 is provided with a communication circuit (not shown), which converts transmission data and reception data into communication signals according to a communication protocol on the transmission line 3, for example, the CAN protocol, and communicates with other nodes 2. That is, data is transmitted and received.
  • a branch connector 4 for branching the transmission line 3 is appropriately provided in the middle of the transmission line 3, that is, the communication bus.
  • the node 2 described as “T” in the rectangle indicates a node having a terminating resistor outside the node 2.
  • the node 2 represented by a simple rectangular symbol indicates a node having no terminating resistor. In this case, the resistance value of the terminating resistor is, for example, 120 ⁇ .
  • the transceiver 5 shown in FIG. 2 is configured as a semiconductor integrated circuit, that is, an IC, and is provided at the node 2 shown in FIG.
  • the transceiver 5 includes a communication circuit 6 for transmitting and receiving data and a ringing suppression circuit 7.
  • the communication circuit 6 generates a communication signal based on the transmission data TXD given from a control device (not shown) also provided in the node 2, and transmits the communication signal to the transmission line 3. Further, the communication circuit 6 receives the communication signal transmitted via the transmission line 3 and transmits it to the control device as received data RXD.
  • the ringing suppression circuit 7 includes a suppression unit 8 and an operation control unit 9.
  • the suppression unit 8 performs a suppression operation of suppressing ringing that occurs with the transmission of the differential signal by lowering the impedance of the transmission line 3 including the high potential side signal line 3P and the low potential side signal line 3N.
  • the high-potential side signal line 3P and the low-potential side signal line 3N correspond to a pair of communication lines, and may be abbreviated as simply the signal line 3P and the signal line 3N below.
  • the signal of the signal line 3P is referred to as CAN_H
  • the signal of the signal line 3N is referred to as CAN_L.
  • the suppression unit 8 includes a switch 10 and an impedance element 11.
  • the switch 10 and the impedance element 11 are connected in series between the signal lines 3P and 3N.
  • the switch 10 is controlled by the operation control unit 9, and is turned on when the suppression operation is executed and turned off when the suppression operation is not executed.
  • the switch 10 is turned on, the impedance element 11 is connected between the signal lines 3P and 3N, and the impedance between the signal lines 3P and 3N is lowered. In this way, the suppression unit 8 can perform a suppression operation for suppressing ringing by connecting the impedance element 11 between the signal lines 3P and 3N.
  • the impedance element 11 has a configuration in which the impedance value can be switched.
  • the switching of the impedance value is controlled by the operation control unit 9.
  • the impedance between the signal lines 3P and 3N that is, the line impedance
  • the impedance between the signal lines 3P and 3N is a very high value of, for example, about 100 k ⁇ when the switch 10 is off, that is, during the period when the suppression operation is not executed.
  • it is on that is, during the suppression period during which the suppression operation is executed, it is set to a low value in the range of, for example, about 30 ⁇ to about 120 ⁇ .
  • the impedance value of the impedance element 11 is set to, for example, about 30 ⁇ at the start of the suppression period, and then switched so as to continuously increase.
  • the impedance value of the impedance element 11 is, for example, about 120 ⁇ at the end of the suppression period.
  • the impedance value of the impedance element 11 becomes the first set value in the first period, which is the period including the start time of the suppression period, and the first set value in the second period, which is a period after the first period. It can be switched to a higher second setting value.
  • the operation control unit 9 controls the operation of the suppression unit 8, and includes a change detection unit 12 and a switching control unit 13.
  • the change detection unit 12 detects a change in the signal level of the differential signal based on the potential between the signal lines 3P and 3N, and outputs a detection signal Sa representing the detection result to the switching control unit 13.
  • the switching control unit 13 controls the on / off of the switch 10 of the suppression unit 8 and outputs a control signal Sb for controlling the switching of the impedance value of the impedance element 11 of the suppression unit 8 to the suppression unit 8.
  • the operation control unit 9 When the operation control unit 9 having the above configuration detects that the signal level of the differential signal has changed to a level representing the recessive signal, the operation control unit 9 turns on the switch 10 of the suppression unit 8. That is, when the operation control unit 9 detects that the signal level of the differential signal has changed to a level representing the recessive, the impedance element 11 is connected between the signal lines 3P and 3N to start the suppression operation by the suppression unit 8. .. Further, the motion control unit 9 switches the impedance value of the impedance element 11 as described above during the suppression period in which the suppression operation is executed.
  • the suppression unit 8 of the first configuration example includes an N-channel type MOS transistor Q1 and a resistance element R1.
  • the drain of the MOS transistor Q1 is connected to the signal line 3P via the resistance element R1, and its source is connected to the signal line 3N.
  • the MOS transistor Q1 is connected between the signal lines 3P and 3N via the resistance element R1.
  • the connection positions of the MOS transistor Q1 and the resistance element R1 can be exchanged.
  • a control signal Sb output from the switching control unit 13 is given to the gate of the MOS transistor Q1. Therefore, the drive of the MOS transistor Q1 is controlled by the switching control unit 13 of the operation control unit 9 that outputs the control signal Sb.
  • the suppression unit 8 performs a suppression operation by driving the MOS transistor Q1 on.
  • the switching operation by the MOS transistor Q1 functions as the switch 10. Further, in the first configuration example, the on-resistance of the MOS transistor Q1 and the resistance element R1 function as the impedance element 11. That is, in this case, the impedance element 11 includes the on-resistance of the MOS transistor Q1.
  • the on-resistance of the MOS transistor Q1 changes according to its gate voltage. In the above configuration, the gate voltage of the MOS transistor Q1 can be controlled by changing the voltage level of the control signal Sb.
  • the switching control unit 13 of the operation control unit 9 switches the impedance value of the impedance element 11 by controlling the gate voltage of the MOS transistor Q1 by the control signal Sb.
  • the MOS transistor Q1 and the resistance element R1 those having an on-resistance and a resistance value capable of switching the impedance value of the impedance element 11 within the range as described above are used.
  • the suppression unit 8 of the second configuration example differs from the suppression unit 8 of the first configuration example shown in FIG. 3 in that the resistance element R1 is omitted.
  • the drain of the MOS transistor Q1 is connected to the signal line 3P, and its source is connected to the signal line 3N. That is, the MOS transistor Q1 is connected between the signal lines 3P and 3N.
  • the suppression unit 8 is configured to perform the suppression operation by driving the MOS transistor Q1 on.
  • the on-resistance of the MOS transistor Q1 functions as the impedance element 11. That is, also in this case, the impedance element 11 includes the on-resistance of the MOS transistor Q1.
  • the MOS transistor Q1 a transistor having an on-resistance capable of switching the impedance value of the impedance element 11 within the range as described above is used.
  • the impedance element 11 is configured by the on-resistance of the MOS transistor Q1 and the resistance element R1.
  • a resistance element has a higher accuracy of resistance value than the on-resistance of a MOS transistor, and can have good various characteristics such as temperature characteristics.
  • the impedance value of the impedance element 11 can be easily adjusted as compared with the second configuration example in which the impedance element 11 is configured only by the on-resistance of the MOS transistor Q1. ..
  • the suppression unit 8 can be configured only by the MOS transistor Q1. It can be simplified. Therefore, according to the second configuration example, there is an advantage that the circuit area of the ringing suppression circuit 7 can be suppressed to be smaller than that of the first configuration example.
  • the transmission line 3 transmits high-level and low-level binary signals as differential signals.
  • the signal lines 3P and 3N are all set to 2.5V, which is an intermediate potential in the non-drive state, the differential voltage is 0V, and the differential signal has a low level representing recessive.
  • the transmission circuit (not shown) of the communication circuit 6 drives the transmission line 3
  • the signal line 3P is driven to, for example, 3.5 V or more
  • the signal line 3N is driven to, for example, 1.5 V or less
  • the differential voltage is 2 V or more.
  • the differential signal becomes a high level representing the dominant.
  • both ends of the signal lines 3P and 3N are terminated by a terminating resistor of 120 ⁇ .
  • the transmission line 3 when the signal level of the differential signal changes from a high level to a low level, the transmission line 3 is in a non-drive state and the impedance of the transmission line 3 becomes high. Ringing occurs in the differential signal waveform.
  • the period in which the differential signal represents the dominant is referred to as Ta
  • the period in which the differential signal represents the recessive is referred to as Tb.
  • the ideal waveform of the differential signal is shown by a alternate long and short dash line.
  • an suppression operation for suppressing such ringing is performed as follows. That is, the change detection unit 12 detects that the signal level of the differential signal has changed to a level representing the recessive at the time t1 when the signal level of the differential signal changes from the high level to the low level. Then, the switching control unit 13 turns on the switch 10, and the suppression operation by the suppression unit 8 is started by this. Then, at the time t1 when the suppression operation is started, the line impedance changes from 100 k ⁇ to 30 ⁇ .
  • the switching control unit 13 keeps the switch 10 on, that is, the suppression operation until the time point t2.
  • the period Tc from the time points t1 to t2 corresponds to the suppression period in which the suppression operation is performed.
  • the switching control unit 13 gradually lowers the voltage level of the control signal Sb, that is, the gate voltage of the MOS transistor Q1 from the time point t1 at the start time of the suppression period to the time point t2 at the end time. There is. As a result, the line impedance gradually increases from the time point t1 to the time point t2, and becomes 120 ⁇ at the time point t2.
  • the switching control unit 13 turns off the switch 10 at the time point t2, whereby the suppression operation by the suppression unit 8 is stopped. Then, at the time t2 when the suppression operation is stopped, the line impedance changes from 120 ⁇ to 100k ⁇ .
  • the magnitude of ringing that occurs with the transmission of the differential signal tends to be greatest immediately after the level of the differential signal changes recessively, in other words, immediately after the suppression operation by the suppression unit 8 is started.
  • the impedance value of the impedance element 11 is about 30 ⁇ , which is the lowest at the start time t1 of the suppression period Tc in which the suppression operation is executed, and is then switched to gradually increase. Therefore, according to the present embodiment, ringing immediately after the recessive transition, which may be the largest, can be effectively suppressed by lowering the line impedance.
  • the magnitude of ringing gradually decreases after the level of the differential signal changes recessively. If the line impedance is made too low during the period in which ringing is reduced in this way, the effect of suppressing ringing due to secondary and tertiary reflected waves may be reduced.
  • the impedance value of the impedance element 11 is switched so as to gradually increase with the passage of time during the suppression period Tc. Therefore, according to the above configuration, even such gradually decreasing ringing can be effectively suppressed by not making the line impedance too low.
  • an excellent effect that ringing can be suppressed more effectively can be obtained as compared with the conventional configuration.
  • the above-mentioned effect obtained by the present embodiment is the first comparative example in which the ringing suppression circuit is not provided, and the suppression operation in which the line impedance is set to a constant low impedance (for example, about 120 ⁇ ) throughout the suppression period.
  • a constant low impedance for example, about 120 ⁇
  • the largest ringing that occurs immediately after the level of the differential signal changes to a level representing the recessive is not sufficiently suppressed as compared with the present embodiment described later, and as a result, the ringing converges.
  • the time until is longer than that of the present embodiment described later. Therefore, according to the second comparative example, there is a possibility that the distortion of the waveform does not converge by the sampling timing.
  • the largest ringing that occurs immediately after the level of the differential signal changes to the level representing the recessive is effectively suppressed so as to be smaller than that in the second comparative example. ing.
  • the line impedance is switched so as to gradually increase with the passage of time during the suppression period Tc, and becomes 120 ⁇ corresponding to the characteristic impedance of the transmission line 3 at the end of the suppression period Tc. Therefore, in the present embodiment, ringing due to secondary and tertiary reflected waves generated in the latter half of the suppression period Tc is effectively suppressed by impedance matching.
  • the time until the ringing converges is shorter than that in the second comparative example, and the possibility that the waveform distortion does not converge by the sampling timing is suppressed. be able to.
  • the impedance value of the impedance element 11 can be continuously switched during the suppression period Tc. Therefore, the differential voltage does not change sharply with the switching of the impedance value, in other words, there is no step in the waveform of the differential voltage. Therefore, according to the present embodiment, another problem such as an increase in radiation noise due to switching the impedance value does not occur.
  • the second embodiment will be described with reference to FIGS. 8 to 10.
  • the ringing suppression circuit 21 of the present embodiment is provided with the suppression unit 22 instead of the suppression unit 8 with respect to the ringing suppression circuit 7 of the first embodiment, instead of the operation control unit 9.
  • the difference is that the operation control unit 23 is provided.
  • the suppression unit 22 includes switches 24 and 25 and resistance elements 26 and 27.
  • the switch 24 and the resistance element 26 are connected in series, and the series circuit thereof is connected between the communication lines 3P and 3N.
  • the switch 25 and the resistance element 27 are connected in series, and the series circuit thereof is connected between the communication lines 3P and 3N.
  • the suppression unit 22 has a configuration including two series circuits of a resistance element and a switch connected between the communication lines 3P and 3N.
  • the suppression unit 22 may be configured to include three or more series circuits of resistance elements and switches connected between the communication lines 3P and 3N.
  • the operation control unit 23 is different from the operation control unit 9 in that it includes a switching control unit 28 instead of the switching control unit 13.
  • the switches 24 and 25 of the suppression unit 22 are controlled by the switching control unit 28 of the operation control unit 23, and at least one of them is turned on when the suppression operation is executed, and both are turned on when the suppression operation is not executed. It is turned off.
  • at least one of the switches 24 and 25 is turned on, at least one of the resistance elements 26 and 27 is connected between the signal lines 3P and 3N, and the line impedance is lowered.
  • the resistance elements 26 and 27 function as the impedance elements 29. That is, in this case, the impedance element 29 includes the resistance elements 26 and 27.
  • the resistance value of the resistance element 26 is about 120 ⁇ .
  • the resistance value of the resistance element 27 is a value (for example, about 4 ⁇ ) such that the parallel combined resistance value of the resistance elements 26 and 27 is about 30 ⁇ .
  • the switching control unit 28 of the operation control unit 23 outputs a control signal Sc for individually turning on / off the switches 24 and 25 of the suppression unit 22 to the suppression unit 22.
  • the operation control unit 23 detects that the signal level of the differential signal has changed to a level indicating impedance, it turns on both of the two switches 24 and 25 of the suppression unit 22 and between the signal lines 3P and 3N.
  • the suppression operation by the suppression unit 22 is started.
  • the operation control unit 23 switches the impedance value of the impedance element 29 as follows during the suppression period for executing the suppression operation. That is, the operation control unit 23 changes the impedance value of the impedance element 29 stepwise by turning off the turned-on switches 24 and 25 stepwise during the suppression period. Specifically, the motion control unit 23 keeps both the switches 24 and 25 turned on in the first period, which is the first half period including the start time of the suppression period.
  • the impedance value of the impedance element 29 becomes about 30 ⁇ , which corresponds to the first set value.
  • the operation control unit 23 turns off the switch 25 in the period after the first period, that is, in the latter half of the suppression period.
  • the impedance value of the impedance element 29 becomes about 120 ⁇ , which corresponds to the second set value higher than the first set value. In this way, the operation control unit 23 switches the impedance value of the impedance element 29 step by step.
  • the suppression operation is performed as follows. That is, as shown in FIG. 9, at the time t11 when the change detection unit 12 detects that the signal level of the differential signal has changed to a level representing the recessive, the switching control unit 28 turns on the switches 24 and 25. As a result, the suppression operation by the suppression unit 22 is started. Then, at the time t11 when the suppression operation is started, the line impedance changes from 100 k ⁇ to 30 ⁇ .
  • the switching control unit 28 continues the state in which the switch 24 is turned on until the time point t13.
  • the period Tc from the time points t11 to t13 corresponds to the suppression period in which the suppression operation is performed.
  • the switching control unit 28 maintains the switches 24 and 25 turned on during the first half period including the time point t11, which is the start time of the suppression period, that is, the first period T1 which is the period from the time points t11 to t12.
  • the line impedance is kept constant at 30 ⁇ .
  • the switching control unit 28 turns off the switch 25 at the time point t12. As a result, at time point t12, the line impedance changes from 30 ⁇ to 120 ⁇ .
  • the switching control unit 28 keeps the switch 24 on and the switch 25 off during the latter half of the suppression period Tc, that is, the second period T2 which is the period from the time points t12 to t13. As a result, in the second period T2, which is the latter half of the suppression period Tc, the line impedance is kept constant at 120 ⁇ .
  • the switching control unit 28 turns off the switch 25, whereby the suppression operation by the suppression unit 22 is stopped. Then, at the time t13 when the suppression operation is stopped, the line impedance changes from 120 ⁇ to 100k ⁇ .
  • the impedance value of the impedance element 29 is about 30 ⁇ in the first period T1 including the start time t11 of the suppression period Tc, and is the second after the first period T1. In T2 for 2 periods, it is switched so as to be about 120 ⁇ . Therefore, the present embodiment also has the same effect as that of the first embodiment, that is, an excellent effect that ringing can be suppressed more effectively as compared with the conventional configuration.
  • the second comparative example and the present embodiment will be referred to with reference to FIG. 10 showing the waveform of the differential voltage corresponding to the simulation result of the circuit operation in each of the second comparative example and the present embodiment described in the first embodiment.
  • the effect obtained by this embodiment will be described while comparing with.
  • the waveform of the differential voltage corresponding to the second comparative example is shown by a thin solid line
  • the waveform of the differential voltage corresponding to the present embodiment is shown by a thick solid line.
  • the largest ringing that occurs immediately after the level of the differential signal changes to the level representing the recessive is effectively reduced as compared with the second comparative example. It is suppressed.
  • the line impedance is set to 120 ⁇ , which corresponds to the characteristic impedance of the transmission line 3 in the second period T2, which is the latter half of the suppression period Tc. Therefore, in the present embodiment, ringing due to secondary and tertiary reflected waves generated in the latter half of the suppression period Tc is effectively suppressed by impedance matching.
  • the time until the ringing converges is shorter than that in the second comparative example, and the possibility that the waveform distortion does not converge by the sampling timing is suppressed. be able to.
  • the impedance value of the impedance element 29 can be switched stepwise during the suppression period Tc. Therefore, the differential voltage may change sharply with the switching of the impedance value, in other words, a step may be formed in the waveform of the differential voltage.
  • the present embodiment there is a possibility that a problem that does not occur in the first embodiment, that is, a problem that radiation noise increases as the impedance value is switched may occur.
  • the ringing suppression circuit 31 of the present embodiment is different from the ringing suppression circuit 7 of the first embodiment in that it includes an operation control unit 32 instead of the operation control unit 9.
  • the first configuration example shown in FIG. 3 is adopted as the suppression unit 8.
  • the operation control unit 32 is different from the operation control unit 9 in that the switching control unit 33 is provided in place of the switching control unit 13.
  • the switching control unit 33 includes a buffer 34, a resistor R31, a capacitor C31, a P-channel type MOS transistor Q31, and an N-channel type MOS transistor Q32.
  • a constant voltage Vref is input to the input terminal of the buffer 34.
  • the voltage Vref is a voltage higher than the gate threshold voltage of the MOS transistor Q1.
  • the output terminal of the buffer 34 is connected to the gate of the MOS transistor Q1 via the resistor R31 and is connected to the ground to which the reference potential of the circuit is given via the capacitor C31.
  • the source of the MOS transistor Q31 is connected to the power supply line L31 to which the power supply voltage VDD is supplied, and the drain thereof is connected to the gate of the MOS transistor Q1.
  • the power supply voltage VDD is higher than the voltage Vref.
  • the source of the MOS transistor Q32 is connected to the ground, and its drain is connected to the gate of the MOS transistor Q1.
  • Drive signals SWP and SWN are given to the gates of the MOS transistors Q31 and Q32, respectively.
  • the MOS transistor Q31 is turned off when the drive signal SWP is high level and turned on when the drive signal SWP is low level.
  • the MOS transistor Q32 is turned on when the drive signal SWN is at a high level and turned off when the drive signal SWN is at a low level.
  • the generation of drive signals SWP and SWN, and the control of driving the MOS transistors Q31 and Q32, etc., are performed by a control circuit (not shown) provided in the switching control unit 33.
  • the MOS transistor Q1 and the resistance element R1 those having an on-resistance and a resistance value that can satisfy the following conditions are used.
  • the first condition is that the impedance value of the impedance element 11 during the period when the voltage Vref is applied to the gate of the MOS transistor Q1 is about 120 ⁇ .
  • the second condition is that the impedance value of the impedance element 11 during the period when the power supply voltage VDD is applied to the gate of the MOS transistor Q1 is about 30 ⁇ .
  • the suppression operation is performed as follows. That is, as shown in FIG. 12, in the period before the time point t31 or the period after the time point t33, the MOS transistor Q31 is turned off and the MOS transistor Q32 is turned on, so that the MOS transistor Q1 is turned off and the suppression operation is performed. I can't.
  • the MOS transistor Q31 is turned on and the MOS transistor Q32 is turned off, which is caused by the suppression unit 8.
  • the suppression operation is started. This suppression operation is continued until the time point t33. Therefore, in this case, the period from the time points t31 to t33 corresponds to the suppression period Tc.
  • the gate voltage of the MOS transistor Q31 becomes the power supply voltage VDD, so that the line impedance changes from 100 k ⁇ to 30 ⁇ .
  • the state in which the MOS transistor Q31 is turned on continues until the time point t32. Therefore, during the period from time point t31 to t32, the gate voltage of the MOS transistor Q1 is maintained at the power supply voltage VDD, and the line impedance becomes constant at 30 ⁇ . At time point t32, the MOS transistor Q31 turns off. As a result, the gate voltage of the MOS transistor Q1 drops from the power supply voltage VDD toward the voltage Vref. The slope of the decrease in the gate voltage at this time is the slope according to the time constant due to the resistor R31 and the capacitor C31. As the gate voltage of the MOS transistor Q1 decreases with a predetermined slope in this way, the line impedance rises from 30 ⁇ with the same slope, and eventually becomes constant at 120 ⁇ .
  • the energy of the waveform distortion generated during the falling period when the signal level of the differential signal changes from the high level to the low level is consumed by the impedance element 11, and ringing is suppressed.
  • the MOS transistor Q32 is turned on, so that the suppression operation by the suppression unit 8 is stopped.
  • the line impedance changes from 120 ⁇ to 100k ⁇ .
  • the impedance value of the impedance element 11 is the start time of the suppression period Tc in which the suppression operation is executed, as in the ringing suppression circuit 7 of the first embodiment. It is continuously switched so that it becomes the lowest about 30 ⁇ at the time point t31 and about 120 ⁇ at the time point t33 at the end point, that is, the impedance value gradually increases. Therefore, the same effect as that of the first embodiment can be obtained by this embodiment as well.
  • the fourth embodiment will be described with reference to FIGS. 13 to 15.
  • the ringing suppression circuit 41 of the present embodiment includes a suppression unit 42 instead of the suppression unit 8 with respect to the ringing suppression circuit 7 of the first embodiment, instead of the operation control unit 9.
  • the difference is that the operation control unit 43 is provided.
  • the suppression unit 42 includes a switch 44, a resistance element 45, an N-channel type MOS transistor Q41, and an OP amplifier 46.
  • the switch 44 and the resistance element 45 are connected in series, and the series circuit thereof is connected between the communication lines 3P and 3N.
  • the switch 44 is controlled by the operation control unit 43, and is turned on when the suppression operation is executed and turned off when the suppression operation is not executed.
  • the drain of the MOS transistor Q41 is connected to the communication line 3P, and its source is connected to the communication line 3N.
  • the output voltage Vout of the OP amplifier 46 is given to the gate of the MOS transistor Q41.
  • the OP amplifier 46 is provided with an enable terminal, and has a configuration capable of switching between an operating state and a non-operating state according to the signal ENB input to the enable terminal.
  • the OP amplifier 46 goes into an operating state when the signal ENB is at a high level, and goes into a non-operating state when the signal ENB is at a low level.
  • the non-inverting input terminal of the OP amplifier 46 is connected to the communication line 3P, and the inverting input terminal is connected to the communication line 3N. That is, the differential voltage Vdiff between the communication lines 3P and 3N is input to the OP amplifier 44.
  • the relationship between the output voltage Vout of the OP amplifier 46 and the differential voltage Vdiff, and the relationship between the on-resistance RON of the MOS transistor Q41 and the differential voltage Vdiff are as shown in FIG. That is, the output voltage Vout of the OP amplifier 46 and the differential voltage Vdiff are in a proportional relationship. Further, the on-resistance RON and the differential voltage Vdiff have an inversely proportional relationship.
  • the gate threshold voltage of the MOS transistor Q41 is shown as a voltage Vt.
  • the operation control unit 43 is different from the operation control unit 9 in that it includes a switching control unit 47 instead of the switching control unit 13.
  • the switching control unit 47 controls the on / off of the switch 44 as described above. Further, the switching control unit 47 has a function of generating a signal ENB. Therefore, the operating state of the OP amplifier 46 is controlled by the switching control unit 47.
  • the switch 44 when the switch 44 is turned on, the resistance element 45 is connected between the signal lines 3P and 3N, and the line impedance is lowered.
  • the MOS transistor Q41 is driven on according to the differential voltage Vdiff, and the line impedance is lowered.
  • the on-resistance of the resistance element 45 and the MOS transistor Q41 functions as the impedance element 48.
  • the resistance value of the resistance element 45 is about 120 ⁇ .
  • the MOS transistor Q41 has a characteristic that the parallel combined resistance value of the resistance element 45 and the on-resistance of the MOS transistor Q41 is about 30 ⁇ in the so-called full-on state. In other words, the MOS transistor Q41 is used in which the minimum value of its on-resistance is, for example, about 4 ⁇ .
  • the suppression operation is performed as follows. That is, as shown in FIG. 15, at the time t41 when the change detection unit 12 detects that the signal level of the differential signal has changed to a level representing the recessive, the switching control unit 47 turns on the switch 44 and OPs. The amplifier 46 is switched to the operating state, and the suppression operation by the suppression unit 42 is started by this. Then, at the time t41 when the suppression operation is started, the line impedance changes from 100 k ⁇ to 30 ⁇ .
  • the switching control unit 47 continues the state in which the switch 44 is turned on until the time point t43.
  • the period Tc from the time point t41 to t43 corresponds to the suppression period in which the suppression operation is performed.
  • the switching control unit 47 maintains the OP amplifier 46 in the operating state in the first half period including the time point t41, which is the start time of the suppression period Tc, that is, in the first period T1 which is the period from the time points t41 to t42.
  • the line impedance changes between 30 ⁇ and 120 ⁇ .
  • the line impedance in the first period T1 changes from 30 ⁇ to 120 ⁇ with a predetermined inclination. This is because the change in the on-resistance RON of the MOS transistor Q41 does not follow the change in the differential voltage Vdiff according to the ringing due to the responsiveness of the OP amplifier 46 and the like.
  • the switching control unit 47 switches the OP amplifier 46 to the non-operating state at the time point t42. As a result, at the time point t42, the line impedance becomes 120 ⁇ .
  • the switching control unit 47 switches the OP amplifier 46 to the non-operating state and maintains the switch 44 on during the latter half of the suppression period Tc, that is, the second period T2 which is the period from the time points t42 to t43. As a result, in the second period T2, which is the latter half of the suppression period Tc, the line impedance is kept constant at 120 ⁇ .
  • the switching control unit 47 turns off the switch 44 at the time point t43, whereby the suppression operation by the suppression unit 42 is stopped. Then, at the time t43 when the suppression operation is stopped, the line impedance changes from 120 ⁇ to 100k ⁇ .
  • the impedance value of the impedance element 48 is set to t41 at the start of the suppression period Tc in which the suppression operation is executed, as in the ringing suppression circuit 7 of the first embodiment. Is continuously switched so as to be about 30 ⁇ , which is the lowest, and about 120 ⁇ at the end point t43, that is, so that the impedance value gradually increases. Therefore, the same effect as that of the first embodiment can be obtained by this embodiment as well.
  • the ringing suppression circuit 41 of the present embodiment has a configuration in which the on-resistance of the MOS transistor Q41 short-circuiting between the communication lines 3P and 3N decreases as the differential voltage Vdiff increases, that is, the line impedance decreases. .. Therefore, according to the ringing suppression circuit 41 of the present embodiment, when the ringing becomes severe, for example, immediately after the level of the differential signal changes to recessive, the line impedance can be effectively suppressed by lowering the line impedance. it can.
  • the ringing suppression circuit 52 included in the transceiver 51 of the present embodiment includes an operation control unit 53 instead of the operation control unit 9 with respect to the ringing suppression circuit 7 of the first embodiment. Is different.
  • the operation control unit 53 is different from the operation control unit 9 in that a determination unit 54 is added and a switching control unit 55 is provided in place of the switching control unit 13.
  • the determination unit 54 determines whether or not the own node 2 is executing the transmission operation. Specifically, the determination unit 54 determines whether or not the communication circuit 6 is executing the transmission operation based on the signal Sd given from the communication circuit 6 of the node 2 in which the transceiver 51 is provided.
  • the signal Sd can be generated by monitoring the transmission data TXD or the like.
  • the determination unit 54 gives a signal Se representing the result of such determination to the switching control unit 55.
  • the switching control unit 55 can switch the impedance value of the impedance element 11 in the same manner as the switching control unit 13. Further, the switching control unit 55 can fix the impedance value of the impedance element 11 to a constant value (for example, about 120 ⁇ ). When the determination unit 54 determines that the own node 2 is executing the transmission operation, the switching control unit 55 switches the impedance value of the impedance element 11 in the same manner as the switching control unit 13.
  • the switching control unit 55 sets the impedance value of the impedance element 11 to the first period including the start time of the suppression period. Then, it is switched so that it becomes the first set value (for example, about 30 ⁇ ) and becomes the second set value (for example, about 120 ⁇ ) in the second period after the first period. Further, when the determination unit 54 determines that the own node 2 is not executing the transmission operation, the switching control unit 55 fixes the impedance value of the impedance element 11 to the above-mentioned second set value throughout the suppression period.
  • the following effects can be obtained.
  • ringing is compared with the case where the own node 2 is not performing the transmission operation, that is, when the other node 2 is executing the transmission operation. Tends to increase. Therefore, in the present embodiment, when the own node 2 is executing the transmission operation, the same suppression operation as in the first embodiment is executed to effectively suppress the ringing that becomes relatively large.
  • the suppression operation similar to that in the second comparative example in which the line impedance is 120 ⁇ throughout the suppression period is executed to be relatively small. Effectively suppresses ringing.
  • the suppression operation is appropriately switched according to the magnitude of the ringing that occurs, the ringing can be suppressed more effectively.
  • the suppression unit is not limited to the one illustrated in each of the above embodiments, and by connecting an impedance element between a pair of communication lines, a suppression operation that suppresses ringing that occurs due to transmission of a differential signal can be performed. Any configuration can be used, and the specific configuration can be changed as appropriate.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)

Abstract

Circuit de suppression de sonnerie fourni à un nœud (2) équipé d'un circuit de communication (6) qui communique avec un autre nœud par transmission d'un signal différentiel à travers une paire de lignes de communication (3P, 3N). Le circuit de suppression de sonnerie comprend : une unité de suppression (8, 22, 42) dans laquelle un élément d'impédance (11, 29, 48) est connecté entre la paire de lignes de communication, ce qui permet à l'unité de suppression (8, 22, 42) d'effectuer une opération de suppression de suppression de sonnerie produite lorsque le signal différentiel est transmis ; et une unité de commande de fonctionnement (9, 23, 32, 43, 53) pour commander le fonctionnement de l'unité de suppression, l'unité de commande de fonctionnement démarrant l'opération de suppression effectuée par l'unité de suppression une fois qu'il a été détecté que le niveau de signal du signal différentiel est devenu récessif. L'unité de commande de fonctionnement commute la valeur d'impédance de l'élément d'impédance à une première valeur définie pendant une première période, qui comprend le temps de début de l'opération de suppression parmi une période de suppression dans laquelle l'opération de suppression est effectuée, et à une seconde valeur définie supérieure à la première valeur définie pendant une seconde période, qui suit la première période.
PCT/JP2020/031113 2019-08-26 2020-08-18 Circuit de suppression de sonnerie WO2021039498A1 (fr)

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JP2019153722A JP2021034909A (ja) 2019-08-26 2019-08-26 リンギング抑制回路
JP2019-153722 2019-08-26

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000353945A (ja) * 1999-04-08 2000-12-19 Mitsubishi Electric Corp デジタル信号出力回路
JP2009296568A (ja) * 2008-05-08 2009-12-17 Nippon Soken Inc 信号伝送回路
JP2012257205A (ja) * 2011-05-16 2012-12-27 Nippon Soken Inc リンギング抑制回路
JP2016034080A (ja) * 2014-07-31 2016-03-10 株式会社日本自動車部品総合研究所 信号伝送回路
JP2016123054A (ja) * 2014-12-25 2016-07-07 国立大学法人京都工芸繊維大学 通信システム、通信装置及び通信方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000353945A (ja) * 1999-04-08 2000-12-19 Mitsubishi Electric Corp デジタル信号出力回路
JP2009296568A (ja) * 2008-05-08 2009-12-17 Nippon Soken Inc 信号伝送回路
JP2012257205A (ja) * 2011-05-16 2012-12-27 Nippon Soken Inc リンギング抑制回路
JP2016034080A (ja) * 2014-07-31 2016-03-10 株式会社日本自動車部品総合研究所 信号伝送回路
JP2016123054A (ja) * 2014-12-25 2016-07-07 国立大学法人京都工芸繊維大学 通信システム、通信装置及び通信方法

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