WO2020216128A1 - 像素驱动电路、像素驱动方法和显示装置 - Google Patents

像素驱动电路、像素驱动方法和显示装置 Download PDF

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Publication number
WO2020216128A1
WO2020216128A1 PCT/CN2020/085172 CN2020085172W WO2020216128A1 WO 2020216128 A1 WO2020216128 A1 WO 2020216128A1 CN 2020085172 W CN2020085172 W CN 2020085172W WO 2020216128 A1 WO2020216128 A1 WO 2020216128A1
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Prior art keywords
control
circuit
terminal
voltage
light
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PCT/CN2020/085172
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English (en)
French (fr)
Inventor
杨盛际
陈小川
王辉
卢鹏程
黄冠达
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京东方科技集团股份有限公司
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Priority to US17/059,922 priority Critical patent/US11328656B2/en
Publication of WO2020216128A1 publication Critical patent/WO2020216128A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2230/00—Details of flat display driving waveforms
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0852—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor being a dynamic memory with more than one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0262—The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/027—Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0278—Details of driving circuits arranged to drive both scan and data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G09G2310/061—Details of flat display driving waveforms for resetting or blanking
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G09G2310/067—Special waveforms for scanning, where no circuit details of the gate driver are given

Definitions

  • the present disclosure relates to the field of display technology, and in particular to a pixel driving circuit, a pixel driving method, and a display device.
  • micro LEDs Compared with organic light-emitting diodes (OLED), micro LEDs have higher efficiency, lower power consumption, and higher reliability, and may become new display products in the future.
  • Micro LEDs in related technologies are mostly formed on a substrate with a drive circuit using transfer technology, and the drive circuit drives the Micro LED to achieve light emission and display.
  • the efficiency of Micro LED at low current density will decrease as the current density decreases. If the current density is used to modulate the gray scale, the low gray scale will correspond to the low current density, and its efficiency will be reduced. Moreover, as the current density changes, the color coordinates of the Micro LED will change, that is to say, the color shift of the Micro LED display will occur when the gray scale changes.
  • the present disclosure provides a pixel driving circuit for driving a light-emitting element.
  • the pixel driving circuit includes a driving circuit and a light-emitting duration control circuit, wherein,
  • the first terminal of the drive circuit is connected to a first voltage terminal, and the second terminal of the drive circuit is connected to the light emitting element through the light-emitting duration control circuit.
  • the drive circuit is used to control the voltage of its control terminal, Controlling the communication between the first end and the second end;
  • the light-emitting duration control circuit is used to control the control data voltage input from the control data line and the control start voltage terminal input under the control of the first reset signal input from the first reset terminal and the control scan signal input from the control scan line
  • the initial voltage turns on or disconnects the connection between the second end of the driving circuit and the light-emitting element to control the light-emitting duration of the light-emitting element.
  • the light-emitting duration control circuit includes a drive control sub-circuit, a drive control reset sub-circuit, and a conduction control sub-circuit, wherein:
  • the first end of the drive control sub-circuit is connected to the second end of the drive circuit, and the second end of the drive control sub-circuit is connected to the light emitting element;
  • the drive control reset sub-circuit is used to control the writing of the control start voltage to the control end of the drive control sub-circuit under the control of the first reset signal input from the first reset end, so that the drive control sub-circuit Under the control of the voltage of its control terminal, disconnect the connection between the second terminal of the drive circuit and the light-emitting element;
  • the conduction control sub-circuit is used to control the charging of the control terminal of the drive control sub-circuit through the control data voltage under the control of the control scan signal, so that the drive control sub-circuit is at its control terminal. Under the control of the voltage, the communication between the second end of the driving circuit and the light-emitting element is controlled.
  • the conduction control sub-circuit includes a first conduction control transistor, a second conduction control transistor, and a conduction control capacitor;
  • the control electrode of the first conduction control transistor is connected to the control terminal of the drive control sub-circuit, the first electrode of the first conduction control transistor is connected to the first electrode of the second conduction control transistor, The second pole of the first conduction control transistor is connected to the control data line;
  • the control electrode of the second conduction control transistor is connected to the control scan line, and the second electrode of the second conduction control transistor is connected to the control terminal of the drive control sub-circuit;
  • the first end of the conduction control capacitor is connected to the control end of the drive control sub-circuit, and the second end of the conduction control capacitor is connected to the second voltage end.
  • the drive control reset sub-circuit includes a drive control reset transistor
  • the control electrode of the drive control reset transistor is connected to the first reset terminal, the first electrode of the drive control reset transistor is connected to the control terminal of the drive control sub-circuit, and the second electrode of the drive control reset transistor is connected Connected to the control starting voltage terminal; the control starting voltage terminal is used to input the control starting voltage.
  • the drive control sub-circuit includes a drive control transistor
  • the control terminal of the drive control transistor is the control terminal of the drive control sub-circuit
  • the first terminal of the drive control transistor is the first terminal of the drive control sub-circuit
  • the second terminal of the drive control transistor is the drive Control the second end of the sub-circuit.
  • the pixel driving circuit described in the present disclosure further includes a reset circuit
  • the reset circuit is used to control the display starting voltage to be written into the control terminal of the drive circuit under the control of the second reset signal input from the second reset terminal, so that the drive circuit controls the voltage at the control terminal thereof Next, control the communication between the first end of the drive circuit and the second end of the drive circuit.
  • the pixel driving circuit described in the present disclosure further includes a voltage maintaining circuit and a data writing circuit;
  • the voltage maintenance circuit is connected to the control terminal of the drive circuit and is used to maintain the voltage of the control terminal of the drive circuit;
  • the data writing circuit is used for controlling the voltage of the control terminal of the driving circuit according to the display data voltage input by the display data line under the control of the display scan signal input by the display scan line.
  • the data writing circuit includes a data writing sub-circuit and a compensation control sub-circuit, wherein:
  • the data writing sub-circuit is used to control the writing of the display data voltage to the first end of the driving circuit under the control of the display scan signal;
  • the compensation control sub-circuit is used for controlling the communication between the control terminal of the driving circuit and the second terminal of the driving circuit under the control of the display scanning signal.
  • the data writing sub-circuit includes a data writing transistor
  • the compensation control sub-circuit includes a compensation control transistor
  • the control electrode of the data writing transistor is connected to the display scan line, the first electrode of the data writing transistor is connected to the display data line, and the second electrode of the data writing transistor is connected to the first electrode of the driving circuit.
  • the control electrode of the compensation control transistor is connected to the display scan line, the first electrode of the compensation control transistor is connected to the control terminal of the drive circuit, and the second electrode of the compensation control transistor is connected to the drive circuit. The second end is connected.
  • the voltage maintenance circuit includes a storage capacitor; a first terminal of the storage capacitor is connected to a control terminal of the driving circuit, and a second terminal of the storage capacitor is connected to a third voltage terminal.
  • the pixel driving circuit described in the present disclosure further includes a light emission control circuit
  • the first terminal of the driving circuit is connected to the first voltage terminal through the light-emitting control circuit
  • the control terminal of the light emission control circuit is connected to a light emission control line, and the light emission control circuit is used to control the first terminal of the driving circuit and the first terminal under the control of the light emission control signal input by the light emission control line. Connect between voltage terminals.
  • the driving circuit includes a driving transistor
  • the control terminal of the drive transistor is the control terminal of the drive circuit
  • the first terminal of the drive transistor is the first terminal of the drive circuit
  • the second terminal of the drive transistor is the second terminal of the drive circuit.
  • the present disclosure also provides a pixel driving method, which is applied to the above-mentioned pixel driving circuit.
  • the display period includes a first display stage, and the first display stage includes a first data writing time period and a first charging time period that are sequentially set And a first light-emitting period;
  • the pixel driving method includes:
  • control start voltage terminal inputs the first control start voltage
  • the light-emitting duration control circuit starts according to the first control under the control of the first reset signal input from the first reset terminal. Start voltage, disconnect the connection between the second end of the drive circuit and the light-emitting element;
  • the control data line inputs a first control data voltage
  • the drive circuit controls the first end of the drive circuit and the second end of the drive circuit under the control of the voltage at the control terminal thereof
  • the light-emitting duration control circuit is controlled by the control scan signal input from the control scan line, and according to the first control start voltage and the first control data voltage, when the first charging period is entered, the first After the charging time, controlling the communication between the second end of the driving circuit and the light-emitting element to control the light-emitting element to emit light;
  • the driving circuit controls the communication between the first terminal of the driving circuit and the second terminal of the driving circuit under the control of the voltage at the control terminal thereof, and the lighting duration control circuit controls all The second end of the driving circuit is connected with the light-emitting element to control the light-emitting element to emit light.
  • the light-emitting duration control circuit includes a drive control sub-circuit, a drive control reset sub-circuit, and a conduction control sub-circuit;
  • the light-emitting duration control circuit is controlled by the first reset signal input from the first reset terminal and according to the first control starting voltage
  • the step of disconnecting the connection between the second terminal of the driving circuit and the light-emitting element includes: Under the control of the first reset signal, the drive control reset sub-circuit controls to write the first control start voltage into the control terminal of the drive control sub-circuit, so that the drive control sub-circuit is under its control Under the control of the voltage at the terminal, disconnect the connection between the second terminal of the driving circuit and the light-emitting element;
  • the light-emitting duration control circuit is controlled by the control scan signal input from the control scan line, and according to the first control start voltage and the first control data voltage, the first charging time is entered into the first charging period Then, the step of controlling the communication between the second end of the driving circuit and the light-emitting element includes:
  • the drive control sub-circuit disconnects the connection between the second end of the drive circuit and the light-emitting element under the control of the voltage at its control terminal;
  • the conduction control sub-circuit is under the control of the control scan signal Control to charge the control terminal of the drive control sub-circuit through the first control data voltage, so that after the first charging time of the first charging period is entered, the drive control sub-circuit is at its control terminal Controlling the communication between the second end of the driving circuit and the light-emitting element under the control of the voltage;
  • the step of controlling the communication between the second end of the driving circuit and the light-emitting element by the light-emitting duration control circuit includes:
  • the drive control sub-circuit controls the communication between the second end of the drive circuit and the light-emitting element under the control of the voltage of its control terminal.
  • the pixel driving circuit further includes a voltage maintaining circuit and a data writing circuit; the pixel driving method further includes:
  • the data writing circuit controls the voltage of the control terminal of the driving circuit according to the display data voltage under the control of the display scanning signal input by the display scanning line; the voltage maintaining circuit maintains the driving The voltage at the control terminal of the circuit.
  • the step of controlling the voltage of the control terminal of the driving circuit according to the display data voltage under the control of the display scanning signal input by the display scanning line during the first data writing time period includes:
  • the data writing circuit controls the writing of the display data voltage Vdata1 to the first end of the driving circuit under the control of the display scan signal, and controls the driving circuit
  • the control terminal of the drive circuit is connected with the second terminal of the drive circuit; the drive circuit is controlled by the voltage of its control terminal to control the communication between the first terminal of the drive circuit and the second terminal of the drive circuit , Charging the control terminal of the drive circuit through the display data voltage Vdata1 until the drive circuit disconnects the first terminal of the drive circuit from the first terminal of the drive circuit under the control of the voltage at the control terminal of the drive circuit The connection between the two ends.
  • the pixel driving circuit further includes a reset circuit; the first display stage further includes a setting period set before the first data writing period, and the pixel driving method further includes:
  • the reset circuit controls the display start voltage to be written into the control terminal of the drive circuit under the control of the second reset signal input from the second reset terminal, so that the drive circuit is Under the control of the voltage of the control terminal, the communication between the first terminal of the driving circuit and the second terminal of the driving circuit is controlled.
  • the pixel driving circuit further includes a light emission control circuit; the pixel driving method further includes:
  • the light emission control circuit disconnects the first terminal of the driving circuit and the first voltage terminal under the control of the light emission control signal input from the light emission control line ;
  • the lighting control circuit controls the distance between the first terminal of the driving circuit and the first voltage terminal under the control of the lighting control signal Connected.
  • the display period further includes at least one display period set after the first display period;
  • the nth display period includes an nth data writing period, an nth charging period, and an nth light-emitting period N is an integer greater than 1;
  • the pixel driving method further includes:
  • the control start voltage terminal inputs the nth control start voltage
  • the light-emitting duration control circuit is controlled by the first reset signal input from the first reset terminal, and starts according to the nth control Start voltage, disconnect the connection between the second end of the drive circuit and the light-emitting element;
  • the control data line inputs the nth control data voltage
  • the driving circuit controls the first terminal of the driving circuit and the second terminal of the driving circuit under the control of the voltage at the control terminal thereof
  • the light-emitting duration control circuit enters the nth charging period After the charging time, control the communication between the second end of the driving circuit and the light emitting element to control the light emitting element to emit light;
  • the driving circuit controls the communication between the first terminal of the driving circuit and the second terminal of the driving circuit under the control of the voltage at the control terminal thereof, and the light-emitting duration control circuit controls all The second end of the driving circuit communicates with the light-emitting element to control the light-emitting element to emit light.
  • the light-emitting duration control circuit includes a drive control sub-circuit, a drive control reset sub-circuit, and a conduction control sub-circuit;
  • the light-emitting duration control circuit disconnects the connection between the second terminal of the driving circuit and the light-emitting element according to the n-th control starting voltage, including:
  • the drive control reset sub-circuit under the control of the first reset signal, controls to write the n-th control start voltage into the control terminal of the drive control sub-circuit, so that the drive control sub-circuit is under its control Under the control of the voltage at the terminal, disconnect the connection between the second terminal of the driving circuit and the light-emitting element;
  • the light-emitting duration control circuit is controlled by the control scan signal input from the control scan line, and according to the nth control start voltage and the nth control data voltage, when the nth charging time period is entered, the nth charging time.
  • the step of controlling the communication between the second end of the driving circuit and the light-emitting element includes:
  • the drive control sub-circuit disconnects the connection between the second end of the drive circuit and the light-emitting element under the control of the voltage at its control terminal; the conduction control sub-circuit is under the control of the control scan signal Control to charge the control terminal of the drive control sub-circuit through the nth control data voltage, so that after entering the nth charging time of the nth charging period, the drive control sub-circuit is at its control terminal Under the control of the voltage, the communication between the second end of the driving circuit and the light-emitting element is controlled.
  • the nth control data voltage is equal to the first control data voltage; or, the nth control start voltage is equal to the first control start voltage.
  • FIG. 1 is a structural diagram of a pixel driving circuit according to an embodiment of the present disclosure
  • FIG. 2 is a structural diagram of a pixel driving circuit according to some embodiments of the present disclosure
  • FIG. 3 is a structural diagram of a pixel driving circuit according to some embodiments of the present disclosure.
  • FIG. 4 is a structural diagram of a pixel driving circuit according to some embodiments of the present disclosure.
  • FIG. 5 is a structural diagram of a pixel driving circuit according to some embodiments of the present disclosure.
  • FIG. 6 is a structural diagram of a pixel driving circuit according to some embodiments of the present disclosure.
  • FIG. 7 is a structural diagram of a pixel driving circuit according to some embodiments of the present disclosure.
  • FIG. 8 is a structural diagram of a pixel driving circuit according to some embodiments of the present disclosure.
  • FIG. 9 is a circuit diagram of some embodiments of the pixel driving circuit according to the present disclosure.
  • FIG. 10 is a working timing diagram of the specific embodiment of the pixel driving circuit shown in FIG. 9 of the present disclosure.
  • FIG. 11A is a schematic diagram of the working state of the specific embodiment of the pixel driving circuit shown in FIG. 9 of the present disclosure in the setting period S11;
  • 11B is a schematic diagram of the working state of the specific embodiment of the pixel driving circuit shown in FIG. 9 of the present disclosure in the first data writing period S12;
  • 11C is a schematic diagram of the working state of the specific embodiment of the pixel driving circuit shown in FIG. 9 of the present disclosure in the first charging time period S13;
  • FIG. 11D is a schematic diagram of the working state of the specific embodiment of the pixel driving circuit shown in FIG. 9 of the present disclosure in the first light-emitting period S14
  • FIG. 12 is another working timing diagram of the specific embodiment of the pixel driving circuit shown in FIG. 9 of the present disclosure.
  • FIG. 13 is a schematic structural diagram of a driving backplane in a display device according to an embodiment of the present disclosure.
  • the transistors used in all the embodiments of the present disclosure may be triodes, thin film transistors or field effect transistors or other devices with the same characteristics.
  • one pole is called the first pole and the other pole is called the second pole.
  • the control electrode when the transistor is a triode, can be a base, the first electrode can be a collector, and the second electrode can be an emitter; or, the control electrode can be a base.
  • the first electrode may be an emitter electrode, and the second electrode may be a collector electrode.
  • the control electrode when the transistor is a thin film transistor or a field effect transistor, the control electrode may be a gate, the first electrode may be a drain, and the second electrode may be a source; or The control electrode may be a gate, the first electrode may be a source, and the second electrode may be a drain.
  • the pixel driving circuit As shown in FIG. 1, the pixel driving circuit according to the embodiment of the present disclosure is used to drive the light-emitting element EL.
  • the pixel driving circuit includes a driving circuit 11 and a light-emitting duration control circuit 12, wherein,
  • the first terminal of the driving circuit 11 is connected to the first voltage terminal VT1, the second terminal of the driving circuit 11 is connected to the light emitting element EL through the light emitting duration control circuit 12, and the driving circuit 11 is used for Controlling the communication between the first terminal and the second terminal under the control of the voltage of the control terminal;
  • the light-emitting duration control circuit 12 is used to control the control data voltage and the control start voltage input from the control data line Datac under the control of the first reset signal input from the first reset terminal Reset1 and the control scan signal input from the control scan line Scan2
  • the control starting voltage input from the terminal VIc turns on or disconnects the connection between the second terminal of the driving circuit 11 and the light-emitting element EL to control the light-emitting duration of the light-emitting element EL.
  • the pixel driving circuit controls the communication time between the second end of the driving circuit 11 and the light emitting element EL through the light emitting duration control circuit 12, thereby controlling the light emitting duration of the light emitting element EL, Realize different gray scale display.
  • the light-emitting element may be a Micro LED (micro light-emitting diode), but it is not limited to this. In actual operation, the light-emitting element may also be an organic light-emitting diode.
  • the pixel driving circuit described in the embodiment of the present disclosure modulates the gray scale together by driving current and light emission time, which can ensure the output characteristics of the micro light emitting diode at low gray scales, and avoid the color shift phenomenon of the micro light emitting diode when the gray scale changes. .
  • the first voltage terminal VT1 may be a high voltage terminal inputting a high voltage Vdd, but is not limited to this.
  • the display period includes a first display stage, and the first display stage includes a first data writing period, a first charging period, and The first lighting period;
  • the control start voltage terminal VIc inputs the first control start voltage Vintc1, and the light-emitting duration control circuit 12 is controlled by the first reset signal input from the first reset terminal Reset1 according to the The first control start voltage Vintc1 disconnects the connection between the second end of the driving circuit 11 and the light emitting element EL;
  • the control data line Datac is input with a first control data voltage Vdatac1, and the driving circuit 11 controls the first terminal of the driving circuit 11 and the driving circuit under the control of the voltage at the control terminal thereof. 11 is connected between the second end; under the control of the control scan signal input from the control scan line Scan2, the light-emitting duration control circuit 12 according to the first control start voltage Vintc1 and the first control data voltage Vdatac1, when entering After the first charging time in the first charging time period, control the communication between the second end of the driving circuit 11 and the light emitting element EL to control the light emitting element EL to emit light;
  • the driving circuit 11 controls the communication between the first terminal of the driving circuit 11 and the second terminal of the driving circuit 11 under the control of the voltage at the control terminal thereof, and the lighting duration is controlled
  • the circuit 12 controls the communication between the second terminal of the driving circuit 11 and the light emitting element EL to control the light emitting element EL to emit light.
  • the light emitting duration control circuit 12 disconnects the connection between the second end of the driving circuit 11 and the light emitting element EL, and after entering the first charging time period for the first charging time
  • the light-emitting duration control circuit 12 controls the communication between the second end of the driving circuit 11 and the light-emitting element EL to control the light-emitting element EL to emit light.
  • the display period may be one frame of screen display time.
  • the display period may also include at least one display stage arranged after the first display stage; the nth display stage includes the nth data writing period and the first display period. n charging time period and n-th light emitting time period; n is an integer greater than 1;
  • the control starting voltage terminal VIc inputs the nth control starting voltage Vintcn, and the light-emitting duration control circuit 12 is controlled by the first reset signal input from the first reset terminal Reset1 according to the The n-th control starting voltage Vintcn disconnects the connection between the second end of the driving circuit 11 and the light emitting element EL;
  • the control data line Datac inputs the nth control data voltage Vdatacn
  • the driving circuit 11 controls the first terminal of the driving circuit 11 and the driving circuit under the control of the voltage at the control terminal thereof.
  • 11 is connected between the second end, the light-emitting duration control circuit 12, under the control of the control scan signal input from the control scan line Scan2, according to the nth control start voltage Vintcn and the nth control data voltage Vdatacn, when entering After the n-th charging time period of the n-th charging time, control the communication between the second end of the driving circuit 11 and the light-emitting element EL to control the light-emitting element EL to emit light;
  • the driving circuit 11 controls the communication between the first terminal of the driving circuit 11 and the second terminal of the driving circuit 11 under the control of the voltage at the control terminal thereof, and the light-emitting duration is controlled
  • the circuit 12 controls the communication between the second terminal of the driving circuit 11 and the light emitting element EL to control the light emitting element EL to emit light.
  • the light emitting duration control circuit 12 disconnects the connection between the second end of the driving circuit 11 and the light emitting element EL, and after entering the nth charging time period for the nth charging time
  • the light-emitting duration control circuit 12 controls the communication between the second end of the driving circuit 11 and the light-emitting element EL to control the light-emitting element EL to emit light.
  • the embodiment of the present disclosure divides the display period (that is, the display time of one frame of picture) into n display stages (n is an integer greater than 1).
  • the light-emitting time of the light-emitting element EL is determined by the corresponding control data voltage and The corresponding control starting voltage is determined to increase the number of gray levels.
  • the light-emitting duration control circuit includes a driving control sub-circuit 121, a driving control reset sub-circuit 122, and a conduction control sub-circuit 123, wherein ,
  • the first end of the drive control sub-circuit 121 is connected to the second end of the drive circuit 11, and the second end of the drive control sub-circuit 121 is connected to the light emitting element EL;
  • the drive control reset sub-circuit 122 is respectively connected to the first reset terminal Reset1, the control starting voltage terminal VIc, and the control terminal of the drive control sub-circuit 121, and is used to reset the first reset signal input at the first reset terminal Reset1. Under control, the control start voltage is written into the control terminal of the drive control sub-circuit 121, so that the drive control sub-circuit 121, under the control of the voltage at its control terminal, disconnects the second drive circuit 11 The connection between the terminal and the light-emitting element EL;
  • the conduction control sub-circuit 123 is respectively connected to the control scan line Scan2, the control data line Datac, and the control terminal of the drive control sub-circuit 121, and is used to control the scan signal input from the control scan line Scan2,
  • the control data voltage input through the control data line Datac is controlled to charge the control terminal of the driving control sub-circuit 121, so that the driving control sub-circuit 121 controls the driving circuit 11 under the control of the voltage of the control terminal.
  • the second end of is communicated with the light-emitting element EL.
  • the control start voltage terminal VIc inputs a first control start voltage Vintc1
  • the drive control reset sub-circuit 122 controls the first reset signal to control the A control start voltage Vintc1 is written into the control terminal of the drive control sub-circuit 121, so that the drive control sub-circuit 121, under the control of the voltage at its control terminal, disconnects the second terminal of the drive circuit 11 from the control terminal.
  • the control data line Datac is input with a first control data voltage Vdatac1
  • the driving circuit 11 controls the first terminal of the driving circuit 11 and the driving circuit under the control of the voltage at the control terminal thereof.
  • 11 is connected between the second end, the drive control sub-circuit 121, under the control of the voltage at its control end, disconnects the second end of the drive circuit 11 and the light-emitting element EL; the conduction control Under the control of the control scan signal, the sub-circuit 123 controls to charge the control terminal of the driving control sub-circuit 121 through the first control data voltage Vdatac1, so that the first charging period is entered into the first charging period.
  • the drive control sub-circuit 121 controls the communication between the second end of the drive circuit 11 and the light-emitting element under the control of the voltage at its control terminal to control the light-emitting element EL to emit light;
  • the driving circuit 11 controls the communication between the first terminal of the driving circuit 11 and the second terminal of the driving circuit 11 under the control of the voltage at the control terminal thereof, and the driving The control sub-circuit 121 controls the communication between the second terminal of the driving circuit 11 and the light-emitting element EL under the control of the voltage at the control terminal thereof.
  • the driving control sub-circuit 121 may include a driving control transistor, and the control terminal of the driving control sub-circuit 121 is the gate of the driving control transistor.
  • the conduction control The sub-circuit 123 controls the charging of the control terminal of the driving control sub-circuit 121 through Vdatac1 to change the voltage of the control terminal of the driving control sub-circuit 121 so that the driving control transistor is switched from the off state to the on state.
  • the control start voltage terminal VIc inputs the nth control start voltage Vintcn
  • the drive control reset sub-circuit 122 controls the first reset signal to control the n Control the starting voltage Vintcn to be written into the control terminal of the drive control sub-circuit 121, so that the drive control sub-circuit 121, under the control of the voltage at its control terminal, disconnects the second terminal of the drive circuit 11 from the The connection between the light-emitting elements EL;
  • the control data line Datac inputs the nth control data voltage Vdatacn
  • the driving circuit 11 controls the first terminal of the driving circuit 11 and the driving circuit under the control of the voltage at the control terminal thereof.
  • 11 is connected between the second end, the drive control sub-circuit 121, under the control of the voltage at its control end, disconnects the connection between the second end of the drive circuit 11 and the light-emitting element EL;
  • the pass control sub-circuit 123 controls the control terminal of the drive control sub-circuit 121 to be charged by the n-th control data voltage Vdatacn, so that when the n-th charging period is entered
  • the drive control sub-circuit 121 controls the communication between the second end of the drive circuit 11 and the light-emitting element EL under the control of the voltage of its control terminal to control the light-emitting element EL to emit light;
  • the drive circuit 11 controls the communication between the first end of the drive circuit 11 and the second end of the drive circuit 11 under the control of the voltage at its control terminal, and the drive control sub
  • the circuit 121 controls the communication between the second terminal of the driving circuit 11 and the light-emitting element EL under the control of the voltage at the control terminal thereof, and the driving circuit 11 drives the light-emitting element EL to emit light.
  • the conduction control sub-circuit may include a first conduction control transistor, a second conduction control transistor, and a conduction control capacitor;
  • the control electrode of the first conduction control transistor is connected to the control terminal of the drive control sub-circuit, the first electrode of the first conduction control transistor is connected to the first electrode of the second conduction control transistor, The second pole of the first conduction control transistor is connected to a control data line; the control data line is used to input the control data voltage;
  • the control electrode of the second conduction control transistor is connected to the control scan line, and the second electrode of the second conduction control transistor is connected to the control terminal of the drive control sub-circuit;
  • the first end of the conduction control capacitor is connected to the control end of the drive control sub-circuit, and the second end of the conduction control capacitor is connected to the second voltage end.
  • the second voltage terminal may be a high voltage terminal, but is not limited to this.
  • the drive control reset sub-circuit may include a drive control reset transistor
  • the control electrode of the drive control reset transistor is connected to the first reset terminal, the first electrode of the drive control reset transistor is connected to the control terminal of the drive control sub-circuit, and the second electrode of the drive control reset transistor is connected Connected to the control starting voltage terminal; the control starting voltage terminal is used to input the control starting voltage.
  • the drive control sub-circuit may include a drive control transistor
  • the control terminal of the drive control transistor is the control terminal of the drive control sub-circuit
  • the first terminal of the drive control transistor is the first terminal of the drive control sub-circuit
  • the second terminal of the drive control transistor is the drive Control the second end of the sub-circuit.
  • the conduction control sub-circuit 123 includes a first conduction control transistor T6, a second conduction control transistor T9, and a conduction control Capacitor C2;
  • the drive control reset sub-circuit 122 includes a drive control reset transistor T8;
  • the drive control sub-circuit 121 includes a drive control transistor T7;
  • the gate of the drive control transistor T7 is the control terminal of the drive control sub-circuit 121, the drain of the drive control transistor T7 is the first terminal of the drive control sub-circuit 121, and the source of the drive control transistor T7 The second end of the drive control sub-circuit 121;
  • the gate of the first conduction control transistor T6 is connected to the gate of the drive control transistor T7, and the source of the first conduction control transistor T6 is connected to the source of the second conduction control transistor T9 ,
  • the drain of the first conduction control transistor T6 is connected to the control data line Datac; the control data line Datac is used to input the control data voltage;
  • the gate of the second conduction control transistor T9 is connected to the control scan line Scan2, and the drain of the second conduction control transistor T9 is connected to the gate of the drive control transistor T7;
  • the first terminal of the conduction control capacitor C2 is connected to the gate of the drive control transistor T7, and the second terminal of the conduction control capacitor C2 is connected to the high voltage terminal; the high voltage terminal is used for inputting high voltage Vdd;
  • the gate of the drive control reset transistor T8 is connected to the first reset terminal Reset1, the source of the drive control reset transistor T8 is connected to the gate of the drive control transistor T7, and the drive control reset transistor T8 The drain is connected to the control starting voltage terminal VIc; the control starting voltage terminal VIc is used to input the control starting voltage.
  • T6, T8, and T9 are all p-type thin film transistors, and T7 is an n-type thin film transistor, but not limited to this.
  • VIc inputs the first control start voltage Vintc1, Reset1 inputs low level, and T8 opens to write Vintc1 to the gate of T7 and the gate of T6, so that T7 is turned off and off Open the connection between the second end of the driving circuit 11 and the light-emitting element EL, and make T6 open;
  • T7 is turned off to disconnect the connection between the second end of the driving circuit 11 and the light-emitting element EL;
  • Datac inputs the first control data voltage Vdatac1
  • Scan2 inputs low power T6 and T9 are both turned on to charge C2 through Vdatac1 to increase the voltage of the gate of T7, so that after entering the first charging period of the first charging time, T7 switches from the off state to the on state ;
  • T6 and T9 can be turned on and continue to charge C2 through Vdatac1 until the voltage of the gate of T7 rises to Vdatac1+Vthc, and T6 is turned off to stop charging; where Vthc is the threshold voltage of T6;
  • T7 is turned on to control the communication between the second end of the driving circuit 11 and the light-emitting element EL.
  • the duration of the first charging time is related to Vintc1 and Vdatac1.
  • VIc inputs the nth control start voltage Vintcn
  • Reset1 inputs low level
  • T8 opens to write Vintcn to the gate of T7 and the gate of T6, so that T7 is turned off and off Open the connection between the second end of the driving circuit 11 and the light-emitting element EL, and make T6 open;
  • T7 In the nth charging time period, T7 is turned off to disconnect the connection between the second end of the driving circuit 11 and the light emitting element EL; Datac inputs the nth control data voltage Vdatacn, and Scan2 inputs low level, T6 and T9 are both turned on to charge C2 through Vdatacn to increase the voltage of the gate of T7, so that after entering the nth charging time period of the nth charging time period, until T7 is switched from the off state to the on state; After that, T6 and T9 can be turned on and continue to charge C2 through Vdatacn until the voltage of the gate of T7 rises to Vdatacn+Vthc, and T6 is turned off to stop charging; where Vthc is the threshold voltage of T6;
  • T7 is turned on to control the communication between the second end of the driving circuit 11 and the light-emitting element EL.
  • the pixel driving circuit described in the present disclosure may further include a reset circuit
  • the reset circuit is used to control the display starting voltage to be written into the control terminal of the drive circuit under the control of the second reset signal input from the second reset terminal, so that the drive circuit controls the voltage at the control terminal thereof Next, control the communication between the first end of the drive circuit and the second end of the drive circuit.
  • the pixel driving circuit according to the embodiment of the present disclosure further includes a reset circuit 13;
  • the reset circuit 13 is respectively connected to the second reset terminal Reset, the display start voltage terminal VId, and the control terminal of the drive circuit 11, and is used to control the reset signal under the control of the second reset signal input from the second reset terminal Reset.
  • the display start voltage input from the display start voltage terminal VId is written into the control terminal of the drive circuit 11, so that the drive circuit 11 controls the first drive circuit 11 under the control of the voltage at the control terminal.
  • the terminal communicates with the second terminal of the driving circuit 11.
  • the first display stage further includes a setting time period set before the first data writing time period, and during the setting time Paragraph, under the control of the second reset signal input from the second reset terminal Reset, the reset circuit 13 controls the display start voltage to be written into the control terminal of the drive circuit 11, so that the drive circuit 11 is Under the control of the voltage of the control terminal, the communication between the first terminal of the driving circuit 11 and the second terminal of the driving circuit 11 is controlled.
  • the reset circuit may include a reset transistor
  • the control electrode of the reset transistor is connected to the second reset terminal, the first electrode of the reset transistor is connected to the display start voltage terminal, and the second electrode of the reset transistor is connected to the control terminal of the drive circuit. connection.
  • the pixel driving circuit described in the present disclosure may further include a voltage maintaining circuit and a data writing circuit;
  • the voltage maintenance circuit is connected to the control terminal of the drive circuit and is used to maintain the voltage of the control terminal of the drive circuit;
  • the data writing circuit is used for controlling the voltage of the control terminal of the driving circuit according to the display data voltage input by the display data line under the control of the display scan signal input by the display scan line.
  • the pixel driving circuit according to the embodiment of the present disclosure further includes a voltage maintaining circuit 14 and a data writing circuit 15;
  • the voltage maintaining circuit 14 is connected to the control terminal of the drive circuit 11, and is used to maintain the voltage of the control terminal of the drive circuit 11;
  • the data writing circuit 15 is connected to the display scanning line Scan1, the display data line Datad, the control terminal of the driving circuit 11, the first terminal of the driving circuit 11, and the second terminal of the driving circuit 11, respectively. Under the control of the display scan signal input from the display scan line Scan1, the voltage of the control terminal of the driving circuit 11 is controlled according to the display data voltage input from the display data line Datad.
  • the data writing circuit 15 controls the display data under the control of the display scan signal.
  • the voltage Vdata1 is written into the first terminal of the drive circuit 22 and controls the communication between the control terminal of the drive circuit 11 and the second terminal of the drive circuit 11; the drive circuit 11 controls the voltage at its control terminal Next, control the communication between the first terminal of the driving circuit 11 and the second terminal of the driving circuit 11 to charge the control terminal of the driving circuit 11 through the display data voltage Vdata1 until the driving circuit Under the control of the voltage of its control terminal, disconnect the connection between the first terminal of the drive circuit 11 and the second terminal of the drive circuit 11 to control the potential of the control terminal of the drive circuit 11 to be Vdata1+Vth, Vth is the threshold voltage of the driving transistor included in the driving circuit 11, so that threshold voltage compensation can be realized.
  • the embodiments of the present disclosure can offset the influence of the threshold voltage difference on the driving current of the light-emitting element.
  • the data writing circuit may include a data writing sub-circuit and a compensation control sub-circuit, wherein:
  • the data writing sub-circuit is used to control the writing of the display data voltage to the first end of the driving circuit under the control of the display scan signal;
  • the compensation control sub-circuit is used for controlling the communication between the control terminal of the driving circuit and the second terminal of the driving circuit under the control of the display scanning signal.
  • the data writing circuit includes a data writing sub-circuit 151 and a compensation control sub-circuit 152, wherein,
  • the data writing sub-circuit 151 is respectively connected to the display scan line Scan1, the display data line Datad, and the first end of the drive circuit 11, and is used to control the display scan signal under the control of the display scan signal. Data voltage is written into the first end of the driving circuit 11;
  • the compensation control sub-circuit 152 is respectively connected to the display scan line Scan1, the control terminal of the drive circuit 11, and the second terminal of the drive circuit 11, and is used to control the display scan signal under the control of the display scan signal.
  • the control terminal of the driving circuit 11 is in communication with the second terminal of the driving circuit 11.
  • the data writing sub-circuit may include a data writing transistor
  • the compensation control sub-circuit may include a compensation control transistor
  • the control electrode of the data writing transistor is connected to the display scan line, the first electrode of the data writing transistor is connected to the display data line, and the second electrode of the data writing transistor is connected to the first electrode of the driving circuit.
  • the control electrode of the compensation control transistor is connected to the display scan line, the first electrode of the compensation control transistor is connected to the control terminal of the drive circuit, and the second electrode of the compensation control transistor is connected to the drive circuit. The second end is connected.
  • the voltage maintenance circuit may include a storage capacitor; a first terminal of the storage capacitor is connected to a control terminal of the driving circuit, and a second terminal of the storage capacitor is connected to a third voltage terminal.
  • the third voltage terminal may be a high voltage terminal, but is not limited to this.
  • the data writing sub-circuit 151 includes a data writing transistor T5
  • the compensation control sub-circuit 152 includes a compensation control transistor T2, among them,
  • the gate of the data writing transistor T5 is connected to the display scan line Scan1, the source of the data writing transistor T5 is connected to the display data line Datad, and the drain of the data writing transistor T5 is connected to the driving The first end of the circuit 11 is connected;
  • the gate of the compensation control transistor T2 is connected to the display scan line Scan1, the source of the compensation control transistor T2 is connected to the control terminal of the drive circuit 11, and the drain of the compensation control transistor T2 is connected to the The second end of the driving circuit 11 is connected;
  • the voltage maintaining circuit 14 includes a storage capacitor C1; a first end of the storage capacitor C1 is connected to the control end of the driving circuit 11, and a second end of the storage capacitor C1 is connected to the high voltage end of the input high voltage Vdd .
  • T5 and T2 may be p-type thin film transistors, but are not limited thereto.
  • the display scan signal input by Scan1 is low, T5 and T2 are both turned on, and the display data line Datad Input the display data voltage Vdata1 to write Vdata1 into the first terminal of the driving circuit 11 and make the first terminal of the driving circuit 11 communicate with the second terminal of the driving circuit 11 to pass the
  • the display data voltage Vdata1 charges the storage capacitor C1 until the drive circuit 11 disconnects the first end of the drive circuit 11 from the second end of the drive circuit 11 under the control of the voltage at its control terminal Is connected to the control terminal of the driving circuit 11 as Vdata1+Vth, and Vth is the threshold voltage of the driving transistor included in the driving circuit 11, so that threshold voltage compensation can be realized.
  • the pixel driving circuit described in the present disclosure may further include a light emission control circuit
  • the first terminal of the driving circuit is connected to the first voltage terminal through the light-emitting control circuit
  • the control terminal of the light emission control circuit is connected to a light emission control line, and the light emission control circuit is used to control the first terminal of the driving circuit and the first terminal under the control of the light emission control signal input by the light emission control line. Connect between voltage terminals.
  • the pixel driving circuit according to the embodiment of the present disclosure further includes a light emission control circuit 16;
  • the first terminal of the driving circuit 11 is connected to a high voltage terminal for inputting a high voltage Vdd through the light emitting control circuit 16;
  • the control terminal of the light emission control circuit 16 is connected to the light emission control line EM, and the light emission control circuit 16 is used to control the first terminal of the drive circuit 11 under the control of the light emission control signal input by the light emission control line EM. Connect with the high voltage terminal.
  • the first voltage terminal is the high voltage terminal, but it is not limited to this.
  • the light emission control circuit may include a light emission control transistor
  • the control electrode of the light emission control transistor is connected to the light emission control line EM, the first electrode of the light emission control transistor is connected to the first terminal of the driving circuit 11, and the second electrode of the light emission control transistor is connected to the The high voltage terminal is connected.
  • the driving circuit may include a driving transistor
  • the control terminal of the drive transistor is the control terminal of the drive circuit
  • the first terminal of the drive transistor is the first terminal of the drive circuit
  • the second terminal of the drive transistor is the second terminal of the drive circuit.
  • some embodiments of the pixel drive circuit described in the present disclosure are used to drive the micro light emitting diode MLED, and the specific embodiment of the pixel drive circuit includes a drive circuit 11, a light-emitting duration control circuit 12, and a reset circuit. 13. Voltage maintaining circuit 14, data writing circuit 15, and light emitting control circuit 16;
  • the light-emitting duration control circuit includes a drive control sub-circuit 121, a drive control reset sub-circuit 122, and a conduction control sub-circuit 123;
  • the driving circuit 11 includes a driving transistor T3; the light emission control circuit 16 includes a light emission control transistor T4; the voltage maintenance circuit 14 includes a storage capacitor C1;
  • the gate of the driving transistor T3 is connected to the first end of the storage capacitor C1; the second end of the storage capacitor C1 is connected to the high voltage end of the input high voltage Vdd;
  • the source of the driving transistor T3 is connected to the drain of the emission control transistor T4; the gate of the emission control transistor T4 is connected to the emission control line EM, and the source of the emission control transistor T4 is connected to the high voltage End connection
  • the conduction control sub-circuit 123 includes a first conduction control transistor T6, a second conduction control transistor T9 and a conduction control capacitor C2; the drive control reset sub-circuit 122 includes a drive control reset transistor T8; the drive control The sub-circuit 121 includes a drive control transistor T7;
  • the drain of the driving transistor T3 is connected to the drain of the driving control transistor T7, the source of the driving control transistor T7 is connected to the anode of the micro light emitting diode MLED; the cathode of the micro light emitting diode MLED is connected to ground Terminal GND connection;
  • the gate of the first conduction control transistor T6 is connected to the gate of the drive control transistor T7, and the source of the first conduction control transistor T6 is connected to the source of the second conduction control transistor T9 , The drain of the first turn-on control transistor T6 is connected to the control data line Datac;
  • the gate of the second conduction control transistor T9 is connected to the control scan line Scan2, and the drain of the second conduction control transistor T9 is connected to the gate of the drive control transistor T7;
  • the first terminal of the conduction control capacitor C2 is connected to the gate of the drive control transistor T7, and the second terminal of the conduction control capacitor C2 is connected to the high voltage terminal;
  • the gate of the drive control reset transistor T8 is connected to the first reset terminal Reset1, the source of the drive control reset transistor T8 is connected to the gate of the drive control transistor T7, and the drive control reset transistor T8 The drain is connected to the control initial voltage terminal VIc;
  • the reset circuit 13 includes a reset transistor T1;
  • the gate of the reset transistor T1 is connected to the second reset terminal Reset, the source of the reset transistor T1 is connected to the display start voltage terminal VId, and the drain of the reset transistor T1 is connected to the drive transistor T3. Grid connection;
  • the data writing circuit includes a data writing sub-circuit 151 and a compensation control sub-circuit 152, wherein,
  • the data writing sub-circuit 151 includes a data writing transistor T5
  • the compensation control sub-circuit 152 includes a compensation control transistor T2, wherein,
  • the gate of the data writing transistor T5 is connected to the display scan line Scan1, the source of the data writing transistor T5 is connected to the display data line Datad, and the drain of the data writing transistor T5 is connected to the driving The first end of the circuit 11 is connected;
  • the gate of the compensation control transistor T2 is connected to the display scan line Scan1, the source of the compensation control transistor T2 is connected to the control terminal of the drive circuit 11, and the drain of the compensation control transistor T2 is connected to the The second end of the driving circuit 11 is connected;
  • T7 is an n-type thin film transistor, and the remaining transistors are all p-type thin film transistors, but it is not limited to this.
  • node a is a node connected to the gate of T3
  • node b is a node connected to the gate of T7.
  • the display period includes a first display stage S1, a second display stage S2, and a third display stage S3;
  • the first display stage S1 includes a setting period S11, a first data writing period S12, a first charging period S13, and a first lighting period S14;
  • the second display stage S2 includes a second data writing period S21, a second charging period S22, and a second light-emitting period S23;
  • the third display stage S3 includes a third data writing period S31, a third charging period S32, and a third light-emitting period S33;
  • T1 is turned on, VId input shows that the initial voltage Vint1 is written into the gate of T3 to Reset the potential of T3 to Vint1 so that T3 can be turned on;
  • both Reset and Scan1 input high level, Scan2 and EM both input low level, T4 is turned on, so that the source of T3 is connected to Vdd, T3 is turned on, and Datac inputs the first control data voltage Vdatac1 As shown in FIG. 11C, T6 and T9 are turned on to charge C2 through Vdatac1 to gradually increase the voltage of the gate of T7, so that after entering the first charging time period S13, T7 is turned off.
  • T6 and T9 continue to be turned on and continue to charge C2 through Vdatac1 until the voltage of the gate of T6 rises to Vdatac1+Vthc, and T6 is turned off to stop charging, where Vthc is T6 The threshold voltage;
  • Vdata1 is charged through Vdata1 to control the increase in the voltage of the gate of T3 until the voltage of the gate of T3 becomes Vdata1+Vth, and T3 is turned off and stops When charging, Vth is the threshold voltage of T3; and T8 is turned on to write Vintc2 into the gate of T7 and the gate of T6, so that T7 is turned off and T6 is turned on to prepare for charging, where Vintc2 is modulated;
  • both Reset and Scan1 input high level, Scan2 and EM both input low level, T4 is turned on, so that the source of T3 is connected to Vdd, T3 is turned on, and Datac inputs the second control data voltage Vdatac2 , T6 and T9 are turned on to charge C2 through Vdatac2 to gradually increase the voltage of the gate of T7, so that after entering the second charging time period S22 for the second charging time, T7 switches from the off state to the on state to Control the MLED to emit light; after that, T6 and T9 continue to be turned on, and continue to charge C2 through Vdatac2, until the voltage of the gate of T6 rises to Vdatac2+Vthc, and T6 is turned off to stop charging, where Vthc is the threshold voltage of T6;
  • Vdata1 is charged through Vdata1 to control the increase in the voltage of the gate of T3 until the voltage of the gate of T3 becomes Vdata1+Vth, and T3 is turned off and stops When charging, Vth is the threshold voltage of T3; and T8 is turned on to write Vintc3 into the gate of T7 and the gate of T6, so that T7 is turned off and T6 is turned on to prepare for charging, where Vintc3 is modulated;
  • both Reset and Scan1 input high level, Scan2 and EM both input low level, T4 is turned on, so that the source of T3 is connected to Vdd, T3 is turned on, and Datac inputs the third control data voltage Vdatac3 , T6 and T9 are turned on to charge C2 through Vdatac3 to gradually increase the voltage of the gate of T7, so that after entering the third charging time period S32 for the third charging time, T7 is switched from the off state to the on state to Control the MLED to emit light; after that, T6 and T9 continue to be turned on, and continue to charge C2 through Vdatac3, until the voltage of the gate of T6 rises to Vdatac3+Vthc, and T6 is turned off to stop charging, where Vthc is the threshold voltage of T6;
  • the EM inputs a low level, and T4, T3 and T7 are all turned on to drive the MLED to emit light.
  • the first integration time is determined by Vdatac1 and Vintc1. If Vintc1 is relatively low, the first integration time is longer. If Vintc1 is relatively high, the first integration time is longer. The integration time is shorter. If Vdatac1 is larger, the first integration time is shorter. If Vdatac1 is smaller, the first integration time is longer; if the first integration time is longer, the MLED emits light for a shorter time in the first display stage; If the first integration time is short, the MLED will emit light for a long time in the first display stage.
  • the second integration time is determined by Vdatac2 and Vintc2. If Vintc2 is relatively low, the second integration time is longer. If Vintc2 is relatively high, the second integration time is The integration time is shorter. If Vdatac2 is larger, the second integration time is shorter. If Vdatac2 is smaller, the second integration time is longer; if the second integration time is longer, the MLED emits light for a shorter time in the second display stage; If the second integration time is short, the MLED will emit light for a long time in the second display stage.
  • the third integration time is determined by Vdatac3 and Vintc3. If Vintc3 is relatively low, the third integration time is relatively long. If Vintc3 is relatively high, the third integration time is The integration time is shorter. If Vdatac3 is larger, the third integration time is shorter. If Vdatac3 is smaller, the third integration time is longer; if the third integration time is longer, the MLED light-emitting time is shorter in the third display stage; If the third integration time is short, the MLED will emit light for a long time in the third display stage.
  • Vdatac1, Vdatac2, and Vdatac3 are equal, and Vintc1, Vintc2, and Vintc3 may not be equal.
  • FIG. 12 is another working timing diagram of the specific embodiment of the pixel driving circuit shown in FIG. 9 of the present disclosure; the difference from FIG. 10 is that according to the working timing diagram shown in FIG. 12, Vdatac1, Vdatac2, and Vdatac3 are not equal , Vintc1, Vintc2 and Vintc3 are equal.
  • the pixel driving method is applied to the above-mentioned pixel driving circuit.
  • the display period includes a first display stage, and the first display stage includes a first data writing time period and a first charging time period that are sequentially set And a first light-emitting period;
  • the pixel driving method includes:
  • control start voltage terminal inputs the first control start voltage
  • the light-emitting duration control circuit starts according to the first control under the control of the first reset signal input from the first reset terminal. Start voltage, disconnect the connection between the second end of the drive circuit and the light-emitting element;
  • the control data line inputs a first control data voltage
  • the drive circuit controls the first end of the drive circuit and the second end of the drive circuit under the control of the voltage at the control terminal thereof
  • the light-emitting duration control circuit is controlled by the control scan signal input from the control scan line, and according to the first control start voltage and the first control data voltage, when the first charging period is entered, the first After the charging time, controlling the communication between the second end of the driving circuit and the light-emitting element to control the light-emitting element to emit light;
  • the driving circuit controls the communication between the first terminal of the driving circuit and the second terminal of the driving circuit under the control of the voltage at the control terminal thereof, and the lighting duration control circuit controls all The second end of the driving circuit is connected with the light-emitting element to control the light-emitting element to emit light.
  • the pixel driving method controls the communication time between the second end of the driving circuit 11 and the light emitting element EL through a light emitting duration control circuit, thereby controlling the light emitting duration of the light emitting element, and realizes Different gray scale display.
  • the light-emitting duration control circuit may include a drive control sub-circuit, a drive control reset sub-circuit, and a conduction control sub-circuit;
  • the step of disconnecting the connection between the second end of the driving circuit and the light-emitting element according to the first control starting voltage under the control of the first reset signal input from the first reset terminal by the light-emitting duration control circuit may include: Under the control of the first reset signal, the drive control reset sub-circuit controls the writing of the first control start voltage to the control terminal of the drive control sub-circuit, so that the drive control sub-circuit is Under the control of the voltage of the control terminal, disconnect the connection between the second terminal of the driving circuit and the light-emitting element;
  • the light-emitting duration control circuit is controlled by the control scan signal input from the control scan line, and according to the first control start voltage and the first control data voltage, the first charging time is entered into the first charging period Later, the step of controlling the communication between the second end of the driving circuit and the light-emitting element may include:
  • the drive control sub-circuit disconnects the connection between the second end of the drive circuit and the light-emitting element under the control of the voltage at its control terminal;
  • the conduction control sub-circuit is under the control of the control scan signal Control to charge the control terminal of the drive control sub-circuit through the first control data voltage, so that after the first charging time of the first charging period is entered, the drive control sub-circuit is at its control terminal Controlling the communication between the second end of the driving circuit and the light-emitting element under the control of the voltage;
  • the step of controlling the communication between the second end of the driving circuit and the light-emitting element by the light-emitting duration control circuit may include:
  • the drive control sub-circuit controls the communication between the second end of the drive circuit and the light-emitting element under the control of the voltage of its control terminal.
  • the light emission control duration control circuit may include a drive control sub-circuit, a drive control reset sub-circuit, and a conduction control sub-circuit.
  • the drive control reset sub-circuit will drive the control sub-circuit during the first data writing period.
  • the voltage of the control terminal is reset to the first control starting voltage, and the conduction control sub-circuit charges the control terminal of the drive control sub-circuit through the first control data voltage during the first charging time period, so that when entering the first charging After the first charging time of the time period, the drive control sub-circuit, under the control of the voltage at its control terminal, controls the communication between the second terminal of the drive circuit and the light emitting element, and modulates the first control starting voltage and /Or the first control data voltage can control the first charging time, and thus can adjust the light-emitting time of the light-emitting element.
  • the pixel driving circuit may further include a voltage maintaining circuit and a data writing circuit; the pixel driving method may further include:
  • the data writing circuit controls the voltage of the control terminal of the driving circuit according to the display data voltage under the control of the display scanning signal input by the display scanning line; the voltage maintaining circuit maintains the driving The voltage at the control terminal of the circuit.
  • the step of controlling the voltage of the control terminal of the driving circuit according to the display data voltage under the control of the display scanning signal input by the display scanning line during the first data writing period includes:
  • the data writing circuit controls the writing of the display data voltage Vdata1 to the first end of the driving circuit under the control of the display scan signal, and controls the driving circuit
  • the control terminal of the drive circuit is connected with the second terminal of the drive circuit; the drive circuit is controlled by the voltage of its control terminal to control the communication between the first terminal of the drive circuit and the second terminal of the drive circuit , Charging the control terminal of the drive circuit through the display data voltage Vdata1 until the drive circuit disconnects the first terminal of the drive circuit from the first terminal of the drive circuit under the control of the voltage at the control terminal of the drive circuit The connection between the two terminals for threshold voltage compensation.
  • the pixel driving circuit may further include a reset circuit; the first display stage may further include a setting period set before the first data writing period, and the pixel driving method may further include:
  • the reset circuit controls the display start voltage to be written into the control terminal of the drive circuit under the control of the second reset signal input from the second reset terminal, so that the drive circuit is Under the control of the voltage of the control terminal, the communication between the first terminal of the drive circuit and the second terminal of the drive circuit is controlled to reset the voltage of the control terminal of the drive circuit.
  • the pixel driving circuit may further include a light emission control circuit; the pixel driving method may further include:
  • the light emission control circuit disconnects the first terminal of the driving circuit and the first voltage terminal under the control of the light emission control signal input from the light emission control line ;
  • the lighting control circuit controls the distance between the first terminal of the driving circuit and the first voltage terminal under the control of the lighting control signal Connected.
  • the display period further includes at least one display period set after the first display period;
  • the nth display period includes an nth data writing period, an nth charging period, and an nth light-emitting period N is an integer greater than 1;
  • the pixel driving method further includes:
  • the control start voltage terminal inputs the nth control start voltage
  • the light-emitting duration control circuit is controlled by the first reset signal input from the first reset terminal, and starts according to the nth control Start voltage, disconnect the connection between the second end of the drive circuit and the light-emitting element;
  • the control data line inputs the nth control data voltage
  • the driving circuit controls the first terminal of the driving circuit and the second terminal of the driving circuit under the control of the voltage at the control terminal thereof
  • the light-emitting duration control circuit enters the nth charging period After the charging time, control the communication between the second end of the driving circuit and the light emitting element to control the light emitting element to emit light;
  • the driving circuit controls the communication between the first terminal of the driving circuit and the second terminal of the driving circuit under the control of the voltage at the control terminal thereof, and the light-emitting duration control circuit controls all The second end of the driving circuit communicates with the light-emitting element to control the light-emitting element to emit light.
  • the embodiment of the present disclosure divides the display period (that is, the display time of a frame) into n display stages (n is an integer greater than 1).
  • the light-emitting time of the light-emitting element is determined by the corresponding control data voltage and the corresponding The control starting voltage is determined to increase the number of gray levels.
  • the light-emitting duration control circuit may include a drive control sub-circuit, a drive control reset sub-circuit, and a conduction control sub-circuit;
  • the light-emitting duration control circuit is controlled by the control scan signal input from the control scan line, and according to the nth control start voltage and the nth control data voltage, when the nth charging time period is entered, the nth charging time Later, the step of controlling the communication between the second end of the driving circuit and the light-emitting element may include:
  • the drive control sub-circuit disconnects the connection between the second end of the drive circuit and the light-emitting element under the control of the voltage at its control terminal; the conduction control sub-circuit is under the control of the control scan signal Control to charge the control terminal of the drive control sub-circuit through the nth control data voltage, so that after entering the nth charging time of the nth charging period, the drive control sub-circuit is at its control terminal Under the control of the voltage, the communication between the second end of the driving circuit and the light-emitting element is controlled.
  • the light-emitting control duration control circuit may include a drive control sub-circuit, a drive control reset sub-circuit, and a conduction control sub-circuit.
  • the drive control reset sub-circuit will drive the control sub-circuit during the nth data writing period.
  • the voltage of the control terminal is reset to the n-th control starting voltage, and the conduction control sub-circuit charges the control terminal of the drive control sub-circuit through the n-th control data voltage during the n-th charging time period, so that when entering the n-th charge After the nth charging time of the time period, the drive control sub-circuit controls the communication between the second end of the drive circuit and the light-emitting element under the control of the voltage at its control terminal, and controls the initial voltage and /Or the nth control data voltage can control the nth charging time, and then can adjust the light-emitting time of the light-emitting element.
  • the nth control data voltage is equal to the first control data voltage; or, the nth control start voltage is equal to the first control start voltage.
  • the pixel driving method further includes: in the nth display stage, the light emission control circuit controls the driving under the control of the light emission control signal.
  • the first terminal of the circuit is connected to the first voltage terminal.
  • the display device includes the aforementioned pixel driving circuit.
  • a glass-based LTPS (Low Temperature Poly-silicon, low temperature polysilicon) process is used to manufacture the drive backplane.
  • the embodiment of the present disclosure uses a transfer method to place the micro light emitting diodes on On the driver backplane, the pads used to weld the anode of the micro light emitting diode and the cathode of the micro light emitting diode are set on the driver backplane.
  • the previous structure of the cathode and anode is vertically stacked, similar to the one made on the driver backplane.
  • the micro light-emitting diodes are directly transferred to the drive backplane, and the entire display module is finally completed.
  • FIG. 13 is a schematic structural diagram of a driving backplane included in a display device according to an embodiment of the present disclosure.
  • 130 is a glass substrate
  • 131 is a buffer layer
  • 132 is an active layer
  • 133 is a first gate insulating layer
  • 134 is a first gate metal Layer
  • numbered 135 is the second gate metal layer
  • numbered 136 is the second gate metal layer
  • numbered 137 is the interlayer dielectric layer
  • numbered 138 is the flat layer
  • numbered 139 is the source and drain metal
  • the layer, numbered 140 is the passivation layer
  • numbered 141 is the pad
  • numbered 142 is the anode of the micro light emitting diode
  • numbered 143 is the cathode of the micro light emitting diode
  • numbered 144 is the micro light emitting diode.
  • the display device may be any product or component with display function, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, and the like.

Abstract

一种像素驱动电路、像素驱动方法和显示装置。像素驱动电路包括驱动电路（11）和发光时长控制电路（12）；驱动电路（11）的第一端与第一电压端（VT1）连接，驱动电路（11）的第二端通过发光时长控制电路（12）与发光元件（EL）连接，驱动电路（11）用于在其控制端的电压的控制下，控制第一端与第二端之间连通；发光时长控制电路（12）响应于第一复位信号和控制扫描信号，根据控制数据电压（VDatac）和控制起始电压（Vintc），导通或断开驱动电路（11）的第二端与发光元件（EL）之间的连接，以控制发光元件（EL）的发光时长。

Description

像素驱动电路、像素驱动方法和显示装置
相关申请的交叉引用
本申请主张在2019年4月25日在中国提交的中国专利申请号No.201910339734.5的优先权，其全部内容通过引用包含于此。
技术领域
本公开涉及显示技术领域，尤其涉及一种像素驱动电路、像素驱动方法和显示装置。
背景技术
微型发光二极管(Micro LED)相对有机发光二极管(OLED)具有更高效率、更低功耗、更高信赖性，有可能成为未来的新型显示产品。相关技术中的Micro LED多采用转印技术形成到带有驱动电路的基板上，通过驱动电路带动Micro LED实现发光并显示。
Micro LED在低电流密度下效率会随着电流密度降低而降低。如果采用电流密度调制灰阶，低灰阶会对应低电流密度，其效率就会降低。并且，随着电流密度的变化，Micro LED的色坐标会发生变化，也就是说Micro LED显示在灰阶变化时会发生色偏现象。
相关技术中的采用Micro LED的像素驱动电路在工作时，不能保证微型发光二极管在低灰阶下的输出特性，同时在灰阶变化时会出现色偏的问题。
发明内容
本公开提供了一种像素驱动电路，用于驱动发光元件，所述像素驱动电路包括驱动电路和发光时长控制电路，其中，
所述驱动电路的第一端与第一电压端连接，所述驱动电路的第二端通过所述发光时长控制电路与发光元件连接，所述驱动电路用于在其控制端的电压的控制下，控制所述第一端与所述第二端之间连通；
所述发光时长控制电路用于在第一复位端输入的第一复位信号和控制扫 描线输入的控制扫描信号的控制下，根据控制数据线输入的控制数据电压和控制起始电压端输入的控制起始电压，导通或断开所述驱动电路的第二端与所述发光元件之间的连接，以控制所述发光元件的发光时长。
可选的，所述发光时长控制电路包括驱动控制子电路、驱动控制复位子电路和导通控制子电路，其中，
所述驱动控制子电路的第一端与所述驱动电路的第二端连接，所述驱动控制子电路的第二端与所述发光元件连接；
所述驱动控制复位子电路用于在第一复位端输入的第一复位信号的控制下，控制将控制起始电压写入所述驱动控制子电路的控制端，以使得所述驱动控制子电路在其控制端的电压的控制下，断开所述驱动电路的第二端与所述发光元件之间的连接；
所述导通控制子电路用于在所述控制扫描信号的控制下，控制通过所述控制数据电压为所述驱动控制子电路的控制端充电，以使得所述驱动控制子电路在其控制端的电压的控制下，控制所述驱动电路的第二端与所述发光元件之间连通。
可选的，所述导通控制子电路包括第一导通控制晶体管、第二导通控制晶体管和导通控制电容；
所述第一导通控制晶体管的控制极与所述驱动控制子电路的控制端连接，所述第一导通控制晶体管的第一极与所述第二导通控制晶体管的第一极连接，所述第一导通控制晶体管的第二极与控制数据线连接；
所述第二导通控制晶体管的控制极与所述控制扫描线连接，所述第二导通控制晶体管的第二极与所述驱动控制子电路的控制端连接；
所述导通控制电容的第一端与所述驱动控制子电路的控制端连接，所述导通控制电容的第二端与第二电压端连接。
可选的，所述驱动控制复位子电路包括驱动控制复位晶体管；
所述驱动控制复位晶体管的控制极与所述第一复位端连接，所述驱动控制复位晶体管的第一极与所述驱动控制子电路的控制端连接，所述驱动控制复位晶体管的第二极与控制起始电压端连接；所述控制起始电压端用于输入所述控制起始电压。
可选的，所述驱动控制子电路包括驱动控制晶体管；
所述驱动控制晶体管的控制极为所述驱动控制子电路的控制端，所述驱动控制晶体管的第一极为所述驱动控制子电路的第一端，所述驱动控制晶体管的第二极为所述驱动控制子电路的第二端。
可选的，本公开所述的像素驱动电路还包括复位电路；
所述复位电路用于在第二复位端输入的第二复位信号的控制下，控制将显示起始电压写入所述驱动电路的控制端，以使得所述驱动电路在其控制端的电压的控制下，控制所述驱动电路的第一端与所述驱动电路的第二端之间连通。
可选的，本公开所述的像素驱动电路还包括电压维持电路和数据写入电路；
所述电压维持电路与所述驱动电路的控制端连接，用于维持所述驱动电路的控制端的电压；
所述数据写入电路用于在显示扫描线输入的显示扫描信号的控制下，根据显示数据线输入的显示数据电压，控制所述驱动电路的控制端的电压。
可选的，所述数据写入电路包括数据写入子电路和补偿控制子电路，其中，
所述数据写入子电路用于在所述显示扫描信号的控制下，控制将所述显示数据电压写入所述驱动电路的第一端；
所述补偿控制子电路用于在所述显示扫描信号的控制下，控制所述驱动电路的控制端与所述驱动电路的第二端之间连通。
可选的，所述数据写入子电路包括数据写入晶体管，所述补偿控制子电路包括补偿控制晶体管，其中，
所述数据写入晶体管的控制极与所述显示扫描线连接，所述数据写入晶体管的第一极与显示数据线连接，所述数据写入晶体管的第二极与所述驱动电路的第一端连接；
所述补偿控制晶体管的控制极与所述显示扫描线连接，所述补偿控制晶体管的第一极与所述驱动电路的控制端连接，所述补偿控制晶体管的第二极与所述驱动电路的第二端连接。
可选的，所述电压维持电路包括存储电容；所述存储电容的第一端与所述驱动电路的控制端连接，所述存储电容的第二端与第三电压端连接。
可选的，本公开所述的像素驱动电路还包括发光控制电路；
所述驱动电路的第一端通过所述发光控制电路与所述第一电压端连接；
所述发光控制电路的控制端与发光控制线连接，所述发光控制电路用于在所述发光控制线输入的发光控制信号的控制下，控制所述驱动电路的第一端与所述第一电压端之间连通。
可选的，所述驱动电路包括驱动晶体管；
所述驱动晶体管的控制极为所述驱动电路的控制端，所述驱动晶体管的第一极为所述驱动电路的第一端，所述驱动晶体管的第二极为所述驱动电路的第二端。
本公开还提供了一种像素驱动方法，应用于上述的像素驱动电路，显示周期包括第一显示阶段，所述第一显示阶段包括依次设置的第一数据写入时间段、第一充电时间段和第一发光时间段；所述像素驱动方法包括：
在所述第一数据写入时间段，控制起始电压端输入第一控制起始电压，发光时长控制电路在第一复位端输入的第一复位信号的控制下，根据所述第一控制起始电压，断开驱动电路的第二端与发光元件之间的连接；
在所述第一充电时间段，控制数据线输入第一控制数据电压，所述驱动电路在其控制端的电压的控制下，控制所述驱动电路的第一端与所述驱动电路的第二端之间连通；发光时长控制电路在控制扫描线输入的控制扫描信号的控制下，根据所述第一控制起始电压和所述第一控制数据电压，在进入所述第一充电时间段第一充电时间后，控制所述驱动电路的第二端与所述发光元件之间连通，以控制发光元件发光；
在所述第一发光时间段，所述驱动电路在其控制端的电压的控制下，控制所述驱动电路的第一端与所述驱动电路的第二端之间连通，发光时长控制电路控制所述驱动电路的第二端与发光元件之间连通，以控制发光元件发光。
可选的，所述发光时长控制电路包括驱动控制子电路、驱动控制复位子电路和导通控制子电路；
所述发光时长控制电路在第一复位端输入的第一复位信号的控制下，根 据所述第一控制起始电压，断开驱动电路的第二端与发光元件之间的连接步骤包括：所述驱动控制复位子电路在所述第一复位信号的控制下，控制将所述第一控制起始电压写入所述驱动控制子电路的控制端，以使得所述驱动控制子电路在其控制端的电压的控制下，断开所述驱动电路的第二端与所述发光元件之间的连接；
所述发光时长控制电路在控制扫描线输入的控制扫描信号的控制下，根据所述第一控制起始电压和所述第一控制数据电压，在进入所述第一充电时间段第一充电时间后，控制所述驱动电路的第二端与所述发光元件之间连通步骤包括：
所述驱动控制子电路在其控制端的电压的控制下，断开所述驱动电路的第二端与所述发光元件之间的连接；所述导通控制子电路在所述控制扫描信号的控制下，控制通过所述第一控制数据电压为所述驱动控制子电路的控制端充电，以使得在进入所述第一充电时间段第一充电时间后，所述驱动控制子电路在其控制端的电压的控制下，控制所述驱动电路的第二端与所述发光元件之间连通；
所述发光时长控制电路控制所述驱动电路的第二端与发光元件之间连通步骤包括：
所述驱动控制子电路在其控制端的电压的控制下，控制所述驱动电路的第二端与所述发光元件之间连通。
可选的，所述像素驱动电路还包括电压维持电路和数据写入电路；所述像素驱动方法还包括：
在所述第一数据写入时间段，数据写入电路在显示扫描线输入的显示扫描信号的控制下，根据显示数据电压，控制驱动电路的控制端的电压；所述电压维持电路维持所述驱动电路的控制端的电压。
可选的，所述在所述第一数据写入时间段，数据写入电路在显示扫描线输入的显示扫描信号的控制下，根据显示数据电压，控制驱动电路的控制端的电压步骤包括：
在所述第一数据写入时间段，所述数据写入电路在所述显示扫描信号的控制下，控制将显示数据电压Vdata1写入所述驱动电路的第一端，并控制所 述驱动电路的控制端与所述驱动电路的第二端之间连通；所述驱动电路在其控制端的电压的控制下，控制所述驱动电路的第一端与所述驱动电路的第二端之间连通，以通过所述显示数据电压Vdata1为所述驱动电路的控制端充电，直至所述驱动电路在其控制端的电压的控制下，断开所述驱动电路的第一端与所述驱动电路的第二端之间的连接。
可选的，所述像素驱动电路还包括复位电路；所述第一显示阶段还包括设置于所述第一数据写入时间段之前的置位时间段，所述像素驱动方法还包括：
在所述置位时间段，所述复位电路在第二复位端输入的第二复位信号的控制下，控制将显示起始电压写入所述驱动电路的控制端，以使得所述驱动电路在其控制端的电压的控制下，控制所述驱动电路的第一端与所述驱动电路的第二端之间连通。
可选的，所述像素驱动电路还包括发光控制电路；所述像素驱动方法还包括：
在所述第一数据写入时间段，所述发光控制电路在发光控制线输入的发光控制信号的控制下，断开所述驱动电路的第一端与所述第一电压端之间的连接；
在所述第一充电时间段和所述第一发光时间段，所述发光控制电路在所述发光控制信号的控制下，控制所述驱动电路的第一端与所述第一电压端之间连通。
可选的，所述显示周期还包括设置于所述第一显示时间段之后的至少一显示阶段；第n显示阶段包括第n数据写入时间段、第n充电时间段和第n发光时间段；n为大于1的整数；所述像素驱动方法还包括：
在所述第n数据写入时间段，控制起始电压端输入第n控制起始电压，发光时长控制电路在第一复位端输入的第一复位信号的控制下，根据所述第n控制起始电压，断开驱动电路的第二端与发光元件之间的连接；
在所述第n充电时间段，控制数据线输入第n控制数据电压，所述驱动电路在其控制端的电压的控制下，控制所述驱动电路的第一端与所述驱动电路的第二端之间连通；发光时长控制电路在控制扫描线输入的控制扫描信号 的控制下，根据所述第n控制起始电压和所述第n控制数据电压，在进入所述第n充电时间段第n充电时间后，控制所述驱动电路的第二端与发光元件之间连通，以控制发光元件发光；
在所述第n发光时间段，所述驱动电路在其控制端的电压的控制下，控制所述驱动电路的第一端与所述驱动电路的第二端之间连通，发光时长控制电路控制所述驱动电路的第二端与发光元件之间连通，以控制所述发光元件发光。
可选的，所述发光时长控制电路包括驱动控制子电路、驱动控制复位子电路和导通控制子电路；
所述发光时长控制电路在第一复位端输入的第一复位信号的控制下，根据所述第n控制起始电压，断开驱动电路的第二端与发光元件之间的连接步骤包括：所述驱动控制复位子电路在所述第一复位信号的控制下，控制将所述第n控制起始电压写入所述驱动控制子电路的控制端，以使得所述驱动控制子电路在其控制端的电压的控制下，断开所述驱动电路的第二端与所述发光元件之间的连接；
所述发光时长控制电路在控制扫描线输入的控制扫描信号的控制下，根据所述第n控制起始电压和所述第n控制数据电压，在进入所述第n充电时间段第n充电时间后，控制所述驱动电路的第二端与发光元件之间连通步骤包括：
所述驱动控制子电路在其控制端的电压的控制下，断开所述驱动电路的第二端与所述发光元件之间的连接；所述导通控制子电路在所述控制扫描信号的控制下，控制通过所述第n控制数据电压为所述驱动控制子电路的控制端充电，以使得在进入所述第n充电时间段第n充电时间后，所述驱动控制子电路在其控制端的电压的控制下，控制所述驱动电路的第二端与所述发光元件之间连通。
可选的，所述第n控制数据电压与所述第一控制数据电压相等；或者，所述第n控制起始电压与所述第一控制起始电压相等。
附图说明
图1是本公开实施例所述的像素驱动电路的结构图；
图2是本公开一些实施例所述的像素驱动电路的结构图；
图3是本公开一些实施例所述的像素驱动电路的结构图；
图4是本公开一些实施例所述的像素驱动电路的结构图；
图5是本公开一些实施例所述的像素驱动电路的结构图；
图6是本公开一些实施例所述的像素驱动电路的结构图；
图7是本公开一些实施例所述的像素驱动电路的结构图；
图8是本公开一些实施例所述的像素驱动电路的结构图；
图9是本公开所述的像素驱动电路的一些实施例的电路图；
图10是本公开如图9所示的像素驱动电路的具体实施例的工作时序图；
图11A是本公开如图9所示的像素驱动电路的具体实施例在置位时间段S11的工作状态示意图；
图11B是本公开如图9所示的像素驱动电路的具体实施例在第一数据写入时间段S12的工作状态示意图；
图11C是本公开如图9所示的像素驱动电路的具体实施例在第一充电时间段S13的工作状态示意图；
图11D是本公开如图9所示的像素驱动电路的具体实施例在第一发光时间段S14的工作状态示意图
图12是本公开如图9所示的像素驱动电路的具体实施例的另一工作时序图；
图13是本公开实施例所述的显示装置中的驱动背板的结构示意图。
具体实施方式
下面将结合本公开实施例中的附图，对本公开实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本公开保护的范围。
本公开所有实施例中采用的晶体管均可以为三极管、薄膜晶体管或场效应管或其他特性相同的器件。在本公开实施例中，为区分晶体管除控制极之 外的两极，将其中一极称为第一极，另一极称为第二极。
在实际操作时，当所述晶体管为三极管时，所述控制极可以为基极，所述第一极可以为集电极，所述第二极可以发射极；或者，所述控制极可以为基极，所述第一极可以为发射极，所述第二极可以集电极。
在实际操作时，当所述晶体管为薄膜晶体管或场效应管时，所述控制极可以为栅极，所述第一极可以为漏极，所述第二极可以为源极；或者，所述控制极可以为栅极，所述第一极可以为源极，所述第二极可以为漏极。
如图1所示，本公开实施例所述的像素驱动电路，用于驱动发光元件EL，所述像素驱动电路包括驱动电路11和发光时长控制电路12，其中，
所述驱动电路11的第一端与第一电压端VT1连接，所述驱动电路11的第二端通过所述发光时长控制电路12与所述发光元件EL连接，所述驱动电路11用于在其控制端的电压的控制下，控制所述第一端与所述第二端之间连通；
所述发光时长控制电路12用于在第一复位端Reset1输入的第一复位信号和控制扫描线Scan2输入的控制扫描信号的控制下，根据控制数据线Datac输入的控制数据电压和控制起始电压端VIc输入的控制起始电压，导通或断开所述驱动电路11的第二端与所述发光元件EL之间的连接，以控制所述发光元件EL的发光时长。
本公开实施例所述的像素驱动电路通过发光时长控制电路12控制所述驱动电路11的第二端与所述发光元件EL之间连通的连通时间，从而控制所述发光元件EL的发光时长，实现了不同的灰阶显示。
在具体实施时，所述发光元件可以为Micro LED(微型发光二极管)，但不以此为限。在实际操作时，所述发光元件也可以为有机发光二极管。
本公开实施例所述的像素驱动电路通过驱动电流和发光时间来共同调制灰阶，可以保证微型发光二极管在低灰阶下的输出特性，避免微型发光二极管在灰阶变化时发生的色偏现象。
具体的，所述第一电压端VT1可以为输入高电压Vdd的高电压端，但不以此为限。
本公开如图1所示的像素驱动电路的实施例在工作时，显示周期包括第 一显示阶段，所述第一显示阶段包括依次设置的第一数据写入时间段、第一充电时间段和第一发光时间段；
在所述第一数据写入时间段，控制起始电压端VIc输入第一控制起始电压Vintc1，发光时长控制电路12在第一复位端Reset1输入的第一复位信号的控制下，根据所述第一控制起始电压Vintc1，断开驱动电路11的第二端与发光元件EL之间的连接；
在所述第一充电时间段，控制数据线Datac输入第一控制数据电压Vdatac1，所述驱动电路11在其控制端的电压的控制下，控制所述驱动电路11的第一端与所述驱动电路11的第二端之间连通；发光时长控制电路12在控制扫描线Scan2输入的控制扫描信号的控制下，根据所述第一控制起始电压Vintc1和所述第一控制数据电压Vdatac1，在进入所述第一充电时间段第一充电时间后，控制所述驱动电路11的第二端与发光元件EL之间连通，以控制发光元件EL发光；
在所述第一发光时间段，所述驱动电路11在其控制端的电压的控制下，控制所述驱动电路11的第一端与所述驱动电路11的第二端之间连通，发光时长控制电路12控制所述驱动电路11的第二端与发光元件EL之间连通，以控制所述发光元件EL发光。
在所述第一充电时间段开始时，发光时长控制电路12断开所述驱动电路11的第二端与发光元件EL之间的连接，在进入所述第一充电时间段第一充电时间后，发光时长控制电路12控制所述驱动电路11的第二端与发光元件EL之间连通，以控制发光元件EL发光。
在具体实施时，所述显示周期可以为一帧画面显示时间。
本公开如图1所示的像素驱动电路的实施例在工作时，显示周期还可以包括设置于第一显示阶段之后的至少一显示阶段；第n显示阶段包括第n数据写入时间段、第n充电时间段和第n发光时间段；n为大于1的整数；
在所述第n数据写入时间段，控制起始电压端VIc输入第n控制起始电压Vintcn，发光时长控制电路12在第一复位端Reset1输入的第一复位信号的控制下，根据所述第n控制起始电压Vintcn，断开驱动电路11的第二端与发光元件EL之间的连接；
在所述第n充电时间段，控制数据线Datac输入第n控制数据电压Vdatacn，所述驱动电路11在其控制端的电压的控制下，控制所述驱动电路11的第一端与所述驱动电路11的第二端之间连通，发光时长控制电路12在控制扫描线Scan2输入的控制扫描信号的控制下，根据所述第n控制起始电压Vintcn和所述第n控制数据电压Vdatacn，在进入所述第n充电时间段第n充电时间后，控制所述驱动电路11的第二端与发光元件EL之间连通，以控制发光元件EL发光；
在所述第n发光时间段，所述驱动电路11在其控制端的电压的控制下，控制所述驱动电路11的第一端与所述驱动电路11的第二端之间连通，发光时长控制电路12控制所述驱动电路11的第二端与发光元件EL之间连通，以控制所述发光元件EL发光。
在所述第n充电时间段开始时，发光时长控制电路12断开所述驱动电路11的第二端与发光元件EL之间的连接，在进入所述第n充电时间段第n充电时间后，发光时长控制电路12控制所述驱动电路11的第二端与发光元件EL之间连通，以控制发光元件EL发光。
本公开实施例将显示周期(也即一帧画面显示时间)分成n个显示阶段(n为大于1的整数)，在每个显示阶段内，发光元件EL的发光时间由相应的控制数据电压和相应的控制起始电压确定，以提升灰阶数量。
如图2所示，在图1所示的像素驱动电路的实施例的基础上，所述发光时长控制电路包括驱动控制子电路121、驱动控制复位子电路122和导通控制子电路123，其中，
所述驱动控制子电路121的第一端与所述驱动电路11的第二端连接，所述驱动控制子电路121的第二端与所述发光元件EL连接；
所述驱动控制复位子电路122分别与第一复位端Reset1、控制起始电压端VIc和所述驱动控制子电路121的控制端连接，用于在第一复位端Reset1输入的第一复位信号的控制下，控制将控制起始电压写入所述驱动控制子电路121的控制端，以使得所述驱动控制子电路121在其控制端的电压的控制下，断开所述驱动电路11的第二端与所述发光元件EL之间的连接；
所述导通控制子电路123分别与控制扫描线Scan2、控制数据线Datac 和所述驱动控制子电路121的控制端连接，用于在所述控制扫描线Scan2输入的控制扫描信号的控制下，控制通过所述控制数据线Datac输入的控制数据电压为所述驱动控制子电路121的控制端充电，以使得所述驱动控制子电路121在其控制端的电压的控制下，控制所述驱动电路11的第二端与所述发光元件EL之间连通。
本公开如图2所示的像素驱动电路的实施例在工作时，
在所述第一数据写入时间段，控制起始电压端VIc输入第一控制起始电压Vintc1，所述驱动控制复位子电路122在所述第一复位信号的控制下，控制将所述第一控制起始电压Vintc1写入所述驱动控制子电路121的控制端，以使得所述驱动控制子电路121在其控制端的电压的控制下，断开所述驱动电路11的第二端与所述发光元件EL之间的连接；
在所述第一充电时间段，控制数据线Datac输入第一控制数据电压Vdatac1，所述驱动电路11在其控制端的电压的控制下，控制所述驱动电路11的第一端与所述驱动电路11的第二端之间连通，驱动控制子电路121在其控制端的电压的控制下，断开所述驱动电路11的第二端与所述发光元件EL之间的连接；所述导通控制子电路123在所述控制扫描信号的控制下，控制通过所述第一控制数据电压Vdatac1为所述驱动控制子电路121的控制端充电，以使得在进入所述第一充电时间段第一充电时间后，所述驱动控制子电路121在其控制端的电压的控制下，控制所述驱动电路11的第二端与所述发光元件之间连通，以控制发光元件EL发光；
在所述第一发光时间段，所述驱动电路11在其控制端的电压的控制下，控制所述驱动电路11的第一端与所述驱动电路11的第二端之间连通，所述驱动控制子电路121在其控制端的电压的控制下，控制所述驱动电路11的第二端与所述发光元件EL之间连通。
在具体实施时，所述驱动控制子电路121可以包括驱动控制晶体管，所述驱动控制子电路121的控制端为所述驱动控制晶体管的栅极，在所述第一充电时间段，导通控制子电路123控制通过Vdatac1为所述驱动控制子电路121的控制端充电，以改变所述驱动控制子电路121的控制端的电压，使得所述驱动控制晶体管从关断状态切换至打开状态。
本公开如图2所示的像素驱动电路的实施例在工作时，
在所述第n数据写入时间段，控制起始电压端VIc输入第n控制起始电压Vintcn，所述驱动控制复位子电路122在所述第一复位信号的控制下，控制将所述第n控制起始电压Vintcn写入所述驱动控制子电路121的控制端，以使得所述驱动控制子电路121在其控制端的电压的控制下，断开所述驱动电路11的第二端与所述发光元件EL之间的连接；
在所述第n充电时间段，控制数据线Datac输入第n控制数据电压Vdatacn，所述驱动电路11在其控制端的电压的控制下，控制所述驱动电路11的第一端与所述驱动电路11的第二端之间连通，所述驱动控制子电路121在其控制端的电压的控制下，断开所述驱动电路11的第二端与所述发光元件EL之间的连接；所述导通控制子电路123在所述控制扫描信号的控制下，控制通过所述第n控制数据电压Vdatacn为所述驱动控制子电路121的控制端充电，以使得在进入所述第n充电时间段第n充电时间后，所述驱动控制子电路121在其控制端的电压的控制下，控制所述驱动电路11的第二端与所述发光元件EL之间连通，以控制发光元件EL发光；
在第n发光时间段，所述驱动电路11在其控制端的电压的控制下，控制所述驱动电路11的第一端与所述驱动电路11的第二端之间连通，所述驱动控制子电路121在其控制端的电压的控制下，控制所述驱动电路11的第二端与所述发光元件EL之间连通，所述驱动电路11驱动发光元件EL发光。
具体的，所述导通控制子电路可以包括第一导通控制晶体管、第二导通控制晶体管和导通控制电容；
所述第一导通控制晶体管的控制极与所述驱动控制子电路的控制端连接，所述第一导通控制晶体管的第一极与所述第二导通控制晶体管的第一极连接，所述第一导通控制晶体管的第二极与控制数据线连接；所述控制数据线用于输入所述控制数据电压；
所述第二导通控制晶体管的控制极与所述控制扫描线连接，所述第二导通控制晶体管的第二极与所述驱动控制子电路的控制端连接；
所述导通控制电容的第一端与所述驱动控制子电路的控制端连接，所述导通控制电容的第二端与第二电压端连接。
在具体实施时，所述第二电压端可以为高电压端，但不以此为限。
具体的，所述驱动控制复位子电路可以包括驱动控制复位晶体管；
所述驱动控制复位晶体管的控制极与所述第一复位端连接，所述驱动控制复位晶体管的第一极与所述驱动控制子电路的控制端连接，所述驱动控制复位晶体管的第二极与控制起始电压端连接；所述控制起始电压端用于输入所述控制起始电压。
具体的，所述驱动控制子电路可以包括驱动控制晶体管；
所述驱动控制晶体管的控制极为所述驱动控制子电路的控制端，所述驱动控制晶体管的第一极为所述驱动控制子电路的第一端，所述驱动控制晶体管的第二极为所述驱动控制子电路的第二端。
如图3所示，在图2所示的像素驱动电路的实施例的基础上，所述导通控制子电路123包括第一导通控制晶体管T6、第二导通控制晶体管T9和导通控制电容C2；所述驱动控制复位子电路122包括驱动控制复位晶体管T8；所述驱动控制子电路121包括驱动控制晶体管T7；
所述驱动控制晶体管T7的栅极为所述驱动控制子电路121的控制端，所述驱动控制晶体管T7的漏极为所述驱动控制子电路121的第一端，所述驱动控制晶体管T7的源极为所述驱动控制子电路121的第二端；
所述第一导通控制晶体管T6的栅极与所述驱动控制晶体管T7的栅极连接，所述第一导通控制晶体管T6的源极与所述第二导通控制晶体管T9的源极连接，所述第一导通控制晶体管T6的漏极与控制数据线Datac连接；所述控制数据线Datac用于输入所述控制数据电压；
所述第二导通控制晶体管T9的栅极与所述控制扫描线Scan2连接，所述第二导通控制晶体管T9的漏极与所述驱动控制晶体管T7的栅极连接；
所述导通控制电容C2的第一端与所述驱动控制晶体管T7的栅极连接，所述导通控制电容C2的第二端与高电压端连接；所述高电压端用于输入高电压Vdd；
所述驱动控制复位晶体管T8的栅极与所述第一复位端Reset1连接，所述驱动控制复位晶体管T8的源极与所述驱动控制晶体管T7的栅极连接，所述驱动控制复位晶体管T8的漏极与控制起始电压端VIc连接；所述控制起始 电压端VIc用于输入所述控制起始电压。
在图3所示的像素驱动电路的实施例中，T6、T8和T9都为p型薄膜晶体管，T7为n型薄膜晶体管，但不以此为限。
本公开如图3所示的像素驱动电路的实施例在工作时，
在第一数据写入时间段，VIc输入第一控制起始电压Vintc1，Reset1输入低电平，T8打开，以将Vintc1写入T7的栅极和T6的栅极，以使得T7关断，断开所述驱动电路11的第二端与所述发光元件EL之间的连接，并使得T6打开；
在所述第一充电时间段，T7关断，以断开所述驱动电路11的第二端与所述发光元件EL之间的连接；Datac输入第一控制数据电压Vdatac1，并Scan2输入低电平，T6和T9都打开，以通过Vdatac1为C2充电，以提升T7的栅极的电压，以使得在进入所述第一充电时间段第一充电时间之后，T7从关断状态切换至打开状态；此后，T6和T9可以打开，继续通过Vdatac1为C2充电，直至T7的栅极的电压提升至Vdatac1+Vthc，T6关断，停止充电；其中，Vthc为T6的阈值电压；
在所述第一发光时间段，T7打开，以控制所述驱动电路11的第二端与所述发光元件EL之间连通。
在具体实施时，所述第一充电时间持续的时间与Vintc1和Vdatac1有关。
本公开如图3所示的像素驱动电路的实施例在工作时，
在第n数据写入时间段，VIc输入第n控制起始电压Vintcn，Reset1输入低电平，T8打开，以将Vintcn写入T7的栅极和T6的栅极，以使得T7关断，断开所述驱动电路11的第二端与所述发光元件EL之间的连接，并使得T6打开；
在第n充电时间段，T7断开，以断开所述驱动电路11的第二端与所述发光元件EL之间的连接；Datac输入第n控制数据电压Vdatacn，并Scan2输入低电平，T6和T9都打开，以通过Vdatacn为C2充电，以提升T7的栅极的电压，以使得在进入所述第n充电时间段第n充电时间之后，直至T7从关断状态切换至打开状态；此后，T6和T9可以打开，继续通过Vdatacn为C2充电，直至T7的栅极的电压提升至Vdatacn+Vthc，T6关断，停止充电； 其中，Vthc为T6的阈值电压；
在第n发光时间段，T7打开，以控制所述驱动电路11的第二端与所述发光元件EL之间连通。
在具体实施时，本公开所述的像素驱动电路还可以包括复位电路；
所述复位电路用于在第二复位端输入的第二复位信号的控制下，控制将显示起始电压写入所述驱动电路的控制端，以使得所述驱动电路在其控制端的电压的控制下，控制所述驱动电路的第一端与所述驱动电路的第二端之间连通。
如图4所示，在图1所示的像素驱动电路的实施例的基础上，本公开实施例所述的像素驱动电路还包括复位电路13；
所述复位电路13分别与第二复位端Reset、显示起始电压端VId和所述驱动电路11的控制端连接，用于在第二复位端Reset输入的第二复位信号的控制下，控制将所述显示起始电压端VId输入的显示起始电压写入所述驱动电路11的控制端，以使得所述驱动电路11在其控制端的电压的控制下，控制所述驱动电路11的第一端与所述驱动电路11的第二端之间连通。
本公开如图4所示的像素驱动电路的实施例在工作时，所述第一显示阶段还包括设置于所述第一数据写入时间段之前的置位时间段，在所述置位时间段，所述复位电路13在第二复位端Reset输入的第二复位信号的控制下，控制将所述显示起始电压写入所述驱动电路11的控制端，以使得所述驱动电路11在其控制端的电压的控制下，控制所述驱动电路11的第一端与所述驱动电路11的第二端之间连通。
具体的，所述复位电路可以包括复位晶体管；
所述复位晶体管的控制极与所述第二复位端连接，所述复位晶体管的第一极与所述显示起始电压端连接，所述复位晶体管的第二极与所述驱动电路的控制端连接。
在具体实施时，本公开所述的像素驱动电路还可以包括电压维持电路和数据写入电路；
所述电压维持电路与所述驱动电路的控制端连接，用于维持所述驱动电路的控制端的电压；
所述数据写入电路用于在显示扫描线输入的显示扫描信号的控制下，根据显示数据线输入的显示数据电压，控制所述驱动电路的控制端的电压。
如图5所示，在图4所示的像素驱动电路的实施例的基础上，本公开实施例所述的像素驱动电路还包括电压维持电路14和数据写入电路15；
所述电压维持电路14与所述驱动电路11的控制端连接，用于维持所述驱动电路11的控制端的电压；
所述数据写入电路15分别与显示扫描线Scan1、显示数据线Datad、所述驱动电路11的控制端、所述驱动电路11的第一端和所述驱动电路11的第二端连接，用于在显示扫描线Scan1输入的显示扫描信号的控制下，根据显示数据线Datad输入的显示数据电压，控制所述驱动电路11的控制端的电压。
本公开如图5所示的像素驱动电路的实施例在工作时，在所述第一数据写入时间段，所述数据写入电路15在所述显示扫描信号的控制下，控制将显示数据电压Vdata1写入所述驱动电路22的第一端，并控制所述驱动电路11的控制端与所述驱动电路11的第二端之间连通；所述驱动电路11在其控制端的电压的控制下，控制所述驱动电路11的第一端与所述驱动电路11的第二端之间连通，以通过所述显示数据电压Vdata1为所述驱动电路11的控制端充电，直至所述驱动电路11在其控制端的电压的控制下，断开所述驱动电路11的第一端与所述驱动电路11的第二端之间的连接，以控制驱动电路11的控制端的电位为Vdata1+Vth，Vth为所述驱动电路11包括的驱动晶体管的阈值电压，从而能够实现阈值电压补偿。本公开实施例能够抵消阈值电压差异对发光元件的驱动电流的影响。
具体的，所述数据写入电路可以包括数据写入子电路和补偿控制子电路，其中，
所述数据写入子电路用于在所述显示扫描信号的控制下，控制将所述显示数据电压写入所述驱动电路的第一端；
所述补偿控制子电路用于在所述显示扫描信号的控制下，控制所述驱动电路的控制端与所述驱动电路的第二端之间连通。
具体的，如图6所示，在图5所示的像素驱动电路的实施例的基础上，所述数据写入电路包括数据写入子电路151和补偿控制子电路152，其中，
所述数据写入子电路151分别与所述显示扫描线Scan1、显示数据线Datad和所述驱动电路11的第一端连接，用于在所述显示扫描信号的控制下，控制将所述显示数据电压写入所述驱动电路11的第一端；
所述补偿控制子电路152分别与所述显示扫描线Scan1、所述驱动电路11的控制端和所述驱动电路11的第二端连接，用于在所述显示扫描信号的控制下，控制所述驱动电路11的控制端与所述驱动电路11的第二端之间连通。
具体的，所述数据写入子电路可以包括数据写入晶体管，所述补偿控制子电路可以包括补偿控制晶体管，其中，
所述数据写入晶体管的控制极与所述显示扫描线连接，所述数据写入晶体管的第一极与显示数据线连接，所述数据写入晶体管的第二极与所述驱动电路的第一端连接；
所述补偿控制晶体管的控制极与所述显示扫描线连接，所述补偿控制晶体管的第一极与所述驱动电路的控制端连接，所述补偿控制晶体管的第二极与所述驱动电路的第二端连接。
具体的，所述电压维持电路可以包括存储电容；所述存储电容的第一端与所述驱动电路的控制端连接，所述存储电容的第二端与第三电压端连接。
在具体实施时，所述第三电压端可以为高电压端，但不以此为限。
如图7所示，在图6所示的像素驱动电路的实施例的基础上，所述数据写入子电路151包括数据写入晶体管T5，所述补偿控制子电路152包括补偿控制晶体管T2，其中，
所述数据写入晶体管T5的栅极与所述显示扫描线Scan1连接，所述数据写入晶体管T5的源极与显示数据线Datad连接，所述数据写入晶体管T5的漏极与所述驱动电路11的第一端连接；
所述补偿控制晶体管T2的栅极与所述显示扫描线Scan1连接，所述补偿控制晶体管T2的源极与所述驱动电路11的控制端连接，所述补偿控制晶体管T2的漏极与所述驱动电路11的第二端连接；
所述电压维持电路14包括存储电容C1；所述存储电容C1的第一端与所述驱动电路11的控制端连接，所述存储电容C1的第二端与输入高电压Vdd 的高电压端连接。
在图7所示的像素驱动电路的实施例中，T5和T2可以为p型薄膜晶体管，但不以此为限。
本公开如图7所示的像素驱动电路的实施例在工作时，在所述第一数据写入时间段，Scan1输入的显示扫描信号为低电平，T5和T2都打开，显示数据线Datad输入显示数据电压Vdata1，以将Vdata1写入所述驱动电路11的第一端，并使得所述驱动电路11的第一端与所述驱动电路11的第二端之间连通，以通过所述显示数据电压Vdata1为所述存储电容C1充电，直至所述驱动电路11在其控制端的电压的控制下，断开所述驱动电路11的第一端与所述驱动电路11的第二端之间的连接，以控制驱动电路11的控制端的电位为Vdata1+Vth，Vth为所述驱动电路11包括的驱动晶体管的阈值电压，从而能够实现阈值电压补偿。
在具体实施时，本公开所述的像素驱动电路还可以包括发光控制电路；
所述驱动电路的第一端通过所述发光控制电路与所述第一电压端连接；
所述发光控制电路的控制端与发光控制线连接，所述发光控制电路用于在所述发光控制线输入的发光控制信号的控制下，控制所述驱动电路的第一端与所述第一电压端之间连通。
如图8所示，在图5所示的像素驱动电路的实施例的基础上，本公开实施例所述的像素驱动电路还包括发光控制电路16；
所述驱动电路11的第一端通过所述发光控制电路16与用于输入高电压Vdd的高电压端连接；
所述发光控制电路16的控制端与发光控制线EM连接，所述发光控制电路16用于在所述发光控制线EM输入的发光控制信号的控制下，控制所述驱动电路11的第一端与所述高电压端之间连通。
在图8所示的实施例中，第一电压端为所述高电压端，但不以此为限。
具体的，所述发光控制电路可以包括发光控制晶体管；
所述发光控制晶体管的控制极与所述发光控制线EM连接，所述发光控制晶体管的第一极与所述驱动电路11的第一端连接，所述发光控制晶体管的第二极与所述高电压端连通。
具体的，所述驱动电路可以包括驱动晶体管；
所述驱动晶体管的控制极为所述驱动电路的控制端，所述驱动晶体管的第一极为所述驱动电路的第一端，所述驱动晶体管的第二极为所述驱动电路的第二端。
下面通过一些实施例来说明本公开所述的像素驱动电路。
如图9所示，本公开所述的像素驱动电路的一些实施例用于驱动微型发光二极管MLED，所述像素驱动电路的所述具体实施例包括驱动电路11、发光时长控制电路12、复位电路13、电压维持电路14、数据写入电路15和发光控制电路16；
所述发光时长控制电路包括驱动控制子电路121、驱动控制复位子电路122和导通控制子电路123；
所述驱动电路11包括驱动晶体管T3；所述发光控制电路16包括发光控制晶体管T4；所述电压维持电路14包括存储电容C1；
所述驱动晶体管T3的栅极与所述存储电容C1的第一端连接；所述存储电容C1的第二端与输入高电压Vdd的高电压端连接；
所述驱动晶体管T3的源极与所述发光控制晶体管T4的漏极连接；所述发光控制晶体管T4的栅极与发光控制线EM连接，所述发光控制晶体管T4的源极与所述高电压端连接；
所述导通控制子电路123包括第一导通控制晶体管T6、第二导通控制晶体管T9和导通控制电容C2；所述驱动控制复位子电路122包括驱动控制复位晶体管T8；所述驱动控制子电路121包括驱动控制晶体管T7；
所述驱动晶体管T3的漏极与所述驱动控制晶体管T7的漏极连接，所述驱动控制晶体管T7的源极与所述微型发光二极管MLED的阳极连接；所述微型发光二极管MLED的阴极与地端GND连接；
所述第一导通控制晶体管T6的栅极与所述驱动控制晶体管T7的栅极连接，所述第一导通控制晶体管T6的源极与所述第二导通控制晶体管T9的源极连接，所述第一导通控制晶体管T6的漏极与控制数据线Datac连接；
所述第二导通控制晶体管T9的栅极与所述控制扫描线Scan2连接，所述第二导通控制晶体管T9的漏极与所述驱动控制晶体管T7的栅极连接；
所述导通控制电容C2的第一端与所述驱动控制晶体管T7的栅极连接，所述导通控制电容C2的第二端与所述高电压端连接；
所述驱动控制复位晶体管T8的栅极与所述第一复位端Reset1连接，所述驱动控制复位晶体管T8的源极与所述驱动控制晶体管T7的栅极连接，所述驱动控制复位晶体管T8的漏极与控制起始电压端VIc连接；
所述复位电路13包括复位晶体管T1；
所述复位晶体管T1的栅极与第二复位端Reset连接，所述复位晶体管T1的源极与所述显示起始电压端VId连接，所述复位晶体管T1的漏极与所述驱动晶体管T3的栅极连接；
所述数据写入电路包括数据写入子电路151和补偿控制子电路152，其中，
所述数据写入子电路151包括数据写入晶体管T5，所述补偿控制子电路152包括补偿控制晶体管T2，其中，
所述数据写入晶体管T5的栅极与所述显示扫描线Scan1连接，所述数据写入晶体管T5的源极与显示数据线Datad连接，所述数据写入晶体管T5的漏极与所述驱动电路11的第一端连接；
所述补偿控制晶体管T2的栅极与所述显示扫描线Scan1连接，所述补偿控制晶体管T2的源极与所述驱动电路11的控制端连接，所述补偿控制晶体管T2的漏极与所述驱动电路11的第二端连接；
在图9所示的像素驱动电路的具体实施例中，T7为n型薄膜晶体管，其余的晶体管都为p型薄膜晶体管，但不以此为限。
在图9中，节点a为与T3的栅极连接的节点，节点b为与T7的栅极连接的节点。
如图10所示，本公开如图9所示的像素驱动电路的具体实施例在工作时，显示周期包括第一显示阶段S1、第二显示阶段S2和第三显示阶段S3；
第一显示阶段S1包括置位时间段S11、第一数据写入时间段S12、第一充电时间段S13和第一发光时间段S14；
第二显示阶段S2包括第二数据写入时间段S21、第二充电时间段S22和第二发光时间段S23；
第三显示阶段S3包括第三数据写入时间段S31、第三充电时间段S32和第三发光时间段S33；
在第一显示阶段S1，
在置位时间段S11，Reset输入低电平，Scan1、Reset1、Scan2和EM都输入高电平，如图11A所示，T1打开，VId输入显示起始电压Vint1写入T3的栅极，以将T3的电位重置为Vint1，使得T3能够打开；
在第一数据写入时间段S12，Reset输入高电平，Scan1和Reset1都输入低电平，Scan2和EM都输入高电平，Datad输入显示数据电压Vdata1，VIc输入第一控制起始电压Vintc1，T1关断，如图11B所示，T5、T3和T2打开，并T8打开，通过Vdata1为C1充电，以控制提升T3的栅极的电压，直至T3的栅极的电压变为Vdata1+Vth，T3关断，停止充电，Vth为T3的阈值电压；并T8打开，以将Vintc1写入T7的栅极和T6的栅极，以使得T7关断，T6打开，为充电做准备，其中，Vintc1是可调制的；
在第一充电时间段S13，Reset和Scan1都输入高电平，Scan2和EM都输入低电平，T4打开，以使得T3的源极接入Vdd，T3打开，Datac输入第一控制数据电压Vdatac1，如图11C所示，T6和T9打开，以通过Vdatac1为C2充电，以逐渐提升T7的栅极的电压，以使得在进入第一充电时间段S13第一充电时间后，T7由关断状态切换至打开状态，以控制MLED发光；此后，T6和T9继续打开，继续通过Vdatac1为C2充电，直至T6的栅极的电压升至Vdatac1+Vthc，T6关断，停止充电，其中，Vthc为T6的阈值电压；
在第一发光时间段S14，EM输入低电平，T4、T3和T7都打开，以驱动MLED发光；
在第二显示阶段S2，
在第二数据写入时间段S21，Reset输入高电平，Scan1和Reset1都输入低电平，Scan2和EM都输入高电平，Datad输入显示数据电压Vdata1，VIc输入第二控制起始电压Vintc2，T1关断，T5、T3和T2打开，并T8打开，通过Vdata1为C1充电，以控制提升T3的栅极的电压，直至T3的栅极的电压变为Vdata1+Vth，T3关断，停止充电，Vth为T3的阈值电压；并T8打开，以将Vintc2写入T7的栅极和T6的栅极，以使得T7关断，T6打开，为充电 做准备，其中，Vintc2是可调制的；
在第二充电时间段S22，Reset和Scan1都输入高电平，Scan2和EM都输入低电平，T4打开，以使得T3的源极接入Vdd，T3打开，Datac输入第二控制数据电压Vdatac2，T6和T9打开，以通过Vdatac2为C2充电，以逐渐提升T7的栅极的电压，以使得在进入第二充电时间段S22第二充电时间后，T7由关断状态切换至打开状态，以控制MLED发光；此后，T6和T9继续打开，继续通过Vdatac2为C2充电，直至T6的栅极的电压升至Vdatac2+Vthc，T6关断，停止充电，其中，Vthc为T6的阈值电压；
在第二发光时间段S23，EM输入低电平，T4、T3和T7都打开，以驱动MLED发光；
在第三显示阶段S3，
在第三数据写入时间段S31，Reset输入高电平，Scan1和Reset1都输入低电平，Scan2和EM都输入高电平，Datad输入显示数据电压Vdata1，VIc输入第三控制起始电压Vintc3，T1关断，T5、T3和T2打开，并T8打开，通过Vdata1为C1充电，以控制提升T3的栅极的电压，直至T3的栅极的电压变为Vdata1+Vth，T3关断，停止充电，Vth为T3的阈值电压；并T8打开，以将Vintc3写入T7的栅极和T6的栅极，以使得T7关断，T6打开，为充电做准备，其中，Vintc3是可调制的；
在第三充电时间段S32，Reset和Scan1都输入高电平，Scan2和EM都输入低电平，T4打开，以使得T3的源极接入Vdd，T3打开，Datac输入第三控制数据电压Vdatac3，T6和T9打开，以通过Vdatac3为C2充电，以逐渐提升T7的栅极的电压，以使得在进入第三充电时间段S32第三充电时间后，T7由关断状态切换至打开状态，以控制MLED发光；此后，T6和T9继续打开，继续通过Vdatac3为C2充电，直至T6的栅极的电压升至Vdatac3+Vthc，T6关断，停止充电，其中，Vthc为T6的阈值电压；
在第三发光时间段S33，EM输入低电平，T4、T3和T7都打开，以驱动MLED发光。
由图10可知，在第二显示阶段S2和第三显示阶段S3，EM持续输入低电平，T4打开，但不以此为限。
本公开如图9所示的像素驱动电路的具体实施例在工作时，第一积分时间由Vdatac1和Vintc1决定，若Vintc1比较低，则第一积分时间较长，若Vintc1比较高，则第一积分时间较短，若Vdatac1较大，则第一积分时间较短，若Vdatac1较小，则第一积分时间较长；第一积分时间长，则在第一显示阶段，MLED发光的时间短；第一积分时间短，则在第一显示阶段，MLED发光的时间长。
本公开如图9所示的像素驱动电路的具体实施例在工作时，第二积分时间由Vdatac2和Vintc2决定，若Vintc2比较低，则第二积分时间较长，若Vintc2比较高，则第二积分时间较短，若Vdatac2较大，则第二积分时间较短，若Vdatac2较小，则第二积分时间较长；第二积分时间长，则在第二显示阶段，MLED发光的时间短；第二积分时间短，则在第二显示阶段，MLED发光的时间长。
本公开如图9所示的像素驱动电路的具体实施例在工作时，第三积分时间由Vdatac3和Vintc3决定，若Vintc3比较低，则第三积分时间较长，若Vintc3比较高，则第三积分时间较短，若Vdatac3较大，则第三积分时间较短，若Vdatac3较小，则第三积分时间较长；第三积分时间长，则在第三显示阶段，MLED发光的时间短；第三积分时间短，则在第三显示阶段，MLED发光的时间长。
根据如图10所示的工作时序图，Vdatac1、Vdatac2和Vdatac3相等，Vintc1、Vintc2和Vintc3可以不相等。
图12为本公开如图9所示的像素驱动电路的具体实施例的另一工作时序图；与图10不同的是，根据如图12所示的工作时序图，Vdatac1、Vdatac2和Vdatac3不相等，Vintc1、Vintc2和Vintc3相等。
本公开实施例所述的像素驱动方法，应用于上述的像素驱动电路，显示周期包括第一显示阶段，所述第一显示阶段包括依次设置的第一数据写入时间段、第一充电时间段和第一发光时间段；所述像素驱动方法包括：
在所述第一数据写入时间段，控制起始电压端输入第一控制起始电压，发光时长控制电路在第一复位端输入的第一复位信号的控制下，根据所述第一控制起始电压，断开驱动电路的第二端与发光元件之间的连接；
在所述第一充电时间段，控制数据线输入第一控制数据电压，所述驱动电路在其控制端的电压的控制下，控制所述驱动电路的第一端与所述驱动电路的第二端之间连通；发光时长控制电路在控制扫描线输入的控制扫描信号的控制下，根据所述第一控制起始电压和所述第一控制数据电压，在进入所述第一充电时间段第一充电时间后，控制所述驱动电路的第二端与所述发光元件之间连通，以控制发光元件发光；
在所述第一发光时间段，所述驱动电路在其控制端的电压的控制下，控制所述驱动电路的第一端与所述驱动电路的第二端之间连通，发光时长控制电路控制所述驱动电路的第二端与发光元件之间连通，以控制发光元件发光。
本公开实施例所述的像素驱动方法通过发光时长控制电路控制所述驱动电路11的第二端与所述发光元件EL之间连通的连通时间，从而控制所述发光元件的发光时长，实现了不同的灰阶显示。
具体的，所述发光时长控制电路可以包括驱动控制子电路、驱动控制复位子电路和导通控制子电路；
所述发光时长控制电路在第一复位端输入的第一复位信号的控制下，根据所述第一控制起始电压，断开驱动电路的第二端与发光元件之间的连接步骤可以包括：所述驱动控制复位子电路在所述第一复位信号的控制下，控制将所述第一控制起始电压写入所述驱动控制子电路的控制端，以使得所述驱动控制子电路在其控制端的电压的控制下，断开所述驱动电路的第二端与所述发光元件之间的连接；
所述发光时长控制电路在控制扫描线输入的控制扫描信号的控制下，根据所述第一控制起始电压和所述第一控制数据电压，在进入所述第一充电时间段第一充电时间后，控制所述驱动电路的第二端与所述发光元件之间连通步骤可以包括：
所述驱动控制子电路在其控制端的电压的控制下，断开所述驱动电路的第二端与所述发光元件之间的连接；所述导通控制子电路在所述控制扫描信号的控制下，控制通过所述第一控制数据电压为所述驱动控制子电路的控制端充电，以使得在进入所述第一充电时间段第一充电时间后，所述驱动控制子电路在其控制端的电压的控制下，控制所述驱动电路的第二端与所述发光 元件之间连通；
所述发光时长控制电路控制所述驱动电路的第二端与发光元件之间连通步骤可以包括：
所述驱动控制子电路在其控制端的电压的控制下，控制所述驱动电路的第二端与所述发光元件之间连通。
在具体实施时，所述发光控制时长控制电路可以包括驱动控制子电路、驱动控制复位子电路和导通控制子电路，驱动控制复位子电路在第一数据写入时间段将驱动控制子电路的控制端的电压复位为第一控制起始电压，导通控制子电路在第一充电时间段通过第一控制数据电压为所述驱动控制子电路的控制端充电，以使得在进入所述第一充电时间段第一充电时间后，所述驱动控制子电路在其控制端的电压的控制下，控制所述驱动电路的第二端与所述发光元件之间连通，通过调制第一控制起始电压和/或第一控制数据电压，可以控制第一充电时间，进而可以调节发光元件的发光时间。
具体的，所述像素驱动电路还可以包括电压维持电路和数据写入电路；所述像素驱动方法还包括：
在所述第一数据写入时间段，数据写入电路在显示扫描线输入的显示扫描信号的控制下，根据显示数据电压，控制驱动电路的控制端的电压；所述电压维持电路维持所述驱动电路的控制端的电压。
在具体实施时，所述在所述第一数据写入时间段，数据写入电路在显示扫描线输入的显示扫描信号的控制下，根据显示数据电压，控制驱动电路的控制端的电压步骤包括：
在所述第一数据写入时间段，所述数据写入电路在所述显示扫描信号的控制下，控制将显示数据电压Vdata1写入所述驱动电路的第一端，并控制所述驱动电路的控制端与所述驱动电路的第二端之间连通；所述驱动电路在其控制端的电压的控制下，控制所述驱动电路的第一端与所述驱动电路的第二端之间连通，以通过所述显示数据电压Vdata1为所述驱动电路的控制端充电，直至所述驱动电路在其控制端的电压的控制下，断开所述驱动电路的第一端与所述驱动电路的第二端之间的连接，以进行阈值电压补偿。
在具体实施时，所述像素驱动电路还可以包括复位电路；所述第一显示 阶段还包括设置于所述第一数据写入时间段之前的置位时间段，所述像素驱动方法还包括：
在所述置位时间段，所述复位电路在第二复位端输入的第二复位信号的控制下，控制将显示起始电压写入所述驱动电路的控制端，以使得所述驱动电路在其控制端的电压的控制下，控制所述驱动电路的第一端与所述驱动电路的第二端之间连通，以对所述驱动电路的控制端的电压进行复位。
具体的，所述像素驱动电路还可以包括发光控制电路；所述像素驱动方法还包括：
在所述第一数据写入时间段，所述发光控制电路在发光控制线输入的发光控制信号的控制下，断开所述驱动电路的第一端与所述第一电压端之间的连接；
在所述第一充电时间段和所述第一发光时间段，所述发光控制电路在所述发光控制信号的控制下，控制所述驱动电路的第一端与所述第一电压端之间连通。
可选的，所述显示周期还包括设置于所述第一显示时间段之后的至少一显示阶段；第n显示阶段包括第n数据写入时间段、第n充电时间段和第n发光时间段；n为大于1的整数；所述像素驱动方法还包括：
在所述第n数据写入时间段，控制起始电压端输入第n控制起始电压，发光时长控制电路在第一复位端输入的第一复位信号的控制下，根据所述第n控制起始电压，断开驱动电路的第二端与发光元件之间的连接；
在所述第n充电时间段，控制数据线输入第n控制数据电压，所述驱动电路在其控制端的电压的控制下，控制所述驱动电路的第一端与所述驱动电路的第二端之间连通；发光时长控制电路在控制扫描线输入的控制扫描信号的控制下，根据所述第n控制起始电压和所述第n控制数据电压，在进入所述第n充电时间段第n充电时间后，控制所述驱动电路的第二端与发光元件之间连通，以控制发光元件发光；
在所述第n发光时间段，所述驱动电路在其控制端的电压的控制下，控制所述驱动电路的第一端与所述驱动电路的第二端之间连通，发光时长控制电路控制所述驱动电路的第二端与发光元件之间连通，以控制所述发光元件 发光。
本公开实施例将显示周期(也即一帧画面显示时间)分成n个显示阶段(n为大于1的整数)，在每个显示阶段内，发光元件的发光时间由相应的控制数据电压和相应的控制起始电压确定，以提升灰阶数量。
在具体实施时，所述发光时长控制电路可以包括驱动控制子电路、驱动控制复位子电路和导通控制子电路；
所述发光时长控制电路在第一复位端输入的第一复位信号的控制下，根据所述第n控制起始电压，断开驱动电路的第二端与发光元件之间的连接步骤可以包括：所述驱动控制复位子电路在所述第一复位信号的控制下，控制将所述第n控制起始电压写入所述驱动控制子电路的控制端，以使得所述驱动控制子电路在其控制端的电压的控制下，断开所述驱动电路的第二端与所述发光元件之间的连接；
所述发光时长控制电路在控制扫描线输入的控制扫描信号的控制下，根据所述第n控制起始电压和所述第n控制数据电压，在进入所述第n充电时间段第n充电时间后，控制所述驱动电路的第二端与发光元件之间连通步骤可以包括：
所述驱动控制子电路在其控制端的电压的控制下，断开所述驱动电路的第二端与所述发光元件之间的连接；所述导通控制子电路在所述控制扫描信号的控制下，控制通过所述第n控制数据电压为所述驱动控制子电路的控制端充电，以使得在进入所述第n充电时间段第n充电时间后，所述驱动控制子电路在其控制端的电压的控制下，控制所述驱动电路的第二端与所述发光元件之间连通。
在具体实施时，所述发光控制时长控制电路可以包括驱动控制子电路、驱动控制复位子电路和导通控制子电路，驱动控制复位子电路在第n数据写入时间段将驱动控制子电路的控制端的电压复位为第n控制起始电压，导通控制子电路在第n充电时间段通过第n控制数据电压为所述驱动控制子电路的控制端充电，以使得在进入所述第n充电时间段第n充电时间后，所述驱动控制子电路在其控制端的电压的控制下，控制所述驱动电路的第二端与所述发光元件之间连通，通过调制第n控制起始电压和/或第n控制数据电压， 可以控制第n充电时间，进而可以调节发光元件的发光时间。
具体的，所述第n控制数据电压与所述第一控制数据电压相等；或者，所述第n控制起始电压与所述第一控制起始电压相等。
具体的，当所述像素驱动电路包括发光控制电路时，所述像素驱动方法还包括：在所述第n显示阶段，所述发光控制电路在所述发光控制信号的控制下，控制所述驱动电路的第一端与所述第一电压端之间连通。
本公开实施例所述的显示装置包括上述的像素驱动电路。
在制作本公开实施例所述的显示装置时，采用玻璃基LTPS(Low Temperature Poly-silicon，低温多晶硅)工艺来制作驱动背板，本公开实施例采用转印的方式来将微型发光二极管设置于驱动背板上，用于焊接微型发光二极管的阳极和微型发光二极管的阴极的焊盘设置于驱动背板上，一改之前的阴极和阳极垂直叠层的结构，类似于在驱动背板上制作好“插座”结构后，再将微型发光二极管直接转印至驱动背板上，最终制作完成整个显示模组。
图13是本公开实施例所述的显示装置包括的驱动背板的结构示意图。
在图13中，标号为130的是玻璃基板，标号为131的是缓冲层，标号为132的是有源层，标号为133的是第一栅绝缘层，标号为134的是第一栅金属层，标号为135的是第二栅金属层，标号为136的是第二栅金属层，标号为137的是层间介质层，标号为138的是平坦层，标号为139的是源漏金属层，标号为140的是钝化层，标号为141的为焊盘，标号为142的为微型发光二极管的阳极，标号为143的是微型发光二极管的阴极，标号为144的为微型发光二极管。
本公开实施例所提供的显示装置可以为手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
以上所述是本公开的一些实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本公开所述原理的前提下，还可以作出若干改进和润饰，这些改进和润饰也应视为本公开的保护范围。

Claims (22)

  1. 一种像素驱动电路，用于驱动发光元件，其中，所述像素驱动电路包括驱动电路和发光时长控制电路，其中，
    所述驱动电路的第一端与第一电压端连接，所述驱动电路的第二端通过所述发光时长控制电路与发光元件连接，所述驱动电路用于在其控制端的电压的控制下，控制所述第一端与所述第二端之间连通；
    所述发光时长控制电路用于，响应于第一复位端输入的第一复位信号和控制扫描线输入的控制扫描信号，根据控制数据线输入的控制数据电压和控制起始电压端输入的控制起始电压，导通或断开所述驱动电路的第二端与所述发光元件之间的连接，以控制所述发光元件的发光时长。
  2. 如权利要求1所述的像素驱动电路，其中，所述发光时长控制电路包括驱动控制子电路、驱动控制复位子电路和导通控制子电路，其中，
    所述驱动控制子电路的第一端与所述驱动电路的第二端连接，所述驱动控制子电路的第二端与所述发光元件连接；
    所述驱动控制复位子电路用于，响应于第一复位端输入的第一复位信号，控制将控制起始电压写入所述驱动控制子电路的控制端，以使得所述驱动控制子电路在其控制端的电压的控制下，断开所述驱动电路的第二端与所述发光元件之间的连接；
    所述导通控制子电路用于，响应于在所述控制扫描信号，控制通过所述控制数据电压为所述驱动控制子电路的控制端充电，以使得所述驱动控制子电路在其控制端的电压的控制下，控制所述驱动电路的第二端与所述发光元件之间连通。
  3. 如权利要求2所述的像素驱动电路，其中，所述导通控制子电路包括第一导通控制晶体管、第二导通控制晶体管和导通控制电容；
    所述第一导通控制晶体管的控制极与所述驱动控制子电路的控制端连接，所述第一导通控制晶体管的第一极与所述第二导通控制晶体管的第一极连接，所述第一导通控制晶体管的第二极与控制数据线连接；
    所述第二导通控制晶体管的控制极与所述控制扫描线连接，所述第二导 通控制晶体管的第二极与所述驱动控制子电路的控制端连接；
    所述导通控制电容的第一端与所述驱动控制子电路的控制端连接，所述导通控制电容的第二端与第二电压端连接。
  4. 如权利要求2所述的像素驱动电路，其中，所述驱动控制复位子电路包括驱动控制复位晶体管；
    所述驱动控制复位晶体管的控制极与所述第一复位端连接，所述驱动控制复位晶体管的第一极与所述驱动控制子电路的控制端连接，所述驱动控制复位晶体管的第二极与控制起始电压端连接；所述控制起始电压端用于输入所述控制起始电压。
  5. 如权利要求2所述的像素驱动电路，其中，所述驱动控制子电路包括驱动控制晶体管；
    所述驱动控制晶体管的控制极为所述驱动控制子电路的控制端，所述驱动控制晶体管的第一极为所述驱动控制子电路的第一端，所述驱动控制晶体管的第二极为所述驱动控制子电路的第二端。
  6. 如权利要求1所述的像素驱动电路，还包括复位电路；
    所述复位电路用于，响应于第二复位端输入的第二复位信号，控制将显示起始电压写入所述驱动电路的控制端，以使得所述驱动电路在其控制端的电压的控制下，控制所述驱动电路的第一端与所述驱动电路的第二端之间连通。
  7. 如权利要求1至6中任一权利要求所述的像素驱动电路，还包括电压维持电路和数据写入电路；
    所述电压维持电路与所述驱动电路的控制端连接，用于维持所述驱动电路的控制端的电压；
    所述数据写入电路用于，响应于在显示扫描线输入的显示扫描信号，根据显示数据线输入的显示数据电压，控制所述驱动电路的控制端的电压。
  8. 如权利要求7所述的像素驱动电路，其中，所述数据写入电路包括数据写入子电路和补偿控制子电路，其中，
    所述数据写入子电路用于，响应于所述显示扫描信号，控制将所述显示数据电压写入所述驱动电路的第一端；
    所述补偿控制子电路用于，响应于所述显示扫描信号，控制所述驱动电路的控制端与所述驱动电路的第二端之间连通。
  9. 如权利要求8所述的像素驱动电路，其中，所述数据写入子电路包括数据写入晶体管，所述补偿控制子电路包括补偿控制晶体管，其中，
    所述数据写入晶体管的控制极与所述显示扫描线连接，所述数据写入晶体管的第一极与显示数据线连接，所述数据写入晶体管的第二极与所述驱动电路的第一端连接；
    所述补偿控制晶体管的控制极与所述显示扫描线连接，所述补偿控制晶体管的第一极与所述驱动电路的控制端连接，所述补偿控制晶体管的第二极与所述驱动电路的第二端连接。
  10. 如权利要求7所述的像素驱动电路，其中，所述电压维持电路包括存储电容；所述存储电容的第一端与所述驱动电路的控制端连接，所述存储电容的第二端与第三电压端连接。
  11. 如权利要求1至6中任一权利要求所述的像素驱动电路，还包括发光控制电路；
    所述驱动电路的第一端通过所述发光控制电路与所述第一电压端连接；
    所述发光控制电路的控制端与发光控制线连接，所述发光控制电路用于，响应于所述发光控制线输入的发光控制信号，控制所述驱动电路的第一端与所述第一电压端之间连通。
  12. 如权利要求1至6中任一权利要求所述的像素驱动电路，其中，所述驱动电路包括驱动晶体管；
    所述驱动晶体管的控制极为所述驱动电路的控制端，所述驱动晶体管的第一极为所述驱动电路的第一端，所述驱动晶体管的第二极为所述驱动电路的第二端。
  13. 一种像素驱动方法，应用于如权利要求1至12中任一权利要求所述的像素驱动电路，其中，显示周期包括第一显示阶段，所述第一显示阶段包括依次设置的第一数据写入时间段、第一充电时间段和第一发光时间段；所述像素驱动方法包括：
    在所述第一数据写入时间段，控制起始电压端输入第一控制起始电压， 发光时长控制电路响应于第一复位端输入的第一复位信号，根据所述第一控制起始电压，断开驱动电路的第二端与发光元件之间的连接；
    在所述第一充电时间段，控制数据线输入第一控制数据电压，所述驱动电路在其控制端的电压的控制下，控制所述驱动电路的第一端与所述驱动电路的第二端之间连通；发光时长控制电路响应于控制扫描线输入的控制扫描信号，根据所述第一控制起始电压和所述第一控制数据电压，在进入所述第一充电时间段第一充电时间后，控制所述驱动电路的第二端与所述发光元件之间连通，以控制发光元件发光；
    在所述第一发光时间段，所述驱动电路在其控制端的电压的控制下，控制所述驱动电路的第一端与所述驱动电路的第二端之间连通，发光时长控制电路控制所述驱动电路的第二端与发光元件之间连通，以控制发光元件发光。
  14. 如权利要求13所述的像素驱动方法，其中，所述发光时长控制电路包括驱动控制子电路、驱动控制复位子电路和导通控制子电路；
    所述发光时长控制电路响应于第一复位端输入的第一复位信号，根据所述第一控制起始电压，断开驱动电路的第二端与发光元件之间的连接步骤包括：所述驱动控制复位子电路响应于所述第一复位信号，控制将所述第一控制起始电压写入所述驱动控制子电路的控制端，以使得所述驱动控制子电路在其控制端的电压的控制下，断开所述驱动电路的第二端与所述发光元件之间的连接；
    所述发光时长控制电路响应于控制扫描线输入的控制扫描信号，根据所述第一控制起始电压和所述第一控制数据电压，在进入所述第一充电时间段第一充电时间后，控制所述驱动电路的第二端与所述发光元件之间连通步骤包括：
    所述驱动控制子电路在其控制端的电压的控制下，断开所述驱动电路的第二端与所述发光元件之间的连接；所述导通控制子电路响应于所述控制扫描信号，控制通过所述第一控制数据电压为所述驱动控制子电路的控制端充电，以使得在进入所述第一充电时间段第一充电时间后，所述驱动控制子电路在其控制端的电压的控制下，控制所述驱动电路的第二端与所述发光元件之间连通；
    所述发光时长控制电路控制所述驱动电路的第二端与发光元件之间连通步骤包括：
    所述驱动控制子电路在其控制端的电压的控制下，控制所述驱动电路的第二端与所述发光元件之间连通。
  15. 如权利要求13或14所述的像素驱动方法，其中，所述像素驱动电路还包括电压维持电路和数据写入电路；所述像素驱动方法还包括：
    在所述第一数据写入时间段，数据写入电路响应于显示扫描线输入的显示扫描信号，根据显示数据电压，控制驱动电路的控制端的电压；所述电压维持电路维持所述驱动电路的控制端的电压。
  16. 如权利要求15所述的像素驱动方法，其中，所述在所述第一数据写入时间段，数据写入电路在显示扫描线输入的显示扫描信号的控制下，根据显示数据电压，控制驱动电路的控制端的电压步骤包括：
    在所述第一数据写入时间段，所述数据写入电路响应于所述显示扫描信号，控制将显示数据电压Vdata1写入所述驱动电路的第一端，并控制所述驱动电路的控制端与所述驱动电路的第二端之间连通；所述驱动电路在其控制端的电压的控制下，控制所述驱动电路的第一端与所述驱动电路的第二端之间连通，以通过所述显示数据电压Vdata1为所述驱动电路的控制端充电，直至所述驱动电路在其控制端的电压的控制下，断开所述驱动电路的第一端与所述驱动电路的第二端之间的连接。
  17. 如权利要求16所述的像素驱动方法，其中，所述像素驱动电路还包括复位电路；所述第一显示阶段还包括设置于所述第一数据写入时间段之前的置位时间段，所述像素驱动方法还包括：
    在所述置位时间段，所述复位电路响应于第二复位端输入的第二复位信号，控制将显示起始电压写入所述驱动电路的控制端，以使得所述驱动电路在其控制端的电压的控制下，控制所述驱动电路的第一端与所述驱动电路的第二端之间连通。
  18. 如权利要求13或14所述的像素驱动方法，其中，所述像素驱动电路还包括发光控制电路；所述像素驱动方法还包括：
    在所述第一数据写入时间段，所述发光控制电路响应于发光控制线输入 的发光控制信号，断开所述驱动电路的第一端与所述第一电压端之间的连接；
    在所述第一充电时间段和所述第一发光时间段，所述发光控制电路响应于所述发光控制信号，控制所述驱动电路的第一端与所述第一电压端之间连通。
  19. 如权利要求13或14所述的像素驱动方法，其中，所述显示周期还包括设置于所述第一显示时间段之后的至少一显示阶段；第n显示阶段包括第n数据写入时间段、第n充电时间段和第n发光时间段；n为大于1的整数；所述像素驱动方法还包括：
    在所述第n数据写入时间段，控制起始电压端输入第n控制起始电压，发光时长控制电路响应于第一复位端输入的第一复位信号，根据所述第n控制起始电压，断开驱动电路的第二端与发光元件之间的连接；
    在所述第n充电时间段，控制数据线输入第n控制数据电压，所述驱动电路在其控制端的电压的控制下，控制所述驱动电路的第一端与所述驱动电路的第二端之间连通；发光时长控制电路响应于控制扫描线输入的控制扫描信号，根据所述第n控制起始电压和所述第n控制数据电压，在进入所述第n充电时间段第n充电时间后，控制所述驱动电路的第二端与发光元件之间连通，以控制发光元件发光；
    在所述第n发光时间段，所述驱动电路在其控制端的电压的控制下，控制所述驱动电路的第一端与所述驱动电路的第二端之间连通，发光时长控制电路控制所述驱动电路的第二端与发光元件之间连通，以控制所述发光元件发光。
  20. 如权利要求19所述的像素驱动方法，其中，所述发光时长控制电路包括驱动控制子电路、驱动控制复位子电路和导通控制子电路；
    所述发光时长控制电路响应于第一复位端输入的第一复位信号，根据所述第n控制起始电压，断开驱动电路的第二端与发光元件之间的连接步骤包括：所述驱动控制复位子电路响应于所述第一复位信号，控制将所述第n控制起始电压写入所述驱动控制子电路的控制端，以使得所述驱动控制子电路在其控制端的电压的控制下，断开所述驱动电路的第二端与所述发光元件之间的连接；
    所述发光时长控制电路响应于控制扫描线输入的控制扫描信号，根据所述第n控制起始电压和所述第n控制数据电压，在进入所述第n充电时间段第n充电时间后，控制所述驱动电路的第二端与发光元件之间连通步骤包括：
    所述驱动控制子电路在其控制端的电压的控制下，断开所述驱动电路的第二端与所述发光元件之间的连接；所述导通控制子电路响应于所述控制扫描信号，控制通过所述第n控制数据电压为所述驱动控制子电路的控制端充电，以使得在进入所述第n充电时间段第n充电时间后，所述驱动控制子电路在其控制端的电压的控制下，控制所述驱动电路的第二端与所述发光元件之间连通。
  21. 如权利要求19所述的像素驱动方法，其中，所述第n控制数据电压与所述第一控制数据电压相等；或者，所述第n控制起始电压与所述第一控制起始电压相等。
  22. 一种显示装置，其中，包括如权利要求1至12中任一权利要求所述的像素驱动电路。
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