WO2020173031A1 - 柔性阵列基板、其制备方法及显示面板 - Google Patents

柔性阵列基板、其制备方法及显示面板 Download PDF

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Publication number
WO2020173031A1
WO2020173031A1 PCT/CN2019/094537 CN2019094537W WO2020173031A1 WO 2020173031 A1 WO2020173031 A1 WO 2020173031A1 CN 2019094537 W CN2019094537 W CN 2019094537W WO 2020173031 A1 WO2020173031 A1 WO 2020173031A1
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Prior art keywords
layer
bending area
array substrate
organic
flexible
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PCT/CN2019/094537
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English (en)
French (fr)
Inventor
丁玎
Original Assignee
武汉华星光电半导体显示技术有限公司
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Priority to US16/497,990 priority Critical patent/US10916718B2/en
Publication of WO2020173031A1 publication Critical patent/WO2020173031A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K77/00—Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
    • H10K77/10—Substrates, e.g. flexible substrates
    • H10K77/111—Flexible substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H10K59/1315—Interconnections, e.g. wiring lines or terminals comprising structures specially adapted for lowering the resistance
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes
    • H10K59/80515—Anodes characterised by their shape
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/549—Organic PV cells

Definitions

  • the application relates to the field of display devices, and in particular to a flexible array substrate, a preparation method thereof, and a display panel.
  • the non-display area on the display panel is compressed smaller and smaller.
  • the method of compressing the non-display area can be to set a special-shaped area at the upper end of the display area, and set the front camera and earpiece of the mobile phone in the special-shaped area; or to place multiple functional layers of the array substrate in the non-display area. Part of it is bent to the back of the substrate to realize the narrow design of the frame of the display panel.
  • the disadvantage of the method of bending the non-display area in the array substrate to the back of the substrate is that the conductive metal traces are prone to cracks or even breaks during bending, which causes poor display and affects product performance. Therefore, improving the damage resistance of the bending metal during bending becomes a key technology.
  • the purpose of the present application is to provide a flexible array substrate, a preparation method thereof, and a display panel, which can improve the bending stress of the metal traces during bending, reduce the probability of occurrence of fracture; and can reduce the metal traces caused by the bending area.
  • the abnormal circuit breakage caused by the fracture improves the product quality.
  • the present application provides a flexible array substrate, including a bending area and a non-bending area.
  • the bending area and the non-bending area are arranged in sequence, and a function
  • the layer extends from the bending area to the non-bending area.
  • the functional layer has a deep hole, an organic layer fills the deep hole, and a surface of the organic layer has at least A groove, the groove extending along the first direction, at least one metal trace covering the groove, the metal trace including a bottom metal layer, a top metal layer, and the bottom metal layer and An organic interlayer between the top metal layers, the edges of the bottom metal layer and the top metal layer are closed to cover the organic interlayer.
  • the edge of the bottom metal layer protrudes from the edge of the groove and covers part of the organic layer.
  • the orthographic projection of the top metal layer is within the range of the orthographic projection of the bottom metal layer.
  • the orthographic projection of the top metal layer coincides with the orthographic projection of the bottom metal layer.
  • the length of the groove is the same as the length of the bending area.
  • the flexible array substrate further includes a flexible substrate extending from the bending area to the non-bending area, and the functional layer is disposed on the flexible substrate .
  • the deep hole penetrates the functional layer and exposes a surface of the flexible substrate.
  • a flexible array substrate including a bending area and a non-bending area, and having a flexible substrate, the flexible substrate extending from the bending area to the non-bending area District;
  • the bending area and the non-bending area are arranged in sequence in a first direction, and a functional layer extends from the bending area to the non-bending area;
  • the functional layer In the bending area, the functional layer has a deep hole, the deep hole penetrates the functional layer and exposes a surface of the flexible substrate;
  • the length of the bending zone is the same;
  • At least one metal trace covers the groove, and the metal trace includes a bottom metal layer, a top metal layer, and an organic interlayer between the bottom metal layer and the top metal layer.
  • the bottom metal The edge of the layer and the edge of the top metal layer are closed to cover the organic interlayer, and the edge of the bottom metal layer protrudes from the edge of the groove and covers part of the organic layer.
  • the present application also provides a method for preparing the above-mentioned flexible array substrate, including the following steps: providing a base layer, the base layer includes a bending area and a non-bending area, in a first direction, the bending area Arranged in sequence with the non-bending zone, the base layer has a functional layer, and the functional layer extends from the bending zone to the non-bending zone; in the bending zone, on the functional layer Forming a deep hole, and filling an organic layer in the deep hole; patterning the organic layer to form at least one groove on a surface of the organic layer, the groove extending along the first direction Forming a patterned bottom metal layer, the bottom metal layer covering the sidewall of the groove; forming an organic interlayer on the bottom metal layer; forming a top metal layer on the organic interlayer, the The edges of the bottom metal layer and the top metal layer are closed to cover the organic interlayer, thereby forming at least one metal trace.
  • the base layer further includes a flexible substrate, the flexible substrate extends from the bending area to the non-bending area, and the functional layer is disposed on the flexible substrate.
  • the deep hole penetrates the functional layer and exposes a surface of the flexible substrate; filling the deep hole In the step of the organic layer, the organic layer covers the exposed surface of the flexible substrate.
  • a display panel which includes the above-mentioned flexible array substrate and a light-emitting layer disposed on the flexible array substrate.
  • the light-emitting layer includes an organic flat layer.
  • the bending area extends to the non-bending area, and the organic flat layer covers the functional layer, the metal wiring, and the organic layer.
  • the light-emitting layer further includes a pixel definition layer, the pixel definition layer extends from the bending area to the non-bending area, and in the bending area, the pixel defining layer covers In the organic flat layer, in the non-bending area, the pixel defining layer is patterned to form a plurality of light-emitting areas.
  • the metal wiring adopts a structure with a double-layer metal layer covering the organic layer, which can improve the bending stress of the metal wiring during bending and reduce the probability of occurrence of fracture; and the metal wiring
  • the double-layer connection design method can reduce the abnormal circuit breakage caused by the broken metal wire in the bending area and improve the product quality.
  • Fig. 1 is a schematic top view of a flexible array substrate according to an embodiment of the present application
  • FIG. 2 is a schematic cross-sectional view of the flexible array substrate along the direction C-C in FIG. 1;
  • FIG. 3 is a schematic cross-sectional view of the flexible array substrate along the D-D direction in FIG. 1;
  • 5A to 5L are process flow diagrams of a method for manufacturing a flexible array substrate according to an embodiment of the present application.
  • 6A is a schematic structural diagram of a display panel in one direction according to an embodiment of the present application.
  • FIG. 6B is a schematic structural diagram of the display panel in another direction according to an embodiment of the present application.
  • FIG. 1 is a schematic top view of the structure of the flexible array substrate of the present application.
  • the flexible array substrate 1 of the present application includes a bending area A and a non-bending area B.
  • the bending area A refers to an area that can be bent relative to the non-bending area B.
  • the bending area A and the non-bending area B are arranged in sequence.
  • the bending area A and the non-bending area B are arranged in sequence.
  • the non-bending area B may include conventional areas such as a display area and a lead fan-out area.
  • On the other side of the bending area A it may also include a connection area connected to an integrated circuit. The conventional structure of the field will not be repeated here.
  • FIG. 2 is a schematic cross-sectional view of the flexible array substrate along the C-C direction in FIG. 1
  • FIG. 3 is a schematic cross-sectional view of the flexible array substrate along the D-D direction in FIG. 1.
  • a functional layer 10 extends from the bending area A to the non-bending area B.
  • the functional layer 10 is also divided into the bending area A and the non-bending area B.
  • the flexible array substrate 1 further includes a flexible substrate 11, the flexible substrate 11 extends from the bending area A to the non-bending area B, and the functional layer 10 is disposed in On the flexible substrate 11.
  • the flexible substrate 11 is a conventional flexible substrate, which includes but is not limited to PI (polyimide), PEI (polyetherimide), PPS (polyphenylene sulfide) and PAR (polyarylate). One or a combination of several.
  • the functional layer 10 includes, but is not limited to, a thin film transistor layer, and the structure of the thin film transistor layer is a conventional structure in the art.
  • the thin film transistor layer is a thin film transistor layer with a double top gate structure.
  • the functional layer 10 includes a first gate insulating layer 101, a second gate insulating layer 102, and a The passivation layer 103, the first gate insulating layer 101, the second gate insulating layer 102, and the passivation layer 103 extend from the bending area A to the non-bending area B.
  • an active layer 104 is further provided between the flexible substrate 11 and the first gate insulating layer 101, and an active layer 104 is provided between the first gate insulating layer 101 and the second gate insulating layer 101.
  • a first gate 105 is also arranged between the polar insulating layers 102, a second gate 106 is also arranged between the second gate insulating layer 102 and the passivation layer 103, and a source and drain 107 pass through
  • the passivation layer 103, the second gate insulating layer 102 and the first gate insulating layer 101 are connected to the active layer 104.
  • the first gate insulating layer 101, the active layer 104, the second gate insulating layer 102, the first gate 105, the second gate 106 and the passivation layer 103 forms the thin film transistor layer.
  • the functional layer may also be a thin film transistor layer of other structures, such as a thin film transistor layer of a single top gate structure, etc., which is not limited in the present application.
  • the functional layer 10 has a deep hole 108.
  • the deep hole 108 extends downward from the upper surface of the functional layer 10.
  • the deep hole 108 may penetrate the functional layer 10 or not penetrate the functional layer 10.
  • the deep hole 108 penetrates the functional layer 10, specifically, the deep hole 108 penetrates the passivation layer 103, the first gate insulating layer 101, and the second gate.
  • the polar insulating layer 102 exposes a surface of the flexible substrate 11.
  • An organic layer 12 fills the deep hole 108.
  • One surface of the organic layer 12 has at least one groove 121, specifically, the surface of the organic layer 12 away from the flexible substrate 11 has at least one groove 121.
  • 4 is a schematic top view of the organic layer 12. Please refer to FIGS. 3 and 4.
  • the groove 121 is recessed toward the inside of the organic layer 12.
  • the number of the grooves 121 can be set according to actual requirements, which is not limited in this application.
  • the four grooves 121 are schematically shown in the figure. In the X direction, a plurality of the grooves 121 are arranged in sequence.
  • the groove 121 extends along the first direction. Specifically, in this embodiment, the groove 121 extends along the Y direction shown in FIG. 4.
  • the shape of the groove 121 can be selected according to actual use.
  • the shape of the groove 121 is linear.
  • the length of the groove 121 is the same as the length of the bending area A.
  • the flexible array substrate further includes at least one metal trace 13 for connecting the metal trace of the thin film transistor layer to the integrated circuit.
  • the metal trace 13 covers the groove 121, and in the first direction, such as the Y direction, the metal trace 13 extends along the groove 121.
  • the metal wires 13 and the grooves 121 are arranged in a one-to-one correspondence, that is, one metal wire 13 is arranged corresponding to one of the grooves 121.
  • the metal trace 13 includes a bottom metal layer 131, a top metal layer 132, and an organic interlayer 133 between the bottom metal layer 131 and the top metal layer 132. The edges of the bottom metal layer 131 are connected to each other.
  • the edge of the top metal layer 132 is closed to cover the organic interlayer 133.
  • a direction perpendicular to the flexible array substrate such as the Z direction (vertical to the Y direction and the X direction)
  • the bottom metal layer 131, the organic interlayer 133, and the top metal layer 132 are sequentially arranged, and The edge of the bottom metal layer 131 is closed with the edge of the top metal layer 132, and the organic interlayer 133 is covered in the space enclosed by the bottom metal layer 131 and the top metal layer 132.
  • the metal trace 13 of the flexible array substrate of the present application adopts a structure of a double-layer metal layer covering an organic layer, which can improve the bending stress of the metal trace during bending, and reduce the occurrence of fracture. Probability; and the metal wiring adopts a double-layer connection design method, which can reduce the abnormal circuit breakage caused by the metal wiring fracture in the bending area and improve the product quality.
  • the edge of the bottom metal layer 131 protrudes from the edge of the groove 121 and covers a part of the organic layer 12.
  • the orthographic projection of the bottom metal layer 131 covers the orthographic projection of the groove 121, and the orthographic projection area of the bottom metal layer 131 is larger than the The area of the orthographic projection of the groove 121.
  • the bottom metal layer 131 has the same shape as the inner wall of the groove 121. For example, if the inner wall of the groove 121 has an arc shape, the bottom layer The shape of the metal layer 131 is also arc-shaped.
  • the orthographic projection of the top metal layer 132 is located within a range of the orthographic projection of the bottom metal layer 131.
  • the orthographic projection of the top metal layer 132 coincides with the orthographic projection of the bottom metal layer 131, or the orthographic projection of the bottom metal layer 131
  • the projection covers the orthographic projection of the top metal layer 132.
  • the orthographic projection of the top metal layer 132 coincides with the orthographic projection of the bottom metal layer 131, that is, the area of the orthographic projection of the bottom metal layer 131 is equal to that of the groove 121 The area of the orthographic projection.
  • the application also provides a method for preparing the above-mentioned flexible array substrate.
  • 5A to 5L are process flow diagrams of the manufacturing method of the flexible array substrate of the present application.
  • the preparation method includes the following steps:
  • FIG. 5A is a schematic cross-sectional view along the direction C-C in FIG. 1
  • FIG. 5B is a schematic cross-sectional view along the direction D-D in FIG.
  • the base layer 50 includes a bending area A and a non-bending area B. In a first direction, such as the Y direction, the bending area A and the non-bending area B are arranged in sequence.
  • the base layer 50 has a functional layer 51 that extends from the bending area A to the non-bending area B.
  • the base layer 50 further includes a flexible substrate 52, the flexible substrate 52 extends from the bending area A to the non-bending area B, and the functional layer 51 is disposed on the flexible substrate 52.
  • the functional layer 51 is a thin film transistor layer.
  • the functional layer 51 includes a first gate insulating layer 511, a second gate insulating layer 512, and a passivation layer 513.
  • the first gate insulating layer 511, the second gate The insulating layer 512 and the passivation layer 513 extend from the bending area A to the non-bending area B.
  • an active layer 514 is further provided between the flexible substrate 52 and the first gate insulating layer 511, and the first gate insulating layer 511 is insulated from the second gate insulating layer 511.
  • a first gate 515 is further provided between the layers 512, and a second gate 516 is further provided between the second gate insulating layer 512 and the passivation layer 513.
  • a source and drain via 519 extends to the active layer 514.
  • the method for forming each structure of the functional layer 51 is a conventional method in the art, and will not be repeated.
  • FIG. 5C is a schematic cross-sectional view of the flexible array substrate along the direction C-C in FIG. 1
  • FIG. 5D is a schematic cross-sectional view of the flexible array substrate along the direction D-D in FIG.
  • a deep hole 518 is formed in the functional layer 51, and an organic layer 53 is filled in the deep hole 518.
  • the deep hole 518 can be formed by etching or other methods.
  • the deep hole 518 and the source and drain holes 519 can be formed by using the same mask.
  • the deep hole 518 penetrates the functional layer 51. Specifically, the deep hole 518 penetrates the passivation layer 513, the first gate insulating layer 511, and the second gate.
  • the polar insulating layer 512 and a surface of the flexible substrate 52 are exposed.
  • FIGS. 5E and 5F where FIG. 5E is a schematic cross-sectional view of the flexible array substrate along the direction C-C in FIG. 1, and FIG. 5F is a schematic cross-sectional view of the flexible array substrate along the direction D-D in FIG.
  • the organic layer 53 is patterned to form at least one groove 531 on a surface of the organic layer 53, and the groove 531 extends along the first direction.
  • FIG. 5F four grooves 531 are schematically shown.
  • the groove 531 may be formed by a conventional method in the art such as a mask method.
  • FIGS. 5G and 5H where FIG. 5G is a schematic cross-sectional view of the flexible array substrate along the C-C direction in FIG. 1, and FIG. 5H is a schematic cross-sectional view of the flexible array substrate along the D-D direction in FIG.
  • a patterned bottom metal layer 541 is formed, and the bottom metal layer 541 covers the sidewall of the groove 531.
  • a metal layer is deposited on the bending area A and the non-bending area B, and the metal layer is patterned.
  • the metal layer is patterned to form the bottom metal layer 541
  • the bottom metal layer 541 is disposed corresponding to the groove 531, and the edge of the bottom metal layer 541 protrudes from the recess.
  • the edge of the groove 531 covers part of the organic layer 53. Specifically, in the direction perpendicular to the base layer 50, the orthographic projection of the underlying metal layer 541 covers the orthographic projection of the groove 531, and the area of the orthographic projection of the underlying metal layer 541 is larger than that of the groove The area of the orthographic projection of 531.
  • the bottom metal layer 541 has the same shape as the inner wall of the groove 531. For example, if the inner wall of the groove 531 has an arc shape, the bottom layer The shape of the metal layer 541 is also arc-shaped. In the non-bending area B, the source and drain electrodes 517 are formed after the metal layer is patterned.
  • FIGS. 5I and 5J where FIG. 5I is a schematic cross-sectional view of the flexible array substrate along the C-C direction in FIG. 1, and FIG. 5J is a schematic cross-sectional view of the flexible array substrate along the D-D direction in FIG. 1.
  • An organic interlayer 542 is formed on the bottom metal layer 541. Specifically, a layer of organic covering layer is deposited, and the pattern is changed to the organic covering layer, and only the organic covering layer on the bottom metal layer 541 corresponding to the groove 531 is retained, and the organic covering layer is retained.
  • FIGS. 5K and 5L where FIG. 5K is a schematic cross-sectional view of the flexible array substrate along the C-C direction in FIG. 1, and FIG. 5L is a schematic cross-sectional view of the flexible array substrate along the D-D direction in FIG. 1.
  • a top metal layer 543 is formed on the organic interlayer 542. The edge of the bottom metal layer 541 and the edge of the top metal layer 543 are closed to cover the organic interlayer 542 to form at least one metal trace 54. Specifically, in this embodiment, a metal layer is deposited and patterned. The top metal layer 543 in the non-bending area can be removed or retained.
  • the top metal layer 543 in the non-bending area is retained, the top The pattern of the metal layer 543 can be consistent with and overlap the pattern of the bottom metal layer. In the bending area, only the metal layer corresponding to the bottom metal layer 541 of the bending area A is retained, and the retained metal layer serves as the top metal layer 543.
  • FIG. 6A is a schematic view of the structure of the display panel in one direction
  • FIG. 6B is a schematic view of the structure of the display panel in another direction.
  • FIG. 6A is a schematic view of the structure along the direction C-C in FIG. 1
  • FIG. 6B is a schematic view of the structure along the direction D-D in FIG. 1.
  • the display panel includes the above-mentioned flexible array substrate 1 and a light-emitting layer 2 disposed on the flexible array substrate 1.
  • the light-emitting layer 2 includes an organic flat layer 20, the organic flat layer 20 extends from the bending area A to the non-bending area B, and the organic flat layer 20 covers the functional layer 10, The metal wiring 13 and the organic layer 12 are described. Furthermore, the light-emitting layer 2 further includes a pixel definition layer 21 extending from the bending area A to the non-bending area B. In the bending area A, the pixel defining layer 21 covers the organic flat layer 20, and in the non-bending area B, the pixel defining layer 21 is patterned to form multiple light-emitting areas.
  • a plurality of light-emitting units 22 are arranged in the light-emitting area, and the light-emitting units 22 are connected to the source and drain of the functional layer 10 through an anode 23.
  • the display panel is an OLED display panel, and each structure of the light-emitting layer 2 is a conventional structure, which will not be repeated.
  • the subject of this application can be manufactured and used in industry and has industrial applicability.

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  • Engineering & Computer Science (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
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  • Electroluminescent Light Sources (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

一种柔性阵列基板、其制备方法及显示面板。柔性阵列基板在弯折区，金属走线采用双层金属层(131,132)包覆有机层(133)的结构，可改善弯折时金属走线的弯折应力，降低断裂情况发生的几率；且金属走线采用双层相连的设计方式，可降低因弯折区金属走线断裂而产生的断路异常，提升产品品质。

Description

柔性阵列基板、其制备方法及显示面板 技术领域
本申请涉及显示装置领域，尤其涉及一种柔性阵列基板、其制备方法及显示面板。
 背景技术
随着显示屏运用越来越广泛，宽屏技术成为其中的重要技术项，与此同时，显示面板窄边框的技术也越来越重要。先进的电子产品，尤其是手携式电子产品，越来越趋向于窄边框设计。为了提高电子产品的屏占比，显示面板上的非显示区域被压缩得越来越小。压缩非显示区域的方法可以为在显示区域上端设置异形区，将手机的前置摄像头和听筒等装置设置在异形区；也可以为将阵列（Array）基板的多个功能层位于非显示区的部分弯折至基板背面，以实现该显示面板的边框的窄化设计。
 技术问题
将阵列基板中的非显示区域弯折至基板背面的方法的缺点在于，进行弯折时导电金属走线容易发生裂纹甚至断裂，从而引起显示不良，影响产品使用性能。因此，提高弯折时弯折金属抗损伤性成为一项关键技术。
 技术解决方案
本申请的目的在于提供一种柔性阵列基板、其制备方法及显示面板，其能够改善弯折时金属走线的弯折应力，降低断裂情况发生的几率；且能够降低因弯折区金属走线断裂而产生的断路异常，提升产品品质。
为了达到上述目的，本申请提供一种柔性阵列基板，包括一弯折区及一非弯折区，在一第一方向上，所述弯折区与所述非弯折区依次排列，一功能层自所述弯折区延伸至所述非弯折区，在所述弯折区，所述功能层具有一深孔，一有机层填充所述深孔，所述有机层的一表面具有至少一凹槽，所述凹槽沿所述第一方向延伸，至少一金属走线覆盖所述凹槽，所述金属走线包括一底层金属层、一顶层金属层及位于所述底层金属层与所述顶层金属层之间的一有机夹层，所述底层金属层的边缘与所述顶层金属层的边缘闭合以包覆所述有机夹层。
在一实施例中，所述底层金属层的边缘突出于所述凹槽的边缘，且覆盖部分所述有机层。
在一实施例中，在垂直所述柔性阵列基板的方向上，所述顶层金属层的正投影位于所述底层金属层的正投影的范围内。
在一实施例中，在垂直所述柔性阵列基板的方向上，所述顶层金属层的正投影与所述底层金属层的正投影重合。
在一实施例中，在第一方向上，所述凹槽的长度与所述弯折区的长度相同。
在一实施例中，所述柔性阵列基板还包括一柔性衬底，所述柔性衬底自所述弯折区延伸至所述非弯折区，所述功能层设置在所述柔性衬底上。
在一实施例中，所述深孔贯穿所述功能层，并暴露出所述柔性衬底的一表面。
在一优选实施例中，提供一种柔性阵列基板，包括一弯折区及一非弯折区并具有一柔性衬底，所述柔性衬底自所述弯折区延伸至所述非弯折区；其中，
所述弯折区与所述非弯折区在一第一方向上依次排列，一功能层自所述弯折区延伸至所述非弯折区；
在所述弯折区，所述功能层具有一深孔，所述深孔贯穿所述功能层，并暴露出所述柔性衬底的一表面；
一有机层填充所述深孔，所述有机层的一表面具有至少一凹槽，所述凹槽沿所述第一方向延伸，并且，在第一方向上，所述凹槽的长度与所述弯折区的长度相同；
至少一金属走线覆盖所述凹槽，所述金属走线包括一底层金属层、一顶层金属层及位于所述底层金属层与所述顶层金属层之间的一有机夹层，所述底层金属层的边缘与所述顶层金属层的边缘闭合以包覆所述有机夹层，并且，所述底层金属层的边缘突出于所述凹槽的边缘，且覆盖部分所述有机层。本申请还提供一种上述的柔性阵列基板的制备方法，包括如下步骤：提供一基层，所述基层包括一弯折区及一非弯折区，在一第一方向上，所述弯折区与所述非弯折区依次排列，所述基层具有一功能层，所述功能层自所述弯折区延伸至所述非弯折区；在所述弯折区，在所述功能层上形成一深孔，且在所述深孔内填充一有机层；图形化所述有机层，以在所述有机层的一表面形成至少一凹槽，所述凹槽沿所述第一方向延伸；形成一图案化的底层金属层，所述底层金属层覆盖所述凹槽的侧壁；在所述底层金属层上形成一有机夹层；在所述有机夹层上形成一顶层金属层，所述底层金属层的边缘与所述顶层金属层的边缘闭合以包覆所述有机夹层，进而形成至少一金属走线。
在一实施例中，所述基层还包括一柔性衬底，所述柔性衬底自所述弯折区延伸至所述非弯折区，所述功能层设置在所述柔性衬底上。
在一实施例中，在所述功能层上形成所述深孔的步骤中，所述深孔贯穿所述功能层，并暴露出所述柔性衬底的一表面；在所述深孔内填充所述有机层的步骤中，所述有机层覆盖所述柔性衬底暴露的表面。
根据本申请的另一方面，提供一种显示面板，其包括上述的柔性阵列基板及设置在所述柔性阵列基板上的发光层，所述发光层包括一有机平坦层，所述有机平坦层自所述弯折区延伸至所述非弯折区，且所述有机平坦层覆盖所述功能层、所述金属走线及所述有机层。
在一实施例中，所述发光层还包括一像素定义层，所述像素定义层自所述弯折区延伸至所述非弯折区，在所述弯折区，所述像素定义层覆盖所述有机平坦层，在所述非弯折区，所述像素定义层图形化，形成多个发光区。
 有益效果
本申请有益效果在于：在弯折区，金属走线采用双层金属层包覆有机层的结构，可改善弯折时金属走线的弯折应力，降低断裂情况发生的几率；且金属走线采用双层相连的设计方式，可降低因弯折区金属走线断裂而产生的断路异常，提升产品品质。
 附图说明
图1是根据本申请一实施例的柔性阵列基板的俯视结构示意图；
图2是沿图1中C-C方向的柔性阵列基板的截面示意图；
图3是沿图1中D-D方向的柔性阵列基板的截面示意图；
图4是所述有机层12的俯视示意图；
图5A~图5L是根据本申请一实施例的柔性阵列基板的制备方法的工艺流程图；
图6A是根据本申请一实施例的显示面板的一个方向的结构示意图；
图6B是根据本申请一实施例的所述显示面板的另一方向的结构示意图。
 本发明的实施方式
以下，结合具体实施方式，对本申请的技术进行详细描述。应当知道的是，以下具体实施方式仅用于帮助本领域技术人员理解本申请，而非对本申请的限制。
以下实施例的说明是参考附加的图式，用以例示本申请可用以实施的特定实施例。本申请所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「顶」、「底」等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本申请，而非用以限制本申请。
图1是本申请柔性阵列基板的俯视结构示意图。请参阅图1，本申请柔性阵列基板1包括一弯折区A及一非弯折区B。其中，所述弯折区A是指能够相对于所述非弯折区B弯折的区域。在一第一方向上，所述弯折区A与所述非弯折区B依次排列。具体地说，在本实施例中，在Y方向，所述弯折区A与所述非弯折区B依次排列。所述非弯折区B可以包括一显示区及一引线扇出区等常规区域，在所述弯折区A的另一侧还可以包括与集成电路连接的连接区，该些区域均为本领域的常规结构，不再赘述。
图2是沿图1中C-C方向的柔性阵列基板的截面示意图，图3是沿图1中D-D方向的柔性阵列基板的截面示意图。请参阅图2及图3，一功能层10自所述弯折区A延伸至所述非弯折区B。具体地说，所述功能层10也被划分为所述弯折区A及所述非弯折区B。在本实施例中，所述柔性阵列基板1还包括一柔性衬底11，所述柔性衬底11自所述弯折区A延伸至所述非弯折区B，所述功能层10设置在所述柔性衬底11上。所述柔性衬底11为常规的柔性衬底，其包括但不限于PI（聚酰亚胺）、PEI（聚醚酰亚胺）、PPS（聚苯硫醚）及PAR（聚芳酯）中的一种或几种的组合。
其中，所述功能层10包括但不限于薄膜晶体管层，薄膜晶体管层的结构为本领域常规结构。例如，在本实施例中，薄膜晶体管层为一双顶栅结构的薄膜晶体管层，具体地说，所述功能层10包括一第一栅极绝缘层101、一第二栅极绝缘层102及一钝化层103，所述第一栅极绝缘层101、所述第二栅极绝缘层102及所述钝化层103自所述弯折区A延伸至所述非弯折区B。
在所述非弯折区B，在所述柔性衬底11与所述第一栅极绝缘层101之间还设置有一有源层104，在所述第一栅极绝缘层101与第二栅极绝缘层102之间还设置有一第一栅极105，在所述第二栅极绝缘层102与所述钝化层103之间还设置有一第二栅极106，一源漏极107穿过所述钝化层103、第二栅极绝缘层102及所述第一栅极绝缘层101与所述有源层104连接。其中，所述第一栅极绝缘层101、所述有源层104、所述第二栅极绝缘层102、所述第一栅极105、所述第二栅极106及所述钝化层103形成所述薄膜晶体管层。在本申请其他实施例中，所述功能层还可以为其他结构的薄膜晶体管层，例如单顶栅结构的薄膜晶体管层等，本申请对此不进行限定。
在所述弯折区A，所述功能层10具有一深孔108。具体地说，所述深孔108自所述功能层10的上表面向下延伸。所述深孔108可以贯穿所述功能层10，也可以不贯穿所述功能层10。在本实施例中，所述深孔108贯穿所述功能层10，具体地说，所述深孔108贯穿所述钝化层103、所述第一栅极绝缘层101及所述第二栅极绝缘层102，并暴露出所述柔性衬底11的一表面。
一有机层12填充所述深孔108。所述有机层12的一表面具有至少一凹槽121，具体地说，所述有机层12背离所述柔性衬底11的表面具有至少一凹槽121。图4是所述有机层12的俯视示意图，请参阅图3及图4，所述凹槽121朝向所述有机层12的内部凹陷。所述凹槽121的数量可根据实际需求设置，本申请对此不进行限定。在图中示意性地绘示四个所述凹槽121。在X方向上，多个所述凹槽121依次排列。所述凹槽121沿所述第一方向延伸。具体地说，在本实施例中，所述凹槽121沿图4所示的Y方向延伸。所述凹槽121的形状可根据实际使用进行选择，例如，在本实施例中，所述凹槽121的形状为直线形。进一步，在所述第一方向上，即在Y方向上，所述凹槽121的长度与所述弯折区A的长度相同。
请继续参阅图2及图3，所述柔性阵列基板还包括至少一金属走线13，所述金属走线13用于将薄膜晶体管层的金属线连接至集成电路。所述金属走线13覆盖所述凹槽121，在所述第一方向上，例如Y方向上，所述金属走线13沿所述凹槽121延伸。具体地说，所述金属走线13与所述凹槽121一一对应设置，即一条所述金属走线13对应一个所述凹槽121设置。所述金属走线13包括一底层金属层131、一顶层金属层132及位于所述底层金属层131与所述顶层金属层132之间的一有机夹层133，所述底层金属层131的边缘与所述顶层金属层132的边缘闭合以包覆所述有机夹层133。具体地说，在垂直所述柔性阵列基板的方向上，例如Z方向（垂直Y方向及X方向），所述底层金属层131、所述有机夹层133及所述顶层金属层132依次设置，且所述底层金属层131的边缘与所述顶层金属层132的边缘闭合，所述有机夹层133被包覆在所述底层金属层131与所述顶层金属层132围合的空间内。
在所述弯折区A，本申请柔性阵列基板的所述金属走线13采用双层金属层包覆有机层的结构，可改善弯折时金属走线的弯折应力，降低断裂情况发生的几率；且金属走线采用双层相连的设计方式，可降低因弯折区金属走线断裂而产生的断路异常，提升产品品质。
可选地，在本实施例中，所述底层金属层131的边缘突出于所述凹槽121的边缘，且覆盖部分所述有机层12。具体地说，在垂直所述柔性阵列基板1的方向上，所述底层金属层131的正投影覆盖所述凹槽121的正投影，且所述底层金属层131的正投影的面积大于所述凹槽121的正投影的面积。其中，在与所述凹槽121对应的位置，所述底层金属层131与所述凹槽121的内壁的形状相同，例如，所述凹槽121的内壁的形状为弧形，则所述底层金属层131的形状也为弧形。
可选地，在垂直所述柔性阵列基板1的方向上，所述顶层金属层132的正投影位于所述底层金属层131的正投影的范围内。具体地说，在垂直所述柔性阵列基板1的方向上，例如Z方向，所述顶层金属层132的正投影与所述底层金属层131的正投影重合，或者所述底层金属层131的正投影覆盖所述顶层金属层132的正投影。在本实施例中，在Z方向，所述顶层金属层132的正投影与所述底层金属层131的正投影重合，即所述底层金属层131的正投影的面积等于所述凹槽121的正投影的面积。
本申请还提供一种上述的柔性阵列基板的制备方法。图5A~图5L是本申请所述柔性阵列基板的制备方法的工艺流程图。所述制备方法包括如下步骤：
请参阅图5A及图5B，其中，图5A是沿图1中C-C方向的截面示意图，图5B是沿图1中D-D方向的截面示意图。提供一基层50。所述基层50包括一弯折区A及一非弯折区B。在一第一方向上，例如Y方向上，所述弯折区A与所述非弯折区B依次排列。所述基层50具有一功能层51，所述功能层51自所述弯折区A延伸至所述非弯折区B。所述基层50还包括一柔性衬底52，所述柔性衬底52自所述弯折区A延伸至所述非弯折区B，所述功能层51设置在所述柔性衬底52上。
在本实施例中，所述功能层51为一薄膜晶体管层。具体地说，所述功能层51包括一第一栅极绝缘层511、一第二栅极绝缘层512及一钝化层513，所述第一栅极绝缘层511、所述第二栅极绝缘层512及所述钝化层513自所述弯折区A延伸至所述非弯折区B。在所述非弯折区B，在所述柔性衬底52述第一栅极绝缘层511之间还设置有一有源层514，在所述第一栅极绝缘层511与第二栅极绝缘层512之间还设置有一第一栅极515，在所述第二栅极绝缘层512与所述钝化层513之间还设置有一第二栅极516。一源漏极过孔519延伸至所述有源层514。所述功能层51的各个结构的形成方法为本领域常规方法，不再赘述。
请参阅图5C及图5D，其中，图5C是沿图1中C-C方向的柔性阵列基板的截面示意图，图5D是沿图1中D-D方向的柔性阵列基板的截面示意图。在所述弯折区A，在所述功能层51上形成一深孔518，且在所述深孔518内填充一有机层53。可采用刻蚀等方法形成所述深孔518。所述深孔518可以与所述源漏极孔519采用同一光罩形成。在本实施例中，所述深孔518贯穿所述功能层51，具体地说，所述深孔518贯穿所述钝化层513、所述第一栅极绝缘层511及所述第二栅极绝缘层512，并暴露出所述柔性衬底52的一表面。
请参阅图5E及图5F，其中，图5E是沿图1中C-C方向的柔性阵列基板的截面示意图，图5F是沿图1中D-D方向的柔性阵列基板的截面示意图。图形化所述有机层53，以在所述有机层53的一表面形成至少一凹槽531，所述凹槽531沿所述第一方向延伸。在图5F中，示意性地绘示四个所述凹槽531。其中，可采用掩膜法等本领域常规的方法形成所述凹槽531。
请参阅图5G及图5H，其中，图5G是沿图1中C-C方向的柔性阵列基板的截面示意图，图5H是沿图1中D-D方向的柔性阵列基板的截面示意图。形成一图案化的底层金属层541，所述底层金属层541覆盖所述凹槽531的侧壁。具体地说，在本实施例中，在所述弯折区A及非弯折区B沉积一金属层，并对所述金属层进行图案化处理。在所述弯折区，所述金属层图案化后形成所述底层金属层541，所述底层金属层541对应所述凹槽531设置，且所述底层金属层541的边缘突出于所述凹槽531的边缘，且覆盖部分所述有机层53。具体地说，在垂直所述基层50的方向上，所述底层金属层541的正投影覆盖所述凹槽531的正投影，且所述底层金属层541的正投影的面积大于所述凹槽531的正投影的面积。其中，在与所述凹槽531对应的位置，所述底层金属层541与所述凹槽531的内壁的形状相同，例如，所述凹槽531的内壁的形状为弧形，则所述底层金属层541的形状也为弧形。在所述非弯折区B，所述金属层图案化后形成所述源漏极517。
请参阅图5I及图5J，其中，图5I是沿图1中C-C方向的柔性阵列基板的截面示意图，图5J是沿图1中D-D方向的柔性阵列基板的截面示意图。在所述底层金属层541上形成一有机夹层542。具体地说，沉积一层有机覆盖层，并图案换所述有机覆盖层，只保留所述底层金属层541上与所述凹槽531对应位置的有机覆盖层，被保留的有机覆盖层即为所述有机夹层542。
请参阅图5K及图5L，其中，图5K是沿图1中C-C方向的柔性阵列基板的截面示意图，图5L是沿图1中D-D方向的柔性阵列基板的截面示意图。在所述有机夹层542上形成一顶层金属层543。所述底层金属层541的边缘与所述顶层金属层543的边缘闭合以包覆所述有机夹层542，进而形成至少一金属走线54。具体地说，在本实施例中，沉积一金属层，并图案化所述金属层，非弯折区顶层金属层543可去除也可保留，若保留非弯折区顶层金属层543，则顶层金属层543图案可与底层金属层图案一致且重叠，在弯折区仅保留所述弯折区A的所述底层金属层541对应位置的金属层，被保留的金属层作为所述顶层金属层543。
其中，本申请中涉及的各个层的具体形成方法为本领域的常规方法，不再赘述。
本申请还提供一种显示面板。图6A是显示面板的一个方向的结构示意图，图6B是显示面板的另一方向的结构示意图。具体地说，图6A是沿图1中C-C方向的结构示意图，图6B是沿图1中D-D方向的结构示意图。请参阅图6A及图6B，所述显示面板包括如上述的柔性阵列基板1及设置在所述柔性阵列基板1上的发光层2。所述发光层2包括一有机平坦层20，所述有机平坦层20自所述弯折区A延伸至所述非弯折区B，且所述有机平坦层20覆盖所述功能层10、所述金属走线13及所述有机层12。进一步，所述发光层2还包括一像素定义层21，所述像素定义层21自所述弯折区A延伸至所述非弯折区B。在所述弯折区A，所述像素定义层21覆盖所述有机平坦层20，在所述非弯折区B，所述像素定义层21图形化，形成多个发光区。在所述发光区内设置有多个发光单元22，所述发光单元22通过阳极23与所述功能层10的源漏极连接。在本实施例中，所述显示面板为OLED显示面板，所述发光层2的各个结构为常规结构，不再赘述。
本申请已由上述相关实施例加以描述，然而上述实施例仅为实施本申请的范例。必需指出的是，已公开的实施例并未限制本申请的范围。相反地，包含于权利要求书的精神及范围的修改及均等设置均包括于本申请的范围内。
 工业实用性
本申请的主题可以在工业中制造和使用，具备工业实用性。

Claims (13)

  1. 一种柔性阵列基板，包括一弯折区及一非弯折区，所述弯折区与所述非弯折区在一第一方向上依次排列，一功能层自所述弯折区延伸至所述非弯折区，其中，
    在所述弯折区，所述功能层具有一深孔；
    一有机层填充所述深孔，所述有机层的一表面具有至少一凹槽，所述凹槽沿所述第一方向延伸；
    至少一金属走线覆盖所述凹槽，所述金属走线包括一底层金属层、一顶层金属层及位于所述底层金属层与所述顶层金属层之间的一有机夹层，所述底层金属层的边缘与所述顶层金属层的边缘闭合以包覆所述有机夹层。
  2. 根据权利要求1所述的柔性阵列基板，还包括一柔性衬底，所述柔性衬底自所述弯折区延伸至所述非弯折区，所述功能层设置在所述柔性衬底上；
    其中，所述深孔贯穿所述功能层，并暴露出所述柔性衬底的一表面；
    在第一方向上，所述凹槽的长度与所述弯折区的长度相同；并且，所述底层金属层的边缘突出于所述凹槽的边缘，且覆盖部分所述有机层。
  3. 根据权利要求1所述的柔性阵列基板，其中，所述底层金属层的边缘突出于所述凹槽的边缘，且覆盖部分所述有机层。
  4. 根据权利要求1所述的柔性阵列基板，其中，在垂直所述柔性阵列基板的方向上，所述顶层金属层的正投影位于所述底层金属层的正投影的范围内。
  5. 根据权利要求1所述的柔性阵列基板，其中，在垂直所述柔性阵列基板的方向上，所述顶层金属层的正投影与所述底层金属层的正投影重合。
  6. 根据权利要求1所述的柔性阵列基板，其中，在第一方向上，所述凹槽的长度与所述弯折区的长度相同。
  7. 根据权利要求1所述的柔性阵列基板，其中，所述柔性阵列基板还包括一柔性衬底，所述柔性衬底自所述弯折区延伸至所述非弯折区，所述功能层设置在所述柔性衬底上。
  8. 根据权利要求6所述的柔性阵列基板，其中，所述深孔贯穿所述功能层，并暴露出所述柔性衬底的一表面。
  9. 一种如权利要求1所述的柔性阵列基板的制备方法，包括如下步骤：提供一基层，所述基层包括一弯折区及一非弯折区，在一第一方向上，所述弯折区与所述非弯折区依次排列，所述基层具有一功能层，所述功能层自所述弯折区延伸至所述非弯折区；在所述弯折区，在所述功能层上形成一深孔，且在所述深孔内填充一有机层；图形化所述有机层，以在所述有机层的一表面形成至少一凹槽，所述凹槽沿所述第一方向延伸；形成一图案化的底层金属层，所述底层金属层覆盖所述凹槽的侧壁；在所述底层金属层上形成一有机夹层；在所述有机夹层上形成一顶层金属层，所述底层金属层的边缘与所述顶层金属层的边缘闭合以包覆所述有机夹层，进而形成至少一金属走线。
  10. 根据权利要求8所述的柔性阵列基板的制备方法，其特征在于，所述基层还包括一柔性衬底，所述柔性衬底自所述弯折区延伸至所述非弯折区，所述功能层设置在所述柔性衬底上。
  11. 根据权利要求9所述的柔性阵列基板的制备方法，其特征在于，在所述功能层上形成所述深孔的步骤中，所述深孔贯穿所述功能层，并暴露出所述柔性衬底的一表面；在所述深孔内填充所述有机层的步骤中，所述有机层覆盖所述柔性衬底暴露的表面。
  12. 一种显示面板，包括权利要求1所述的柔性阵列基板及设置在所述柔性阵列基板上的发光层，所述发光层包括一有机平坦层，所述有机平坦层自所述弯折区延伸至所述非弯折区，且所述有机平坦层覆盖所述功能层、所述金属走线及所述有机层。
  13. 根据权利要求11所述的显示面板，其中，所述发光层还包括一像素定义层，所述像素定义层自所述弯折区延伸至所述非弯折区，在所述弯折区，所述像素定义层覆盖所述有机平坦层，在所述非弯折区，所述像素定义层图形化，形成多个发光区。
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