WO2020124835A1 - 发光面板及显示装置 - Google Patents

发光面板及显示装置 Download PDF

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Publication number
WO2020124835A1
WO2020124835A1 PCT/CN2019/079017 CN2019079017W WO2020124835A1 WO 2020124835 A1 WO2020124835 A1 WO 2020124835A1 CN 2019079017 W CN2019079017 W CN 2019079017W WO 2020124835 A1 WO2020124835 A1 WO 2020124835A1
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WO
WIPO (PCT)
Prior art keywords
layer
substrate
display area
transistor
emitting panel
Prior art date
Application number
PCT/CN2019/079017
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English (en)
French (fr)
Inventor
李松杉
Original Assignee
武汉华星光电半导体显示技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 武汉华星光电半导体显示技术有限公司 filed Critical 武汉华星光电半导体显示技术有限公司
Priority to US16/343,292 priority Critical patent/US11552158B2/en
Publication of WO2020124835A1 publication Critical patent/WO2020124835A1/zh

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/124Insulating layers formed between TFT elements and OLED elements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/131Interconnections, e.g. wiring lines or terminals
    • H10K59/1315Interconnections, e.g. wiring lines or terminals comprising structures specially adapted for lowering the resistance
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1218Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H01L27/1244Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/122Pixel-defining structures or layers, e.g. banks
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301Details of OLEDs
    • H10K2102/311Flexible OLED
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301Details of OLEDs
    • H10K2102/351Thickness

Definitions

  • the present application relates to the field of display technology, in particular to a light-emitting panel and a display device.
  • the organic light emitting diode (Organic Light Emitting Diode, OLED) has many excellent characteristics such as self-luminescence, low energy consumption, wide viewing angle, rich colors, fast response, and can prepare flexible screens, which has caused scientific research and industrial circles. Great interest is considered to be the next generation display technology with great potential.
  • LTPS-OLED Low Temperature Poly-silicon organic Light emitting diode
  • TFT Thin Film Transistor
  • Embodiments of the present application provide a light-emitting panel and a display device, which can reduce the occurrence of cracks in the wiring layer and improve the yield of the light-emitting panel.
  • an embodiment of the present application provides a light-emitting panel, including:
  • a substrate the substrate includes a display area, a non-display area, and a bending area connecting the display area and the non-display area;
  • a transistor layer, the transistor layer is disposed on the substrate and is disposed relative to the display area and the non-display area;
  • An organic layer is disposed on the substrate and is disposed relative to the bending region;
  • a trace layer is disposed on the organic layer;
  • the vertical height of the organic layer is greater than the vertical height of the transistor layer.
  • the organic layer includes a first extension portion and a second extension portion, the extension direction of the first extension portion is horizontal extension, and the extension direction of the second extension portion is vertical extend.
  • the horizontal width of the first extending portion is greater than the horizontal width of the second extending portion, so that the first extending portion and the second extending portion form a resisting structure .
  • the resisting structure resists the transistor layer.
  • the vertical height of the first extension is 0.3 to 0.7 microns.
  • the light-emitting panel further includes a thin film transistor, and the thin film transistor is disposed in the transistor layer;
  • the transistor layer further includes a barrier layer, a buffer layer, a first gate insulating layer, a second gate insulating layer and an interlayer dielectric layer stacked in this order from bottom to top; one end of the thin film transistor and the buffer Layer connection, the other end of the thin film transistor sequentially penetrates the first gate insulating layer, the second gate insulating layer and the interlayer dielectric layer.
  • a first gate is provided on the second gate insulating layer, and a second gate is provided on the interlayer dielectric layer.
  • a flat organic layer and a pixel definition layer are further provided on the transistor layer, and the pixel definition layer covers the flat organic layer.
  • the substrate is made of a flexible material, and a pixel area is provided in the substrate.
  • an embodiment of the present application further provides a display device, including: a housing and a light-emitting panel, the light-emitting panel is disposed on the housing, the light-emitting panel includes:
  • a substrate the substrate includes a display area, a non-display area, and a bending area connecting the display area and the non-display area;
  • a transistor layer, the transistor layer is disposed on the substrate and is disposed relative to the display area and the non-display area;
  • An organic layer is disposed on the substrate and is disposed relative to the bending region;
  • a trace layer is disposed on the organic layer;
  • the vertical height of the organic layer is greater than the vertical height of the transistor layer.
  • the organic layer includes a first extension portion and a second extension portion, the extension direction of the first extension portion is horizontal extension, and the extension direction of the second extension portion is vertical extend.
  • the horizontal width of the first extending portion is greater than the horizontal width of the second extending portion, so that the first extending portion and the second extending portion form a resisting structure .
  • the resisting structure resists the transistor layer.
  • the vertical height of the first extension is 0.3 to 0.7 microns.
  • the light-emitting panel further includes a thin film transistor, and the thin film transistor is disposed in the transistor layer;
  • the transistor layer further includes a barrier layer, a buffer layer, a first gate insulating layer, a second gate insulating layer and an interlayer dielectric layer stacked in this order from bottom to top; one end of the thin film transistor and the buffer Layer connection, the other end of the thin film transistor sequentially penetrates the first gate insulating layer, the second gate insulating layer and the interlayer dielectric layer.
  • a first gate is provided on the second gate insulating layer, and a second gate is provided on the interlayer dielectric layer.
  • a flat organic layer and a pixel definition layer are further provided on the transistor layer, and the pixel definition layer covers the flat organic layer.
  • the substrate is made of a flexible material, and a pixel area is provided in the substrate.
  • an embodiment of the present application further provides a light-emitting panel, including:
  • a substrate the substrate includes a display area, a non-display area, and a bending area connecting the display area and the non-display area;
  • a transistor layer, the transistor layer is disposed on the substrate and is disposed relative to the display area and the non-display area;
  • An organic layer is disposed on the substrate and is disposed relative to the bending region;
  • a trace layer is disposed on the organic layer;
  • the vertical height of the organic layer is greater than the vertical height of the transistor layer, wherein a flat organic layer and a pixel definition layer are further provided on the transistor layer, the pixel definition layer covers the flat organic layer and the substrate It is made of a flexible material, and a pixel area is provided in the substrate.
  • a light-emitting panel provided by an embodiment of the present application includes a substrate, the substrate includes a display area, a non-display area, and a bending area connecting the display area and the non-display area; a transistor layer, the transistor layer is disposed on the Disposed on the substrate and relative to the display area and the non-display area; an organic layer, the organic layer is disposed on the substrate and relative to the bending area; a wiring layer, the wiring layer is disposed on the substrate On the organic layer; wherein, the vertical height of the organic layer is greater than the vertical height of the transistor layer to effectively reduce the occurrence of breakage of the wiring layer and improve the yield of the light emitting panel.
  • FIG. 1 is a schematic structural diagram of a display device provided by an embodiment of the present application.
  • FIG. 2 is a schematic structural diagram of a light-emitting panel provided by an embodiment of the present application.
  • FIG 3 is a partial enlarged view of a light-emitting panel provided by an embodiment of the present application.
  • FIG. 4 is a schematic flowchart of a method for manufacturing a light-emitting panel provided by an embodiment of the present application.
  • An embodiment of the present application provides a display device, which includes a housing and a light-emitting panel, the light-emitting panel is disposed on the housing, and the light-emitting panel includes:
  • a substrate the substrate includes a display area, a non-display area, and a bending area connecting the display area and the non-display area;
  • a transistor layer, the transistor layer is disposed on the substrate and is disposed relative to the display area and the non-display area;
  • An organic layer is disposed on the substrate and is disposed relative to the bending region;
  • a trace layer is disposed on the organic layer;
  • the vertical height of the organic layer is greater than the vertical height of the transistor layer.
  • the organic layer includes a first extension portion and a second extension portion, the extension direction of the first extension portion is horizontal extension, and the extension direction of the second extension portion is vertical extension.
  • the horizontal width of the first extending portion is greater than the horizontal width of the second extending portion, so that the first extending portion and the second extending portion form a resisting structure.
  • the resisting structure resists the transistor layer.
  • the vertical height of the first extension is 0.3-0.7 microns.
  • the light-emitting panel further includes a thin film transistor, and the thin film transistor is disposed in the transistor layer;
  • the transistor layer further includes a barrier layer, a buffer layer, a first gate insulating layer, a second gate insulating layer and an interlayer dielectric layer stacked in this order from bottom to top; one end of the thin film transistor and the buffer Layer connection, the other end of the thin film transistor sequentially penetrates the first gate insulating layer, the second gate insulating layer and the interlayer dielectric layer.
  • a first gate is provided on the second gate insulating layer, and a second gate is provided on the interlayer dielectric layer.
  • a flat organic layer and a pixel definition layer are further provided on the transistor layer, and the pixel definition layer covers the flat organic layer.
  • the substrate is made of a flexible material, and a pixel area is provided in the substrate.
  • FIG. 1 is a schematic structural diagram of a display device 1000 provided by an embodiment of the present application.
  • the display device 100 may include a light emitting panel 100, a control circuit 200, and a housing 300. It should be noted that the display device 1000 shown in FIG. 1 is not limited to the above, and it may also include other devices, such as a camera, an antenna structure, and a pattern unlocking module.
  • the light emitting panel 100 is disposed on the housing 200.
  • the light-emitting panel 100 may be fixed to the housing 200, and the light-emitting panel 100 and the housing 300 form a closed space to accommodate devices such as the control circuit 200.
  • the housing 300 may be made of a flexible material, such as a plastic housing or a silicone housing.
  • the control circuit 200 is installed in the housing 300.
  • the control circuit 200 may be the main board of the display device 1000.
  • the control circuit 200 may be integrated with a battery, an antenna structure, a microphone, a speaker, a headphone jack, a universal serial bus interface, One, two or more of the functional components such as camera, distance sensor, ambient light sensor, receiver and processor.
  • the light-emitting panel 100 is installed in the housing 300, and at the same time, the light-emitting panel 100 is electrically connected to the control circuit 200 to form a display surface of the display device 1000.
  • the light emitting panel 100 may include a display area and a non-display area.
  • the display area can be used to display the screen of the display device 1000 or for the user to perform touch manipulation.
  • the non-display area can be used to set various functional components.
  • FIG. 2 is a schematic structural diagram of a light-emitting panel provided by an embodiment of the present application.
  • the light-emitting panel 100 includes:
  • the substrate 10 includes a display area 101, a non-display area 102 and a bending area 103 connecting the display area 101 and the non-display area 102;
  • An organic layer 30, the organic layer 30 is disposed on the substrate 10 and is disposed relative to the bending region 103;
  • a trace layer 40, the trace layer 40 is disposed on the organic layer 30; wherein,
  • the vertical height of the organic layer 30 is greater than the vertical height of the transistor layer 20.
  • the substrate 10 is composed of the display area 101, the non-display area 102 and the bending area 103.
  • the non-display area 102 is bent to the back side of the display area 101 through the bending area 103.
  • stress will be generated.
  • the stress is not on the trace layer 40 on the organic layer 30, the stress generated by the bend will be released unevenly, thereby damaging the trace layer 40 .
  • the vertical height of the organic layer 40 is the same as the vertical height of the transistor layer 20.
  • the stress-neutral plane generated by the stress will be above the trace layer 40. Therefore, the organic The vertical height of the layer 40 is greater than the vertical height of the transistor layer 20, so that the stress-neutral plane is located above or below the trace layer 40, preferably the stress-neutral plane is located on the trace layer 40, so that the stress can be uniform Release it.
  • the light-emitting panel 100 provided by an embodiment of the present application includes a substrate 10 including a display area 101, a non-display area 102, and a bending area 103 connecting the display area 101 and the non-display area 102; the transistor layer 20 , The transistor layer 20 is disposed on the substrate 10 and relative to the display area 101 and the non-display area 102; an organic layer 30, the organic layer 30 is disposed on the substrate 10 and is opposite to the curved The break zone 103 is provided; a wiring layer 40 is provided on the organic layer 30; wherein, the vertical height of the organic layer 30 is greater than the vertical height of the transistor layer 20, thereby reducing routing The wire layer 40 is broken, and the yield of the light-emitting panel 100 is improved.
  • the light emitting panel 100 further includes a thin film transistor 50, and the thin film transistor 50 is disposed in the transistor layer 20;
  • the transistor layer 20 further includes a barrier layer 201, a buffer layer 202, a first gate insulating layer 203, a second gate insulating layer 204, and an interlayer dielectric layer 205 stacked in this order from bottom to top; the thin film transistor One end of 50 is connected to the buffer layer 202, and the other end of the thin film transistor 50 sequentially penetrates the first gate insulating layer 203, the second gate insulating layer 204, and the interlayer dielectric layer 205.
  • the organic layer is formed by Composition of organic photoresist materials.
  • the barrier layer 201 may be made of silicon dioxide or the like, and the buffer layer may be made of a material containing silicon, nitrogen, and oxygen.
  • polysilicon is provided on the first gate insulating layer 203, and the polysilicon is used to connect with the source electrode and the drain electrode to form a conductive channel.
  • a first gate 501 is provided on the second gate insulating layer 204, and a second gate 502 is provided on the interlayer dielectric layer 205.
  • a flat organic layer 60 and a pixel definition layer 70 are further provided on the transistor layer 20, and the pixel definition layer 70 covers the flat organic layer 60.
  • the pixel definition layer 70 is further provided with an OLED device 80, and the OLED device 80 includes:
  • the anode 801 and the hole transport layer, the light emitting layer, the electron transport layer, and the cathode (none of which are shown in the figure), etc.
  • the positive hole and the cathode charge will combine in the light-emitting layer to produce light, thereby producing the three primary colors of red, green, and blue RGB.
  • the anode 801 is connected to the source or drain of the thin film transistor 50.
  • a semiconductor layer 503 is further provided on the first gate insulating layer 203.
  • the substrate 10 is made of a flexible material, and a pixel area is provided in the substrate 10.
  • the substrate 10 may be made of polymer materials such as polyimide (PI), and the pixel area includes but is not limited to R, G, and B pixels.
  • PI polyimide
  • FIG. 3 is a partially enlarged view of a light emitting panel provided by an embodiment of the present application.
  • the organic layer 30 includes a first extension 301 and a second extension 302.
  • the extension direction of the first extension 301 is horizontal, and the extension direction of the second extension 302 is vertical.
  • the organic layer 30 includes two parts.
  • the first part is a first extension 301, and the first extension 301 may extend in the X direction or the negative X direction.
  • the second part is a second extension 302, and the second extension 302 may extend in the Y direction or the Y negative direction.
  • the vertical height of the second extension 302 (that is, the height in the Y direction) is greater than or equal to 1.5 ⁇ m.
  • the horizontal width of the first extension 301 is greater than the horizontal width of the second extension 302, so that the first extension 301 and the second extension 302 form a resisting structure .
  • the resisting structure resists the transistor layer 20.
  • the horizontal width of the first extending portion 301 (that is, the width in the X direction) is greater than the horizontal width of the second extending portion 302, a corner is generated when the first extending portion 301 contacts the second extending portion 302, and the corner is Resist structure.
  • the vertical height of the first extension is 0.3-0.7 micrometers ( ⁇ m).
  • the light-emitting panel 100 provided by an embodiment of the present application includes a substrate 10 including a display area 101, a non-display area 102, and a bending area 103 connecting the display area 101 and the non-display area 102; the transistor layer 20 , The transistor layer 20 is disposed on the substrate 10 and relative to the display area 101 and the non-display area 102; an organic layer 30, the organic layer 30 is disposed on the substrate 10 and is opposite to the curved The break zone 103 is provided; a wiring layer 40 is provided on the organic layer 30; wherein, the vertical height of the organic layer 30 is greater than the vertical height of the transistor layer 20, thereby reducing routing The wire layer 40 is broken, and the yield of the light-emitting panel 100 is improved.
  • FIG. 4 is a schematic flowchart of a method for manufacturing a light-emitting panel provided by an embodiment of the present application.
  • the preparation method of the light-emitting panel includes:
  • a transistor layer is formed on the substrate relative to the display area and the non-display area.
  • the transistor layer is deposited from bottom to top to form a barrier layer, a buffer layer, a first gate insulating layer, a second gate insulating layer, and a layer Intermediary layer
  • a patterned semiconductor layer is provided on the first gate insulating layer
  • a patterned first gate is provided on the second gate insulating layer
  • the interlayer dielectric The second gate after the patterning process is provided on the layer.
  • the vertical thickness of the organic layer is greater than the vertical thickness of the transistor layer
  • a first metal layer is also deposited on the organic layer, and the first metal layer is patterned to obtain a wiring layer.
  • the first metal layer includes a titanium/aluminum/titanium metal layer.
  • a patterned flat organic layer is sequentially disposed on the transistor layer, and a patterned second metal layer and a pixel definition layer are deposited on the flat organic layer.
  • the second metal layer is a titanium oxide/silver/titanium oxide metal layer
  • the flat organic layer and the pixel definition layer are generally made of polyimide (PI).
  • An embodiment of the present application also provides a light-emitting panel, which includes:
  • a substrate the substrate includes a display area, a non-display area, and a bending area connecting the display area and the non-display area;
  • a transistor layer, the transistor layer is disposed on the substrate and is disposed relative to the display area and the non-display area;
  • An organic layer is disposed on the substrate and is disposed relative to the bending region;
  • a trace layer is disposed on the organic layer;
  • the vertical height of the organic layer is greater than the vertical height of the transistor layer, wherein a flat organic layer and a pixel definition layer are further provided on the transistor layer, the pixel definition layer covers the flat organic layer and the substrate It is made of a flexible material, and a pixel area is provided in the substrate.

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Abstract

一种发光面板(100)及显示装置(1000),包括:基底(10),基底(10)包括显示区(101),非显示区(102)及连接显示区(101)与非显示区(102)的弯折区(103);晶体管层(20),晶体管层(20)设置在基底(10)上且相对于显示区(101)及非显示区(102)设置;有机层(30),有机层(30)设置在基底(10)上且相对于弯折区(103)设置;走线层(40),走线层(40)设置在有机层(30)上;其中,有机层(30)的竖直高度大于晶体管层(20)的竖直高度。

Description

发光面板及显示装置 技术领域
本申请涉及显示技术领域,具体涉及一种发光面板及显示装置。
背景技术
近年来,随着有机发光二极管(Organic Light Emitting Diode, OLED)具有自发光、低能耗、宽视角、色彩丰富、快速响应及可制备柔性屏等诸多优异特性的特点,引起了科研界和产业界极大的兴趣,被认为是极具潜力的下一代显示技术。
现有技术中,在传统的柔性低温多晶硅有机发光二极管(Low Temperature Poly-silicon organic light emitting diode,LTPS-OLED)的薄膜晶体管(Thin Film Transistor,TFT)背板制作过程中,为增强发光面板的弯折性,会在弯折区(Pad bending区)蚀刻一个较深的洞(Deep Hole,DH),然后在DH中填充有机光阻材料(Organic Deep Hole Material,ODH);但是在进行弯折时会使位于ODH上的走线层出现断裂状况,严重影响发光面板的良率。
因此,现有技术存在缺陷,急需改进。
技术问题
本申请实施例提供一种发光面板及显示装置,可以减少走线层出现断裂的状况,并提高发光面板的良率。
技术解决方案
第一方面,本申请实施例提供一种发光面板,包括:
基底,所述基底包括显示区,非显示区及连接所述显示区与所述非显示区的弯折区;
晶体管层,所述晶体管层设置在所述基底上且相对于所述显示区及非显示区设置;
有机层,所述有机层设置在所述基底上且相对于所述弯折区设置;
走线层,所述走线层设置在所述有机层上;其中,
所述有机层的竖直高度大于所述晶体管层的竖直高度。
在本申请所述的发光面板中,所述有机层包括第一延伸部以及第二延伸部,所述第一延伸部的延伸方向为水平延伸,所述第二延伸部的延伸方向为竖直延伸。
在本申请所述的发光面板中,所述第一延伸部的水平宽度大于所述第二延伸部的水平宽度,以使所述第一延伸部与所述第二延伸部形成一抵持结构。
在本申请所述的发光面板中,所述抵持结构与所述晶体管层相抵持。
在本申请所述的发光面板中,所述第一延伸部的竖直高度为0.3~0.7微米。
在本申请所述的发光面板中,所述发光面板还包括薄膜晶体管,所述薄膜晶体管设置于所述晶体管层内;
其中,所述晶体管层还包括从下至上依次层叠设置的阻隔层、缓冲层、第一栅极绝缘层、第二栅极绝缘层以及层间介质层;所述薄膜晶体管的一端与所述缓冲层连接,所述薄膜晶体管的另一端依次贯穿所述第一栅极绝缘层、第二栅极绝缘层以及层间介质层。
在本申请所述的发光面板中,所述第二栅极绝缘层上设置有第一栅极,所述层间介质层上设置有第二栅极。
在本申请所述的发光面板中,所述晶体管层上还设置有平坦有机层及像素定义层,所述像素定义层覆盖所述平坦有机层。
在本申请所述的发光面板中,所述基底由柔性材料制成,在所述基底内设置有像素区。
第二方面,本申请实施例还提供一种显示装置,包括:壳体以及发光面板,所述发光面板设置在所述壳体上,所述发光面板包括:
基底,所述基底包括显示区,非显示区及连接所述显示区与所述非显示区的弯折区;
晶体管层,所述晶体管层设置在所述基底上且相对于所述显示区及非显示区设置;
有机层,所述有机层设置在所述基底上且相对于所述弯折区设置;
走线层,所述走线层设置在所述有机层上;其中,
所述有机层的竖直高度大于所述晶体管层的竖直高度。
在本申请所述的显示装置中,所述有机层包括第一延伸部以及第二延伸部,所述第一延伸部的延伸方向为水平延伸,所述第二延伸部的延伸方向为竖直延伸。
在本申请所述的显示装置中,所述第一延伸部的水平宽度大于所述第二延伸部的水平宽度,以使所述第一延伸部与所述第二延伸部形成一抵持结构。
在本申请所述的显示装置中,所述抵持结构与所述晶体管层相抵持。
在本申请所述的显示装置中,所述第一延伸部的竖直高度为0.3~0.7微米。
在本申请所述的显示装置中,所述发光面板还包括薄膜晶体管,所述薄膜晶体管设置于所述晶体管层内;
其中,所述晶体管层还包括从下至上依次层叠设置的阻隔层、缓冲层、第一栅极绝缘层、第二栅极绝缘层以及层间介质层;所述薄膜晶体管的一端与所述缓冲层连接,所述薄膜晶体管的另一端依次贯穿所述第一栅极绝缘层、第二栅极绝缘层以及层间介质层。
在本申请所述的显示装置中,所述第二栅极绝缘层上设置有第一栅极,所述层间介质层上设置有第二栅极。
在本申请所述的显示装置中,所述晶体管层上还设置有平坦有机层及像素定义层,所述像素定义层覆盖所述平坦有机层。
在本申请所述的显示装置中,所述基底由柔性材料制成,在所述基底内设置有像素区。
第三方面,本申请实施例还提供一种发光面板,其包括:
基底,所述基底包括显示区,非显示区及连接所述显示区与所述非显示区的弯折区;
晶体管层,所述晶体管层设置在所述基底上且相对于所述显示区及非显示区设置;
有机层,所述有机层设置在所述基底上且相对于所述弯折区设置;
走线层,所述走线层设置在所述有机层上;其中,
所述有机层的竖直高度大于所述晶体管层的竖直高度,其中所述晶体管层上还设置有平坦有机层及像素定义层,所述像素定义层覆盖所述平坦有机层,所述基底由柔性材料制成,在所述基底内设置有像素区。
有益效果
本申请实施例提供的发光面板,包括基底,所述基底包括显示区,非显示区及连接所述显示区与所述非显示区的弯折区;晶体管层,所述晶体管层设置在所述基底上且相对于所述显示区及非显示区设置;有机层,所述有机层设置在所述基底上且相对于所述弯折区设置;走线层,所述走线层设置在所述有机层上;其中,所述有机层的竖直高度大于所述晶体管层的竖直高度从而有效减少走线层出现断裂的状况,并提高发光面板的良率。
附图说明
为了更清楚地说明本申请实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为本申请实施例提供的显示装置的结构示意图。
图2为本申请实施例提供的发光面板的结构示意图。
图3为本申请实施例提供的发光面板的局部放大图。
图4为本申请实施例提供的发光面板的制备方法的流程示意图。
本发明的实施方式
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述。显然,所描述的实施例仅仅是本申请一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。
现有技术中,在传统的柔性低温多晶硅有机发光二极管(Low Temperature Poly-silicon organic light emitting diode,LTPS-OLED)的薄膜晶体管(Thin Film Transistor,TFT)背板制作过程中,为增强发光面板的弯折性,会在弯折区(Pad bending区)蚀刻一个较深的洞(Deep Hole,DH),然后在DH中填充有机光阻材料(Organic Deep Hole Material,ODH),ODH的厚度为1.5微米(μm)左右;但是在进行弯折时,由于应力中性面不在pad bending区的走线层上,造成弯折时应力释放不均匀,会使走线层出现断裂状况,严重影响发光面板的良率。
本申请实施例提供一种显示装置,其包括:壳体以及发光面板,所述发光面板设置在所述壳体上,所述发光面板包括:
基底,所述基底包括显示区,非显示区及连接所述显示区与所述非显示区的弯折区;
晶体管层,所述晶体管层设置在所述基底上且相对于所述显示区及非显示区设置;
有机层,所述有机层设置在所述基底上且相对于所述弯折区设置;
走线层,所述走线层设置在所述有机层上;其中,
所述有机层的竖直高度大于所述晶体管层的竖直高度。
其中,所述有机层包括第一延伸部以及第二延伸部,所述第一延伸部的延伸方向为水平延伸,所述第二延伸部的延伸方向为竖直延伸。
其中,所述第一延伸部的水平宽度大于所述第二延伸部的水平宽度,以使所述第一延伸部与所述第二延伸部形成一抵持结构。
其中,所述抵持结构与所述晶体管层相抵持。
其中,所述第一延伸部的竖直高度为0.3~0.7微米。
其中,所述发光面板还包括薄膜晶体管,所述薄膜晶体管设置于所述晶体管层内;
其中,所述晶体管层还包括从下至上依次层叠设置的阻隔层、缓冲层、第一栅极绝缘层、第二栅极绝缘层以及层间介质层;所述薄膜晶体管的一端与所述缓冲层连接,所述薄膜晶体管的另一端依次贯穿所述第一栅极绝缘层、第二栅极绝缘层以及层间介质层。
其中,所述第二栅极绝缘层上设置有第一栅极,所述层间介质层上设置有第二栅极。
其中,所述晶体管层上还设置有平坦有机层及像素定义层,所述像素定义层覆盖所述平坦有机层。
其中,所述基底由柔性材料制成,在所述基底内设置有像素区。
请参阅图1,图1为本申请实施例提供的显示装置1000的结构示意图。该显示装置100可以包括发光面板100、控制电路200、以及壳体300。需要说明的是,图1所示的显示装置1000并不限于以上内容,其还可以包括其他器件,比如还可以包括摄像头、天线结构、纹解锁模块等。
其中,发光面板100设置于壳体200上。
在一些实施例中,发光面板100可以固定到壳体200上,发光面板100和壳体300形成密闭空间,以容纳控制电路200等器件。
在一些实施例中,壳体300可以为由柔性材料制成,比如为塑胶壳体或者硅胶壳体等。
其中,该控制电路200安装在壳体300中,该控制电路200可以为显示装置1000的主板,控制电路200上可以集成有电池、天线结构、麦克风、扬声器、耳机接口、通用串行总线接口、摄像头、距离传感器、环境光传感器、受话器以及处理器等功能组件中的一个、两个或多个。
其中,该发光面板100安装在壳体300中,同时,该发光面板100电连接至控制电路200上,以形成显示装置1000的显示面。该发光面板100可以包括显示区域和非显示区域。该显示区域可以用来显示显示装置1000的画面或者供用户进行触摸操控等。该非显示区域可用于设置各种功能组件。
请参阅图2,图2为本申请实施例提供的发光面板的结构示意图,该发光面板100包括:
基底10,所述基底10包括显示区101,非显示区102及连接所述显示区101与所述非显示区102的弯折区103;
晶体管层20,所述晶体管层20设置在所述基底10上且相对于所述显示区101及非显示区102设置;
有机层30,所述有机层30设置在所述基底10上且相对于所述弯折区103设置;
走线层40,所述走线层40设置在所述有机层30上;其中,
所述有机层30的竖直高度大于所述晶体管层20的竖直高度。
可以理解,基底10由显示区101,非显示区102及弯折区103组成,在对发光面板100弯折时,通过弯折区103将非显示区102弯折至显示区101的背侧。而在对发光面板100进行弯折时,会产生应力,然而,由于应力不在有机层30上的走线层40上时,则会使弯折产生的应力释放不均匀,从而损坏走线层40。
在现有技术中,有机层40的竖直高度与晶体管层20的竖直高度相同,在弯折发光面板100时,应力产生的应力中性面会在走线层40的上方,因此,使有机层40的竖直高度大于晶体管层20的竖直高度,使应力中性面位于走线层40的上方或者下方,较佳为应力中性面位于走线层40上,以使应力可以均匀的释放出去。
本申请实施例提供的发光面板100,包括基底10,所述基底10包括显示区101,非显示区102及连接所述显示区101与所述非显示区102的弯折区103;晶体管层20,所述晶体管层20设置在所述基底10上且相对于所述显示区101及非显示区102设置;有机层30,所述有机层30设置在所述基底10上且相对于所述弯折区103设置;走线层40,所述走线层40设置在所述有机层30上;其中,所述有机层30的竖直高度大于所述晶体管层20的竖直高度,从而减少走线层40出现断裂的状况,并提高发光面板100的良率。
在一些实施例中,所述发光面板100还包括薄膜晶体管50,所述薄膜晶体管50设置于所述晶体管层20内;
其中,所述晶体管层20还包括从下至上依次层叠设置的阻隔层201、缓冲层202、第一栅极绝缘层203、第二栅极绝缘层204以及层间介质层205;所述薄膜晶体管50的一端与所述缓冲层202连接,所述薄膜晶体管50的另一端依次贯穿所述第一栅极绝缘层203、第二栅极绝缘层204以及层间介质层205,所述有机层由有机光阻材料组成。
其中,阻隔层201可以由二氧化硅等材料制备而成,缓冲层可以由包含硅元素,氮元素及氧元素的材料组成。
其中,所述第一栅极绝缘层203上设置有多晶硅,所述多晶硅用于与源极和漏极相连,形成导电沟道。
在一些实施例中,所述第二栅极绝缘层204上设置有第一栅极501,所述层间介质层205上设置有第二栅极502。
在一些实施例中,所述晶体管层20上还设置有平坦有机层60及像素定义层70,所述像素定义层70覆盖所述平坦有机层60。
其中,所述像素定义层70中还设置有OLED器件80,所述OLED器件80包括:
阳极801与空穴传输层、发光层、电子传输层以及阴极(图中均未示出)等。当电力供应至适当电压时,正极空穴与阴极电荷就会在发光层中结合,产生光亮,从而产生红、绿和蓝 RGB 三原色。阳极801与薄膜晶体管50的源极或漏极相连。
其中,所述第一栅极绝缘层203上还设置有半导体层503。
在一些实施例中,所述基底10由柔性材料制成,在所述基底10内设置有像素区。
其中,基底10可以由聚酰亚胺(polyimide,PI)等高分子材料制成,像素区包括但不限于R、G、B像素。
具体的,请参阅图3,图3为本申请实施例提供的发光面板的局部放大图。
其中,所述有机层30包括第一延伸部301以及第二延伸部302,所述第一延伸部301的延伸方向为水平延伸,所述第二延伸部302的延伸方向为竖直延伸。
可以理解,有机层30包括两个部分,第一部分为第一延伸部301,第一延伸部301可以沿X方向或X负方向进行延伸,第二部分为第二延伸部302,第二延伸部302可以沿Y方向或Y负方向进行延伸。
其中,第二延伸部302的竖直高度(即,Y方向上的高度)大于等于1.5μm。
在一些实施例中,所述第一延伸部301的水平宽度大于所述第二延伸部302的水平宽度,以使所述第一延伸部301与所述第二延伸部302形成一抵持结构。
在一些实施例中,所述抵持结构与所述晶体管层20相抵持。
由于第一延伸部301的水平宽度(即X方向上的宽度)大于第二延伸部302的水平宽度,因此,第一延伸部301与第二延伸部302接触时会产生一拐角,拐角即为抵持结构。
在一些实施例中,所述第一延伸部的竖直高度为0.3~0.7微米(μm)。
本申请实施例提供的发光面板100,包括基底10,所述基底10包括显示区101,非显示区102及连接所述显示区101与所述非显示区102的弯折区103;晶体管层20,所述晶体管层20设置在所述基底10上且相对于所述显示区101及非显示区102设置;有机层30,所述有机层30设置在所述基底10上且相对于所述弯折区103设置;走线层40,所述走线层40设置在所述有机层30上;其中,所述有机层30的竖直高度大于所述晶体管层20的竖直高度,从而减少走线层40出现断裂的状况,并提高发光面板100的良率。
如图4所示,图4为本申请实施例提供的发光面板的制备方法的流程示意图,该发光面板的制备方法用于制备如上所述的发光面板。所述发光面板的制备方法包括:
110、在基底上相对于显示区及非显示区形成一晶体管层,所述晶体管层为从下至上依次沉积形成阻隔层、缓冲层、第一栅极绝缘层、第二栅极绝缘层以及层间介质层;
其中,在所述第一栅极绝缘层上设置有图案化处理后的半导体层,在所述第二栅极绝缘层上设置有图案化处理后的第一栅极,在所述层间介质层上设置有图案化处理后的第二栅极。
120、在基底上相对于弯折区填充有机层,所述有机层的竖直厚度大于所述晶体管层的竖直厚度;
其中,在所述有机层上还沉积有第一金属层,对所述第一金属层进行图案化处理得到走线层。所述第一金属层包括钛/铝/钛金属层。
130、在所述晶体管层上依次设置图案化处理后的平坦有机层,在所述平坦有机层上沉积图案化处理后的第二金属层以及像素定义层。
其中,所述第二金属层为氧化钛/银/氧化钛金属层,所述平坦有机层与所述像素定义层一般采用聚酰亚胺(polyimide,PI)制成。
140、在所述像素定义层上蒸镀有机发光材料,以形成所述发光面板。
本申请实施例还提供一种发光面板,其包括:
基底,所述基底包括显示区,非显示区及连接所述显示区与所述非显示区的弯折区;
晶体管层,所述晶体管层设置在所述基底上且相对于所述显示区及非显示区设置;
有机层,所述有机层设置在所述基底上且相对于所述弯折区设置;
走线层,所述走线层设置在所述有机层上;其中,
所述有机层的竖直高度大于所述晶体管层的竖直高度,其中所述晶体管层上还设置有平坦有机层及像素定义层,所述像素定义层覆盖所述平坦有机层,所述基底由柔性材料制成,在所述基底内设置有像素区。
在上述实施例中,对各个实施例的描述都各有侧重,某个实施例中没有详述的部分,可以参见其他实施例的相关描述。
以上对本申请实施例所提供的一种发光面板、发光面板的制备方法及显示装置进行了详细介绍,本文中应用了具体个例对本申请的原理及实施方式进行了阐述,以上实施例的说明只是用于帮助理解本申请的技术方案及其核心思想;本领域的普通技术人员应当理解:其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分技术特征进行等同替换;而这些修改或者替换,并不使相应技术方案的本质脱离本申请各实施例的技术方案的范围。

Claims (19)

  1. 一种发光面板,其包括:
    基底,所述基底包括显示区,非显示区及连接所述显示区与所述非显示区的弯折区;
    晶体管层,所述晶体管层设置在所述基底上且相对于所述显示区及非显示区设置;
    有机层,所述有机层设置在所述基底上且相对于所述弯折区设置;
    走线层,所述走线层设置在所述有机层上;其中,
    所述有机层的竖直高度大于所述晶体管层的竖直高度。
  2. 根据权利要求1所述的发光面板,其中所述有机层包括第一延伸部以及第二延伸部,所述第一延伸部的延伸方向为水平延伸,所述第二延伸部的延伸方向为竖直延伸。
  3. 根据权利要求2所述的发光面板,其中所述第一延伸部的水平宽度大于所述第二延伸部的水平宽度,以使所述第一延伸部与所述第二延伸部形成一抵持结构。
  4. 根据权利要求3所述的发光面板,其中所述抵持结构与所述晶体管层相抵持。
  5. 根据权利要求3所述的发光面板,其中所述第一延伸部的竖直高度为0.3~0.7微米。
  6. 根据权利要求1所述的发光面板,其中所述发光面板还包括薄膜晶体管,所述薄膜晶体管设置于所述晶体管层内;
    其中,所述晶体管层还包括从下至上依次层叠设置的阻隔层、缓冲层、第一栅极绝缘层、第二栅极绝缘层以及层间介质层;所述薄膜晶体管的一端与所述缓冲层连接,所述薄膜晶体管的另一端依次贯穿所述第一栅极绝缘层、第二栅极绝缘层以及层间介质层。
  7. 根据权利要求6所述的发光面板,其中所述第二栅极绝缘层上设置有第一栅极,所述层间介质层上设置有第二栅极。
  8. 根据权利要求1所述的发光面板,其中所述晶体管层上还设置有平坦有机层及像素定义层,所述像素定义层覆盖所述平坦有机层。
  9. 根据权利要求1所述的发光面板,其中所述基底由柔性材料制成,在所述基底内设置有像素区。
  10. 一种显示装置,其包括:壳体以及发光面板,所述发光面板设置在所述壳体上,所述发光面板包括:
    基底,所述基底包括显示区,非显示区及连接所述显示区与所述非显示区的弯折区;
    晶体管层,所述晶体管层设置在所述基底上且相对于所述显示区及非显示区设置;
    有机层,所述有机层设置在所述基底上且相对于所述弯折区设置;
    走线层,所述走线层设置在所述有机层上;其中,
    所述有机层的竖直高度大于所述晶体管层的竖直高度。
  11. 根据权利要求10所述的显示装置,其中所述有机层包括第一延伸部以及第二延伸部,所述第一延伸部的延伸方向为水平延伸,所述第二延伸部的延伸方向为竖直延伸。
  12. 根据权利要求11所述的显示装置,其中所述第一延伸部的水平宽度大于所述第二延伸部的水平宽度,以使所述第一延伸部与所述第二延伸部形成一抵持结构。
  13. 根据权利要求12所述的显示装置,其中所述抵持结构与所述晶体管层相抵持。
  14. 根据权利要求12所述的显示装置,其中所述第一延伸部的竖直高度为0.3~0.7微米。
  15. 根据权利要求10所述的显示装置,其中所述发光面板还包括薄膜晶体管,所述薄膜晶体管设置于所述晶体管层内;
    其中,所述晶体管层还包括从下至上依次层叠设置的阻隔层、缓冲层、第一栅极绝缘层、第二栅极绝缘层以及层间介质层;所述薄膜晶体管的一端与所述缓冲层连接,所述薄膜晶体管的另一端依次贯穿所述第一栅极绝缘层、第二栅极绝缘层以及层间介质层。
  16. 根据权利要求15所述的显示装置,其中所述第二栅极绝缘层上设置有第一栅极,所述层间介质层上设置有第二栅极。
  17. 根据权利要求10所述的显示装置,其中所述晶体管层上还设置有平坦有机层及像素定义层,所述像素定义层覆盖所述平坦有机层。
  18. 根据权利要求10所述的显示装置,其中所述基底由柔性材料制成,在所述基底内设置有像素区。
  19. 一种发光面板,其包括:
    基底,所述基底包括显示区,非显示区及连接所述显示区与所述非显示区的弯折区;
    晶体管层,所述晶体管层设置在所述基底上且相对于所述显示区及非显示区设置;
    有机层,所述有机层设置在所述基底上且相对于所述弯折区设置;
    走线层,所述走线层设置在所述有机层上;其中,
    所述有机层的竖直高度大于所述晶体管层的竖直高度,其中所述晶体管层上还设置有平坦有机层及像素定义层,所述像素定义层覆盖所述平坦有机层,所述基底由柔性材料制成,在所述基底内设置有像素区。
PCT/CN2019/079017 2018-12-21 2019-03-21 发光面板及显示装置 WO2020124835A1 (zh)

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