WO2020073453A1 - 彩膜基板、显示面板及显示面板的制备方法 - Google Patents

彩膜基板、显示面板及显示面板的制备方法 Download PDF

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Publication number
WO2020073453A1
WO2020073453A1 PCT/CN2018/118080 CN2018118080W WO2020073453A1 WO 2020073453 A1 WO2020073453 A1 WO 2020073453A1 CN 2018118080 W CN2018118080 W CN 2018118080W WO 2020073453 A1 WO2020073453 A1 WO 2020073453A1
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WO
WIPO (PCT)
Prior art keywords
color filter
area
filter substrate
array substrate
substrate
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PCT/CN2018/118080
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English (en)
French (fr)
Inventor
何怀亮
Original Assignee
惠科股份有限公司
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Publication date
Application filed by 惠科股份有限公司 filed Critical 惠科股份有限公司
Priority to US17/043,972 priority Critical patent/US11175556B2/en
Publication of WO2020073453A1 publication Critical patent/WO2020073453A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133514—Colour filters
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13452—Conductors connecting driver circuitry and terminals of panels
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13458—Terminal pads
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136222—Colour filters incorporated in the active matrix substrate
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line

Definitions

  • the present application relates to the field of display technology, in particular to a color film substrate, a display panel, and a method for manufacturing the display panel.
  • the color film substrate of the liquid crystal display (Liquid Crystal) (LCD) is the substrate on the side of the color filter (CF) ) 'S common electrode lines are arranged on the array substrate (that is, the thin film transistor (TFT) side substrate), when the LCD screen becomes larger and larger, the common electrode lines on the array substrate are more and more, Moreover, the array substrate also has signal lines such as scan lines and data lines, which leads to a lot of complicated wiring of the signal lines on the array substrate, and the difficulty and cost of manufacturing the array substrate increase.
  • LCD liquid crystal display
  • CF color filter
  • TFT thin film transistor
  • Various embodiments according to the present application provide a color film substrate, a display panel, and a method of manufacturing the display panel.
  • a color film substrate includes a first crimping area and a color area, and the color area is provided with a common electrode, and the common electrode is connected to the leads of an external driving circuit board at the first crimping area through a first signal line .
  • the first crimping area is provided on at least one side of the color filter substrate.
  • the color zone includes an array formed by a plurality of color filters of different colors.
  • the color of the color filter includes red, green and blue.
  • the first crimping area includes one or more first crimping terminals, and the first crimping terminal is configured to crimp the first signal line and the lead of the external driving circuit.
  • a display panel includes a color filter substrate.
  • the color filter substrate includes a first crimping area and a color area.
  • the color area is provided with a common electrode, and the common electrode is connected to the first through a first signal line.
  • the crimping area is connected to the leads of the external driving circuit board;
  • the display panel further includes an array substrate opposite to the color filter substrate;
  • the array substrate includes a display area and a second crimping area, the display area is more In an array formed by three thin film transistors, the second crimping area is an area where the signal lines on the array substrate are crimped with the leads of the external driving circuit board.
  • it further includes a conductive unit disposed on the color filter substrate, and the conductive unit is configured to make the color filter substrate and the array substrate conductive.
  • it further includes a conductive unit disposed on the array substrate, and the conductive unit is configured to make the color filter substrate and the array substrate conductive.
  • it further includes a conductive unit disposed on the color filter substrate and the array substrate, and the conductive unit is configured to make the color filter substrate and the array substrate conductive.
  • the conductive unit is a conductive strip
  • the conductive strip is disposed on the color filter substrate and located on at least one side of the color filter substrate.
  • the conductive unit is a conductive strip
  • the conductive strip is disposed on the array substrate and located on at least one side of the array substrate.
  • the conductive strip is a metal strip with a width of 2 ⁇ m to 8 ⁇ m.
  • the conductive unit is a conductive ball
  • the conductive ball is disposed on the array substrate and located around the array substrate.
  • the conductive unit includes a conductive strip and a conductive ball; the conductive strip is disposed on the color filter substrate and respectively located on opposite sides of the color filter substrate; the conductive ball is disposed on On the array substrate and located around the array substrate.
  • the second crimping area includes a scanning line crimping area and a data line crimping area; the scanning line crimping area is disposed on one side of the array substrate along the scanning line direction, and the data line crimping area The area is provided on one side of the array substrate in the direction of the scanning line; the scanning line crimping area is the area where the scanning line is crimped to the leads of the external gate drive circuit through the signal line; the data line crimping area is the data line passing signal The area where the wire is crimped with the lead of the external source drive circuit.
  • the scan line crimping area and the data line crimping area each include one or more second crimping terminals.
  • a preparation method of a display panel includes:
  • the display area includes an array formed by a plurality of thin film transistors
  • the method before the step of bonding the color filter substrate and the array substrate to make the color filter substrate and the array substrate conductive, the method further includes:
  • Conductive balls are bonded around the array substrate.
  • FIG. 1 is a schematic structural diagram of a color filter substrate according to an embodiment
  • FIG. 2 is a schematic plan view of a color zone according to an embodiment
  • FIG. 3 is a schematic cross-sectional view of a color zone according to an embodiment
  • FIG. 4 is a schematic plan view of a color area of another embodiment
  • FIG. 5 is a schematic plan view of a color filter substrate according to an embodiment
  • FIG. 6 is a schematic cross-sectional view of a display panel according to an embodiment
  • FIG. 7 is a schematic plan view of an array substrate according to an embodiment
  • FIG. 8 is a schematic cross-sectional view of a display panel according to another embodiment
  • FIG. 9 is a flowchart of a method for manufacturing a display panel according to an embodiment
  • FIG. 10 is a flowchart of a method for manufacturing a display panel according to another embodiment.
  • FIG. 1 is a color filter substrate 10 according to an embodiment.
  • the color filter substrate 10 includes a first pressure contact area (PAD) 1-1 and a color area 1-2.
  • the color area 1-2 is provided with a common electrode 13, and the common electrode 13 is connected to a lead (not shown) of the external driving circuit board through the first signal line in the first crimping area 1-1.
  • the common electrode 13 is disposed above the color region 1-2, and is formed of a transparent conductive material ITO (Indium Tin Oxide).
  • ITO Indium Tin Oxide
  • the color area 1-2 includes an array formed by a plurality of color filters of different colors.
  • the color of the color filter includes red (R), green (G), blue (B) or includes red (R), green (G), blue (B), and white (W), which The arrangement order of each color is arbitrary.
  • the colors of the color filter in this application include red (R), green (G), and blue (B), and the arrangement order of the colors is RGB.
  • conductive strips 14 are provided on opposite sides of the color zone 1-2. Understandably, the conductive strip 14 may also be disposed on either side or around the color zone 1-2.
  • the conductive strip 14 is located on the common electrode 13, and each color filter (RGB), the common electrode 13 and the conductive strip 14 are located on the glass substrate 15.
  • the conductive strip 14 is a metal strip; by providing conductive strips on opposite sides of the color region 1-2 of the color filter substrate 10, the color filter substrate 10 still has better conductivity even when the glass substrate is more flexible effect.
  • the first crimping region 1-1 is a region where the first signal line L1 on the color filter substrate 10 is crimped with the leads (not shown) of the external driving circuit board.
  • the first crimping area 1-1 is provided on at least one side of the color filter substrate 10. Understandably, the first crimping area 1-1 is used for crimping the signal lines on the color filter substrate 10 and the leads of the external driving circuit, which may be located on one side of the color filter substrate 10, or may be placed on the color filter substrate as needed
  • the first crimping area is provided on both sides of 10 and above, which is not specifically limited here.
  • the first crimping area 1-1 is provided on two adjacent sides of the color filter substrate 10 and is adjacent to the color area 1-2.
  • the first crimping area 1-1 further includes one or more first crimping terminals 16.
  • the first crimping terminals 16 are used to connect the first signal line L1 to the leads of the external driving circuit Perform pressure contact to realize signal interaction between the color filter substrate 10 and the external drive circuit. Understandably, the number of the first crimping terminals 16 depends on the number of the first signal lines L1, which is not specifically limited here.
  • the first signal line L1 is a common electrode line, that is, a routing of the common electrode 13 on the color filter substrate 10.
  • the traces of the common electrode 13 on the color filter substrate 10 can only be arranged on the array substrate, and the external drive can be realized by the crimping terminal on the array substrate Circuit interconnection.
  • the color filter substrate 10 is provided with a first crimping region, so that the traces of the common electrode 13 on the color filter substrate 10 can be crimped from the first crimping region to the leads of the external driving circuit, thereby reducing
  • the wiring on the array substrate is simplified, the manufacturing process of the array substrate is simplified and the manufacturing cost is reduced, and the stability and accuracy of signal transmission are ensured.
  • the display panel 6 is a display panel according to an embodiment, including the color filter substrate 10 described above, and further including an array substrate 20 disposed opposite to the color filter substrate; the array substrate 20 includes a second crimping area 2-1 and a display area 2-2, the display area 2-2 is an array formed by a plurality of thin film transistors (see FIG. 7), and the second pressure contact area 2-1 is the signal line of the array substrate 20 and the leads of the external drive circuit board (not shown in FIG. 6) (Displayed) the area where crimping is performed.
  • the display panel further includes a conductive unit 30, which is disposed on the color filter substrate 10, or on the array substrate 20, or on the color filter substrate 10 and the array substrate 20, respectively, to conduct electricity
  • the unit 30 is used for conducting the color filter substrate 10 and the array substrate 20.
  • the color filter substrate 10 and the array substrate 20 are filled with liquid crystal (not shown in FIG. 6)
  • the color filter substrate 10 is provided with a common electrode 13
  • the array substrate 20 is provided with a pixel electrode 23
  • the function of the conductive unit 30 is The common electrode 13 and the pixel electrode 23 are turned on, so that a driving electric field for controlling liquid crystal molecules is formed between the color filter substrate 10 and the array substrate 20.
  • the conductive unit 30 is a conductive strip 14.
  • the conductive strip 14 is disposed on the color filter substrate 10 and is located on at least one side of the color filter substrate 10. Understandably, the conductive strip 14 may also be disposed on the array substrate 20 and located on at least one side of the array substrate 20.
  • the conductive strip 14 is a metal strip, and the width is 2 ⁇ m to 8 ⁇ m, and the length is determined according to the length of the color filter substrate 10 or the array substrate 20, which is not specifically limited here.
  • the conductive unit 30 is only provided on the color filter substrate 10 or only on the array substrate 20.
  • the conductive strip 14 conducts the common electrode 13 of the color filter substrate 10 and the pixel electrode 23 of the array substrate 20, so that a liquid crystal control molecule is formed between the color filter substrate 10 and the array substrate 20 Driving electric field.
  • the conductive unit 30 is a conductive ball 24.
  • the conductive ball 24 is disposed on the array substrate 20 and is located around the array substrate 20. Understandably, the conductive ball 24 is adjacent to the display area 2-2, the display area 2-2 is formed with a TFT array, the TFT array and the color filter in the color area 1-2 on the color film substrate 10 (see FIG. 2 ) Corresponding arrangement.
  • the conductive ball 24 is a metal ball.
  • the conductive unit 30 is only provided on the array substrate 20.
  • the conductive ball 24 conducts the common electrode 13 of the color filter substrate 10 and the pixel electrode 23 of the array substrate 20 to form a control liquid crystal molecule between the color filter substrate 10 and the array substrate 20 Driving electric field. Understandably, the number of conductive balls 24 is set according to the actual conductive effect. If the conductive effect is poor, the number of conductive balls 24 can be increased appropriately.
  • the conductive unit 30 includes a conductive strip 14 and a conductive ball 24; wherein, the conductive strip 14 is disposed on the color filter substrate 10 and is located on at least one side of the color filter substrate 10; wherein, the conductive ball 24 is disposed on the array substrate 20 And located around the array substrate 20.
  • the conductive units 30 are respectively disposed on the color filter substrate 10 and the array substrate 20, and the conductive strips 14 on the color filter substrate 10 and the conductive balls 24 on the array substrate 20 are oppositely arranged.
  • the conductive strip 14 and the conductive ball 24 work together to make the common electrode 13 of the color filter substrate 10 and the pixel electrode 23 of the array substrate 20 conduct, so that the color filter substrate 10 and the array A driving electric field for controlling liquid crystal molecules is formed between the substrates 20.
  • the number of conductive balls 24 on the array substrate 20 can be reduced, the manufacturing time and cost of the array substrate 20 can be reduced, and the color filter substrate 10 and the array substrate 20 can be improved Of conductive properties.
  • the second crimping area 2-1 includes a scan line crimping area G and a data line crimping area S.
  • the scanning line crimping area G is provided on one side of the array substrate 20 along the scanning line direction
  • the data line crimping area S is provided on one side of the array substrate 20 along the scanning line direction.
  • the scanning line crimping region G is a region where the scanning line is crimped to the lead of the external gate drive circuit through the signal line G1.
  • the data line crimping area S is an area where the data line is crimped with the lead of the external source driving circuit through the signal line S1.
  • the scanning line crimping area G and the data line crimping area S each include one or more second crimping terminals 26, and the number of the second crimping terminals 26 is determined by the signal lines in the actual display area 2-2
  • the G1 and S1 decisions are not limited here.
  • the first signal line L1 of the common electrode 13 in the color filter substrate 10 is partially crimped from the scan line crimping area G or from the data line crimping area S to the leads of the external driving circuit.
  • the color region 1-2 of the color filter substrate 10 and the display region 2-2 of the array substrate 20 are relatively adhered, and the color filters and the TFTs are arranged in a one-to-one correspondence. Understandably, since the first crimping region 1-1 may be located on any side of the color filter substrate 10, and the second crimping region 2-1 may be located on any side of the array substrate 20, the first pressure The contact area 1-1 and the second crimping area 2-1 may be arranged in alignment (see FIG. 6) or separately on two sides (see FIG. 8).
  • FIG. 9 is a method for manufacturing a display panel according to an embodiment, including the following steps:
  • Step S100 forming a first crimping region 1-1 and a color region 1-2 on the color filter substrate 10.
  • the color zone 1-2 includes an array formed by a plurality of color filters.
  • Step S200 forming a second crimping area 2-1 and a display area 2-2 on the array substrate.
  • the display area 2-2 includes an array formed by a plurality of thin film transistors.
  • Step S300 bonding the color filter substrate 10 and the array substrate 20 to make the color filter substrate 10 and the array substrate 20 conductive.
  • step S300 it further includes:
  • Step S400 plating conductive strips on opposite sides of the color filter substrate.
  • Step S500 bonding conductive balls around the array substrate.
  • the color filter substrate 10 is first cleaned and coated with photoresists of different colors (ie, RGB color filters) in sequence, so that the color filter substrate 10 forms an array composed of a plurality of color filters; Then, metal strips (conductive strips) are plated on opposite sides of the color filter substrate 10, and finally a plurality of crimping terminals (first crimping area 1-1) are provided on at least one side of the color filter substrate 10 for pressing The first signal line L1 connected to the common electrode 13 and the leads of the external driving circuit, so as to realize the signal interaction between the color filter substrate 10 and the external driving circuit.
  • photoresists of different colors ie, RGB color filters
  • the display area 2-2 of the array substrate 20 has signal lines G1, S1 such as scan lines and data lines, pixel electrodes 23, thin film transistors (Thin Film Transistor, TFT) and other components, and the color filter substrate 10 has common electrodes Components 13 and the first signal line L1 of the common electrode 13; these components form an electric field that drives the liquid crystal.
  • the crimping area (including the first crimping area 1-1 and the second crimping area 2-1) is a crimping area, which is the first signal line L1 and the array of the color filter substrate 10 after the cutting and grinding process, respectively The area where the signal line of the substrate 20 is crimped with the lead of an external drive circuit board (for example, Chip On Film (COF)).
  • COF Chip On Film
  • the crimping area is generally provided with only signal lines, and does not require components such as pixel electrodes and TFTs.
  • the crimping regions are respectively located on one of the four sides of the color filter substrate 10 and the array substrate 20 or two adjacent sides. In order to electrically connect the leads of the external drive circuit board to the first signal line L1 of the color filter substrate 10 or the signal line of the array substrate 20, there must be no insulating layer (gate insulating layer or passivation layer) above the signal line in the crimping area Etc) covered.
  • the design scheme in this application is mainly for the improvement of the TN (Twisted Nematic, twisted nematic) type liquid crystal panel, and the IPS (In-Plane-Switching, planar direction switching) or FFS (Fringe Field Switching (boundary electric field switching technology) type liquid crystal panel is different in that the TN type liquid crystal panel is provided with electrodes on the upper and lower substrates, that is, the common electrode 13 and the lower substrate (array substrate 20 ) Is provided with a pixel electrode 23, these two electrodes are applied with voltage to form a vertical electric field, so that the polarization direction of the liquid crystal turns parallel to the direction of the electric field, and IPS and FFS apply voltage on the electrodes of a single substrate to form a horizontal electric field The molecules are also twisted parallel to the substrate.
  • the TN type liquid crystal panel is provided with electrodes on the upper and lower substrates, that is, the common electrode 13 and the lower substrate (array substrate 20 ) Is provided with a pixel electrode 23, these two electrode
  • the common electrode 13 on the color filter substrate 10 passes through the first signal line L1 in the first crimping area 1 -1 Crimping the leads of the external drive circuit to realize the power supply function to the color filter substrate 10, so as to form an electric field perpendicular to the liquid crystal panel.
  • the above-mentioned color filter substrate 10 is provided with the first crimping area 1-1, so that the first signal line L1 of the common electrode 13 can be connected to the leads of the external driving circuit at the first crimping area 1-1, avoiding the array substrate
  • the wiring of the signal line on the 20 is a complicated problem.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Liquid Crystal (AREA)

Abstract

一种彩膜基板、显示面板及显示面板的制备方法。彩膜基板(10)包括第一压接区(1-1)和颜色区(1-2)，颜色区(1-2)设置有公共电极13，公共电极13通过第一信号线在第一压接区与外部驱动电路板的引线连接。显示面板包括与彩膜基板(10)相对设置的阵列基板(20)；阵列基板包括显示区(2-2)和第二压接区(2-1)，显示区(2-2)为多个薄膜晶体管形成的阵列，第二压接区(2-1)为阵列基板(20)上的信号线与外部驱动电路板的引线进行压接的区域。

Description

彩膜基板、显示面板及显示面板的制备方法 技术领域
本申请涉及显示技术领域，特别是涉及一种彩膜基板、显示面板及显示面板的制备方法。
背景技术
随着大屏显示时代的到来，电视、手机等显示器屏幕都越来越大，液晶显示器(Liquid Crystal Display，LCD)的彩膜基板(即彩色滤光片(Color Filter，CF)一侧的基板)的公共电极线布置在阵列基板(即薄膜晶体管(Thin Film Transistor，TFT)一侧的基板)上，当液晶显示器的屏幕越来越大时，阵列基板上的公共电极线越来越多，而且阵列基板上还具有扫描线及数据线等信号线，从而导致阵列基板上的信号线的布线繁多复杂，阵列基板的制作难度及成本增加。
发明内容
根据本申请的各种实施例提供一种彩膜基板、显示面板及显示面板的制备方法。
一种彩膜基板，包括第一压接区和颜色区，所述颜色区设置有公共电极，所述公共电极通过第一信号线在所述第一压接区与外部驱动电路板的引线连接。
在其中一个实施例中，所述第一压接区设置于彩膜基板的至少一侧。
在其中一个实施例中，所述颜色区包括多个不同颜色的彩色滤光片形成 的阵列。
在其中一个实施例中，所述彩色滤光片的颜色包括红色、绿色和蓝色。
在其中一个实施例中，所述第一压接区包括一个或多个第一压接端子，所述第一压接端子设置为将第一信号线与外部驱动电路的引线进行压接。
一种显示面板，包括一种彩膜基板，所述彩膜基板包括第一压接区和颜色区，所述颜色区设置有公共电极，所述公共电极通过第一信号线在所述第一压接区与外部驱动电路板的引线连接；所述显示面板还包括与所述彩膜基板相对设置的阵列基板；所述阵列基板包括显示区和第二压接区，所述显示区为多个薄膜晶体管形成的阵列，所述第二压接区为所述阵列基板上的信号线与外部驱动电路板的引线进行压接的区域。
在其中一个实施例中，还包括导电单元，所述导电单元设置于所述彩膜基板上，所述导电单元设置为使彩膜基板和阵列基板导通。
在其中一个实施例中，还包括导电单元，所述导电单元设置于阵列基板上，所述导电单元设置为使彩膜基板和阵列基板导通。
在其中一个实施例中，还包括导电单元，所述导电单元设置于所述彩膜基板和所述阵列基板上，所述导电单元设置为使彩膜基板和阵列基板导通。
在其中一个实施例中，所述导电单元为导电条，所述导电条设置于所述彩膜基板上，且位于所述彩膜基板的至少一侧。
在其中一个实施例中，所述导电单元为导电条，所述导电条设置于阵列基板上，且位于与阵列基板的至少一侧。
在其中一个实施例中，所述导电条为金属条，宽度为2μm至8μm。
在其中一个实施例中，所述导电单元为导电球，所述导电球设置于所述阵列基板上，且位于所述阵列基板的四周。
在其中一个实施例中，所述导电单元包括导电条和导电球；所述导电条设置于所述彩膜基板上，且分别位于所述彩膜基板的相对两侧；所述导电球设置于所述阵列基板上，且位于所述阵列基板的四周。
在其中一个实施例中，所述第二压接区包括扫描线压接区和数据线压接区；扫描线压接区设置于沿扫描线方向的阵列基板一侧边上，数据线压接区设置于沿扫描线方向的阵列基板一侧边上；扫描线压接区为扫描线通过信号线与外部栅极驱动电路的引线进行压接的区域；数据线压接区为数据线通过信号线与外部源极驱动电路的引线进行压接的区域。
在其中一个实施例中，所述扫描线压接区和所述数据线压接区均包括一个或多个第二压接端子。
一种显示面板的制备方法，包括：
在彩膜基板上形成第一压接区和颜色区，所述颜色区包括多个彩色滤光片形成的阵列；
在阵列基板上形成第二压接区和显示区；所述显示区包括多个薄膜晶体管形成的阵列；
将所述彩膜基板和阵列基板粘合，使所述彩膜基板和所述阵列基板导通。
在其中一个实施例中，所述将所述彩膜基板和阵列基板粘合，使所述彩膜基板和所述阵列基板导通的步骤之前，还包括：
在所述彩膜基板的相对两侧镀上导电条；
在所述阵列基板的四周粘结导电球。
本申请的一个或多个实施例的细节在下面的附图和描述中提出。本申请的其它特征、目的和优点将从说明书、附图以及权利要求书变得明显。
附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他实施例的附图。
图1为一实施例的彩膜基板的结构示意图；
图2为一实施例的颜色区的平面示意图；
图3为一实施例的颜色区的截面示意图；
图4为另一实施例的颜色区的平面示意图；
图5为一实施例的彩膜基板的平面结构示意图；
图6为一实施例的显示面板的截面示意图；
图7为一实施例的阵列基板的平面结构示意图；
图8为另一实施例的显示面板的截面示意图；
图9为一实施例的显示面板的制备方法流程图；
图10为另一实施例的显示面板的制备方法流程图。
具体实施方式
图1为一实施例的彩膜基板10，该彩膜基板10包括第一压接区(PAD)1-1和颜色区1-2。其中，颜色区1-2设置公共电极13，公共电极13通过第一信号线与外部驱动电路板的引线(图未显示)在第一压接区1-1连接。
具体地，公共电极13设置在颜色区1-2的上方，由透明导电材料ITO(Indium Tin Oxide，氧化铟锡)制作形成。
具体地，如图2所示，颜色区1-2包括多个不同颜色的彩色滤光片形成的阵列。可以理解地，彩色滤光片的颜色包括红色(R)、绿色(G)、蓝色(B)或者包括红色(R)、绿色(G)、蓝色(B)和白色(W)，其各颜色的排列次序任意。可选的，本申请中彩色滤光片的颜色包括红色(R)、绿色(G)、蓝色(B)，其各颜色的排列次序为RGB。
进一步地，如图3和图4所示，在颜色区1-2的相对两侧设置有导电条14。可以理解地，导电条14还可以设置在颜色区1-2任意一侧或者四周。
在本实施例中，导电条14位于公共电极13之上，各彩色滤光片(RGB)、公共电极13和导电条14均位于玻璃基板15之上。具体地，导电条14为金属条；通过在彩膜基板10的颜色区1-2的相对两侧设置导电条，使得彩膜基板10在玻璃基板较易弯曲的情况下仍具有较好的导电效果。
具体地，如图5所示，第一压接区1-1为彩膜基板10上的第一信号线L1与外部驱动电路板的引线(图未显示)进行压接的区域。
具体地，第一压接区1-1设置于彩膜基板10的至少一侧。可以理解地，第一压接区1-1用于压接彩膜基板10上的信号线与外部驱动电路的引线，可位于彩膜基板10的其中一侧，或者根据需要可在彩膜基板10的两侧及两侧以上设置第一压接区，这里不做具体限定。
例如，参见图5，第一压接区1-1设置于彩膜基板10的相邻两侧，且均与颜色区1-2相邻。
进一步地，如图5所示，第一压接区1-1还包括一个或多个第一压接端子16，第一压接端子16用于将第一信号线L1与外部驱动电路的引线进行压接，实现彩膜基板10与外部驱动电路的信号交互。可以理解地，第一压接端子16的数量根据第一信号线L1的数量而定，这里不做具体限定。
具体地，第一信号线L1为公共电极线，即彩膜基板10上的公共电极13的走线。
可以理解地，如果彩膜基板10上没有设置第一压接区，彩膜基板10上的公共电极13的走线只能布置在于阵列基板上，通过阵列基板上的压接端子实现与外部驱动电路的互连。本实施例中，彩膜基板10上设置有第一压接区，使得彩膜基板10上的公共电极13的走线可以从第一压接区与外部驱动电路的引线进行压接，从而减少了阵列基板上的走线，简化了阵列基板的制作工艺及降低制作成本，并且确保了信号传输的稳定性与准确性。
图6为一实施例的显示面板，包括上述的彩膜基板10，还包括与所述彩膜基板相对设置的阵列基板20；所述阵列基板20包括第二压接区2-1和显示区2-2，显示区2-2为多个薄膜晶体管形成的阵列(参见图7)，第二压接区2-1为阵列基板上20的信号线与外部驱动电路板的引线(图6未显示)进行压接的区域。
具体地，参见图6，显示面板还包括导电单元30，导电单元30设置于彩膜基板10上，或者设置于阵列基板20上，或者分别设置于彩膜基板10上和阵列基板20上，导电单元30用于使彩膜基板10和阵列基板20导通。可以理解地，彩膜基板10和阵列基板20之间填充有液晶(图6未显示)，彩膜基板10设置有公共电极13，阵列基板20上设置有像素电极23；导电单元30的作用是导通公共电极13与像素电极23，使彩膜基板10与阵列基板20之间形成控制液晶分子的驱动电场。
进一步地，如图3所示，导电单元30为导电条14，导电条14设置于彩膜基板10上，且位于彩膜基板10的至少一侧。可以理解地，导电条14还可以设置于阵列基板20上，且位于与阵列基板20的至少一侧。可选的，导电 条14为金属条，并且宽度为2μm至8μm，长度根据彩膜基板10或阵列基板20的长度而定，这里不做具体限定。
在本实施例中，导电单元30仅设置于彩膜基板10上，或者仅设置于阵列基板20上。当彩膜基板10与阵列基板20粘合时，导电条14导通彩膜基板10的公共电极13与阵列基板20的像素电极23，使彩膜基板10与阵列基板20之间形成控制液晶分子的驱动电场。
进一步地，如图7所示，导电单元30为导电球24，导电球24设置于阵列基板20上，且位于阵列基板20的四周。可以理解地，导电球24相邻于显示区2-2，显示区2-2形成有TFT阵列，TFT阵列与彩膜基板10上的颜色区1-2中的彩色滤光片(参见图2)对应排列。可选的，导电球24为金属球。
在本实施例中，导电单元30仅设置于阵列基板20上。当彩膜基板10与阵列基板20粘合时，导电球24导通彩膜基板10的公共电极13与阵列基板20的像素电极23，使彩膜基板10与阵列基板20之间形成控制液晶分子的驱动电场。可以理解地，导电球24的数量根据实际导电效果设定，若导电效果差，可适当增加导电球24的数量。
进一步地，导电单元30包括导电条14和导电球24；其中，导电条14设置于彩膜基板10上，且位于彩膜基板10的至少一侧；其中，导电球24设置于阵列基板20上，且位于阵列基板20的四周。
在本实施例中，导电单元30分别设置于彩膜基板10上和阵列基板20上，且位于彩膜基板10上的导电条14和位于阵列基板20上的导电球24相对设置。当彩膜基板10与阵列基板20粘合时，导电条14和导电球24共同作用，使彩膜基板10的公共电极13与阵列基板20的像素电极23导通，从而彩膜基板10与阵列基板20之间形成控制液晶分子的驱动电场。可以理解地，通 过在彩膜基板10上设置导电条14，可以减少阵列基板20上的导电球24的数量，减少阵列基板20的制作时间及制作成本，并且提高彩膜基板10和阵列基板20的导电性能。
具体地，参见图7，第二压接区2-1包括扫描线压接区G和数据线压接区S。其中，扫描线压接区G设置于沿扫描线方向的阵列基板20一侧边上，数据线压接区S设置于沿扫描线方向的阵列基板20一侧边上。扫描线压接区G为扫描线通过信号线G1与外部栅极驱动电路的引线进行压接的区域。数据线压接区S为数据线通过信号线S1与外部源极驱动电路的引线进行压接的区域。
可以理解地，扫描线压接区G和数据线压接区S均包括一个或多个第二压接端子26，其第二压接端子26的数量由实际显示区2-2中的信号线G1和S1决定，这里不做具体限定。
在一实施例中，彩膜基板10中的公共电极13的第一信号线L1有部分从扫描线压接区G或者从数据线压接区S与外部驱动电路的引线进行压接。
具体地，上述彩膜基板10的颜色区1-2与阵列基板20的显示区2-2相对粘合，且彩色滤光片与TFT一一对应排列。可以理解地，由于第一压接区1-1可位于彩膜基板10的任意一侧边上，第二压接区2-1可位于阵列基板20的任意一侧边上，所以第一压接区1-1与第二压接区2-1可以对齐设置(参见图6)或者分开设置在相离的两侧(参见图8)。
图9为一实施例的显示面板的制备方法，包括以下步骤：
步骤S100：在彩膜基板10上形成第一压接区1-1和颜色区1-2。其中，颜色区1-2包括多个彩色滤光片形成的阵列。
步骤S200：在阵列基板上形成第二压接区2-1和显示区2-2。其中，显 示区2-2包括多个薄膜晶体管形成的阵列。
步骤S300：将彩膜基板10和阵列基板20粘合，使彩膜基板10和阵列基板20导通。
具体地，如图10所示，步骤S300之前，还包括：
步骤S400：在彩膜基板的相对两侧镀上导电条。
步骤S500：在阵列基板的四周粘结导电球。
在本实施例中，首先将彩膜基板10清洗干净，并依次涂布不同颜色的光阻(即RGB彩色滤光片)，使彩膜基板10形成由多个彩色滤光片组成的阵列；然后在彩膜基板10的相对两侧镀上金属条(导电条)，最后在彩膜基板10的至少一侧边设置若干个压接端子(第一压接区1-1)，用于压接公共电极13的第一信号线L1与外部驱动电路的引线，以实现彩膜基板10与外部驱动电路的信号交互。
另外，将阵列基板20清洗干净，并根据阵列基板20的制造工艺在阵列基板20上形成金属球(导电球)及第二压接区；然后涂布框胶及液晶；最后将阵列基板20与彩膜基板10相对粘合。
需要说明的是，阵列基板20的显示区2-2具有扫描线、数据线等信号线G1、S1，像素电极23及薄膜晶体管(Thin Film Transistor，TFT)等组件，彩膜基板10具有公共电极13的组件及公共电极13的第一信号线L1；通过这些组件形成驱动液晶的电场。压接区域(包括第一压接区1-1和第二压接区2-1)为压接区域，是经切割及研磨工艺之后，分别将彩膜基板10的第一信号线L1和阵列基板20的信号线与外部的驱动电路板(例如，覆晶薄膜(Chip On Film，COF))的引线进行压接的区域。压接区域一般只设有信号线，而不需要像素电极和TFT等组件。压接区域分别位于彩膜基板10和阵列基板 20的4个边中的其中一个或相邻的两个边上。为了分别将外部的驱动电路板的引线和彩膜基板10的第一信号线L1或阵列基板20的信号线电连接，压接区域的信号线上方必须没有绝缘层(栅绝缘层或钝化层等)覆盖。
还需要说明的是，本申请中的设计方案主要是针对TN(Twisted Nematic，扭曲向列)型型液晶面板做出的改进，与IPS(In-Plane-Switching，平面方向转换)或FFS(Fringe Field Switching，边界电场切换技术)型液晶面板不同之处在于TN型液晶面板是在上下基板都设置有电极，即上基板(彩膜基板10)上设置有公共电极13，下基板(阵列基板20)上设置有像素电极23，这两个电极加上电压形成垂直电场，使得液晶偏振化方向转向与电场方向平行，而IPS和FFS都是在单一基板的电极上施加电压，形成水平电场，液晶分子也是平行于基板进行扭转运的。因此对于本申请中的TN型液晶面板，由于阵列基板20和彩膜基板10通过导电单元30实现导通，彩膜基板10上的公共电极13通过第一信号线L1在第一压接区1-1与外部驱动电路的引线进行压接，实现对彩膜基板10的供电功能，以便形成垂直于液晶面板的电场。
上述彩膜基板10，通过设置第一压接区1-1，使得其公共电极13的第一信号线L1可以在第一压接区1-1与外部驱动电路的引线连接，避免了阵列基板20上的信号线的布线繁多复杂的问题。
以上所述实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本申请的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对发明专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干 变形和改进，这些都属于本申请的保护范围。因此，本申请专利的保护范围应以所附权利要求为准。

Claims (18)

  1. 一种彩膜基板，包括第一压接区和颜色区，所述颜色区设置有公共电极，所述公共电极通过第一信号线在所述第一压接区与外部驱动电路板的引线连接。
  2. 根据权利要求1所述的彩膜基板，其中，所述第一压接区设置于彩膜基板的至少一侧。
  3. 根据权利要求1所述的彩膜基板，其中，所述颜色区包括多个不同颜色的彩色滤光片形成的阵列。
  4. 根据权利要求3所述的彩膜基板，其中，所述彩色滤光片的颜色包括红色、绿色和蓝色。
  5. 根据权利要求1所述的彩膜基板，其中，所述第一压接区包括一个或多个第一压接端子，所述第一压接端子设置为将第一信号线与外部驱动电路的引线进行压接。
  6. 一种显示面板，包括一种彩膜基板，所述彩膜基板包括第一压接区和颜色区，所述颜色区设置有公共电极，所述公共电极通过第一信号线在所述第一压接区与外部驱动电路板的引线连接；所述显示面板还包括与所述彩膜基板相对设置的阵列基板；所述阵列基板包括显示区和第二压接区，所述显示区为多个薄膜晶体管形成的阵列，所述第二压接区为所述阵列基板上的信号线与外部驱动电路板的引线进行压接的区域。
  7. 根据权利要求6所述的显示面板，其中，还包括导电单元，所述导电单元设置于所述彩膜基板上，所述导电单元设置为使彩膜基板和阵列基板导通。
  8. 根据权利要求6所述的显示面板，其中，还包括导电单元，所述导电 单元设置于阵列基板上，所述导电单元设置为使彩膜基板和阵列基板导通。
  9. 根据权利要求6所述的显示面板，其中，还包括导电单元，所述导电单元设置于所述彩膜基板和所述阵列基板上，所述导电单元设置为使彩膜基板和阵列基板导通。
  10. 根据权利要求7所述的显示面板，其中，所述导电单元为导电条，所述导电条设置于所述彩膜基板上，且位于所述彩膜基板的至少一侧。
  11. 根据权利要求7所述的显示面板，其中，所述导电单元为导电条，所述导电条设置于阵列基板上，且位于与阵列基板的至少一侧。
  12. 根据权利要求10所述的显示面板，其中，所述导电条为金属条，宽度为2μm至8μm。
  13. 根据权利要求7所述的显示面板，其中，所述导电单元为导电球，所述导电球设置于所述阵列基板上，且位于所述阵列基板的四周。
  14. 根据权利要求7所述的显示面板，其中，所述导电单元包括导电条和导电球；所述导电条设置于所述彩膜基板上，且分别位于所述彩膜基板的相对两侧；所述导电球设置于所述阵列基板上，且位于所述阵列基板的四周。
  15. 根据权利要求6所述的显示面板，其中，所述第二压接区包括扫描线压接区和数据线压接区；扫描线压接区设置于沿扫描线方向的阵列基板一侧边上，数据线压接区设置于沿扫描线方向的阵列基板一侧边上；扫描线压接区为扫描线通过信号线与外部栅极驱动电路的引线进行压接的区域；数据线压接区为数据线通过信号线与外部源极驱动电路的引线进行压接的区域。
  16. 根据权利要求15所述的显示面板，其中，所述扫描线压接区和所述数据线压接区均包括一个或多个第二压接端子。
  17. 一种显示面板的制备方法，包括：
    在彩膜基板上形成第一压接区和颜色区，所述颜色区包括多个彩色滤光片形成的阵列；
    在阵列基板上形成第二压接区和显示区；所述显示区包括多个薄膜晶体管形成的阵列；
    将所述彩膜基板和阵列基板粘合，使所述彩膜基板和所述阵列基板导通。
  18. 根据权利要求17所述的制备方法，其中，所述将所述彩膜基板和阵列基板粘合，使所述彩膜基板和所述阵列基板导通的步骤之前，还包括：
    在所述彩膜基板的相对两侧镀上导电条；
    在所述阵列基板的四周粘结导电球。
PCT/CN2018/118080 2018-10-08 2018-11-29 彩膜基板、显示面板及显示面板的制备方法 WO2020073453A1 (zh)

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