WO2020047964A1 - 阵列基板、显示面板和显示装置 - Google Patents

阵列基板、显示面板和显示装置 Download PDF

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Publication number
WO2020047964A1
WO2020047964A1 PCT/CN2018/111816 CN2018111816W WO2020047964A1 WO 2020047964 A1 WO2020047964 A1 WO 2020047964A1 CN 2018111816 W CN2018111816 W CN 2018111816W WO 2020047964 A1 WO2020047964 A1 WO 2020047964A1
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WO
WIPO (PCT)
Prior art keywords
fan
out wire
array substrate
wire group
display unit
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PCT/CN2018/111816
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English (en)
French (fr)
Inventor
常红燕
Original Assignee
重庆惠科金渝光电科技有限公司
惠科股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 重庆惠科金渝光电科技有限公司, 惠科股份有限公司 filed Critical 重庆惠科金渝光电科技有限公司
Priority to US16/245,547 priority Critical patent/US20200073187A1/en
Publication of WO2020047964A1 publication Critical patent/WO2020047964A1/zh

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line

Definitions

  • the present application relates to the field of display manufacturing, and in particular, to an array substrate, a display panel, and a display device.
  • each layer of the pattern is formed on the array substrate.
  • the manufacturing process of each layer of the array pattern requires film deposition, cleaning, photoresist coating, exposure, and development. , Etching, photoresist stripping and inspection. During the etching process, the concentration of the etchant in areas with high trace densities will decrease, and the concentration of etchant in areas with low trace densities will increase.
  • the concentration of the etchant in the edge areas of the fan-out traces is high, and the Corrosion of the wires leads to wire breaks, causing picture signals to fail to be transmitted from the connection unit to the display unit through the wires in the fan-out area, thereby causing abnormal screen display of the liquid crystal panel.
  • the main purpose of this application is to propose an array substrate, which aims to solve the technical problem of how to avoid abnormal display of the LCD panel screen.
  • the array substrate provided in the present application includes:
  • a fan-out area is located between the display unit and the driving unit, and the fan-out area has a fan-out wire group, and the fan-out wire group is used to connect the display unit and the driving unit;
  • the dummy line is provided on at least one side of the fan-out wire group, and is disposed adjacent to the outermost fan-out wire of the fan-out wire group.
  • the dummy line is provided on both sides of the fan-out wire group, and is disposed adjacent to the outermost fan-out wire of the fan-out wire group.
  • the dummy line and adjacent fan-out wires located on the same side of the fan-out area are parallel to each other.
  • a distance between the dummy lines adjacent to each other and the outermost fan-out wires of the fan-out wire group is 3 ⁇ m-8 ⁇ m.
  • the number of the dummy lines is multiple, and the plurality of dummy lines are spaced apart in a direction away from the fan-out wire group.
  • one end of the dummy line is connected to an edge of the display unit, and the other end is adjacent to the driving unit.
  • the dummy line is adjacent to one end of the driving unit, and a distance from the driving unit is at least 3 ⁇ m.
  • the spacing between any two adjacent dummy lines is equal to the spacing between the dummy lines and adjacent fan-out wires.
  • the present application also provides a display panel including an array substrate.
  • the array substrate includes: a display unit; a drive unit; and a fan-out area between the display unit and the drive unit.
  • the fan-out area has fan-out wires.
  • Group, the fan-out wire group is used to connect the display unit and the driving unit; a dummy line is provided on at least one side of the fan-out wire group and is arranged adjacent to the outermost fan-out wire of the fan-out wire group .
  • the present application also proposes a display device including a display panel including an array substrate.
  • the array substrate includes: a display unit; a drive unit; and a fan-out area between the display unit and the drive unit.
  • the fan-out area has a fan-out wire group, the fan-out wire group is used to connect the display unit and the driving unit; a dummy line is provided on at least one side of the fan-out wire group and is adjacent to the fan-out The outermost fan-out wire set for the wire group.
  • a dummy line is provided on at least one side of the fan-out conductor group, and the dummy line is adjacent to the outermost fan-out conductor of the fan-out conductor group.
  • the dummy line does not function for signal transmission, but improves the fan-out conductor group.
  • the trace density of the edge of the fan-out wire at the edge portion thereby reducing the concentration of the etching solution during the etching process at that location, and preventing the fan-out wire at the edge portion of the fan-out wire group from being etched due to the high concentration of the etching solution It is corroded and broken, thereby improving the overall stability of the fan-out wire group, preventing the display panel from being abnormal due to the break of the fan-out wire, and improving the stability of the display panel.
  • FIG. 1 is a schematic structural diagram of an embodiment of an array substrate of the present application.
  • the directional indication is only used to explain in a specific posture (as shown in the drawings) (Shown) the relative positional relationship, movement, etc. of the various components, if the specific posture changes, the directional indicator will change accordingly.
  • This application proposes an array substrate.
  • the array substrate includes:
  • a fan-out area 30 is located between the display unit 10 and the driving unit 20.
  • the fan-out area 30 has a fan-out wire group 31.
  • the fan-out wire group 31 is used to connect the display unit 10 and the driving unit 20. ;
  • the dummy line 32 is disposed on at least one side of the fan-out wire group 31 and is disposed adjacent to the outermost fan-out wire of the fan-out wire group 31.
  • the display unit 10 is provided as a display screen, and the display unit 10 has a signal line provided to be electrically connected to a fan-out wire.
  • the driving unit 20 may be a driving chip for sending a display signal to the display unit 10.
  • the driving unit 20 is provided on one side of the display unit 10.
  • the number of the driving units 20 may be multiple.
  • the multiple driving units 20 are spaced around the display unit 10. Settings.
  • the fan-out area 30 has a fan-out wire group 31.
  • the fan-out wire group 31 generally includes a plurality of fan-out wires. One end of the fan-out wires and the signal of the display unit 10
  • the cable is electrically connected, and the other end is electrically connected to the driving unit 20 to transmit the display signal of the driving unit 20 to the display unit 10 so that the display unit 10 works normally.
  • the dummy line 32 is provided on at least one side of the fan-out wire group 31. Since the fan-out wire group 31 is located between the display unit 10 and the driving unit 20, the dummy line 32 is also located between the display unit 10 and the driving unit 20. The dummy line 32 is arranged adjacent to the outermost fan-out line of the fan-out line group 31. The number of the dummy lines 32 may be one or multiple. If the number of the dummy lines 32 is multiple, the number of the dummy lines 32 is the most. The dummy line 32 near the fan-out wire group 31 is adjacent to the outermost fan-out wire of the fan-out wire group 31. The positional relationship between the dummy line 32 and the fan-out area 30 is not limited, and it is only required to satisfy the fan-out wire near the outermost side of the dummy line 32.
  • the dummy line 32 does not function for signal transmission, that is, the dummy line 32 is not electrically connected to the signal line of the display unit 10 and is not electrically connected to the driving unit 20, but only serves to protect the outermost fan-out wire. Specifically, since the dummy line 32 is adjacent to the outermost fan-out conductor, the outermost fan-out conductor of the fan-out conductor group 31 is no longer at the edge of the overall routing structure, that is, the routing where the outermost fan-out conductor is located is improved.
  • the concentration of the etching solution at the position of the outermost fanout wire will be reduced, thereby avoiding the excessive concentration of the outermost fanout wire
  • the etching solution is corroded and broken, and the signal cannot be transmitted normally.
  • the concentration of the etching solution at the position of the dummy line 32 will be higher. Since the dummy line 32 only serves as a protection function, even if the dummy line 32 is corroded and broken, it will not affect the signal transmission. At the same time, after the dummy line 32 is broken, the outermost fan will fan out.
  • the wiring density at the position where the wires are located will not be changed. Therefore, the dummy line 32 can form an effective and stable protection for the outermost fan-out wires.
  • the line width and material of the dummy line 32 can be set to be the same as the fan-out wires, so as to facilitate the centralized processing and production of the array substrate and improve the production efficiency.
  • a dummy line 32 is provided on at least one side of the fan-out wire group 31, and the dummy line 32 is adjacent to the outermost fan-out wire of the fan-out wire group 31.
  • the dummy line 32 does not function as a signal transmission, but improves
  • the wiring density of the fan-out wires at the edge portion of the fan-out wire group 31 is reduced, thereby reducing the concentration of the etching solution during the etching process at this location, and preventing the fan-out wires at the edge portion of the fan-out wire group 31 from being etched. It is corroded and broken due to the high concentration of the etching solution, thereby improving the overall stability of the fan-out wire group 31, preventing the display panel from being abnormal due to the break of the fan-out wire, and improving the stability of the display panel.
  • the dummy lines 32 are provided on both sides of the fan-out wire group 31 and are disposed adjacent to the outermost fan-out wires of the fan-out wire group 31.
  • the dummy lines 32 are provided on both sides of the fan-out wire group 31, which can simultaneously protect the fan-out wires of the edge portions on both sides of the fan-out wire group 31 during the etching process, thereby further improving the fan-out wire group 31
  • the overall stability further prevents the display panel screen from displaying abnormally.
  • the dummy line 32 and adjacent fan-out wires located on the same side of the fan-out area 30 are parallel to each other.
  • one end of the fan-out wire extends until the driving unit 20 is electrically connected to the driving unit 20, and the dummy line 32 that does not play a role in signal transmission should avoid contact with the driving unit 20. Therefore, the dummy line 32 should Located in fan-out area 30.
  • the part of the fan-out wire in the fan-out area 30 may extend linearly or in a broken line, as long as the dummy line 32 and the adjacent fan-out wire are parallel to each other on the same side of the fan-out area 30.
  • the dummy line 32 is parallel to the adjacent fan-out wires on the same side of the fan-out area 30, so that the distance between each part of the dummy line 32 and each part of the outermost fan-out wire is the same, so the fan-out of the edge portion of the fan-out wire group 31
  • the density of the traces at the positions of the wires can be the same, so that the difference in the concentration of the etching solution at the corresponding position during the etching process will not be too large, and the fan-out wires of the edge portion of the fan-out wire group 31 will be further prevented from breaking.
  • a distance between the dummy lines 32 adjacent to each other and the outermost fan-out wires of the fan-out wire group 31 is 3 ⁇ m-8 ⁇ m.
  • the dummy line 32 may be multiple or one. The distance here refers to the dummy line 32 closest to the fan-out wire group and the nearest dummy line. The space between the fan-out wires at 31.
  • the distance between the dummy line 32 and the outermost fan-out wire can be set to be equal to the distance between two adjacent fan-out wires in parallel, so that the routing density of the fan-out wire at the edge portion of the fan-out wire group 31 is
  • the overall wiring density of the fan-out wire group 31 tends to be the same.
  • the distance between two adjacent and parallel fan-out wires is 3 ⁇ m-8 ⁇ m, so the distance between the dummy line 32 and the adjacent fan-out wire is set to 3 ⁇ m-8 ⁇ m, which can reasonably control the edge of the fan-out wire group 31
  • the wiring density of a portion of the fan-out wire is further improved, thereby further improving the overall stability of the fan-out wire group 31.
  • the number of the dummy lines 32 is plural, and the plurality of dummy lines 32 are spaced apart in a direction away from the fan-out wire group 31.
  • the number of the dummy lines 32 is not specifically limited, and it is only required that multiple dummy lines 32 do not interfere with other functional units or routing structures on the array substrate. Any two adjacent dummy lines 32 may be arranged parallel to each other. Setting the number of the dummy lines 32 to a plurality can further increase the wiring density of the fan-out wires at the edge portion of the fan-out wire group 31, thereby further reducing the location of the fan-out wires at the edge portion of the fan-out wire group 31 during the etching process. The concentration of the etching solution at the position is to more effectively and stably protect the fan-out wires of the edge portion of the fan-out wire group 31.
  • one end of the dummy line 32 is connected to an edge of the display unit 10, and the other end is adjacent to the driving unit 20.
  • the structure of the dummy line 32 may be set to be the same as that of the fan-out line to facilitate processing.
  • the dummy line 32 does not function as a conducting wire, that is, the end of the dummy line 32 may be in contact with the display unit 10, but the dummy line 32 is not electrically connected to the signal line of the display unit 10.
  • One end of the dummy line 32 is connected to the edge of the display unit 10 so that the position of the end of the dummy line 32 corresponds to the position of the end of the display unit connected to the fan-out wire.
  • the present embodiment can increase the wiring density of the position of the fan-out wire end portion of the edge portion of the fan-out wire group 31, thereby reducing the position of the fan-out wire end portion of the edge portion of the fan-out wire group 31 during the etching process.
  • the concentration of the etching solution is to more effectively and stably protect the fan-out wires of the edge portion of the fan-out wire group 31.
  • the driving unit 20 is generally a combination of a driving chip and a circuit board.
  • the other end of the dummy line 32 should be kept at a certain distance from the driving unit 20 to Improve the overall stability of the array substrate.
  • the dummy line 32 is adjacent to one end of the driving unit 20 and the distance from the driving unit 20 is at least 3 ⁇ m.
  • setting the dummy line 32 adjacent to one end of the driving unit 20 and the distance from the driving unit 20 to at least 3 ⁇ m can improve the wiring density at the position where the fan-out wires of the edge portion of the fan-out wire group 31 are located and reduce Based on the concentration of the etching solution at the position of the fan-out wires of the fan-out wire group 31 during the etching process, the dummy line 32 is effectively prevented from accidentally touching the driving unit 20 to improve the overall stability of the array substrate.
  • the distance between any two adjacent dummy lines 32 is equal to the distance between the dummy lines 32 and adjacent fan-out wires.
  • the distance between any two adjacent dummy lines 32 is equal to the distance between the dummy lines 32 and the adjacent fan-out conductors, so that the entirety formed by the dummy lines 32 and the fan-out conductor groups 31 can travel.
  • the wiring density of the line structure is more balanced, so that the concentration of the etching solution at the overall routing position is more uniform during the etching process, which further reduces the influence of the etching solution on the fan-out wires, thereby improving the overall stability of the fan-out wire group 31. In order to improve the overall stability of the array substrate.
  • the present application also proposes a display panel including an array substrate.
  • a display panel including an array substrate.
  • the array substrate For a specific structure of the array substrate, refer to the above embodiments. Since the display panel adopts all the technical solutions of all the above embodiments, it has at least the above embodiments. All the technical effects brought by the technical solution are not repeated here.
  • the present application also proposes a display device including a display panel.
  • a display panel For a specific structure of the display panel, refer to the foregoing embodiments. Since the display device adopts all the technical solutions of all the above embodiments, it has at least the above embodiments. All the technical effects brought by the technical solution are not repeated here.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
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Abstract

一种阵列基板,显示面板及显示装置,显示面板包括一种阵列基板,阵列基板包括:显示单元(10);驱动单元(20);扇出区(30),位于显示单元(10)及驱动单元(20)之间,扇出区(30)具有扇出导线组(31),扇出导线组(31)用以连接显示单元(10)与驱动单元(20);虚设线(32),设于扇出导线组(31)的至少一侧,并邻近扇出导线组(31)最外侧的扇出导线设置。

Description

阵列基板、显示面板和显示装置
技术领域
本申请涉及显示器制造领域,特别涉及一种阵列基板、显示面板及显示装置。
背景技术
随着科技的不断进步,用户对液晶显示设备的需求日益增加,薄膜场效应晶体管液晶显示器也成为了手机、平板电脑等产品中使用的主流显示器。在液晶显示面板中,有阵列基板和彩膜基板,在阵列基板上各层图形的形成,每一层阵列图形的制作工艺,都需要经过薄膜沉积、清洗、光刻胶涂布、曝光、显影、刻蚀、光刻胶剥离和检查这8个工艺步骤。在刻蚀过程中,走线密度大的区域蚀刻液浓度会降低,走线密度小的区域蚀刻液浓度会增加,因此,扇出走线的边缘区域蚀刻液浓度较高,会对位于边缘的走线造成腐蚀导致走线断裂,造成画面信号无法从连接单元通过扇出区的走线传递至显示单元,由此,导致液晶面板的画面显示异常。
发明内容
本申请的主要目的是提出一种阵列基板,旨在解决如何避免液晶面板画面显示异常的技术问题。
为实现上述目的,本申请提出的阵列基板,该阵列基板包括:
显示单元;
驱动单元;
扇出区,位于所述显示单元及驱动单元之间,所述扇出区具有扇出导线组,所述扇出导线组用以连接所述显示单元与驱动单元;
虚设线,设于所述扇出导线组的至少一侧,并邻近所述扇出导线组最外侧的扇出导线设置。
可选地,所述虚设线设于所述扇出导线组的两侧,并邻近所述扇出导线组最外侧的扇出导线设置。
可选地,所述虚设线与邻近的所述扇出导线位于所述扇出区的同侧部分相互平行。
可选地,相互邻近的所述虚设线与所述扇出导线组最外侧的扇出导线的间距为3μm-8μm。
可选地,所述虚设线的数量为多个,多个所述虚设线沿远离所述扇出导线组的方向间隔设置。
可选地,所述虚设线的一端与所述显示单元的边缘相接,另一端邻近所述驱动单元。
可选地,所述虚设线邻近所述驱动单元的一端,与所述驱动单元的间距至少为3μm。
可选地,任意两相邻的所述虚设线的间距,与所述虚设线和邻近的扇出导线的间距相等。
本申请还提出一种显示面板,包括一种阵列基板,该阵列基板包括:显示单元;驱动单元;扇出区,位于所述显示单元及驱动单元之间,所述扇出区具有扇出导线组,所述扇出导线组用以连接所述显示单元与驱动单元;虚设线,设于所述扇出导线组的至少一侧,并邻近所述扇出导线组最外侧的扇出导线设置。
本申请还提出一种显示装置,包括一种显示面板,该显示面板包括一种阵列基板,该阵列基板包括:显示单元;驱动单元;扇出区,位于所述显示单元及驱动单元之间,所述扇出区具有扇出导线组,所述扇出导线组用以连接所述显示单元与驱动单元;虚设线,设于所述扇出导线组的至少一侧,并邻近所述扇出导线组最外侧的扇出导线设置。
本申请阵列基板通过在扇出导线组的至少一侧设置虚设线,并使虚设线邻近扇出导线组最外侧的扇出导线,虚设线不起信号传输作用,而是提高了扇出导线组边缘部分的扇出导线所在位置的走线密度,从而降低了该位置在刻蚀过程中蚀刻液的浓度,防止扇出导线组边缘部分的扇出导线在刻蚀过程中因蚀刻液浓度过高而被腐蚀断裂,由此,提高了扇出导线组整体的稳定性,避免显示面板因扇出导线断裂而出现画面异常,提高了显示面板的稳定性。
附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图示出的结构获得其他的附图。
图1为本申请阵列基板一实施例的结构示意图。
附图标号说明:
标号 名称 标号 名称 标号 名称
10 显示单元 20 驱动单元 30 扇出区
31 扇出导线组 32 虚设线
本申请目的的实现、功能特点及优点将结合实施例,参照附图做进一步说明。
具体实施方式
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本申请的一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。
需要说明,若本申请实施例中有涉及方向性指示(诸如上、下、左、右、前、后……),则该方向性指示仅用于解释在某一特定姿态(如附图所示)下各部件之间的相对位置关系、运动情况等,如果该特定姿态发生改变时,则该方向性指示也相应地随之改变。
另外,若本申请实施例中有涉及“第一”、“第二”等的描述,则该“第一”、“第二”等的描述仅用于描述目的,而不能理解为指示或暗示其相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。另外,全文中出现的“和/或”的含义为,包括三个并列的方案,以“A和/或B为例”,包括A方案,或B方案,或A和B同时满足的方案。另外,各个实施例之间的技术方案可以相互结合,但是必须是以本领域普通技术人员能够实现为基础,当技术方案的结合出现相互矛盾或无法实现时应当认为这种技术方案的结合不存在,也不在本申请要求的保护范围之内。
本申请提出一种阵列基板。
在本申请实施例中,如图1所示,该阵列基板包括:
显示单元10;
驱动单元20;
扇出区30,位于所述显示单元10及驱动单元20之间,所述扇出区30具有扇出导线组31,所述扇出导线组31用以连接所述显示单元10与驱动单元20;
虚设线32,设于所述扇出导线组31的至少一侧,并邻近所述扇出导线组31最外侧的扇出导线设置。
在本实施例中,显示单元10设置为显示画面,显示单元10具有设置为与扇出导线电连接的信号线。驱动单元20可为驱动芯片,用以向显示单元10发送显示信号,驱动单元20设于显示单元10的一侧,驱动单元20的数量可为多个,多个驱动单元20环绕显示单元10间隔设置。显示单元10与驱动单元20之间具有扇出区30,扇出区30具有扇出导线组31,扇出导线组31通常包括多条扇出导线,扇出导线的一端与显示单元10的信号线电连接,另一端与驱动单元20电连接,以将驱动单元20的显示信号传输至显示单元10,使显示单元10正常工作。
虚设线32设于扇出导线组31的至少一侧,由于扇出导线组31位于显示单元10及驱动单元20之间,因此虚设线32也位于显示单元10及驱动单元20之间。虚设线32邻近扇出导线组31最外侧的扇出导线设置,虚设线32的数量可为一条,也可为多条,若虚设线32的数量为多条,则多条虚设线32中最靠近扇出导线组31的那条虚设线32邻近扇出导线组31最外侧的扇出导线。虚设线32与扇出区30的位置关系不做限定,只需满足虚设线32邻近最外侧的扇出导线即可。
虚设线32不起信号传输的作用,即虚设线32不与显示单元10的信号线电连接,也不与驱动单元20电连接,只是起到保护最外侧扇出导线的作用。具体地,由于虚设线32邻近最外侧的扇出导线,使得扇出导线组31最外侧的扇出导线不再处于整体走线结构的边缘,即提高了最外侧扇出导线所在位置的走线密度,而将走线密度低的位置移到了虚设线32所在的位置,因此在刻蚀过程中,最外侧扇出导线所在位置的蚀刻液浓度会降低,从而避免最外侧扇出导线过高浓度的蚀刻液腐蚀断裂,无法正常传输信号。而虚设线32所在位置的蚀刻液浓度会较高,由于虚设线32只是起到保护作用,即使虚设线32被腐蚀断裂,也不会影响信号传输,同时虚设线32断裂后,最外侧扇出导线所在位置的走线密度也不会被改变,因此,虚设线32能对最外侧扇出导线形成有效、稳定的保护。
可以理解,由于虚设线32只是起保护作用,因此虚设线32的线宽、材料均可设置为与扇出导线的相同,以方便对阵列基板集中加工生产,提高生产效率。
本申请阵列基板通过在扇出导线组31的至少一侧设置虚设线32,并使虚设线32邻近扇出导线组31最外侧的扇出导线,虚设线32不起信号传输作用,而是提高了扇出导线组31边缘部分的扇出导线所在位置的走线密度,从而降低了该位置在刻蚀过程中蚀刻液的浓度,防止扇出导线组31边缘部分的扇出导线在刻蚀过程中因蚀刻液浓度过高而被腐蚀断裂,由此,提高了扇出导线组31整体的稳定性,避免显示面板因扇出导线断裂而出现画面异常,提高了显示面板的稳定性。
进一步地,如图1所示,所述虚设线32设于所述扇出导线组31的两侧,并邻近所述扇出导线组31最外侧的扇出导线设置。在本实施例中,将虚设线32设于扇出导线组31的两侧,能在刻蚀过程中同时保护扇出导线组31两侧边缘部分的扇出导线,进一步提高扇出导线组31整体的稳定性,从而进一步防止显示面板画面显示异常。
进一步地,如图1所示,所述虚设线32与邻近的所述扇出导线位于所述扇出区30的同侧部分相互平行。在本实施例中,扇出导线一端延伸至驱动单元20与驱动单元20电连接,而不起信号传输作用的虚设线32应避免与驱动单元20接触,因此虚设线32在其延伸方向上应位于扇出区30内。扇出导线在扇出区30内的部分可呈直线延伸,也可呈折线延伸,只需满足虚设线32与邻近的扇出导线在扇出区30的同侧部分相互平行即可。虚设线32与邻近的扇出导线在扇出区30的同侧部分平行,使得虚设线32各部位与最外侧扇出导线各部位的间距相同,由此扇出导线组31边缘部分的扇出导线各部位所在位置的走线密度能趋于相同,从而在刻蚀过程中对应位置的蚀刻液浓度差异不会太大,进一步避免扇出导线组31边缘部分的扇出导线断裂。
进一步地,相互邻近的所述虚设线32与所述扇出导线组31最外侧的扇出导线的间距为3μm-8μm。在本实施例中,需要说明的是,虚设线32可以是多条,也可以是一条,此处的间距,指的是最邻近扇出导线组的那条虚设线32,与最邻近虚设线31的那条扇出导线之间的间距。
虚设线32与最外侧扇出导线的间距,可设置为与相邻两相互平行的扇出导线的间距相等,以使扇出导线组31边缘部分的扇出导线所在位置的走线密度,与扇出导线组31整体的走线密度趋于相同。在实际应用中,两相邻且相互平行的扇出导线的间距为3μm-8μm,因此将虚设线32与邻近的扇出导线的间距设为3μm-8μm,能合理控制扇出导线组31边缘部分的扇出导线所在位置的走线密度,从而进一步提高扇出导线组31整体的稳定性。
进一步地,如图1所示,所述虚设线32的数量为多个,多个所述虚设线32沿远离所述扇出导线组31的方向间隔设置。在本实施例中,虚设线32的数量不做具体限制,只需满足多个虚设线32不会对阵列基板上的其它功能单元或走线结构造成干涉即可。任意两相邻的虚设线32可设置为相互平行。将虚设线32的数量设置为多个,可进一步提高扇出导线组31边缘部分的扇出导线所在位置的走线密度,从而进一步降低刻蚀过程中扇出导线组31边缘部分扇出导线所在位置的蚀刻液浓度,以对扇出导线组31边缘部分的扇出导线形成更加有效、稳定的保护。
进一步地,如图1所示,所述虚设线32的一端与所述显示单元10的边缘相接,另一端邻近所述驱动单元20。在本实施例中,虚设线32的结构可设置为与扇出导线一样,以方便加工。但虚设线32不起导线作用,即虚设线32的端部可与显示单元10接触,但虚设线32不与显示单元10的信号线电连接。虚设线32的一端与显示单元10的边缘相接,是为了使虚设线32端部的位置,与扇出导线的连接显示单元的端部位置相对应。若虚设线32的端部离显示单元过远,则扇出导线组31边缘部分的扇出导线端部所在位置的走线密度改变较小,会造成该位置的蚀刻液浓度依旧过高,使该位置的扇出导线在端部断裂。
由此,本实施例能提高扇出导线组31边缘部分的扇出导线端部所在位置的走线密度,从而降低刻蚀过程中扇出导线组31边缘部分的扇出导线端部所在位置的蚀刻液浓度,以对扇出导线组31边缘部分的扇出导线形成更加有效、稳定的保护。
驱动单元20一般为驱动芯片与电路板的组合,为避免与扇出导线结构相同的虚设线32与驱动单元20误触造成意外,虚设线32的另一端应与驱动单元20保持一定间隔,以提高阵列基板整体的稳定性。
进一步地,所述虚设线32邻近所述驱动单元20的一端,与所述驱动单元20的间距至少为3μm。在本实施例中,将虚设线32邻近驱动单元20的一端,与驱动单元20的间距设为至少3μm,能在提高扇出导线组31边缘部分的扇出导线所在位置的走线密度,降低刻蚀过程中扇出导线组31边缘部分的扇出导线所在位置的蚀刻液浓度的基础上,有效防止虚设线32误触驱动单元20,以提高阵列基板整体的稳定性。
进一步地,任意两相邻的所述虚设线32的间距,与所述虚设线32和邻近的扇出导线的间距相等。在本实施例中,任意两相邻的虚设线32之间的间距,等于,虚设线32和邻近的扇出导线之间的间距,能使得虚设线32和扇出导线组31形成的整体走线结构的走线密度更加均衡,从而在刻蚀过程中该整体走线位置的蚀刻液浓度更加均匀,进一步减轻蚀刻液对扇出导线的影响,从而提高扇出导线组31整体的稳定性,以提高阵列基板整体的稳定性。
本申请还提出一种显示面板,该显示面板包括一种阵列基板,该阵列基板的具体结构参照上述实施例,由于本显示面板采用了上述所有实施例的全部技术方案,因此至少具有上述实施例的技术方案所带来的所有技术效果,在此不再一一赘述。
本申请还提出一种显示装置,该显示装置包括一种显示面板,该显示面板的具体结构参照上述实施例,由于本显示装置采用了上述所有实施例的全部技术方案,因此至少具有上述实施例的技术方案所带来的所有技术效果,在此不再一一赘述。
以上所述仅为本申请的实施例,并非因此限制本申请的专利范围,凡是在本申请的发明构思下,利用本申请说明书及附图内容所作的等效结构变换,或直接/间接运用在其他相关的技术领域均包括在本申请的专利保护范围内。

Claims (20)

  1. 一种阵列基板,其中,所述阵列基板包括:
    显示单元;
    驱动单元;
    扇出区,位于所述显示单元及驱动单元之间,所述扇出区具有扇出导线组,所述扇出导线组用以连接所述显示单元与驱动单元;以及
    虚设线,设于所述扇出导线组的至少一侧,并邻近所述扇出导线组最外侧的扇出导线设置。
  2. 如权利要求1所述的阵列基板,其中,所述虚设线设于所述扇出导线组的两侧,并邻近所述扇出导线组最外侧的扇出导线设置。
  3. 如权利要求1所述的阵列基板,其中,所述虚设线与邻近的所述扇出导线位于所述扇出区的同侧部分相互平行。
  4. 如权利要求3所述的阵列基板,其中,相互邻近的所述虚设线与所述扇出导线组最外侧的扇出导线的间距为3μm-8μm。
  5. 如权利要求1所述的阵列基板,其中,所述虚设线的数量为多个,多个所述虚设线沿远离所述扇出导线组的方向间隔设置。
  6. 如权利要求1所述的阵列基板,其中,所述虚设线的一端与所述显示单元的边缘相接,另一端邻近所述驱动单元。
  7. 如权利要求6所述的阵列基板,其中,所述虚设线邻近所述驱动单元的一端,与所述驱动单元的间距至少为3μm。
  8. 如权利要求5所述的阵列基板,其中,任意两相邻的所述虚设线的间距,与所述虚设线和邻近的扇出导线的间距相等。
  9. 如权利要求1所述的阵列基板,其中,所述驱动单元设于所述显示单元的一侧,所述驱动单元的数量为多个。
  10. 如权利要求9所述的阵列基板,其中,多个所述驱动单元环绕所述显示单元间隔设置。
  11. 如权利要求1所述的阵列基板,其中,所述虚设线的制造材料与所述扇出导线的制造材料相同。
  12. 如权利要求1所述的阵列基板,其中,所述虚设线的宽度与所述扇出导线的宽度相同。
  13. 如权利要求3所述的阵列基板,其中,所述虚设线与最外侧所述扇出导线的间距,与相邻两相互平行的扇出导线的间距相等。
  14. 如权利要求5所述的阵列基板,其中,任意两相邻的所述虚设线相互平行。
  15. 如权利要求1所述的阵列基板,其中,所述驱动单元体包括电路板及与所述电路板电连接的驱动芯片。
  16. 如权利要求2所述的阵列基板,其中,所述虚设线的数量为多个,多个所述虚设线沿远离所述扇出导线组的方向间隔设置。
  17. 如权利要求3所述的阵列基板,其中,所述虚设线的数量为多个,多个所述虚设线沿远离所述扇出导线组的方向间隔设置。
  18. 如权利要求2所述的阵列基板,其中,所述虚设线的一端与所述显示单元的边缘相接,另一端邻近所述驱动单元。
  19. 一种显示面板,其中,包括一种阵列基板,该阵列基板包括:显示单元;驱动单元;扇出区,位于所述显示单元及驱动单元之间,所述扇出区具有扇出导线组,所述扇出导线组用以连接所述显示单元与驱动单元;以及虚设线,设于所述扇出导线组的至少一侧,并邻近所述扇出导线组最外侧的扇出导线设置。
  20. 一种显示装置,其中,包括一种显示面板,该显示面板包括一种阵列基板,该阵列基板包括:显示单元;驱动单元;扇出区,位于所述显示单元及驱动单元之间,所述扇出区具有扇出导线组,所述扇出导线组用以连接所述显示单元与驱动单元;以及虚设线,设于所述扇出导线组的至少一侧,并邻近所述扇出导线组最外侧的扇出导线设置。
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