WO2013181860A1 - 显示面板、平板显示装置及其驱动方法 - Google Patents

显示面板、平板显示装置及其驱动方法 Download PDF

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Publication number
WO2013181860A1
WO2013181860A1 PCT/CN2012/076820 CN2012076820W WO2013181860A1 WO 2013181860 A1 WO2013181860 A1 WO 2013181860A1 CN 2012076820 W CN2012076820 W CN 2012076820W WO 2013181860 A1 WO2013181860 A1 WO 2013181860A1
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WIPO (PCT)
Prior art keywords
scan
driving chip
resistor
scan driving
transmission circuit
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PCT/CN2012/076820
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English (en)
French (fr)
Inventor
郑华
陈政鸿
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深圳市华星光电技术有限公司
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Priority to US13/578,622 priority Critical patent/US8896640B2/en
Publication of WO2013181860A1 publication Critical patent/WO2013181860A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0223—Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen

Definitions

  • the present invention relates to the field of flat panel display, and in particular to a display panel, a flat panel display device, and a driving method thereof.
  • the flat panel display has the characteristics of flatness, lightness, thinness, power saving, etc., and gradually replaces the conventional video image display to become a mainstream display device.
  • users are increasingly demanding flat panel displays to achieve a better visual experience.
  • the parameters affecting the display performance of the flat panel display mainly include contrast, brightness, viewing angle, reaction time, etc., especially the brightness of the display panel, which is an important indicator for measuring the quality of the flat panel display device.
  • the brightness of the display panel depends on the backlight source, and the wiring of the driver chip of the display panel is also an important factor affecting the brightness.
  • the flat panel display device includes a display panel 11, a printed circuit board 12, and a source driver chip (Source). IC) 13 and first and second gate driving chips (Gate IC) 14 and 15.
  • the printed circuit board 12 and the source driving chip 13 are disposed on the side of a data line (not shown) of the vertical display panel, and the source driving chip 13 is electrically connected to the printed circuit board 12.
  • the first and second gate driving chips 14 and 15 are disposed on one side of a gate line (not shown) of the vertical display panel.
  • the first gate driving chip 14 is closer to the outermost source driving chip 13, and the second gate driving chip 15 is farther from the outermost source driving chip 13.
  • the third and fourth gate driving chips 16 and 17 and the first and second gate driving chips 14 and 15 are bilaterally symmetrically distributed on the display panel 11 or may be distributed on the same side of the display panel 11.
  • the existing wiring method is: the printed circuit board 12 is first and second.
  • the gate driving chip supplies a gate driving signal VGH, and VGH is input to the first gate driving chip 14 via the metal wire 1.
  • the first gate driving chip 14 outputs VGH, and VGH is input to the second gate driving chip 15 via the metal wire 2.
  • the gate driving signal VGH is transmitted to the second gate driving chip 15 more than a metal wire 2 is transmitted to the first gate driving chip 14, and the metal wire 2 brings additional Resistance and parasitic capacitance. Therefore, the amplitude and waveform of the VGH signals input to the second gate driving chip 15 and the first gate driving chip 14 respectively are different, as shown in FIG. 3, wherein the pattern 21 indicates that the VGH signal is input to the first gate driving.
  • the amplitude and waveform of the chip 14 and the graph 22 represent the amplitude and waveform of the VGH signal input to the second gate driver chip 15. Since the input signals of the first and second gate driving chips 14 and 15 are different, the amplitude and waveform of the corresponding output also differ, as shown in FIG.
  • the graphic 23 represents the output of the first gate driving chip 14.
  • the amplitude and waveform diagram, the graph 24 represents the output amplitude and waveform of the second gate drive chip 15.
  • the first gate driving chip 14 and the second gate driving chip 15 have different amplitudes and waveforms on the input and output, so that the brightness of the display panel 11 in the display area controlled by the second gate driving chip 15 is different from the first
  • the brightness of the display area controlled by a gate driving chip 14 is generally that the brightness of the former is smaller than the brightness of the latter, and generally the gate lines of most display panels are horizontally designed, so that the brightness of the display panel 11 is longitudinally distributed. The uneven distribution of brightness affects the display effect of the display panel.
  • the technical problem to be solved by the present invention is to provide a display panel, a flat panel display device and a driving method thereof, which can make the brightness distribution of the display panel more uniform and improve the display effect.
  • the display panel includes a data driving chip and at least two scanning driving chips; the data driving chip and the scanning driving chip are disposed on a side area of the display panel; and the data driving chip includes a scan signal input end, a data signal input end, a first scan signal output end and a data signal output end; the scan drive chip includes a second scan signal input end and a second scan signal output end; and a second scan signal of each scan drive chip
  • the input ends are connected to the first scan signal output end of the data driving chip through a corresponding transmission circuit, and the resistors of the at least one scan driving chip are connected in series such that the total impedance of the transmission circuits corresponding to the at least two scan driving chips is equal Or the difference is less than a predetermined value; the total impedance of all of the transmission circuits is equal or less than a predetermined value; at least one of said transmission circuits passes through one of said scan drive chips.
  • the transmission circuit of the at least one scan driving chip comprises a wire, a resistor and a capacitor, the resistor and the wire are connected in series to form a resistor series branch, the capacitor is connected in parallel with the resistor series branch; one end of the resistor series branch is connected to the first scan signal of the data driving chip The output end is connected to the second scan signal input end of the scan driving chip; one end of the capacitor is connected to the first scan signal output end of the data driving chip, and the other end is grounded.
  • the number of resistors and capacitors is one, and the total impedance of the transmission circuit includes resistance impedance and capacitance tolerance, and the resistance and the capacitance are adjusted such that the total impedance of all transmission circuits is equal or the difference is less than a predetermined value.
  • the at least one scan driving chip includes a third input end and a third output end, and at least one transmission circuit enters the scan driving chip through the third input end, and passes through the scan driving chip through the third output end.
  • a flat panel display device including a display panel; the display panel includes a data driving chip and at least two scan driving chips; and the data driving chip and the scan driving chip are disposed on a side area of the display panel; the data driving chip includes a first scan signal input end, a data signal input end, a first scan signal output end, and a data signal output end; the scan drive chip includes a second scan signal input end and a second scan signal An output end; the second scan signal input end of each scan driving chip is connected to the first scan signal output end of the data driving chip through a corresponding transmission circuit, and at least one scan driving chip has a resistor connected in series in the transmission circuit, so that at least The total impedance of the transmission circuits of the two scan driving chips is equal or the difference is less than a predetermined value.
  • the total impedance of all transmission circuits is equal or the difference is less than a predetermined value.
  • the transmission circuit of the at least one scan driving chip comprises a wire, a resistor and a capacitor, the resistor and the wire are connected in series to form a resistor series branch, the capacitor is connected in parallel with the resistor series branch; one end of the resistor series branch is connected to the first scan signal of the data driving chip The output end is connected to the second scan signal input end of the scan driving chip; one end of the capacitor is connected to the first scan signal output end of the data driving chip, and the other end is grounded.
  • the number of resistors and capacitors is one, and the total impedance of the transmission circuit includes resistance impedance and capacitance tolerance, and the resistance and the capacitance are adjusted such that the total impedance of all transmission circuits is equal or the difference is less than a predetermined value.
  • At least one transmission circuit passes through a scan driving chip.
  • the at least one scan driving chip includes a third input end and a third output end, and at least one transmission circuit enters the scan driving chip through the third input end, and passes through the scan driving chip through the third output end.
  • another technical solution adopted by the present invention is to provide a driving method of a flat panel display device, which comprises providing scanning to at least two scan driving chips by corresponding transmission circuits whose total impedance is equal or the difference is less than a predetermined value.
  • the step of providing the scan driving signals to the at least two scan driving chips by the corresponding transmission circuits whose total impedance is equal or the difference is less than the predetermined value is specifically: the corresponding transmission circuit with the total impedance equal or the difference is less than the predetermined value, and via one
  • the data driving chip supplies a scan driving signal to at least two scan driving chips.
  • the transmission circuit of the at least one scan driving chip comprises a wire, a resistor and a capacitor, and the resistor and the wire are connected in series to form a resistor series branch, and the capacitor is connected in parallel with the resistor series branch.
  • the number of resistors and capacitors is one, and the total impedance of the transmission circuit includes resistance impedance and capacitance tolerance, and the resistance and the capacitance are adjusted such that the total impedance of all transmission circuits is equal or the difference is less than a predetermined value.
  • the invention has the beneficial effects that the scanning signal input end of the at least two scan driving chips is connected to the scanning signal output end of the data driving chip through the corresponding transmission circuit, and the resistance circuit of the at least one scanning driving chip has a series connection.
  • the phenomenon of longitudinal distribution makes the brightness more evenly distributed and improves the display effect of the display panel.
  • FIG. 1 is a schematic diagram of wiring of a driving chip of a display panel in the prior art
  • Figure 2 is an enlarged schematic view of a broken line portion of Figure 1;
  • FIG. 3 is an input amplitude and waveform diagram of the first gate driving chip and the second gate driving chip in the wiring mode shown in FIG. 2 in the prior art;
  • FIG. 4 is an output amplitude and waveform diagram of the first gate driving chip and the second gate driving chip in the wiring mode shown in FIG. 2 in the prior art;
  • FIG. 5 is a schematic structural view of an embodiment of a display panel of the present invention.
  • FIG. 6 is a schematic structural view of another embodiment of a display panel of the present invention.
  • Fig. 7 is a flow chart showing an embodiment of a driving method of the flat panel display device of the present invention.
  • the display panel embodiment of the invention can reduce or even eliminate the phenomenon that the brightness is distributed longitudinally, make the brightness distribution more uniform, and improve the display effect of the display panel.
  • an embodiment of the display panel of the present invention includes a data driving chip 101, first and second scanning driving chips 102, 103, and a printed circuit board 105.
  • the data driving chip 101, the first scan driving chip 102, and the second scan driving chip 103 are disposed in the side region 104 of the display panel.
  • the data line (not shown) of the display panel of the present embodiment is designed in the vertical direction (vertical direction), and the scanning line (not shown) is designed in the horizontal direction (horizontal direction). Therefore, the data driving chip 101 is disposed on one side of the vertical data line direction.
  • the first and second scan driving chips 102 and 103 are disposed on one side of the vertical scanning line direction.
  • the data driving chip 101 includes a first scan signal input terminal 1011, a data signal input terminal 1012, a first scan signal output terminal 1013, and a data signal output terminal 1014.
  • the scan driving chip takes the first scan driving chip 102 as an example, and includes a second scan signal input end 1021 and a second scan signal output end 1022. Since the printed circuit board 105 that supplies the data driving signal and the scan driving signal to the data driving chip 101 and the first and second scanning driving chips 102 and 103 is connected to the data driving chip 101, a scan driving is required on the data driving chip 101.
  • the input and output of the signal that is, the first scan signal input terminal 1011 and the first scan signal output terminal 1013, enable the scan drive signal to be transmitted to the first and second scan drive chips 102 and 103 through the data drive chip 101.
  • the second scan signal input end 1021 of the first scan driving chip 102 is connected to the first scan signal output end 1013 of the data drive chip 101 through the first transfer circuit 201; the second scan signal input of the second scan drive chip 103.
  • the terminal 1031 is connected to the first scan signal output terminal 1013 of the data driving chip 101 through the second transmission circuit 202.
  • the scan driving signal is input through the first scan signal input terminal 1011 of the data driving chip 101, passes through the data driving chip 101 and is from the first The scan signal output terminal 1013 outputs and then transmits to the first and second scan driver chips 102 and 103, respectively, through the first transfer circuit 201 and the second transfer circuit 202, respectively.
  • the data driving signal is directly input from the data signal input terminal 1012 to the data driving chip 101, and then outputted from the data signal output terminal 1014.
  • the scan signal input ends of the first scan driving chip 102 and the second scan driving chip 103 are connected to the scan signal output terminals of the data driving chip 101 through the first transfer circuit 201 and the second transfer circuit 202, respectively.
  • the first resistor 2012 is connected in series with the first resistor 2012 such that the total impedance of the first transmission circuit 201 and the second transmission circuit 202 is equal or smaller than a predetermined value.
  • the transmission circuit of the first scan driving chip 102 includes a first wire 2011, a first resistor 2012, and a first capacitor 2013.
  • the first resistor 2012 is connected in series with the first wire 2011 to form a resistor series branch, wherein one end of the resistor series branch is connected to the first scan signal output end 1013 of the data driving chip 101, and the other end is connected to the second scan of the first scan driving chip 102.
  • the first capacitor 2013 is connected in parallel with the resistor series branch, wherein one end of the first capacitor 2013 is connected to the first scan signal output terminal 1013 of the data driving chip 101, and the other end is grounded.
  • the second transmission circuit 202 of the second scan driving chip 103 is a wire, wherein one end of the wire is connected to the first scan signal output end 1013 of the data driving chip 101, and the other end is connected to the second scan signal input end of the second scan driving chip 103. 1031 connection.
  • the second transmission circuit 202 passes through the first scan driving chip 102.
  • the first scan driving chip 102 further includes a third input terminal 1023 and a third output terminal 1024.
  • the second transmission circuit 202 enters the first scan driving chip 102 through the third input terminal 1023, and then passes through the first scan driving chip 102 through the third output terminal 1024.
  • the length and the resistivity of the wires of the first wire 2011 and the second transmission circuit 202 in the first transmission circuit 201 are at least one different. Therefore, the first wire 2011 on the first transmission circuit 201 increases the first resistance 2012 in series, and the first capacitor 2013 is connected in parallel, by adjusting the size of the first resistor 2012 and the first capacitor 2013 such that the first transmission circuit 201 and The total impedance of the second transmission circuit 202 is equal.
  • the number of the first resistor 2012 and the first capacitor 2013 is one, and the total impedance includes the resistance impedance of the transmission circuit and the capacitive reactance.
  • the total impedance of the first transmission circuit 201 and the second transmission circuit 202 may be allowed to have a difference, and the total impedance difference between the two. Need to be less than the predetermined value.
  • the setting of the predetermined value is determined according to the actual situation. For example, in order to achieve a more uniform display effect, the setting is as small as possible, limited to the technical level and the technical level.
  • the first transmission circuit 201 may not be provided with the first capacitor 2013 in parallel, and only the first resistor 2012 is connected in series. Moreover, the number of first resistors 2012 connected in series may be one or more. The total impedance of the first transmission circuit 201 and the second transmission circuit 202 is equal or less than a predetermined value by adjusting the size of the first resistor 2012.
  • the scan driving signals are respectively transmitted to the first scan driving chip 102 and the second scan driving chip 103 via the first transmission circuit 201 and the second transmission circuit 202, so that the first transmission circuit 201 has the first connection in series.
  • the predetermined value further causes the signal input amplitudes and waveforms of the first scan driving chip 102 and the second scan driving chip 103 to be as identical as possible, thereby reducing or even eliminating the vertical distribution of the brightness of the display panel, and improving the brightness of the display panel. Uniformity to improve display.
  • the second transmission circuit 203 of the second scan driving chip 103' may also have a similar structure as the first transmission circuit 201 shown in FIG. 5, that is, the second transmission circuit 203 includes the second wire 2031.
  • the second resistor 2032 and the second capacitor 2033 are connected in series to form a first resistor series branch, the first capacitor 2013' is connected in parallel with the first resistor series branch; the second resistor of the second transmission circuit 203 2032 is connected in series with the second wire 2031 to form a second resistor series branch, and the second capacitor 2033 is connected in parallel with the second resistor series branch.
  • the data driving chip 101' may also be provided with two scanning signal output terminals, which are a first scanning signal output terminal 1013' and a third scanning signal output terminal 1015, respectively.
  • the first resistor series branch of the first transmission circuit 201' is connected to the first scan signal output terminal 1013'
  • the second resistor series branch of the second transmission circuit 203 is connected to the third scan signal output terminal 1015 to enable scan driving.
  • the signals are outputted through the first and third scan signal output terminals 1013' and 1015, respectively, and then transmitted to the first scan drive chip 102' and the second scan drive chip 103' by the first transfer circuit 201' and the second transfer circuit 203, respectively.
  • the total impedances of the first transmission circuit 201' and the second transmission circuit 203 are equal or different from each other by a predetermined value.
  • the second transmission circuit 203 may also only provide the second resistor 2032 without including the second capacitor 2033, or only the second capacitor 2033 and not the second resistor 2032; similarly, the first transmission circuit 201, 201'
  • the above design may be adopted, and even other electronic components having resistance or capacitance properties may be used in the first transmission circuit 201, 201' and the second transmission circuit 202 or 203 instead of the resistors and capacitors in the above embodiments, as long as the adjustment is made.
  • An electronic component having a resistance or a capacitance property in a transmission circuit 201, 201' or a second transmission circuit 202, 203 is such that the total impedance between all transmission circuits is equal or less than a predetermined value.
  • the number of scan driving chips may also be three or more, and the transmission circuits are correspondingly three or more, and at least one transmission circuit has resistors connected in series such that the total impedance of all the transmission circuits is equal. Or the difference is less than the predetermined value.
  • the transmission circuit of the series resistor is equal to or equal to the total impedance of the other two transmission circuits less than a predetermined value.
  • the two or three transmission circuits may be connected in series such that the total impedance of all the transmission circuits is equal or the difference is less than a predetermined value.
  • the specific circuit connection relationship is not described herein. Reference may be made to the above embodiment. It should be noted that the number of data driving chips in this embodiment may also be multiple, which is not specifically limited herein. When the number of data driving chips is multiple, the scanning driving signal is driven by the data closest to the scanning driving chip. Chip transfer. In addition, the common portion of the wires may not pass through the scan driving chip, and even the scan driving signal may be directly input from the printed circuit board into the scan driving chip without passing through the data driving chip.
  • An embodiment of the flat panel display device of the present invention includes the display panel as described in the above embodiments, and the flat panel display device of the present embodiment may be a display type flat panel display device such as a liquid crystal display, a plasma display or an organic light emitting diode display.
  • an embodiment of a driving method of a flat panel display device includes the following steps:
  • Step S101 providing a scan driving signal to the at least two scan driving chips by a corresponding transmission circuit whose total impedance is equal or the difference is less than a predetermined value, to drive the pixel switch to be turned on, wherein the transmission circuit of the at least one scan driving chip has a resistor connected in series.
  • the printed circuit board is connected to the display panel through the data driving chip, and the printed circuit board passes the corresponding transmission circuit with the total impedance equal or the difference is less than the predetermined value, and provides the scan driving to the at least two scan driving chips via one data driving chip. signal.
  • the transmission circuit of the at least one scan driving chip comprises a wire, a resistor and a capacitor, and the number of the resistor and the capacitor is one.
  • the resistor and the wire are connected in series to form a resistor series branch, and the capacitor is connected in parallel with the resistor series branch.
  • the magnitude of the resistance and capacitance is adjusted such that the total impedance of all of the transmission circuits is equal or less than a predetermined value.
  • the total impedance of the transmission circuit includes the resistance impedance and the capacitive reactance.
  • the number of scan driving chips is at least two, and the transmission circuits are corresponding to at least two, so that the scan driving signals are respectively transmitted to the at least two scan driving chips through the at least two transmission circuits.
  • at least one of the transmission circuits has a resistor connected in series.
  • the display panel embodiment of FIG. 5 is taken as an example, and taking two scan driving chips as an example, the scan driving signal is transmitted to the first scan driving chip 102 through the first transmitting circuit 201; and the scan driving signal passes through the second transmitting circuit 202. It is transmitted to the second scan driving chip 103, whereby the pixel switch can be driven to be turned on.
  • the first transmission circuit 201 includes a first wire 2011, a first resistor 2012, and a first capacitor 2013.
  • the second transmission circuit 202 is a wire.
  • the first wire 2011 of the first transmission circuit 201 and the first resistor 2012 are connected in series to form a resistor series branch, one end of the resistor series branch is connected to the first scan signal output end 1013 of the data driving chip 101, and the other end is connected to the first scan driver.
  • the first capacitor 2013 is connected in parallel with the resistor series branch, wherein one end of the first capacitor 2013 is connected to the first scan signal output terminal 1013 of the data driving chip 101, and the other end is grounded.
  • the second transmission circuit 202 of the second scan driving chip 103 is a wire, wherein one end of the wire is connected to the first scan signal output end 1013 of the data driving chip 101, and the other end is connected to the second scan signal input end of the second scan driving chip 103. 1031 connection.
  • the magnitudes of the first resistor 2012 and the first capacitor 2013 are adjusted such that the total impedance of the first transmission circuit 201 and the second transmission circuit 202 are equal, or the total impedance difference between the two is less than a predetermined value.
  • Step S102 After the pixel switch is turned on, the data driving chip is provided with a data driving signal, so that the data driving signal enters the corresponding pixel operating element through the opened pixel switch.
  • step S101 the scan driving signal is input to the scan driving chip to drive the opening of the pixel switch.
  • the data driving signal provided by the data driving chip enters the corresponding pixel operating element through the opened pixel switch, for example, entering the liquid crystal display device.
  • a pixel electrode is used to drive the display of the flat panel display device.
  • the driving signals are supplied to the at least two scan driving chips by corresponding transmission circuits whose total impedance is equal or the difference is less than a predetermined value, wherein at least one of the at least one transmission circuit has a resistor connected in series, so that at least two The signal input amplitude and waveform of the scan driver chip are the same, which can improve the uniformity of the brightness of the flat panel display device and improve the display effect.

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  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

一种显示面板，包括数据驱动芯片（101）和至少两个扫描驱动芯片（102、103）；使各扫描驱动芯片（102、103）的第二扫描信号输入端（1021，1031）均通过相应的传输电路（201，202）与数据驱动芯片（101）的第一扫描信号输出端（1013）连接，其中至少一条传输电路（201，202）中串联有电阻（2012），使至少对应两个所述扫描驱动芯片（102，103）的传输电路（201，202）的总阻抗相等或差值小于预定值。还提供一种平板显示装置及其驱动方法。通过上述方式，能够使显示面板亮度更均匀分布，提高显示效果。

Description

显示面板、平板显示装置及其驱动方法
【技术领域】
本发明涉及平板显示领域，特别是涉及一种显示面板、平板显示装置及其驱动方法。
【背景技术】
平板显示器具有平面化、轻、薄、省电等特点，使其逐渐代替传统的视频图像显示器而成为主流的显示装置。随着显示技术的不断发展，用户对平板显示器的要求也越来越高，以能获得更好的视觉体验效果。
影响平板显示器显示效果的参数主要有对比度、亮度、可视角度、反应时间等，尤其是显示面板的亮度，更是做为衡量平板显示装置好坏的一个重要指标。而显示面板的亮度除了取决于背光光源，显示面板的驱动芯片的布线也是影响亮度的重要因素。
参阅图1和图2，平板显示装置包括显示面板11、印刷电路板12、源极驱动芯片（Source IC）13以及第一、第二栅极驱动芯片（Gate IC）14和15。印刷电路板12和源极驱动芯片13设置在垂直显示面板的数据线（图未示）一侧，源极驱动芯片13与印刷电路板12电连接。第一、第二栅极驱动芯片14和15设置在垂直显示面板的栅极线（图未示）的一侧。第一栅极驱动芯片14距离最外侧的源极驱动芯片13较近，第二栅极驱动芯片15距离最外侧的源极驱动芯片13较远。第三、第四栅极驱动芯片16和17与第一、第二栅极驱动芯片14和15在显示面板11双边对称分布，也可以分布在显示面板11同一侧。
继续参阅图1和图2，对于上述的驱动芯片的布局，以第一、第二栅极驱动芯片14和15的布线为例，现有布线方法为：印刷电路板12向第一、第二栅极驱动芯片提供栅极驱动信号VGH，VGH经过金属导线1输入到第一栅极驱动芯片14。第一栅极驱动芯片14输出VGH，VGH经过金属导线2输入到第二栅极驱动芯片15。
现有的驱动芯片的布线中，栅极驱动信号VGH传输到第二栅极驱动芯片15比传输到第一栅极驱动芯片14要多经过一段金属导线2，而金属导线2会带来额外的电阻和寄生电容。因此，VGH信号分别输入到第二栅极驱动芯片15和第一栅极驱动芯片14的幅值和波形均有差别，如图3所示，其中图形21表示VGH信号输入到第一栅极驱动芯片14的幅值和波形图，图形22表示VGH信号输入到第二栅极驱动芯片15的幅值和波形图。由于第一、第二栅极驱动芯片14和15的输入信号有差别，对应地输出的幅值和波形也存在差异，如图4所示，其中图形23表示第一栅极驱动芯片14的输出幅值和波形图，图形24表示第二栅极驱动芯片15的输出幅值和波形图。第一栅极驱动芯片14和第二栅极驱动芯片15在输入和输出的幅值、波形上均存在差异，使得显示面板11在第二栅极驱动芯片15控制的显示区域的亮度不同于第一栅极驱动芯片14控制的显示区域的亮度，通常是前者的亮度小于后者亮度，而一般大部分显示面板的栅极线都是横向设计，因此会造成显示面板11的亮度呈纵向分布，亮度的不均匀分布影响了显示面板的显示效果。
【发明内容】
本发明主要解决的技术问题是提供一种显示面板、平板显示装置及其驱动方法，能够使显示面板的亮度分布更均匀，提高显示效果。
为解决上述技术问题，本发明采用的一个技术方案是：显示面板包括数据驱动芯片以及至少两个扫描驱动芯片；数据驱动芯片和扫描驱动芯片设置于显示面板的侧边区域；数据驱动芯片包括第一扫描信号输入端、数据信号输入端、第一扫描信号输出端以及数据信号输出端；扫描驱动芯片包括第二扫描信号输入端以及第二扫描信号输出端；各个扫描驱动芯片的第二扫描信号输入端均通过相应的传输电路与数据驱动芯片的第一扫描信号输出端连接，至少一个扫描驱动芯片的传输电路中串联有电阻，以使得对应至少两个扫描驱动芯片的传输电路的总阻抗相等或差值小于预定值；所有传输电路的总阻抗相等或差值小于预定值；至少一条所述传输电路经过一个所述扫描驱动芯片。
其中，至少一个扫描驱动芯片的传输电路包括导线、电阻以及电容，电阻与导线串联形成电阻串联支路，电容与电阻串联支路并联；电阻串联支路的一端连接数据驱动芯片的第一扫描信号输出端，另一端连接扫描驱动芯片的第二扫描信号输入端；电容的一端连接数据驱动芯片的第一扫描信号输出端，另一端接地。
其中，电阻和电容的数量均为一个，传输电路的总阻抗包括电阻阻抗和电容容抗，调整电阻和电容的大小以使得所有传输电路的总阻抗相等或差值小于预定值。
其中，至少一个扫描驱动芯片包括第三输入端和第三输出端，至少一条传输电路通过第三输入端进入扫描驱动芯片，通过第三输出端穿出扫描驱动芯片。
为解决上述技术问题，本发明采用的另一个技术方案是：提供一种平板显示装置，包括显示面板；显示面板包括数据驱动芯片以及至少两个扫描驱动芯片；数据驱动芯片和扫描驱动芯片设置于显示面板的侧边区域；数据驱动芯片包括第一扫描信号输入端、数据信号输入端、第一扫描信号输出端以及数据信号输出端；扫描驱动芯片包括第二扫描信号输入端以及第二扫描信号输出端；各个扫描驱动芯片的第二扫描信号输入端均通过相应的传输电路与数据驱动芯片的第一扫描信号输出端连接，至少一个扫描驱动芯片的传输电路中串联有电阻，以使得对应至少两个扫描驱动芯片的传输电路的总阻抗相等或差值小于预定值。
其中，所有传输电路的总阻抗相等或差值小于预定值。
其中，至少一个扫描驱动芯片的传输电路包括导线、电阻以及电容，电阻与导线串联形成电阻串联支路，电容与电阻串联支路并联；电阻串联支路的一端连接数据驱动芯片的第一扫描信号输出端，另一端连接扫描驱动芯片的第二扫描信号输入端；电容的一端连接数据驱动芯片的第一扫描信号输出端，另一端接地。
其中，电阻和电容的数量均为一个，传输电路的总阻抗包括电阻阻抗和电容容抗，调整电阻和电容的大小以使得所有传输电路的总阻抗相等或差值小于预定值。
其中，至少一条传输电路经过一个扫描驱动芯片。
其中，至少一个扫描驱动芯片包括第三输入端和第三输出端，至少一条传输电路通过第三输入端进入扫描驱动芯片，通过第三输出端穿出扫描驱动芯片。
为解决上述技术问题，本发明采用的又一个技术方案是：提供一种平板显示装置的驱动方法，包括通过总阻抗相等或差值小于预定值的相应传输电路向至少两个扫描驱动芯片提供扫描驱动信号，以驱动像素开关打开，其中至少一个扫描驱动芯片的传输电路中串联有电阻；在像素开关打开后向数据驱动芯片提供数据驱动信号，以使数据驱动信号通过打开的像素开关进入相应的像素操作元件。
其中，通过总阻抗相等或差值小于预定值的相应传输电路向至少两个扫描驱动芯片提供扫描驱动信号的步骤具体为：通过总阻抗相等或差值小于预定值的相应传输电路、并经由一个数据驱动芯片向至少两个扫描驱动芯片提供扫描驱动信号。
其中，至少一个扫描驱动芯片的传输电路包括导线、电阻以及电容，电阻与导线串联形成电阻串联支路，电容与电阻串联支路并联。
其中，电阻和电容的数量均为一个，传输电路的总阻抗包括电阻阻抗和电容容抗，调整电阻和电容的大小以使得所有传输电路的总阻抗相等或差值小于预定值。
本发明的有益效果是：本发明通过相应的传输电路将至少两个扫描驱动芯片的扫描信号输入端与数据驱动芯片的扫描信号输出端连接，至少一个扫描驱动芯片的传输电路中串联有电阻，使至少对应两个扫描驱动芯片的传输电路的总阻抗相等或差值小于预定值，使得至少两个扫描驱动芯片的信号输入幅值和波形一致，由此能够减少或甚至消除显示面板的亮度呈纵向分布的现象，使亮度更均匀分布，提高显示面板的显示效果。
【附图说明】
图1是现有技术中一种显示面板的驱动芯片的布线示意图；
图2是图1中虚线部分的放大示意图；
图3是现有技术中第一栅极驱动芯片和第二栅极驱动芯片在图2所示的布线方式下的输入幅值和波形图；
图4是现有技术中第一栅极驱动芯片和第二栅极驱动芯片在图2所示的布线方式下的输出幅值和波形图；
图5是本发明显示面板一实施例的结构示意图；
图6是本发明显示面板另一实施例的结构示意图；
图7是本发明平板显示装置的驱动方法一实施例的流程图。
【具体实施方式】
本发明显示面板实施例能够减少甚至消除亮度呈纵向分布的现象，使亮度分布更均匀，提高显示面板的显示效果。
下面将结合附图和实施例对本发明进行详细地描述。
参阅图5，本发明显示面板的一实施例包括数据驱动芯片101、第一、第二扫描驱动芯片102、103以及印刷电路板105。数据驱动芯片101、第一扫描驱动芯片102和第二扫描驱动芯片103设置于显示面板的侧边区域104。本实施例的显示面板的数据线（图未示）纵向（垂直方向）设计，扫描线（图未示）横向（水平方向）设计，因此数据驱动芯片101设置于垂直数据线方向的一侧，第一、第二扫描驱动芯片102和103设置于垂直扫描线方向的一侧。
数据驱动芯片101包括第一扫描信号输入端1011、数据信号输入端1012、第一扫描信号输出端1013以及数据信号输出端1014。扫描驱动芯片以第一扫描驱动芯片102为例，包括第二扫描信号输入端1021以及第二扫描信号输出端1022。由于向数据驱动芯片101和第一、第二扫描驱动芯片102、103提供数据驱动信号和扫描驱动信号的印刷电路板105与数据驱动芯片101连接，因此，在数据驱动芯片101上需设置扫描驱动信号的输入端和输出端，即第一扫描信号输入端1011和第一扫描信号输出端1013，以使扫描驱动信号通过数据驱动芯片101传输至第一、第二扫描驱动芯片102和103。
具体地，第一扫描驱动芯片102的第二扫描信号输入端1021通过第一传输电路201与数据驱动芯片101的第一扫描信号输出端1013连接；第二扫描驱动芯片103的第二扫描信号输入端1031通过第二传输电路202与数据驱动芯片101的第一扫描信号输出端1013连接。当印刷电路板105向第一、第二扫描驱动芯片102和103提供扫描驱动信号时，扫描驱动信号经数据驱动芯片101的第一扫描信号输入端1011输入，经过数据驱动芯片101并从第一扫描信号输出端1013输出，然后分别通过第一传输电路201和第二传输电路202分别传输至第一、第二扫描驱动芯片102和103。印刷电路板105向数据驱动芯片101提供数据驱动信号时，数据驱动信号直接由数据信号输入端1012输入至数据驱动芯片101，然后由数据信号输出端1014输出。
由上述可知，第一扫描驱动芯片102和第二扫描驱动芯片103的扫描信号输入端分别通过第一传输电路201和第二传输电路202与数据驱动芯片101的扫描信号输出端连接。其中，第一传输电路201中串联有第一电阻2012，以使得第一传输电路201和第二传输电路202的总阻抗相等或差值小于预定值。具体而言，第一扫描驱动芯片102的传输电路包括第一导线2011、第一电阻2012以及第一电容2013。第一电阻2012与第一导线2011串联形成电阻串联支路，其中电阻串联支路的一端连接数据驱动芯片101的第一扫描信号输出端1013，另一端连接第一扫描驱动芯片102的第二扫描信号输入端1021。第一电容2013与电阻串联支路并联，其中第一电容2013的一端与数据驱动芯片101的第一扫描信号输出端1013连接，另一端接地。
第二扫描驱动芯片103的第二传输电路202为导线，其中导线的一端与数据驱动芯片101的第一扫描信号输出端1013连接，另一端与第二扫描驱动芯片103的第二扫描信号输入端1031连接。本实施例中，第二传输电路202经过第一扫描驱动芯片102。此时，第一扫描驱动芯片102还包括第三输入端1023以及第三输出端1024。第二传输电路202通过第三输入端1023进入第一扫描驱动芯片102，然后通过第三输出端1024穿出第一扫描驱动芯片102。
本发明实施例中，第一传输电路201中的第一导线2011与第二传输电路202的导线的长度和电阻率至少有一个不相同。因此，在第一传输电路201上的第一导线2011增加串联的第一电阻2012，并且并联第一电容2013，通过调整第一电阻2012和第一电容2013的大小以使得第一传输电路201和第二传输电路202的总阻抗相等。其中第一电阻2012和第一电容2013的数量均为一个，总阻抗包括传输电路的电阻阻抗和电容容抗。
但是，本领域技术人员可以理解的是，在实际情况中，受各种因素的影响，可以允许第一传输电路201和第二传输电路202的总阻抗存在差值，并且两者总阻抗差值需小于预定值。此预定值的设定按实际情况确定，比如为实现显示效果更均匀的目的，尽量设置小一些，以技术水平和工艺水平为限。
值得注意的是，本发明实施例中第一传输电路201也可以不设置并联的第一电容2013，只串联第一电阻2012。而且，串联的第一电阻2012的数量可以是一个或多个。通过调整第一电阻2012的大小而使得第一传输电路201和第二传输电路202的总阻抗相等或差值小于预定值。
本发明显示面板的实施例，扫描驱动信号分别经过第一传输电路201和第二传输电路202传输至第一扫描驱动芯片102和第二扫描驱动芯片103，使第一传输电路201串联有第一电阻2012，并在电阻串联支路并联有第一电容2013，通过调整第一电阻2012和第一电容2013的大小以使得第一传输电路201和第二传输电路202的总阻抗相等或差值小于预定值，进而使得第一扫描驱动芯片102和第二扫描驱动芯片103的信号输入幅值和波形尽可能地相同，由此能够减少甚至消除显示面板的亮度呈纵向分布的情况，提高显示面板亮度的均匀性，提高显示效果。
当然，如图6所示，第二扫描驱动芯片103’的第二传输电路203也可以具有如图5所示的第一传输电路201类似的结构，即第二传输电路203包括第二导线2031、第二电阻2032以及第二电容2033。第一传输电路201’的第一导线2011’和第一电阻2012’串联形成第一电阻串联支路，第一电容2013’与第一电阻串联支路并联；第二传输电路203的第二电阻2032与第二导线2031串联形成第二电阻串联支路，第二电容2033与第二电阻串联支路并联。数据驱动芯片101’也可以设置有两个扫描信号输出端，分别为第一扫描信号输出端1013’和第三扫描信号输出端1015。第一传输电路201’的第一电阻串联支路与第一扫描信号输出端1013’连接，第二传输电路203的第二电阻串联支路与第三扫描信号输出端1015连接，以使得扫描驱动信号分别通过第一、第三扫描信号输出端1013’和1015输出，然后分别由第一传输电路201’和第二传输电路203传输至第一扫描驱动芯片102’和第二扫描驱动芯片103’。通过调整第一传输电路201’和第二传输电路203中的电阻和电容，使得第一传输电路201’和第二传输电路203的总阻抗相等或差值小于预定值。
此外，第二传输电路203还可以仅设置第二电阻2032而不包括第二电容2033，或仅设置第二电容2033而不包括第二电阻2032；同理，第一传输电路201、201’也可以采用上述设计，甚至第一传输电路201、201’和第二传输电路202或203中可以采用其他具有电阻或电容属性的电子元器件来代替上述实施例中的电阻和电容，只要通过调整第一传输电路201、201’或第二传输电路202、203中的具有电阻或电容属性的电子元器件，使得所有传输电路之间的总阻抗相等或差值小于预定值即可。
当然，在更多实施例中，扫描驱动芯片的数量还可以是三个或以上，传输电路对应地为三条或以上，而至少一条传输电路中串联有电阻，以使得所有传输电路的总阻抗相等或差值小于预定值。举例而言，当扫描驱动芯片有三个时，传输电路有三条，使其中一条阻抗较小的传输电路中串联电阻，其他两条阻抗较大的传输电路可以为长度和电阻率相等的两条导线，通过调整电阻的大小使串联有电阻的传输电路与另两条传输电路的总阻抗相等或差值小于预定值。此外，也可以使两条或者三条传输电路中均串联电阻以使得所有传输电路的总阻抗相等或差值小于预定值，具体的电路连接关系在此不一一赘述，可参考上述实施例。值得注意的是，本实施例的数据驱动芯片的数量也可以为多个，在此不作具体限制，而当数据驱动芯片的数量为多个时，扫描驱动信号由最靠近扫描驱动芯片的数据驱动芯片传输。此外，导线的共同部分也可以不经过扫描驱动芯片，甚至，扫描驱动信号也可以不经过数据驱动芯片，而直接自印刷电路板输入扫描驱动芯片。
本发明平板显示装置的一实施例，包括如上述实施例所述的显示面板，并且本实施例的平板显示装置可以是液晶显示器、等离子显示器或有机发光二极管显示器等显示器类型的平板显示装置。
参阅图7，本发明一种平板显示装置的驱动方法的一实施例，包括步骤：
步骤S101；通过总阻抗相等或差值小于预定值的相应传输电路向至少两个扫描驱动芯片提供扫描驱动信号，以驱动像素开关打开，其中至少一个扫描驱动芯片的传输电路中串联有电阻。
具体地，印刷电路板通过数据驱动芯片与显示面板连接，由印刷电路板通过总阻抗相等或差值小于预定值的相应传输电路、并经由一个数据驱动芯片向至少两个扫描驱动芯片提供扫描驱动信号。
其中，至少一个扫描驱动芯片的传输电路包括导线、电阻以及电容，电阻和电容的数量均为一个。电阻与导线串联形成电阻串联支路，电容与所述电阻串联支路并联。通过调整电阻和电容的大小以使得所有传输电路的总阻抗相等或差值小于预定值。传输电路的总阻抗包括了电阻阻抗和电容容抗。
具体而言，扫描驱动芯片的数量至少为两个，传输电路也对应至少为两条，以使得扫描驱动信号分别通过至少两条传输电路传输至至少两个扫描驱动芯片。其中，至少一条传输电路中串联有电阻。以图5的显示面板实施例为例进行说明，并且以两个扫描驱动芯片为例，扫描驱动信号经过第一传输电路201传输至第一扫描驱动芯片102；扫描驱动信号经过第二传输电路202传输至第二扫描驱动芯片103，由此可驱动像素开关打开。其中，第一传输电路201包括第一导线2011、第一电阻2012以及第一电容2013。第二传输电路202为导线。第一传输电路201的第一导线2011和第一电阻2012串联形成电阻串联支路，该电阻串联支路的一端连接数据驱动芯片101的第一扫描信号输出端1013，另一端连接第一扫描驱动芯片102的第二扫描信号输入端1021。第一电容2013与电阻串联支路并联，其中第一电容2013的一端与数据驱动芯片101的第一扫描信号输出端1013连接，另一端接地。第二扫描驱动芯片103的第二传输电路202为导线，其中导线的一端与数据驱动芯片101的第一扫描信号输出端1013连接，另一端与第二扫描驱动芯片103的第二扫描信号输入端1031连接。通过调整第一电阻2012和第一电容2013的大小以使得第一传输电路201和第二传输电路202的总阻抗相等，或者两者总阻抗差值小于预定值。
步骤S102：在所述像素开关打开后向数据驱动芯片提供数据驱动信号，以使所述数据驱动信号通过打开的像素开关进入相应的像素操作元件。
步骤S101中，扫描驱动信号输入扫描驱动芯片以驱动像素开关的打开，像素开关打开后，数据驱动芯片提供的数据驱动信号通过打开的像素开关进入相应的像素操作元件，比如进入液晶显示装置中的像素电极，以驱动平板显示装置显示。
本实施例的平板显示装置的驱动方法，通过总阻抗相等或差值小于预定值的相应传输电路向至少两个扫描驱动芯片提供驱动信号，其中至少一条传输电路中串联有电阻，使得至少两个扫描驱动芯片的信号输入幅值和波形一致，能够提高平板显示装置亮度的均匀性，提高显示效果。
以上所述仅为本发明的实施例，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (14)

  1. 一种显示面板，其中：
    所述显示面板包括数据驱动芯片以及至少两个扫描驱动芯片；
    所述数据驱动芯片和扫描驱动芯片设置于显示面板的侧边区域；
    所述数据驱动芯片包括第一扫描信号输入端、数据信号输入端、第一扫描信号输出端以及数据信号输出端；
    所述扫描驱动芯片包括第二扫描信号输入端以及第二扫描信号输出端；
    各个所述扫描驱动芯片的第二扫描信号输入端均通过相应的传输电路与数据驱动芯片的第一扫描信号输出端连接，至少一个所述扫描驱动芯片的传输电路中串联有电阻，以使得对应所述至少两个扫描驱动芯片的传输电路的总阻抗相等或差值小于预定值；
    所有所述传输电路的总阻抗相等或差值小于预定值；
    至少一条所述传输电路经过一个所述扫描驱动芯片。
  2. 根据权利要求1所述的显示面板，其中，
    至少一个所述扫描驱动芯片的传输电路包括导线、电阻以及电容，所述电阻与导线串联形成电阻串联支路，所述电容与电阻串联支路并联；
    所述电阻串联支路的一端连接所述数据驱动芯片的第一扫描信号输出端，另一端连接扫描驱动芯片的第二扫描信号输入端；
    所述电容的一端连接所述数据驱动芯片的第一扫描信号输出端，另一端接地。
  3. 根据权利要求2所述的显示面板，其中，
    所述电阻和电容的数量均为一个，所述传输电路的总阻抗包括电阻阻抗和电容容抗，调整所述电阻和电容的大小以使得所有所述传输电路的总阻抗相等或差值小于预定值。
  4. 根据权利要求1所述的显示面板，其中，
    所述至少一个扫描驱动芯片包括第三输入端和第三输出端，至少一条所述传输电路通过第三输入端进入扫描驱动芯片，通过第三输出端穿出扫描驱动芯片。
  5. 一种平板显示装置，其中，包括显示面板；
    所述显示面板包括数据驱动芯片以及至少两个扫描驱动芯片；
    所述数据驱动芯片和扫描驱动芯片设置于显示面板的侧边区域；
    所述数据驱动芯片包括第一扫描信号输入端、数据信号输入端、第一扫描信号输出端以及数据信号输出端；
    所述扫描驱动芯片包括第二扫描信号输入端以及第二扫描信号输出端；
    各个所述扫描驱动芯片的第二扫描信号输入端均通过相应的传输电路与数据驱动芯片的第一扫描信号输出端连接，至少一个所述扫描驱动芯片的传输电路中串联有电阻，以使得对应所述至少两个扫描驱动芯片的传输电路的总阻抗相等或差值小于预定值。
  6. 根据权利要求5所述的平板显示装置，其中，
    所有所述传输电路的总阻抗相等或差值小于预定值。
  7. 根据权利要求6所述的平板显示装置，其中，
    至少一个所述扫描驱动芯片的传输电路包括导线、电阻以及电容，所述电阻与导线串联形成电阻串联支路，所述电容与电阻串联支路并联；
    所述电阻串联支路的一端连接所述数据驱动芯片的第一扫描信号输出端，另一端连接扫描驱动芯片的第二扫描信号输入端；
    所述电容的一端连接所述数据驱动芯片的第一扫描信号输出端，另一端接地。
  8. 根据权利要求7所述的平板显示装置，其中，
    所述电阻和电容的数量均为一个，所述传输电路的总阻抗包括电阻阻抗和电容容抗，调整所述电阻和电容的大小以使得所有所述传输电路的总阻抗相等或差值小于预定值。
  9. 根据权利要求5所述的平板显示装置，其中，
    至少一条所述传输电路经过一个所述扫描驱动芯片。
  10. 根据权利要求5所述的平板显示装置，其中，
    所述至少一个扫描驱动芯片包括第三输入端和第三输出端，至少一条所述传输电路通过第三输入端进入扫描驱动芯片，通过第三输出端穿出扫描驱动芯片。
  11. 一种平板显示装置的驱动方法，其中，包括：
    通过总阻抗相等或差值小于预定值的相应传输电路向至少两个扫描驱动芯片提供扫描驱动信号，以驱动像素开关打开，其中所述至少一个扫描驱动芯片的传输电路中串联有电阻；
    在所述像素开关打开后向数据驱动芯片提供数据驱动信号，以使所述数据驱动信号通过打开的像素开关进入相应的像素操作元件。
  12. 根据权利要求11所述的方法，其中，
    所述通过总阻抗相等或差值小于预定值的相应传输电路向至少两个扫描驱动芯片提供扫描驱动信号的步骤具体为：通过总阻抗相等或差值小于预定值的相应传输电路、并经由一个数据驱动芯片向至少两个扫描驱动芯片提供扫描驱动信号。
  13. 根据权利要求11所述的方法，其中，
    至少一个所述扫描驱动芯片的传输电路包括导线、电阻以及电容，所述电阻与导线串联形成电阻串联支路，所述电容与电阻串联支路并联。
  14. 根据权利要求13所述的方法，其中，
    所述电阻和电容的数量均为一个，所述传输电路的总阻抗包括电阻阻抗和电容容抗，调整所述电阻和电容的大小以使得所有所述传输电路的总阻抗相等或差值小于预定值。
PCT/CN2012/076820 2012-06-05 2012-06-13 显示面板、平板显示装置及其驱动方法 WO2013181860A1 (zh)

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