WO2020027107A1 - Dispositif d'affichage d'image - Google Patents

Dispositif d'affichage d'image Download PDF

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Publication number
WO2020027107A1
WO2020027107A1 PCT/JP2019/029784 JP2019029784W WO2020027107A1 WO 2020027107 A1 WO2020027107 A1 WO 2020027107A1 JP 2019029784 W JP2019029784 W JP 2019029784W WO 2020027107 A1 WO2020027107 A1 WO 2020027107A1
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Prior art keywords
circuit
signal
transistor
voltage
display device
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Application number
PCT/JP2019/029784
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English (en)
Japanese (ja)
Inventor
秋元　肇
Original Assignee
日亜化学工業株式会社
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Application filed by 日亜化学工業株式会社 filed Critical 日亜化学工業株式会社
Priority to KR1020217002792A priority Critical patent/KR102649819B1/ko
Priority to CN201980050828.9A priority patent/CN112513965A/zh
Priority to JP2020534658A priority patent/JP7449466B2/ja
Publication of WO2020027107A1 publication Critical patent/WO2020027107A1/fr

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2077—Display of intermediate tones by a combination of two or more gradation control methods
    • G09G3/2081—Display of intermediate tones by a combination of two or more gradation control methods with combination of amplitude modulation and time modulation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0814—Several active elements per pixel in active matrix panels used for selection purposes, e.g. logical AND for partial update
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0852—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor being a dynamic memory with more than one capacitor
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    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0259—Details of the generation of driving signals with use of an analog or digital ramp generator in the column driver or in the pixel circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0262—The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0257—Reduction of after-image effects
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/028—Generation of voltages supplied to electrode drivers in a matrix display other than LCD

Definitions

  • the embodiment of the present invention relates to an image display device.
  • a display using an organic EL is promising as a self-luminous element for a display device, and practical use is being promoted.
  • OLED organic EL
  • Micro LEDs have been developed as self-luminous elements for display devices using micro light emitting elements using an inorganic semiconductor material such as III-V group, and are expected to solve the above-mentioned problems of OLEDs.
  • micro LED To apply the micro LED to the display device and solve the problem of the OLED, it is desired to drive the micro LED as a pixel with a wide dynamic range.
  • Embodiments provide an image display device that drives a light emitting element with a wide dynamic range.
  • the image display device includes a plurality of pixels arranged in a matrix between a first power supply line to which a DC voltage is applied and a second power supply line set to a lower potential than the first power supply line. Circuit.
  • Each of the plurality of pixel circuits is configured to emit the light based on a result of comparing a light emitting element, a first signal connected to the light emitting element and including a triangular wave signal, and a first DC voltage set for a predetermined period.
  • At least a part of the plurality of pixel circuits is connected in series with the first circuit, and a current value supplied to the first circuit based on a second DC voltage set in a period different from the predetermined period.
  • an image display device that drives a light emitting element with a wide dynamic range is realized.
  • FIG. 2 is a block diagram illustrating the image display device according to the first embodiment.
  • FIG. 2 is a block diagram illustrating a part of the image display device according to the first embodiment.
  • FIG. 2 is a circuit diagram illustrating a part of the image display device according to the first embodiment.
  • 5 is an example of a timing chart for explaining the operation of the image display device of the first embodiment.
  • 5 is an example of a timing chart for explaining the operation of the image display device of the first embodiment.
  • FIG. 3 is a conceptual diagram for describing an operation of the image display device according to the first embodiment.
  • FIGS. 7A to 7C are graphs showing examples of characteristics of the light emitting device.
  • FIG. 8A is a block diagram illustrating a modification of the first embodiment.
  • 8B is a circuit diagram illustrating a modification of the first embodiment. It is a block diagram which illustrates a part of image display device concerning a 2nd embodiment. It is a circuit diagram which illustrates a part of image display device concerning a 3rd embodiment. It is a circuit diagram which illustrates a part of image display device concerning a 4th embodiment. It is a circuit diagram which illustrates a part of image display device concerning a 5th embodiment. It is a block diagram which illustrates the image display device concerning a 6th embodiment. It is a circuit diagram which illustrates a part of image display device of a 6th embodiment. 16 is an example of a timing chart for explaining the operation of the image display device according to the sixth embodiment.
  • 16 is an example of a timing chart for explaining the operation of the image display device according to the sixth embodiment.
  • 4 is a graph illustrating characteristics of the light emitting device. It is a circuit diagram which illustrates a part of image display device concerning a modification of a 6th embodiment.
  • FIG. 1 is a block diagram illustrating an image display device according to the embodiment.
  • the image display device 1 according to the embodiment includes a substrate 2 and a plurality of pixel circuits 10.
  • the plurality of pixel circuits 10 are provided on the substrate 2.
  • the substrate 2 is a substantially rectangular plate.
  • the substrate 2 is formed of, for example, a synthetic resin material such as polyimide or an inorganic material such as glass.
  • the pixel circuits 10 are arranged along the X-axis direction on an XY coordinate having an X-axis parallel to one side of the substantially rectangular substrate 2 and a Y-axis orthogonal to the X-axis.
  • the pixel circuits 10 arranged in the X-axis direction are further arranged in the Y-axis direction. That is, in the image display device 1, the plurality of pixel circuits 10 are arranged in a lattice (matrix).
  • the X-axis direction may be referred to as a row direction
  • the Y-axis direction may be referred to as a column direction.
  • the required number of pixel circuits 10 are arranged in accordance with the screen resolution of the image display device 1.
  • a period during which one frame of image data is displayed on a screen formed by the pixel circuits 10 arranged in a matrix is called a vertical scanning period, and a period obtained by dividing the vertical scanning period by the number of rows of the screen is called a horizontal scanning period.
  • a voltage value for power supply control of the pixel circuits 10 arranged in the row direction (X-axis direction, first direction) is set, and a voltage value for analog image data is set.
  • the scanning circuit 50 for scanning the pixel circuit 10 is sequentially shifted in the column direction (Y-axis direction, second direction).
  • the power supply control signal / analog image signal drive circuit 40 is provided in an upper row of the top row of the pixel circuits 10 arranged in a matrix.
  • the power supply control signal / analog image signal drive circuit 40 may be provided at a lower position of the lowest row of the pixel circuits 10 arranged in a matrix.
  • the power control signal line 42 and the analog image signal line 44 extend in the column direction, and the power control signal line 42 and the analog image signal line 44 are provided for each column of the pixel circuit 10.
  • the power control signal / analog image signal drive circuit 40 supplies a power control signal to each pixel circuit 10 via the power control signal line 42.
  • the power control signal (second DC voltage) is an analog signal that can take a plurality of voltage values.
  • the power supply control signal / analog image signal drive circuit 40 supplies an analog image signal (first DC voltage) to each pixel circuit 10 via the analog image signal line 44.
  • the analog image signal is also an analog signal that can take a plurality of voltage values.
  • each pixel circuit 10 to which the power supply control signal is supplied and the voltage value is written sets a drive current based on the written voltage value.
  • Each of the pixel circuits 10 to which the analog image signal is supplied and to which the voltage value is written has a threshold voltage to be compared with a reference triangular wave signal (first signal) not shown in the figure based on the voltage value of the analog image signal. Then, the time width during which the pixel circuit 10 emits light is set.
  • the power supply control signal / analog image signal drive circuit 40 may generate a reference triangular wave signal (not shown) to be supplied to each pixel circuit 10 for each column.
  • the reference triangular wave signal may be separately provided as a reference triangular wave circuit in the lowermost lowermost row of the matrix of the pixel circuits 10.
  • the power supply control signal / analog image signal driving circuit 40 or the reference triangular wave circuit distributes, for example, a reference triangular wave supplied from outside of these circuits to the columns of the pixel circuits 10.
  • the power supply control signal / analog image signal drive circuit 40 may include a storage unit 48.
  • the storage unit 48 can store luminance settings for a plurality of voltage values taken by the power control signal and luminance settings for a plurality of voltage values taken by the analog image signal. The relationship between these voltage values and the luminance setting can be adjusted and set by visually recognizing the luminance of the light emitting elements constituting the pixel circuit 10. By properly setting the relationship between the voltage value and the luminance setting, ⁇ correction can be performed. In the digital PWM system, the gradation characteristic becomes linear. On the other hand, the ability to apply ⁇ correction to the signal is one of the advantages of this system.
  • the storage unit 48 is formed of, for example, an electrically rewritable storage circuit.
  • the scanning circuit 50 is provided in the leftmost column of the leftmost column of the pixel circuits 10 arranged in a matrix.
  • the scanning circuit 50 may be provided in a further right column of the rightmost column of the pixel circuits 10 arranged in a matrix.
  • the first scanning line 52 and the second scanning line 54 from the scanning circuit 50 are provided for each row of the pixel circuit 10.
  • the first scanning line 52 and the second scanning line 54 extend in the row direction.
  • the first scanning line 52 supplies a first scanning signal which is a digital signal for selecting a pixel circuit 10 in which a desired voltage value has been written in accordance with the voltage control signal and the analog image signal in the row direction.
  • a reference triangular wave signal is supplied to each of the selected pixel circuits 10, and the light emitting element of each of the pixel circuits 10 emits light by a luminance setting based on the written voltage.
  • the second scanning line 54 supplies a second scanning signal which is a digital signal for selecting the pixel circuit 10 in the row direction when writing a voltage value by an analog image signal.
  • the first scanning signal and the second scanning signal corresponding to the same row have complementary logical values. That is, when the first scanning signal is at a high level, the second scanning signal is at a low level, and when the first scanning signal is at a low level, the second scanning signal is at a high level.
  • the horizontal scanning period is sequentially shifted to the period in which the second scanning signal of the next adjacent row is at the high level.
  • FIG. 2 is a block diagram illustrating a part of the image display device according to the embodiment.
  • FIG. 2 is a block diagram showing a specific example of the pixel circuit 10.
  • the pixel circuit 10 includes a light emitting element 12, an analog image PWM circuit 14, and a power control circuit 16.
  • the light emitting element 12 is connected to the output of the analog PWM circuit 14.
  • the analog image PWM circuit 14 and the power supply control circuit 16 are connected in series between a power supply line (first power supply line) 4 and a ground line (second power supply line) 5.
  • the power supply control circuit 16 is connected to a higher potential side than the analog image PWM circuit 14.
  • the light emitting element 12 is connected between the output of the analog image PWM circuit 14 and the ground line 5.
  • Light emitting element 12 is preferably an inorganic semiconductor light emitting element.
  • the light emitting element 12 is formed of, for example, a compound semiconductor of a group III-V or the like.
  • the light emitting element 12 may be a current emission type quantum dot (QD) element.
  • QD quantum dot
  • the light emitting element 12 may be an organic electroluminescence element, but hereinafter, unless otherwise specified, the description will be made assuming that the light emitting element 12 is an inorganic semiconductor light emitting element.
  • the analog image PWM circuit (first circuit) 14 is connected between the power supply control circuit 16 and the ground line 5.
  • the analog image PWM circuit 14 is connected to an analog image signal line 44 and a reference triangular wave signal line 46.
  • the analog image signal line 44 and the reference triangular wave signal line 46 extend in the column direction.
  • the analog image PWM circuit 14 is connected to the first scanning line 52 and the second scanning line 54.
  • the first scanning line 52 and the second scanning line 54 extend in the row direction.
  • the analog image PWM circuit 14 can cause the light emitting element 12 to emit light when the first scanning signal supplied via the first scanning line 52 is at a high level.
  • the period during which the light emitting element 12 emits light is determined based on the reference triangular wave signal supplied via the reference triangular wave signal line 46 and the voltage value written in the analog image PWM circuit 14.
  • the cycle at which the light emitting element 12 emits light is determined based on the cycle of the reference triangular wave signal.
  • the second scanning signal supplied via the second scanning line 54 when the second scanning signal supplied via the second scanning line 54 is at a high level, the voltage value of the analog image signal supplied via the analog image signal line 44 is written. When the second scanning signal is at the low level, the writing of the voltage value of the analog image signal is stopped.
  • the power supply control circuit (second circuit) 16 is connected between the power supply line 4 and the analog image PWM circuit 14.
  • the power supply control circuit 16 is connected to the second scanning line of the pixel circuit of the adjacent and precedingly scanned row.
  • the power control circuit 16 is connected to a power control signal line 42.
  • the power control signal line 42 extends in the column direction.
  • the power supply control circuit 16 is supplied via the power supply control signal line 42 when the second scan signal supplied via the second scan line 54 in the row adjacent to the row of the pixel circuit 10 is at a high level. The voltage value of the power control signal is written.
  • FIG. 3 is a circuit diagram illustrating a part of the image display device of the present embodiment.
  • FIG. 3 shows a specific circuit example of the pixel circuit 10.
  • FIG. 3 shows the pixel circuits 10i and 10j in the same column in two adjacent rows.
  • the circuit configurations of the pixel circuits 10i and 10j in the two rows are the same, and the same components are denoted by the same reference numerals and detailed description thereof will not be repeated.
  • the analog image PWM circuit 14 includes an inverter 20, a first transistor 21, a second transistor 22, a third transistor 23, and a first capacitor 31.
  • Inverter 20 includes transistors 20a and 20b.
  • the transistors 20a and 20b are connected in series at the main electrode, and the control electrodes are connected to each other.
  • Transistor 20a is an n-type transistor
  • transistor 20b is a p-type transistor.
  • the anode of the light emitting element 12 is connected to the output of the inverter 20.
  • the cathode electrode of the light emitting element 12 is connected to the ground line 5.
  • the polarity of a transistor is assumed to be n-type unless otherwise specified.
  • the first transistor 21 is connected between the input and output of the inverter 20 by the main electrode.
  • the control electrode of the first transistor 21 is connected to the second scanning line 54.
  • the first capacitor (first capacitance element) 31 is connected to the input of the inverter 20 at one electrode.
  • the first capacitor 31 has the other electrode connected to one main electrode of each of the second transistor 22 and the third transistor 23.
  • the other main electrode of the second transistor 22 is connected to the reference triangular wave signal line (first signal line) 46.
  • the control electrode of the second transistor 22 is connected to the first scanning line 52.
  • the other main electrode of the third transistor 23 is connected to an analog image signal line (second signal line) 44.
  • the control electrode of the third transistor 23 is connected to the second scanning line 54.
  • the analog image signal Ap having a voltage value equal to the inverted intermediate voltage is input to the first capacitor 31, when the voltage value of the reference triangular wave signal At becomes equal to the inverted intermediate voltage, the output of the inverter 20 is output. Rises. Even when the voltage value of the analog image signal Ap is lower or higher than the inverted intermediate voltage, the inverter 20 and the first capacitor 31 operate as a comparator having a threshold voltage according to the voltage value.
  • the power supply control circuit 16 includes a fourth transistor 24, a fifth transistor 25, and a second capacitor 32.
  • the fourth transistor 24 is a p-type transistor.
  • the fourth transistor 24 is a main electrode and is connected between the power supply line 4 and the main electrode of the transistor 20 b of the inverter 20.
  • the control electrode of the fourth transistor 24 is connected to one main electrode of the fifth transistor 25.
  • the other main electrode of the fifth transistor 25 is connected to the power control signal line 42.
  • the control electrode of the fifth transistor 25 is connected to the second scanning line 54 of the row of the pixel circuit 10i adjacent to the row of the own pixel circuit 10j.
  • the second scanning line 54 is also connected to the control electrodes of the first transistor 21 and the third transistor 23 of the pixel circuit 10i adjacent to the pixel circuit 10j. Although not shown, the second scanning line 54 of the pixel circuit 10j is connected to a control electrode of the fifth transistor 25 of a pixel circuit (not shown) adjacent to the pixel circuit 10j below in the column direction. .
  • the voltage across the second capacitor (second capacitance element) 32 set to the voltage value of the power control signal Ac when the fifth transistor 25 is turned on is applied to the control terminal of the fourth transistor 24.
  • the fourth transistor 24 has a current value set based on the voltage across the second capacitor 32, and supplies the set current to the analog image PWM circuit 14.
  • the power supply lines 4 in each row are connected to a common power supply line 4a extending in the column direction.
  • the ground lines 5 in each row are connected to a common ground line 5a extending in the column direction.
  • a DC voltage is applied between the common power supply line 4a and the common ground line 5a.
  • the scanning circuit 50 includes an inverter 51 for each row.
  • a second scanning line 54 corresponding to each row is connected to an input of each inverter 51, and a first scanning line 52 corresponding to each row is connected to an output of each inverter 51.
  • the scanning circuit 50 sequentially outputs the second scanning signals Di2 and Dj2 so as to select a row, for example, from top to bottom.
  • the scanning circuit 50 supplies the high-level second scanning signal Di2 to the pixel circuit 10i in the upper row
  • the scanning circuit 50 sets the second scanning signal Di2 to the low level, and sets the pixel in the lower row.
  • the high-level second scanning signal Dj2 is supplied to the circuit 10j.
  • the horizontal scanning period includes a period in which the second scanning signals Di2 and Dj2 are at a high level, and includes a period in which the scanning circuit 50 switches for each row and outputs the second scanning signals Di2 and Dj2.
  • the power supply control circuit 16 of the target pixel circuit 10j is selected by the second scanning signal Di2 in a row adjacent to the row of the target pixel circuit 10j, and the power supply control circuit 16 responds to the power supply control signal. Write the desired voltage value. After the second scanning signal Di2 in the adjacent row goes low, the second scanning signal Dj2 in the row of the target pixel circuit 10j goes high. As a result, the analog image PWM circuit 14 of the target pixel circuit 10j is selected, and the voltage value of the analog image signal is written.
  • the period during which the second scanning signals Di2 and Dj2 of each row are at the high level is determined by the horizontal scanning period.
  • the period when the second scanning signals Di2 and Dj2 are at the high level is set to a period equal to or shorter than the horizontal scanning period. More specifically, during the period of the second scanning signals Di2 and Dj2, the voltages at the input terminals of the first capacitor 31 and the second capacitor 32 become substantially equal to the voltage value of the analog image signal and the voltage value of the power supply control signal. Determined based on period.
  • the first scanning line 52 of each row outputs first scanning signals Di1, Dj1 having logical values opposite to the second scanning signals Di2, Dj2. That is, the pixel circuits 10i and 10j in each row receive the reference triangular wave signal At while the voltage value of the power control signal Ac and the voltage value of the analog image signal Ap are not written.
  • the analog image PWM circuit 14 and the power supply control circuit 16 of the above-described pixel circuit 10 are formed using, for example, a low-temperature polycrystalline silicon process (LTPS) or an oxide semiconductor manufacturing process.
  • the transistors constituting the analog image PWM circuit 14 and the power supply control circuit 16 are thin film transistors (TFTs).
  • the scanning circuit 50 may also be configured by a TFT.
  • the power supply control signal / analog image signal drive circuit 40 may be a digital-analog mixed circuit including a digital-analog converter, a storage unit 48, and the like, it is preferably provided as an independent integrated circuit for driving. .
  • the light emitting element 12 separates the light emitting element 12 formed on the GaN semiconductor crystal from the substrate for crystal growth, and transfers (mass-transfers) the image onto the substrate 2 on which the above-described pixel circuit 10 is formed.
  • the display device 1 is formed.
  • FIG. 4 is an example of a timing chart for explaining the operation of the image display device of the present embodiment.
  • FIG. 4 shows operation waveforms of each part of the pixel circuit 10 during two horizontal scanning periods.
  • the uppermost diagram in FIG. 4 shows a time change of the power control signal Ac supplied to the power control signal line 42.
  • the second row of FIG. 4 illustrates a temporal change of the second scan signal Di2 of the second scan line 54 in the row adjacent to the row of the target pixel circuit 10j (FIG. 3).
  • the fifth transistor 25 of the target pixel circuit 10j turns on.
  • the third diagram in FIG. 4 illustrates a temporal change in the voltage across the second capacitor 32 of the target pixel circuit 10j. 4 shows a time change of the analog image signal Ap supplied to the analog image signal line 44.
  • the fifth diagram in FIG. 4 illustrates a temporal change of the second scan signal Dj2 of the second scan line 54 in the row of the target pixel circuit 10j.
  • the sixth diagram in FIG. 4 illustrates a temporal change of the input voltage Vin of the inverter 20 of the target pixel circuit 10j.
  • the seventh diagram in FIG. 4 illustrates a temporal change in the output voltage Vout of the inverter 20 of the target pixel circuit 10j. This voltage waveform is a voltage waveform of the anode electrode of the light emitting element 12.
  • FIG. 4 shows a time change of the reference triangular wave signal At.
  • the cycle of the reference triangular wave signal At is set according to the vertical scanning period and is sufficiently longer than the horizontal scanning period, and thus has a gentle gradient.
  • the lowermost diagram in FIG. 4 illustrates a temporal change of the first scanning signal Dj1 supplied from the first scanning line 52 of the row of the target pixel circuit 10j.
  • the first scanning signal Dj1 is at a high level
  • the second transistor 22 of the target pixel circuit 10j is turned on, and when it is at a low level, it is turned off.
  • the power control signal Ac indicates a voltage value having a set value in the horizontal scanning periods t1 to t4 of a row adjacent to the row of the target pixel circuit 10j.
  • the voltage value at this time is applied to the main electrode of the fifth transistor 25 of the target pixel circuit 10j.
  • the second scanning signal Di2 in the row adjacent above the row of the target pixel circuit 10j goes high. This turns on the fifth transistor 25 of the target pixel circuit 10j.
  • the voltage value of the power supply control signal Ac is changed to a voltage value for a pixel circuit (not shown) in a lower row adjacent to the row of the target pixel circuit 10j.
  • the second scanning signal Di2 is already at the low level at the time t3, and the fifth transistor 25 of the pixel circuit 10j in the target row is off after the time t3.
  • the analog image signal Ap is set to a voltage value to be written to the analog image PWM circuit 14 of the target pixel circuit 10j.
  • the second scanning signal Dj2 of the row of the target pixel circuit 10j becomes high level. Thereby, the first transistor 21 and the third transistor 23 of the pixel circuit 10j are turned on.
  • the first capacitor 31 is charged with the voltage value of the analog image signal Ap. Since the input and output of the inverter 20 are short-circuited by the first transistor 21, the input voltage Vin of the inverter 20 approaches the intermediate inverted voltage value of the inverter 20 which is a constant value. At time t6, the input voltage Vin of the inverter 20 has an intermediate inverted voltage value. Therefore, both ends of the first capacitor 31 approach a voltage value based on the voltage value of the analog image signal Ap. Since the output voltage of the inverter 20 is lower than the threshold voltage of the light emitting element 12, the light emitting element 12 is not turned on between time t5 and time t6.
  • the first scanning signal Dj1 is at low level, and the second transistor 22 of the pixel circuit 10j in the row of interest is off.
  • the first capacitor 31 has a voltage value set by the analog image signal Ap.
  • the output of the inverter 20 increases, and the light emitting element 12 emits light when the threshold voltage of the light emitting element 12 is exceeded. .
  • FIG. 5 is an example of a timing chart for explaining the operation of the image display device of the present embodiment.
  • FIG. 5 shows a timing chart having a longer time axis than the case of FIG.
  • times ta to tm represent one vertical scanning period.
  • One vertical scanning period is a period determined by, for example, one frame frequency. When one frame frequency is 60 Hz, one vertical scanning period is 1/60 [sec].
  • the reference triangular wave signal At is a symmetric triangular wave, and the frequency is set to twice the frame frequency. Therefore, the operation in the period from time ta to tg is the same as the operation in the period from time tg to tm, and therefore, the operation in the period from time ta to tg will be described below.
  • the top diagram and the second diagram in FIG. 5 show the time change of the input voltage Vin of the inverter 20 and the time of the threshold voltages VthK and VthL set by the voltage value written by the analog image signal Ap. Changes are shown.
  • the lower part of FIG. 5 shows a time change of the reference triangular wave signal At and the voltage values VpK and VpL of the analog image signals ApK and ApL.
  • the magnitudes of the voltage values VpK and VpL of the analog image signals ApK and ApL written by the reference triangular wave At and the second scanning signal Dj2 of the target row are such that VpK> VpL.
  • Case 1 the case of the voltage value VpK is referred to as Case 1
  • Case 2 the case of the voltage value VpL is referred to as Case 2.
  • the light emitting element 12 emits light when the voltage value VpK of the analog image signal ApK is equal to or higher than the voltage value of the reference triangular wave At, as shown in the uppermost diagram in FIG.
  • the light emitting element 12 emits light when the voltage value VpL of the analog image signal ApL is equal to or higher than the voltage value of the reference triangular wave At, as shown in the second diagram of FIG. Since the light emitting element 12 emits light when the voltage value of the analog image signal Ap is higher than the voltage value of the reference triangular wave At, the light emitting period of the light emitting element 12 can be set according to the magnitude of the voltage value of the analog image signal Ap. it can.
  • the brightness (luminance) is adjusted by setting the duty of the light emitting period by setting the light emitting period of the light emitting element 12 based on the voltage value of the analog image signal Ap. Can be.
  • each pixel circuit 10 includes the power supply control circuit 16.
  • the power supply control circuit 16 has already written the voltage value set in the power supply control signal by the second scanning signal Di2 in the row adjacent to the row in which the analog image signal is being written.
  • the fourth transistor 24 supplies current to the inverter 20 according to the value of the voltage written to the second capacitor 32.
  • the current to be output is determined according to the voltage across the second capacitor 32.
  • the output current of the fourth transistor 24 is approximately proportional to the square of the voltage obtained by subtracting the threshold voltage of the fourth transistor 24 from the voltage across the second capacitor 32. Note that, even when the fourth transistor 24 operates in the linear region of the MOSFET, the main current (drain current) is uniquely determined based on the voltage of the control electrode and the voltage of the main terminal electrode (drain electrode). Can be.
  • the current output from the fourth transistor 24 is set.
  • the set current is supplied to the light emitting element 12 via the inverter 20.
  • a plurality of types of voltage values of the power control signal Ac By setting a plurality of types of voltage values of the power control signal Ac, a plurality of types of current values output by the fourth transistor 24 can be set. Also, a plurality of types of voltage values to be written to the analog image PWM circuit 14 can be set, and the light emitting element 12 can be driven with a duty according to the set voltage values.
  • the frequency of the reference triangular wave signal By setting the frequency of the reference triangular wave signal to about twice the frame frequency, flickering of the image can be suppressed.
  • the frequency is not limited to twice the frame frequency, and can be set arbitrarily within a range that does not cause flicker. can do.
  • the frequency of the reference triangular wave signal does not have to be set based on the frame frequency.
  • the reference triangular wave signal is not limited to a symmetrical triangular wave, but may be an asymmetrical triangular wave, for example, a sawtooth wave or an inverted sawtooth wave, or a ⁇ characteristic can be given as a curve.
  • FIG. 6 is a conceptual diagram illustrating the operation of the image display device according to the present embodiment.
  • FIG. 6 illustrates the principle of gradation setting of the image display device 1 of the present embodiment.
  • the horizontal axis in FIG. 6 is a time axis.
  • the vertical axis in FIG. 6 is an axis representing luminance (current value).
  • each pixel circuit 10 of the image display device 1 of the present embodiment includes an analog image PWM circuit 14. Accordingly, as shown on the horizontal axis of FIG. 6, the analog image PWM circuit 14 can set a plurality of periods for driving the light emitting element 12 per unit period.
  • Each pixel circuit 10 includes a power supply control circuit 16. As shown by the vertical axis in FIG. 6, the power supply control circuit 16 can set the current flowing through the light emitting element 12 for each pixel circuit 10 in a plurality of stages to perform the brightness control.
  • the analog image PWM circuit 14 by setting the voltage value of the analog image signal Ap so as to correspond to an 8-bit digital signal, a gray scale of 255 steps (256 steps when 0 is included) is realized. can do.
  • the power supply control circuit 16 by setting the voltage value of the power supply control signal Ac so as to correspond to a 5-bit digital signal, 31 levels (32 levels when 0 is included) are realized. be able to. Therefore, in the image display device 1 of the present embodiment, it is possible to substantially realize a gradation of about 13 bits.
  • a pixel circuit using an analog image PWM circuit is conventionally known.
  • the TFTs constituting the pixel circuit are manufactured using the LTPS technology, the TFT is realized due to the noise of the pixel circuit (about 20 mV) and the restriction of the DC voltage that can be applied to the pixel circuit (about 5 V or less).
  • the maximum possible gradation is about 8 bits.
  • HDR High Dynamic Range
  • the gradation of about 8 bits can be further extended by several bits.
  • the inorganic semiconductor light emitting element as the light emitting element 12, it is possible to reduce burn-in even at a high luminance and reduce color mixing at a low luminance, as compared with an OLED. Therefore, it is possible to realize the image display device 1 including the pixel circuit 10 corresponding to HDR.
  • FIGS. 7A to 7C are graphs showing examples of characteristics of the light emitting device.
  • FIGS. 7A to 7C are graphs showing characteristic examples of a semiconductor light emitting device “NSSW703BT-HG” manufactured by Nichia Corporation.
  • NSW703BT-HG semiconductor light emitting device manufactured by Nichia Corporation.
  • FIG. 7A in a semiconductor light emitting element, when a current flows exceeding a forward voltage, in a region of a low current, a current largely changes in response to a small voltage change. Further, as shown in FIG. 7B, the forward voltage has a temperature characteristic. Therefore, it is preferable that the luminance of the semiconductor light emitting element is controlled by current driving.
  • the duty cycle of the light emission time of the light emitting element 12 is controlled by controlling the current value of the light emitting element 12 by the analog image PWM circuit 14 and the power supply control circuit 16 of the pixel circuit 10. By doing so, the brightness of the light emitting element 12 is controlled. Therefore, brightness control can be performed regardless of the temperature characteristics of the light emitting element 12.
  • the power supply control signal / analog image signal drive circuit 40 has the storage unit 48.
  • the voltage set value including the correction value for the ⁇ correction can be set in the storage unit 48. Therefore, by setting the correction value of the chromaticity based on the current value in advance, the current value is set. Changes in chromaticity due to value setting can be suppressed.
  • the voltage set value after correction in consideration of the variation characteristics is set in the storage unit 48 in advance. These characteristic variations can be corrected.
  • the power control circuit 16 is connected to the high potential side of the analog image PWM circuit 14. If the power supply control circuit can supply a drive current having a current value set based on the voltage value written by the power supply control signal Ac to the light emitting element via the analog image PWM circuit, the power supply control circuit It may be connected to the lower potential side.
  • FIG. 8A is a block diagram illustrating a modification of the first embodiment.
  • FIG. 8B is a circuit diagram illustrating a modification of the first embodiment.
  • the pixel circuit 110 includes a light emitting element 12, an analog image PWM circuit 114, and a power control circuit 116.
  • the analog image PWM circuit 114 and the power supply control circuit 116 are connected in series between the power supply line 4 and the ground line 5, and the power supply control circuit 116 is connected to a lower potential side than the analog image PWM circuit 114.
  • the light emitting element 12 is connected between the power supply line 4 and the output of the analog image PWM circuit 114.
  • the power supply control circuit 116 includes a fourth transistor 124.
  • the fourth transistor 124 is an n-type transistor.
  • the second capacitor 32 is connected between the control terminal of the fourth transistor 124 and the ground line 5.
  • the power supply control circuits 16 and 116 can be provided on the high potential side and the low potential side of the analog image PWM circuits 14 and 114. Either one can be selected according to the convenience in circuit arrangement and the like. In other embodiments described below, similarly to this modification, the power supply control circuit can be provided on the lower potential side than the analog image PWM circuit.
  • one end of the light emitting element 12 is connected to either the power supply line 4 or the ground line 5.
  • the number of wirings can be reduced.
  • an advantage that the voltage applied to the light emitting element 12 is stabilized can be obtained.
  • one end of the light emitting element can be connected to another wiring to which a predetermined constant voltage is supplied, depending on the efficiency of the circuit layout and other advantages.
  • the power supply control circuit may not be provided in all the pixel circuits, but may be configured to supply current from the pixel circuit provided with the power supply control circuit to the analog image PWM circuit of the pixel circuit provided with no power supply control circuit.
  • FIG. 9 is a block diagram illustrating a part of the image display device according to the present embodiment.
  • FIG. 9 shows main parts of two pixel circuits in the image display device. In this figure, a reference triangular wave signal line, a pixel circuit in an adjacent row, and a second scanning line in an adjacent row are omitted.
  • the pixel circuit 210a includes a power supply control circuit 216a, an analog image PWM circuit 14a, and a light emitting element 12a.
  • the power supply control circuit 216a and the analog image PWM circuit 14a are connected in series between the power supply line 4 and the ground line 5.
  • the light emitting element 12a is connected to the output of the analog image PWM circuit 14a.
  • the light emitting element 12a of the pixel circuit 210a is driven by a drive current IF having a current value set based on the voltage value of the power control signal Ac.
  • the pixel circuit 210b includes the analog image PWM circuit 14b and the light emitting element 12b.
  • the analog image PWM circuit 14b is supplied with a drive current from the power supply control circuit 216a of the pixel circuit 210a in the adjacent column, and drives the light emitting element 12b.
  • the power supply control circuit 16 is a 1T1C circuit including a single fourth transistor 24 and a second capacitor 32.
  • two fourth transistors 24 are provided in parallel.
  • the source electrodes of the two fourth transistors 24 are both connected to the power supply line 4, and the gate electrodes are also connected to the second capacitor 32.
  • One of the drain electrodes of the two fourth transistors 24 is connected to the analog image PWM circuit 14a, and the other is connected to the analog image PWM circuit 14b. Therefore, the drive current IF at this time has the same current value as the drive current IF of the light emitting element 12a of the pixel circuit 210a in the adjacent column.
  • the analog image PWM circuits 14a and 14b of the pixel circuits 210a and 210b light the light emitting elements 12a and 12b in a drive period set based on different analog image signals Apa and Apb. That is, in this embodiment, the brightness is set by changing the drive period of the drive current while sharing the power supply control circuit 216a and equalizing the drive current value.
  • the power supply control circuit 16 is not limited to supplying current to two analog image PWM circuits, but may supply current to three or more analog image PWM circuits. Also in this case, the number of parallel fourth transistors 24 may be set to three or more according to the number of analog image PWM circuits.
  • the degree of integration can be increased and a high-definition display can be obtained.
  • the pixel circuit sharing the power supply control circuit can be a unit of a plurality of pixels of the same emission color. This makes it possible to contribute to cost reduction while avoiding complicated color balance control.
  • FIG. 10 is a circuit diagram illustrating a part of the image display device according to the present embodiment.
  • the write timing of the power supply control circuit is determined by the second scan signal Di2 of the second scan line 54 in the adjacent row. Therefore, FIG. 10 shows the pixel circuits 310i and 310j in the adjacent rows.
  • the circuit configurations of the pixel circuits 310i and 310j are the same, and the same circuit elements are denoted by the same reference numerals and detailed description will be appropriately omitted.
  • the pixel circuits 310i and 310j include a power supply control circuit 316.
  • the power supply control circuit 316 includes a fourth transistor 324, a fifth transistor 25, a seventh transistor 327, and a second capacitor 32. These three transistors are all n-type transistors.
  • the fourth transistor 324 is a main electrode connected between the power supply line 4 and the inverter 20.
  • the seventh transistor 327 has a main electrode connected between a connection node N between the fourth transistor 324 and the inverter 20 and the ground line 5.
  • the control electrode of the seventh transistor 327, together with the control electrode of the fifth transistor 25, is connected to the second scanning line 54 in an adjacent row.
  • the main electrode of the fifth transistor 25 is connected between the power supply control signal line 42 and the control electrode of the fourth transistor 324 as in the other embodiments described above.
  • the second capacitor 32 is connected between the fourth transistor 324 and the connection node N.
  • the size of the transistor can be reduced.
  • one n-type transistor is added.
  • the occupied area can be reduced as compared with the case where a p-type transistor is used, and an improvement in yield is expected.
  • FIG. 11 is a circuit diagram illustrating a part of the image display device according to the present embodiment.
  • the image display device includes a plurality of pixel circuits 410i and 410j.
  • the plurality of pixel circuits 410i and 410j are connected to the scanning line 454 for each row.
  • the scanning line 454 extends from the scanning circuit 450 in the row direction.
  • the plurality of pixel circuits 410i and 410j are connected to the power control signal line 42 for each column.
  • the plurality of pixel circuits 410i and 410j are connected to the digital image signal line 444 for each column.
  • the power control signal line 42 and the digital image signal line 444 extend in the column direction.
  • the plurality of pixel circuits 410i and 410j each include the power supply control circuit 16.
  • the power supply control circuit 16 is the same as in the other embodiments described above. That is, the power supply control circuit 16 writes the voltage value of the power supply control signal supplied from the scanning circuit 450 according to the timing of the scanning signal of the adjacent row.
  • the power supply control circuit 16 supplies a drive current having a current value set based on the written voltage value to the light emitting element 12 via the drive transistor 428.
  • the other part of the plurality of pixel circuits 410i and 410j is a digital image PWM circuit.
  • the digital image PWM circuit includes a driving transistor 428, a selection transistor 429, and a capacitor (first capacitance element) 431.
  • the driving transistor 428 is connected between the power supply control circuit 16 and the light emitting element 12 at a main electrode.
  • the selection transistor 429 is a main electrode connected between the digital image signal line 444 and the control electrode of the driving transistor 428.
  • the capacitor 431 is connected between the power supply line 4 and the control electrode of the drive transistor 428.
  • a pixel circuit employing a digital image PWM circuit performs image display control based on image data of one frame of screen image data of a plurality of, for example, eight subfield screens.
  • one frame of image data is divided and distributed for each luminance, and the digital image PWM circuit reproduces the luminance of one frame depending on which of the eight subfield screens is selected. I do.
  • the digital image signal data supplied to each of the pixel circuits 410i and 410j via the digital image signal line 444 is set to "1" or "0" according to the selected subfield.
  • the selection transistor 429 is selected by the scanning signal, and writes the value of the digital image signal line 444 at that time to the capacitor 431.
  • the drive transistor 428 supplies a drive current set by the power supply control circuit 16 to the light emitting element 12.
  • the driving transistor 428 is off, and no current is supplied to the light emitting element 12.
  • the image display device can achieve high definition.
  • the circuit configuration can be simplified. Therefore, the yield of the image display device is improved, and it is possible to contribute to cost reduction.
  • FIG. 12 is a circuit diagram illustrating a part of the image display device according to the present embodiment.
  • the configurations of the output stages of the analog PWM circuit and the power supply control circuit are different from those of the other embodiments described above.
  • the image display device of the present embodiment is the same as that of the above-described other embodiments. Therefore, the same components are denoted by the same reference numerals and detailed description thereof will not be repeated.
  • the pixel circuits 510i and 510j include an analog image PWM circuit 514 and a power supply control circuit 516.
  • the analog image PWM circuit (first circuit) 514 includes a sixth transistor 526.
  • the sixth transistor 526 has a main electrode connected between the power supply control circuit (second circuit) 516 and the light emitting element 12.
  • the control terminal of the sixth transistor 526 is connected to the output of the inverter 20.
  • the inverter 20 is connected between the power supply line 4 and the ground line 5, and no power supply control circuit is connected between the inverter 20 and the power supply line 4. That is, the sixth transistor 526 functions as an output buffer for the inverter 20.
  • the power supply control circuit 516 includes a fourth transistor 524.
  • the fourth transistor 524 is a main electrode connected between the power supply line 4 and the sixth transistor 526.
  • the fourth transistor 524 is a p-type transistor, and is connected to the fifth transistor 25 and the second capacitor 32 as in the other embodiments (the first embodiment and the like) described above.
  • the analog image signal can be prevented from being affected by the power control signal. Therefore, the accuracy of the gradation of the analog display set by the analog image PWM circuit 514 can be sufficiently increased.
  • FIG. 13 is a block diagram illustrating the image display device according to the present embodiment.
  • the image display device 601 of the present embodiment includes the substrate 2 and a plurality of pixel circuits 610, as in the other embodiments described above.
  • the image display device 601 further includes a triangular wave scanning circuit 660 and a reference signal selection circuit 662.
  • the image display device 601 according to the present embodiment is different from the above-described other embodiments in that a triangular wave scanning circuit 660 and a reference signal selection circuit 662 are provided.
  • the image display device 601 is otherwise the same as in the other embodiments described above, and therefore, the same components are denoted by the same reference numerals and detailed description thereof will not be repeated.
  • the triangular wave scanning circuit 660 is provided in the leftmost column of the leftmost column of the pixel circuits 610 arranged in a matrix. Note that, in this example, the scanning circuits 50 are provided in a column on the right side of the rightmost column of the pixel circuits 10 arranged in a matrix. The arrangement of the triangular wave scanning circuit 660 and the scanning circuit 50 may be reversed in this example.
  • the reference signal selection circuit (selection circuit) 662 is provided between the triangular wave scanning circuit 660 and the plurality of pixel circuits 610 arranged in a matrix.
  • the reference signal selection circuit 662 includes a selection unit 664 for each row of the pixel circuits 10.
  • the triangular-wave scanning circuit 660 has a triangular-wave scanning signal line 661 for each row of the pixel circuits 610, and the triangular-wave scanning signal line 661 is connected to the selection unit 664.
  • the selection unit 664 has a reference signal line 666 for each row of the pixel circuits 610.
  • the reference signal line 666 extends in the row direction.
  • the reference signal selection circuit 662 is connected to the reference triangular wave signal line 663a and the high voltage signal line 663b.
  • the reference triangular wave signal line 663a and the high voltage signal line 663b are connected to each selector 664.
  • a reference triangular wave signal is input to the reference triangular wave signal line 663a.
  • the reference triangular wave signal is, for example, the reference triangular wave signal At in the other embodiments described above, but is a signal having a symmetrical triangular wave having a frequency of one horizontal scanning period as described later.
  • a high voltage signal is input to the high voltage signal line 663b.
  • the high voltage signal is a DC voltage signal having a voltage value higher than the maximum voltage value of the reference triangular wave signal.
  • FIG. 14 is a circuit diagram illustrating a part of the image display device of the present embodiment.
  • the pixel circuits 610i and 610j have the same circuit configuration as the pixel circuits 510i and 510j in the above-described fifth embodiment.
  • the difference from the pixel circuits 510i and 510j is that the main electrodes of the second transistors 22 of the pixel circuits 610i and 610j are connected to the reference signal line 666.
  • the other points are the same as those of the fifth embodiment, the same components are denoted by the same reference numerals, and detailed description will be appropriately omitted.
  • the selection unit 664 includes two switches 664a and 664b and an inverter 664c.
  • One switch 664a is connected between the reference triangular wave signal line 663a and the reference signal line 666.
  • the other switch 664b is connected between the high voltage signal line 663b and the reference signal line 666.
  • the triangular wave scanning signal line 661 is connected to the control electrode of one switch 664a, and is connected to the control electrode of the other switch 664b via the inverter 664c.
  • the selection unit 664 selects the reference triangular wave signal when the triangular wave scanning signal supplied from the triangular wave scanning circuit 660 is at a high level, and supplies it to the pixel circuits 610i and 610j.
  • the selector 664 selects the high voltage signal when the triangular wave scanning signal is at a low level, and supplies the high voltage signal to the pixel circuits 610i and 610j.
  • the threshold value based on the voltage value of the analog image signal Ap written in the analog image PWM circuit 514 can be set in a range from the minimum voltage value to the maximum voltage value of the reference triangular wave signal At.
  • the voltage value of the high voltage signal Ah is set to a voltage value higher than the maximum voltage value of the reference triangular wave signal At.
  • the threshold value set based on the voltage value written to the analog image PWM circuit 514 and the reference triangular wave At, as described in the other embodiments described above. And the light emitting element 12 emits light when the threshold value exceeds the voltage value of the reference triangular wave At.
  • the threshold value based on the voltage value written to the analog image PWM circuit 514 is always lower than the voltage value of the high voltage signal Ah. Therefore, in this case, the light emitting element 12 does not emit light.
  • the light emission of the light emitting element 12 is forcibly stopped in a specific row, that is, in a specific horizontal scanning period, by the triangular wave scanning signal output from the triangular wave scanning circuit 660.
  • the luminous efficiency of the light emitting element of the image display device is set to an optimum value.
  • FIGS. 15 and 16 are examples of timing charts for explaining the operation of the image display device according to the present embodiment.
  • FIG. 15 is a timing chart showing a period during which the voltage value of the power control signal Ac is written to the power control circuit 516 and a period during which the voltage value of the analog image signal Ap is written to the analog image PWM circuit 514. From the figure to the fifth-stage figure, it is the same as the case of FIG.
  • the sixth and seventh stages in FIG. 15 show changes over time in the input voltage and the output voltage of the inverter 20, and different voltage values from those in FIG. 4 are written.
  • the eighth diagram in FIG. 15 shows the time change of the voltage of the anode electrode of the light emitting element 12.
  • the ninth diagram in FIG. 15 shows a time change of the reference signal A0 output from the reference signal line 666.
  • the lowermost diagram in FIG. 15 illustrates a time change of the first scanning signal Dj1 output from the first scanning line 52.
  • the voltage value of the power control signal Ac is supplied to the power control circuit 516 in the period from time t1 to t4, as in the other embodiments described above.
  • the voltage value of the analog image signal Ap is written to the analog image PWM circuit 514 during the writing period from time t4 to time t7.
  • the selector 664 selects the high-voltage signal line 663b during the entire period shown, and the reference signal A0 is It shows the voltage value of the voltage signal Ah.
  • the output voltage Vout of the inverter 20 of the pixel circuit 610j becomes high even if the first scanning signal Dj1 is at the high level.
  • the output voltage Vout of the inverter 20 of the pixel circuit 610j becomes high even if the first scanning signal Dj1 is at the high level.
  • no voltage higher than the threshold value is applied to the anode electrode of the light emitting element 12, and light emission of the light emitting element 12 is prohibited.
  • FIG. 16 shows a timing chart of a period including a plurality of horizontal scanning periods.
  • Times tA to tB, tB to tC, tC to tF, tF to tG, tG to tH, tH to tI, tI to tL, and tL to tM are horizontal scanning periods, respectively.
  • FIG. 16 shows a total of eight horizontal scanning periods. The scanning period is described.
  • the upper part of FIG. 16 shows a time change of the input voltage Vin of the inverter 20 and the anode voltage VA of the light emitting element 12.
  • This figure also shows the inverted intermediate voltage VthM of the inverter 20, and this inverted intermediate voltage is the threshold voltage of the analog image PWM circuit 514 written by the analog image signal Ap.
  • the lower diagram of FIG. 16 illustrates the relationship between the reference signal A0 and the analog image signal voltage VpM written in the analog image PWM circuit 514.
  • the selection unit 664 selects the high voltage signal Ah. Therefore, the light emission of the light emitting element 12 is prohibited regardless of the voltage value written to the analog image PWM circuit 514.
  • the light emitting element 12 emits light at a timing (period from time tD to tE) based on the voltage value written to the analog image PWM circuit 514.
  • the current supplied to the light emitting element 12 in this period is set based on the voltage value written to the power supply control circuit 516.
  • the cycle of the symmetric triangular wave signal is one horizontal scanning period.
  • the frequency of the triangular wave signal is not limited to one horizontal scanning period, and may be a natural number multiple of the horizontal scanning period.
  • the light emitting element 12 emits light similarly to the period from time tC to tF, and during the period from time tL to tM, the light emission of the light emitting element 12 is inhibited as in the period from time tA to tC. ing.
  • the threshold voltage to be compared with the reference signal A0 is assumed to be constant. However, in a normal operation of the image display device, it can be rewritten to a different voltage value for each vertical scanning period, for example. . Further, the voltage value written in the power supply control circuit can be rewritten, for example, every vertical scanning period. Therefore, it is needless to say that the light emitting period within one horizontal scanning period is modulated at the time of such rewriting.
  • light emission prohibition for three horizontal scanning periods and light emission of the light emitting element 12 for one horizontal scanning period are alternately switched.
  • light emission of the light emitting element 12 and light emission prohibition are switched at an arbitrary timing. You may.
  • light emission of the light emitting element 12 may be permitted every two horizontal scanning periods, and the light emitting element 12 may emit light every other row.
  • the image display device 601 according to the present embodiment includes a triangular wave scanning circuit 660 and a reference signal selection circuit 662.
  • the reference signal selection circuit 662 can switch between the reference triangular wave signal At and the high voltage signal Ah based on the triangular wave scanning signal from the triangular wave scanning circuit 660 and supply the signal to each pixel circuit 610. Therefore, light emission and light emission inhibition of the light emitting element 12 of each pixel circuit 610 can be selectively set for each horizontal scanning period or every vertical scanning period according to the triangular wave scanning signal.
  • FIG. 17 is a graph illustrating characteristics of the light emitting element.
  • FIG. 17 shows a graph of a luminous efficiency characteristic example of an inorganic semiconductor light emitting element as a light emitting element.
  • the horizontal axis of the graph is the forward current IF [A] flowing through the light emitting element, and is a logarithmic axis.
  • the vertical axis of the graph indicates the luminous efficiency K [lm / W].
  • the inorganic semiconductor light emitting element has a maximum value Kmax of the luminous efficiency with respect to the forward current IF. That is, there is an optimum value Iopt of the forward current IF when the luminous efficiency reaches the maximum value Kmax, and by controlling the light emitting elements constituting the image display device with the optimum value Iopt, the light emission power of the image display device is optimized. can do.
  • the luminance may be too high.
  • the optimum value Iopt generally takes a value of about 1 to 100 ⁇ A.
  • the maximum luminance of a panel suitable for the image display device is 1000 cd / m 2 or less. Accordingly, when this current value is applied to these panels for mobile use, the luminance becomes several times to several hundred times the appropriate luminance, and the luminance is excessively high.
  • the image display device 601 of the present embodiment power consumption can be optimized while suppressing the luminance of the panel by selectively inhibiting light emission of the light emitting element 12 for each horizontal scanning period. If the horizontal scanning period for emitting light is provided uniformly over time as in this embodiment, a plurality of rows of emitting light are scanned evenly and sequentially in the screen, so that the in-plane emission luminance at any instant becomes uniform. This has the advantage that flicker can be prevented. Further, when the horizontal scanning period for emitting light is provided continuously, a plurality of rows of emitting light are scanned in a block in a screen, so that a display with a high moving image resolution like a cathode ray tube (CRT) can be realized.
  • CTR cathode ray tube
  • FIG. 18 is a circuit diagram illustrating a part of an image display device according to a modification of the sixth embodiment.
  • the power supply control circuit may be provided on the high potential side or the low potential side of the analog image PWM circuit.
  • the pixel circuits 710i and 710j include an analog image PWM circuit 714 and a power supply control circuit 716 connected in series between the power supply line 4 and the ground line 5.
  • the power supply control circuit (second circuit) 716 is connected to a lower potential side than the analog image PWM circuit (first circuit) 714.
  • the output of the inverter 20 of the analog image PWM circuit is connected to the control terminal of the sixth transistor 726.
  • the sixth transistor 726 is connected between the light emitting element 12 and the fourth transistor 724 of the power supply control circuit 716.
  • the control terminal of the fourth transistor 724 is connected to one main electrode of the fifth transistor 25.
  • the second capacitor 32 is connected between the control electrode of the fourth transistor 724 and the ground line 5.
  • connection position between the power supply control circuit and the analog image PWM circuit can be selected according to the convenience in circuit arrangement and the like.
  • 1,601 image display device 2 substrate, 4 power line, 5 ground line, 10, 10i, 10j, 110, 210a, 210b, 310i, 310j, 410i, 410j, 510i, 510j, 610i, 610j, 710i, 710j pixel Circuit, 12, 12a, 12b ⁇ light emitting element, 14, 14a, 14b, 114, 514, 714 ⁇ analog image PWM circuit, 16, 16a, 16b, 116, 516, 716 ⁇ power control circuit, 20 ⁇ inverter, 21-25 first transistor To fifth transistor, 31 first capacitor, 32 second capacitor, 40 power control signal / analog image signal drive circuit, 42 power control signal line, 44 analog image signal line, 46 reference triangular wave signal line, 48 storage unit, 50 scan Circuit, 51 inverter, 52 1 scan line, 54 second scan line, 324, 524, 724 fourth transistor, 327 seventh transistor, 428 drive transistor, 429 select transistor, 431 capacitor, 444 digital image signal line, 450 scan circuit, 4

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)
  • Liquid Crystal (AREA)
  • Measuring Pulse, Heart Rate, Blood Pressure Or Blood Flow (AREA)

Abstract

L'invention concerne, selon un mode de réalisation, un dispositif d'affichage d'image comportant une pluralité de circuits de pixels dans lesquels sont disposées en matrice une première ligne d'alimentation électrique à laquelle une tension continue est appliquée, et une seconde ligne d'alimentation électrique réglée sur un potentiel inférieur à celui de la première ligne d'alimentation électrique. Chacun de la pluralité de circuits de pixels comprend un élément électroluminescent, et un premier circuit connecté à l'élément électroluminescent, qui définit, sur la base du résultat de la comparaison d'un premier signal comprenant un signal d'onde triangulaire avec une première tension continue réglée dans un délai prescrit, une largeur temporelle dans laquelle un courant est fourni à l'élément électroluminescent. Au moins certains de la pluralité de circuits de pixels sont connectés en série au premier circuit, et comprennent un second circuit pour régler l'intensité du courant fournie au premier circuit sur la base d'une seconde tension continue réglée dans un délai différent du délai prescrit.
PCT/JP2019/029784 2018-07-31 2019-07-30 Dispositif d'affichage d'image WO2020027107A1 (fr)

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US20220358876A1 (en) 2022-11-10
US11430381B2 (en) 2022-08-30
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US11107394B2 (en) 2021-08-31
US11763735B2 (en) 2023-09-19
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US20230377514A1 (en) 2023-11-23
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US10885834B2 (en) 2021-01-05
US20210366373A1 (en) 2021-11-25

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