WO2020007117A1 - 显示基板及其制作方法和显示面板 - Google Patents
显示基板及其制作方法和显示面板 Download PDFInfo
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- WO2020007117A1 WO2020007117A1 PCT/CN2019/085901 CN2019085901W WO2020007117A1 WO 2020007117 A1 WO2020007117 A1 WO 2020007117A1 CN 2019085901 W CN2019085901 W CN 2019085901W WO 2020007117 A1 WO2020007117 A1 WO 2020007117A1
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Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/122—Pixel-defining structures or layers, e.g. banks
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/301—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements flexible foldable or roll-able electronic displays, e.g. thin LCD, OLED
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/126—Shielding, e.g. light-blocking means over the TFTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/17—Passive-matrix OLED displays
- H10K59/173—Passive-matrix OLED displays comprising banks or shadow masks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/40—Thermal treatment, e.g. annealing in the presence of a solvent vapour
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/20—Changing the shape of the active layer in the devices, e.g. patterning
Definitions
- the present application relates to the field of display technology, and in particular, to a display substrate, a manufacturing method thereof, and a display panel.
- OLED display panels have the advantages of thin thickness, self-luminous performance, low power consumption, and good flexibility, and have been considered as the most promising flat-panel display devices.
- the effective display area and thickness of OLED display panels are increasingly demanding.
- the strength of the display panel decreases, especially when the flexible OLED display panel is subjected to multiple bending / curling processes and when subjected to a drop impact.
- the area cannot be displayed in full color, and black spots, bright spots, and colorful spots are prone to display defects.
- the present application provides a display substrate, including:
- the display substrate further includes at least one groove formed in the pixel definition layer, and each of the grooves is disposed around one of the plurality of sub-pixel regions.
- At least one of the grooves is provided around each of the sub-pixel regions.
- a plurality of the grooves are provided around each of the sub-pixel regions.
- 2 to 5 grooves are provided around each of the sub-pixel regions.
- each of the grooves includes a plurality of sub-grooves intermittently disposed along a circumferential direction of the sub-pixel region.
- a width of each of the grooves is 2 ⁇ m to 10 ⁇ m.
- the groove penetrates the pixel definition layer in a direction perpendicular to the array substrate.
- a material of the pixel definition layer includes an organic material and is doped with an inorganic material.
- the display substrate further includes a light shielding portion disposed in the groove.
- the light shielding portion is disposed in a part of the groove.
- the light shielding portion is a cathode material or a color resist material.
- a plurality of the grooves are provided around each pixel area, and the light shielding portion is formed only in the other two grooves with the grooves spaced between them.
- a cross-sectional size of the groove gradually decreases toward the base substrate.
- the present application also provides a method for manufacturing a display substrate, including:
- each of the grooves is disposed around one of the plurality of sub-pixel regions.
- patterning the pixel definition layer to form at least one groove includes:
- the groove is formed by exposing the pixel defining layer through a mask and then developing the pixel defining layer.
- the method further includes:
- a light shielding portion is formed in the groove.
- the pixel definition layer is a polyimide-based material layer; the pixel definition layer is formed by curing;
- the curing time of the pixel definition layer is 30 minutes to 60 minutes;
- the curing temperature of the pixel definition layer is 230 ° C to 270 ° C.
- a groove is formed in the pixel definition layer around the sub-pixel area.
- the impact force is transmitted to the pixel definition layer, and the pixel definition layer expands in the direction of extension.
- the groove is arranged around the sub-pixel area, similar to a wall-like structure, which can release stress and reduce the expansion of the pixel definition layer, thereby effectively preventing the pixel definition layer from squeezing the OLED device and causing it to fail.
- the setting of the groove can further improve the flexibility of the flexible display panel. In this way, the bending strength and the resistance to drop impact of the display panel are improved.
- the present application also provides a display panel including a display substrate, an organic light emitting unit, and a packaging layer;
- the display substrate includes:
- a pixel definition layer is formed on the array substrate, and the pixel definition layer defines a plurality of sub-pixel regions; the display substrate further includes at least one groove formed in the pixel definition layer, each of the grooves surrounding Setting a sub-pixel region among the plurality of sub-pixel regions;
- the organic light emitting unit is formed in the sub-pixel region, and the encapsulation layer is formed on a side of the organic light emitting unit facing away from the array substrate.
- the number of the grooves around the sub-pixel area located in the middle of the effective display area of the display panel is greater than the number of the sub-pixel areas located near the frame of the effective display area of the display panel.
- the number of surrounding grooves is greater than the number of the sub-pixel areas located near the frame of the effective display area of the display panel.
- a groove is formed around the sub-pixel area in the pixel definition layer.
- the impact force is transmitted to the pixel definition layer, and the pixel definition layer expands in its extending direction.
- the groove is arranged around the sub-pixel area, similar to a wall-like structure, which can release stress and reduce the expansion of the pixel definition layer, thereby effectively preventing the pixel definition layer from squeezing the OLED device and causing its failure.
- the setting of the groove can further improve the flexibility of the flexible display panel. In this way, the bending strength and the resistance to drop impact of the display panel are improved.
- FIG. 1 is a schematic structural diagram of a display substrate according to an embodiment of the present application.
- FIG. 2 is a schematic structural view of the display substrate shown in FIG. 1 from another perspective;
- FIG. 3 is a schematic structural diagram of a display substrate in another embodiment of the present application.
- FIG. 4 is a flowchart of a method for manufacturing a display substrate according to an embodiment of the present application.
- OLED display panel technology With the rapid development of OLED display panel technology, it has the characteristics of being flexible and having good flexibility and is widely used. However, due to its structure and materials, the flexural strength and the resistance to drop impact of OLED display panels are not high.
- a buffer layer is usually provided on the side far from the light-emitting side of the screen body, for example, an optical transparent glue is filled between the display panel and the cover plate.
- an optical transparent glue is filled between the display panel and the cover plate.
- an element such as a layer, film, or substrate is referred to as being “on” another element, it can be directly on the other element or intervening elements may also be present.
- a layer when a layer is referred to as being “under” another layer, it can be directly underneath, or one or more intervening layers may also be present. It is also understood that when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present.
- Array substrate refers to a thin-film transistor (TFT) array substrate refers to a base substrate (for example, a substrate made of a PI material) on which at least a TFT array and an anode are formed.
- TFT thin-film transistor
- the display panel provided in the embodiment of the present application is mainly applied to a full-screen or borderless display panel, and of course, it can also be applied to a display panel with a border or a narrow border.
- FIG. 1 shows a schematic structural diagram of a display substrate in an embodiment of the present application
- FIG. 2 shows a schematic structural diagram of the display substrate shown in FIG. 1 from another perspective.
- the drawings only show structures related to the embodiments of the present application.
- a display panel provided in an embodiment of the present application includes a display substrate 10, an organic light emitting unit, a cathode, and a packaging layer.
- the display substrate 10 includes an array substrate 12 and a pixel definition layer 14.
- the array substrate 12 includes a base substrate (for example, formed of a PI material), a thin film transistor (not shown) provided on the base substrate, and an anode provided on the thin film transistor.
- the array substrate 12 may further include film layers such as a planarization layer and a passivation layer, which is not limited herein.
- the array substrate 12 has a plurality of sub-pixel regions 11, which can be divided into a first sub-pixel region 11 that emits red light, a second sub-pixel region 11 that emits blue light, and a third sub-pixel that emits green light. Region 11, a group of first subpixel region 11, second subpixel region 11 and third subpixel region 11 may constitute one pixel region.
- the anode, that is, the pixel electrode is formed on the planarization layer and corresponds to the corresponding sub-pixel region 11 one-to-one.
- each pixel region may also include other sub-pixel regions 11, which is not limited herein.
- it may further include a fourth sub-pixel region 11 that emits white light.
- the pixel definition layer 14 is formed on the array substrate 12 and exposes at least a part of each pixel electrode.
- the pixel definition layer 14 may cover at least a portion of an edge of each pixel electrode, thereby exposing at least a portion of each pixel electrode.
- the pixel-defining layer 14 may be formed with a plurality of pixel-defining openings 18, and a middle part or all of the pixel electrodes are exposed through the pixel-defining openings 18. That is, the sub-pixel region 11 may be defined by corresponding pixel definition openings 18, and then a plurality of sub-pixels are defined.
- the pixel electrode may be formed on the planarization layer, and the pixel definition layer 14 may also be formed on the planarization layer.
- the height of the planarization layer to the upper surface of the pixel definition layer 14 is greater than the height of the planarization layer to the upper surface of the pixel electrode.
- the pixel definition layer 14 may cover at least a part of an edge of each pixel electrode to form a plurality of pixel definition openings 18, and an organic light emitting material is filled in the pixel definition openings 18.
- the pixel definition layer 14 can increase the distance between the end of each pixel electrode and the opposite electrode (for example, the cathode) formed on each pixel electrode, and can prevent anti-reflection from occurring at the end of the pixel electrode.
- a common material of the pixel definition layer 14 mainly includes organic materials, for example, organic materials such as polyimide, polyamide, styrene-cyclobutene, acrylic resin, or phenol resin.
- the pixel defining layer 14 may also be doped with an inorganic material, such as tin oxide, silicon nitride, and / or tin oxynitride.
- the packaging layer may be in contact with the pixel definition layer 14. Therefore, the doped inorganic material in the pixel definition layer 14 can increase its bonding force with the inorganic material layer below the packaging layer, thereby avoiding it to a certain extent. For example, the peeling of the cathode improves the reliability of the display panel.
- the organic light emitting unit includes at least an organic light emitting material layer.
- the organic light-emitting unit may have a multilayer structure, for example, in addition to the organic light-emitting material layer, it may further include an electron transport layer and a hole transport layer that balance electrons and holes, and for enhancing electrons and holes The injected electron injection layer and hole injection layer.
- the cathode is formed on the side of the organic light emitting unit facing away from the array substrate 12. In some embodiments, the cathode covers the entire layer of the display substrate 10, that is, the cathode covers the pixel definition layer 14 and fills the pixel definition formed by the pixel definition layer 14. The mouth is connected with the organic light emitting unit.
- the packaging layer is disposed on a side of the organic light emitting unit facing away from the array substrate 12. Since the organic light emitting material layer is very sensitive to external environments such as water vapor and oxygen, if the organic light emitting material layer in the display panel is exposed to an environment with water vapor or oxygen, the performance of the display panel may be drastically reduced or completely damaged.
- the encapsulation layer can block air and water vapor for the organic light emitting unit, thereby ensuring the reliability of the display panel.
- the encapsulation layer may have one or more layers, may be an organic film layer or an inorganic film layer, or may be a laminated structure of an organic film layer and an inorganic film layer.
- the encapsulation layer may include two inorganic film layers and one organic film layer between the two inorganic film layers.
- the display substrate 10 in the embodiment of the present application further includes at least one groove 16 formed in the pixel definition layer 14.
- Each of the grooves 16 is provided around one of the plurality of sub-pixel regions 11.
- the packaging layer When the display panel is repeatedly bent or subjected to drop impact, the packaging layer will bend downward along the direction of the force, and the bending force or impact force is transmitted to the film layers such as the support layer, the cathode, and the pixel definition layer 14. From the perspective of the existing pixel arrangement structure and form on the display substrate 10, the factors occupying the space of the display substrate 10, in addition to the organic light emitting unit, the pixel definition layer 14 occupies the most space.
- the pixel definition layer 14 is mainly made of an organic material, for example, polyimide, polyamide, benzocyclobutene, acrylic resin, or phenolic resin, etc.
- the stress is mainly concentrated in the pixel definition layer 14 and cannot be dispersed and This causes the pixel definition layer 14 to swell, which in turn squeezes the OLED device, causing the OLED device to fail.
- a recess 16 is formed in the pixel definition layer 14 around the sub-pixel area 11.
- the impact force is transmitted to the pixel definition layer 14, and the pixel definition layer 14 expands in its extending direction.
- the groove 16 is provided around the sub-pixel region 11 and is similar to a wall-like structure, which can release stress and reduce the expansion of the pixel definition layer 14, thereby effectively preventing the pixel definition layer 14 from squeezing the OLED device and causing it to fail.
- the arrangement of the recess 16 can further improve the flexibility of the flexible display panel.
- the cathode may be filled in the groove 16 or not filled in the cathode when the cathode is subsequently deposited.
- the cathode may be filled in the groove 16 or not filled in the cathode when the cathode is subsequently deposited.
- the faster the cathode is deposited the better.
- one or more of the foregoing grooves 16 may be provided around each of the sub-pixel regions 11; in other embodiments, one or more of the foregoing grooves may be provided only around a part of the sub-pixel regions 11.
- the groove 16 is not limited herein. Among them, multiple means two or more.
- the number of the grooves 16 surrounding each of the sub-pixel regions 11 may be the same or different, which is not limited herein. Taking a drop impact as an example, in a drop impact test, a falling ball easily hits the middle position of the effective display area of the display panel, and the number of grooves 16 around the sub-pixel area 11 located at the middle position of the effective display area is large, and the effective The number of the grooves 16 around the sub-pixel region 11 of the display region close to the frame region can be appropriately reduced. Taking multiple bendings as an example, the number of the grooves 16 around the sub-pixel region 11 in the curved region is large, and the number of the grooves 16 around the sub-pixel region 11 in the non-curved region can be appropriately reduced.
- Each groove 16 is provided around a sub-pixel area 11, and the groove 16 may be a continuously formed groove 16 or may include a plurality of sub-grooves intermittently arranged along the circumferential direction of the sub-pixel area 11, so as to reduce the number of pixels. It is sufficient to define the purpose of the layer 14 to withstand the expansion caused by the impact, which is not limited herein.
- a plurality of grooves 16 surrounding the sub-pixel region 11 are provided, and adjacent grooves 16 are disposed at intervals from each other.
- the number of the grooves 16 increases, the patterning process becomes more difficult, the stiffness of the pixel definition layer 14 decreases, and the strength of withstanding a drop impact decreases.
- the number of the grooves 16 is increased to a certain extent, and the falling height of the falling ball exceeds 10 cm, the display panel is still extremely vulnerable to damage.
- the number of the grooves 16 surrounding one of the plurality of sub-pixel regions 11 is two to five, the rigidity of the pixel definition layer 14 is not greatly affected, and the expansion rate is reduced, which effectively avoids the pixel definition layer 14 Squeezing an OLED device causes it to fail, thereby improving the bending strength of the display panel and the strength to withstand drop impact.
- the number of the grooves 16 surrounding each sub-pixel region 11 is three. In this way, processing is convenient, and the expansion rate of the pixel definition layer 14 is reduced on the premise of ensuring the rigidity of the pixel definition layer 14.
- the width of the groove 16 is 2 ⁇ m to 10 ⁇ m to achieve the foregoing effects.
- the groove 16 penetrates the pixel definition layer 14 in a direction perpendicular to the array substrate 12. After the packaging layer is subjected to a drop impact, it will bend downward along the direction of the force, and then transmit the bending or impact force downward. The expansion of the lower layer of the pixel definition layer 14 has a greater impact on the OLED device. Therefore, as a preferred embodiment, the groove 16 should pass through the pixel definition layer 14, or the depth of the groove 16 is slightly smaller than the pixel definition layer 14 to reduce the damage caused by the pixel definition layer 14 expanding and squeezing the OLED device.
- FIG. 3 is a schematic structural diagram of a display substrate in another embodiment of the present application.
- the display substrate 10 further includes a light shielding portion 19 located in the groove 16.
- a light shielding portion 19 located in the groove 16.
- the light shielding portion 19 may be provided in each groove 16, or may be provided only in a part of the groove 16, which is not limited herein. Due to the limitation of the expansion performance of the material of the light-shielding portion 19, if the light-shielding portion 19 is provided in each groove 16, the force-expansion property of the pixel definition layer 14 may be affected. Therefore, for flexible display panels, In a preferred embodiment, the light-shielding portion 19 exists in a part of the recess 16. For example, in some embodiments, a plurality of grooves 16 are provided around each pixel region, and the light shielding portion 19 is formed only in the two grooves 16 with the grooves 16 spaced between them. Specifically, for example, in a sub-pixel region 11 as a reference, the light shielding portion 19 is formed in the groove 16 of the first circle and the groove 16 of the third circle from the inside to the outside.
- the light-shielding portion 19 may be a cathode material. That is, when the cathode layer is deposited on a side of the organic light-emitting unit facing away from the array substrate 12, the light-shielding portion 19 is deposited in the groove 16 at the same time.
- the light shielding portion 19 may also be a color resist material, such as a red light resist material, a blue light resist material, and a green light resist material.
- the material of the light shielding portion 19 should be a material with a relatively low force expansion ratio, and the thickness of the light shielding portion 19 is the same as or less than the thickness of the organic light emitting unit. Both.
- the cross-sectional size of the groove 16 gradually decreases toward the substrate substrate.
- the cross-sectional shape of the groove 16 is an inverted trapezoid, and the cross-sectional size of the groove 16 gradually decreases from the upper end to the lower end. In this way, reducing the expansion of the lower layer of the pixel definition layer 14 has a greater impact on the OLED device, and further improves the bending strength of the display panel and the resistance to drop impact.
- the aforementioned recesses 16 are formed in the pixel definition layer 14 and can be obtained by patterning the pixel definition layer 14 using a patterning process.
- the recesses 16 may be formed by exposing a mask and then developing the pixel definition layer 14; of course, in other embodiments, the recesses 16 may also be formed by dry etching. Compared with the dry etching process, the halftone process using a mask exposure and development process is simple and the depth of the groove 16 is easier to control.
- the pixel definition layer 14 is mainly formed of an organic material, so it needs to be cured after the patterning process is completed. Due to the arrangement of the recesses 16, the cured pixel definition layer 14 has a lower expansion rate than the pixel definition layer 14 of the recesses 16 that are not provided. In this way, the pixel definition layer 14 is also effectively prevented from squeezing the OLED device after being subjected to the impact force, which causes its failure.
- the embodiment of the present application further provides a method for manufacturing the display substrate 10.
- FIG. 4 shows a flowchart of a method for manufacturing a display substrate 10 in an embodiment of the present application
- a method for manufacturing a display substrate 10 in an embodiment of the present application includes:
- Step S110 Provide an array substrate 12.
- the array substrate 12 includes a base substrate, a thin film transistor, and an anode provided on the thin film transistor.
- a base substrate is formed on a carrier substrate.
- the base substrate is a flexible substrate, and is optionally formed of an organic polymer, silicon nitride, and silicon oxide.
- the organic polymer may be a polyimide substrate, a polyamide substrate, a polycarbonate substrate, or a polyphenylene sulfone.
- the base substrate can be obtained by coating a polyimide glue solution on a carrier substrate and then curing the polyimide.
- the thin film transistor is formed on a base substrate.
- another layer such as a buffer layer may be formed on the base substrate before the thin film transistor is formed.
- the buffer layer may be formed on the entire surface of the base substrate, or may be formed by patterning.
- the buffer layer may have a suitable material among materials such as PET, PEN polyacrylate, and / or polyimide, and form a layered structure in the form of a single layer or a multilayer stack.
- the buffer layer may also be formed of silicon oxide or silicon nitride, or may include a composite layer of an organic material layer and / or an inorganic material.
- the thin film transistor can control the emission of each sub-pixel, or can control the amount of emission when each sub-pixel emits.
- the thin film transistor may include a semiconductor layer, a gate electrode, a source electrode, and a drain electrode.
- the semiconductor layer may be formed of an amorphous silicon layer, a metal oxide or a polysilicon layer, or may be formed of an organic semiconductor material.
- the semiconductor layer includes a channel region and a source region and a drain region doped with a dopant.
- the semiconductor layer may be covered with a gate insulating layer, and the gate electrode may be disposed on the gate insulating layer.
- the gate insulating layer may cover the entire surface of the base substrate.
- the gate insulating layer may be formed by patterning. Considering the adhesion to adjacent layers, the formability of the stacked target layer, and the surface flatness, the gate insulating layer may be formed of silicon oxide, silicon nitride, or other insulating organic or inorganic materials.
- the gate electrode may be covered by an interlayer insulating layer formed of silicon oxide, silicon nitride, and / or other suitable insulating organic or inorganic materials. A part of the gate insulating layer and the interlayer insulating layer may be removed, and a contact hole may be formed after the removal to expose a predetermined region of the semiconductor layer.
- the source electrode and the drain electrode may contact the semiconductor layer via a contact hole.
- the thin film transistor Since the thin film transistor has a complex layer structure, its top surface may not be flat.
- the thin film transistor further includes a planarization layer to form a sufficiently flat top surface. After the planarization layer is formed, a via hole may be formed in the planarization layer to expose a source electrode and a drain electrode of the thin film transistor.
- the anode is a pixel electrode.
- the pixel electrode includes a sub-pixel electrode corresponding to the sub-pixel region 11.
- a plurality of sub-pixel electrodes are formed on the planarization layer. It is easy to understand that a plurality of sub-pixel electrodes are electrically connected to the thin film transistor through the aforementioned through holes.
- S120 forming a pixel definition layer 14 on the array substrate 12 and patterning the pixel definition layer 14 to form at least one groove 16; each groove 16 is disposed around one of the sub-pixel regions 11 of the plurality of sub-pixel regions 11.
- the pixel definition layer 14 may be formed of an organic material, for example, polyimide, polyamide, propylene cyclobutene, acrylic resin, phenol resin, or the like.
- the pixel definition layer 14 may also be doped with an inorganic material, such as tin oxide, silicon nitride, and / or tin oxynitride.
- the patterning process is used to pattern the pixel definition layer 14 to obtain the recesses 16, for example, in some embodiments, the pixel definition layer 14 may be exposed through a mask and then developed to form the recesses 16. In other embodiments, the recesses 16 may be formed. The etching process forms the groove 16. It can be understood that the patterning process may also take other forms, including but not limited to the two forms described above.
- a recess 16 is formed in the pixel definition layer 14 around the sub-pixel area 11.
- the impact force is transmitted to the pixel definition layer 14, and the pixel definition layer 14 expands in its extending direction.
- the groove 16 is provided around the sub-pixel region 11 and is similar to a wall-like structure, which can release stress and reduce the expansion of the pixel definition layer 14, thereby effectively preventing the pixel definition layer 14 from squeezing the OLED device and causing it to fail.
- the arrangement of the recess 16 can further improve the flexibility of the flexible display panel.
- the pixel definition layer 14 is a polyimide-based material layer and is formed by curing.
- the curing time of the pixel definition layer 14 is 30 minutes to 60 minutes.
- the curing temperature of the pixel definition layer 14 is 230 ° C to 270 ° C.
- the pixel definition layer 14 is mainly formed of an organic material. Under different temperature conditions and different curing times, the expansion coefficient of the organic material after curing is different.
- the packaging layer When the display panel is repeatedly bent or subjected to drop impact, the packaging layer will bend downward along the direction of the force, and then the bending force or impact force will be transmitted to the pixel definition layer 14, which has a good strength and expansion rate. The lower the risk of damage to the OLED device due to its compression.
- the curing temperature of the pixel definition layer 14 is 230 ° C to 270 ° C and the curing time is 30 minutes to 60 minutes, the pixel definition layer 14 can be cured to have better mechanical strength and lower expansion rate, thereby effectively avoiding pixels
- the definition layer 14 squeezes the OLED device and causes it to fail.
- the pixel definition layer 14 may also be doped with an inorganic material, such as tin oxide, silicon nitride, and / or tin oxynitride, or doped with some nano-sized inorganic particles.
- an inorganic material such as tin oxide, silicon nitride, and / or tin oxynitride, or doped with some nano-sized inorganic particles.
- the expansion coefficient of the pixel definition layer 14 can be reduced, and on the other hand, the bonding force between the pixel definition layer 14 and the inorganic material layer below the encapsulation layer can be increased, thereby avoiding, for example, the peeling of the cathode to a certain extent, and improving the reliability of the display panel.
- Inorganic materials can cause volume expansion or contraction during heating and cooling. Among them, if the surface activity of the atoms is poor, a relatively loose structure will eventually be formed.
- the activation energy of the atoms will increase. Structural defects also occur. Therefore, there may be a large number of structural defects (such as vacancies, vacancy groups, etc.) in the pixel definition layer 14.
- the disordered layer formed by these structural defects becomes the origin of the tensile or compressive stress of the pixel definition layer 14. Due to the unstable structure of the disordered layer itself, if it is subsequently thermally activated (such as the transfer of kinetic energy from the deposited atoms and the release of condensation heat, etc.), the rearrangement of atoms will occur, and it will transition to a denser low-energy state structure. Produces lateral contraction.
- the curing time of the pixel definition layer 14 is 30 minutes to 60 minutes and the curing temperature is 230 ° C to 270 ° C, the formation of structural defects in the pixel definition layer 14 can be reduced, and the existence of residual stress can be reduced. In this way, the mechanical properties of the pixel definition layer 14 are further improved, the expansion rate of the pixel definition layer 14 is reduced, and the pixel definition layer 14 is effectively prevented from squeezing the OLED device and causing it to fail.
- the embodiments of the present application further provide a display device.
- the display device may be a display terminal, such as a tablet computer.
- the display device may also be mobile communication. Terminal, such as a mobile terminal.
- the display device includes a display panel and a control unit, and the control unit is configured to transmit a display signal to the display panel.
- a recess 16 is formed in the pixel definition layer 14 around the sub-pixel area 11.
- the impact force is transmitted to the pixel definition layer 14, and the pixel definition layer 14 expands in its extending direction.
- the groove 16 is provided around the sub-pixel region 11 and is similar to a wall-like structure, which can release stress and reduce the expansion of the pixel definition layer 14, thereby effectively preventing the pixel definition layer 14 from squeezing the OLED device and causing it to fail.
- the arrangement of the recess 16 can further improve the flexibility of the flexible display panel.
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Abstract
一种显示基板(10),包括阵列基板(12)及像素定义层(14),像素定义层(14)形成于所述阵列基板(12),所述像素定义层(14)界定若干子像素区域(11);所述显示基板(10)还包括至少一个形成于所述像素定义层(14)的凹槽(16),每一所述凹槽(16)围绕所述多个子像素区域(11)中的一个子像素区域(11)设置。在像素定义层(14)围绕子像素区域(11)形成凹槽(16),当显示面板承受跌落撞击时,撞击力传递至像素定义层(14),像素定义层(14)向其延展方向发生膨胀。凹槽(16)围绕子像素区域(11)设置,类似于围墙状结构,可起到释放应力的作用,减小像素定义层(14)的膨胀,从而有效避免像素定义层(14)挤压OLED器件而导致其失效。还提供一种显示基板的制作方法及显示面板。
Description
本申请涉及显示技术领域,特别是涉及一种显示基板及其制作方法和显示面板。
有机发光二极管(Organic Light-Emitting Diode,OLED)显示面板,具有厚度薄、自发光性能、功耗低、柔韧性好等优势,已被认为是最有发展潜力的平板显示器件。
为追求更佳的视觉体验及触感体验,对OLED显示面板的有效显示面积及厚度要求越来越高。但随着有效显示面积的增大及其厚度变薄,显示面板的强度随之降低,尤其是柔性OLED显示面板在多次弯曲/卷曲过程中,以及承受跌落撞击时,弯曲区域及被击中区域不能全彩显示,易出现黑斑、亮斑、彩斑等显示不良现象。
发明内容
基于此,有必要针对现有设计中的显示面板在弯曲和承受跌落撞击中易出现显示不良的问题,提供一种显示基板及其制作方法和显示面板。
本申请提供一种显示基板,包括:
阵列基板;
像素定义层,形成于所述阵列基板,所述像素定义层界定若干子像素区域;
所述显示基板还包括至少一个形成于所述像素定义层的凹槽,每一所述凹槽围绕所述多个子像素区域中的一个子像素区域设置。
可选地,在每一个所述子像素区域周围均围绕设置至少一个所述凹槽。
可选地,围绕每一所述子像素区域设置有多个所述凹槽。
可选地,围绕每一所述子像素区域设置有2~5个所述凹槽。
可选地,每一所述凹槽包括沿所述子像素区域周向间断设置的多个子凹槽。
可选地,每一所述凹槽的宽度为2μm~10μm。
可选地,所述凹槽在垂直于所述阵列基板的方向上贯穿所述像素定义层。
可选地,所述像素定义层的材料包括有机材料,并掺杂有无机材料。
可选地,所述显示基板还包括设置于所述凹槽中的遮光部。
可选地,所述遮光部设置于部分所述凹槽中。
可选地,所述遮光部为阴极材料或色阻材料。
可选地,环绕每一像素区域设置有多个所述凹槽,所述遮光部仅形成于之间间隔有凹槽的另两个凹槽内。
可选地,沿垂直于所述阵列基板的方向,所述凹槽的截面尺寸随着朝向所述衬底基板逐渐减小。
本申请还提供一种显示基板的制作方法,包括:
提供一阵列基板;
在所述阵列基板上形成像素定义层,并图案化所述像素定义层,以形成至少一个凹槽;
其中,每一所述凹槽围绕所述多个子像素区域中的一个子像素区域设置。
可选地,图案化所述像素定义层,以形成至少一个凹槽包括:
通过掩膜曝光然后显影所述像素定义层,从而形成所述凹槽。
可选地,在图案化所述像素定义层,以形成至少一个凹槽之后,还包括:
在所述凹槽中形成遮光部。
可选地,所述像素定义层为聚酰亚胺类材料层;所述像素定义层通过固化形成;
所述像素定义层的固化时间为30分钟~60分钟;
所述像素定义层的固化温度为230℃~270℃。
上述显示基板及其制作方法,在像素定义层围绕子像素区域形成凹槽,当显示面板承受跌落撞击时,撞击力传递至像素定义层,像素定义层向其延展方向发生膨胀。凹槽围绕子像素区域设置,类似于围墙状结构,可起到释放应力的作用,减小像素定义层的膨胀,从而有效避免像素定义层挤压OLED器件而 导致其失效。此外,当上述显示面板为柔性显示面板时,凹槽的设置还能够更好的提升柔性显示面板的可挠曲性。这样,提高了显示面板的抗弯曲强度和承受跌落撞击强度。
本申请还提供一种显示面板,包括显示基板、有机发光单元及封装层;
所述显示基板包括:
阵列基板;
像素定义层,形成于所述阵列基板上,所述像素定义层界定多个子像素区域;所述显示基板还包括至少一个形成于所述像素定义层的凹槽,每一所述凹槽围绕所述多个子像素区域中的一个子像素区域设置;
所述有机发光单元形成于所述子像素区域,所述封装层形成于所述有机发光单元背离所述阵列基板的一侧。
可选地,位于所述显示面板的有效显示区域中部的所述子像素区域周围的所述凹槽的数量多于位于所述显示面板的有效显示区域的靠近边框的部分的所述子像素区域周围的所述凹槽的数量。
根据上述显示面板,在像素定义层围绕子像素区域形成凹槽,当显示面板承受跌落撞击时,撞击力传递至像素定义层,像素定义层向其延展方向发生膨胀。凹槽围绕子像素区域设置,类似于围墙状结构,可起到释放应力的作用,减小像素定义层的膨胀,从而有效避免像素定义层挤压OLED器件而导致其失效。此外,当上述显示面板为柔性显示面板时,凹槽的设置还能够更好的提升柔性显示面板的可挠曲性。这样,提高了显示面板的抗弯曲强度和承受跌落撞击强度。
图1为本申请一实施例中的显示基板的结构示意图;
图2为图1所示的显示基板的另一视角的结构示意图;
图3为本申请另一实施例中的显示基板的结构示意图;
图4为本申请一实施例中的显示基板的制作方法的流程框图。
为了便于理解本申请,下面将参照相关附图对本申请进行更全面的描述。附图中给出了本申请的较佳的实施例。但是,本申请可以以许多不同的形式来实现,并不限于本文所描述的实施例。相反地,提供这些实施例的目的是使对本申请的公开内容的理解更加透彻全面。
随着OLED显示面板技术的快速发展,其具有可弯曲、良好的柔韧性的特性而被广泛应用。但受限于结构及材料,OLED显示面板的抗弯曲强度和承受跌落撞击强度不高。
以承受跌落撞击试验为例,当使用32.65g的落球(直径为20mm的钢球;跌落高度2cm-62.5cm)击中OLED显示面板时,封装层沿着作用力方向向下弯曲,进而应力被传递至封装层内的结构。由于被落球击中瞬间的应力集中无法分散,当跌落高度超过10cm时,显示面板极易受到损伤,被击中的区域很可能无法全彩显示,出现黑斑、亮斑、彩斑等显示不良现象。
为解决该问题,通常在远离屏体发光侧设置缓冲层,例如,在显示面板与盖板之间填充光学透明胶。但如此导致屏体厚度在一定程度上增加,无法满足较佳的视觉体验及触感体验,且增加了工艺流程及制作难度。
因此,有必要提供一种保证厚度与显示效果,且抗弯曲强度和承受跌落撞击强度较佳的显示面板。
在描述位置关系时,除非另有规定,否则当一元件例如层、膜或基板被指为在另一元件“上”时,其能直接在其他元件上或亦可存在中间元件。进一步说,当层被指为在另一层“下”时,其可直接在下方,亦可存在一或多个中间层。亦可以理解的是,当层被指为在两层“之间”时,其可为两层之间的唯一层,或亦可存在一或多个中间层。
阵列基板:即TFT(Thin-film transistor,薄膜晶体管)阵列基板,是指至少形成有TFT阵列、阳极的衬底基板(例如,PI材料形成的基板)。
可以理解的是,本申请实施例提供的显示面板,主要是应用于全面屏或无边框的显示面板,当然也可以应用到普通有边框或者窄边框的显示面板中。
图1示出了本申请一实施例中的显示基板的结构示意图;图2示出了图1所示的显示基板的另一视角的结构示意图。为便于描述,附图仅示出了与本申请实施例相关的结构。
参阅附图,本申请实施例提供的显示面板,包括显示基板10、有机发光单元、阴极及封装层。显示基板10包括阵列基板12及像素定义层14。
阵列基板12包括衬底基板(例如,PI材料形成)、设置于衬底基板的薄膜晶体管(图未标),以及设置于薄膜晶体管上的阳极。当然,该阵列基板12还可以包括平坦化层、钝化层等膜层,在此不作限定。例如,一些实施例中,阵列基板12具有多个子像素区域11,可分为发射红光的第一子像素区域11、发射蓝光的第二子像素区域11,以及发射绿光的第三子像素区域11,一组的第一子像素区域11、第二子像素区域11及第三子像素区域11可构成一个像素区域。阳极,即像素电极形成于平坦化层上,且与对应的子像素区域11一一对应。
在其他一些实施例中,每个像素区域亦可包括其他子像素区域11,在此不作限定,例如,还可包括发射白光的第四子像素区域11。
像素定义层14形成于阵列基板12上,且暴露每个像素电极的至少一部分。一些实施例中,像素定义层14可覆盖至少一部分的每个像素电极的边缘,从而将每个像素电极的至少一部分暴露出来。在一些较佳的实施例中,像素定义层14可形成有多个像素定义开口18,像素电极的中间部分或全部部分经由该像素定义开口18暴露。也就是说,子像素区域11可通过对应该像素定义开口18界定,继而界定出多个子像素。
像素电极可形成在平坦化层上,像素定义层14亦可形成在平坦化层上,平坦化层到像素定义层14的上表面的高度,大于平坦化层到像素电极的上表面的高度。像素定义层14可覆盖至少一部分的每个像素电极的边缘,形成多个像素定义开口18,有机发光材料填充于该像素定义开口18内。
这样,像素定义层14可增加每个像素电极的端部,以及形成在每个像素电极上的相反电极(例如,阴极)之间的距离,且可防止像素电极的端部出现抗反射。
像素定义层14通常的材料主要包括有机材料,例如,聚酰亚胺、聚酰胺、苯丙环丁烯、亚克力树脂或酚醛树脂等有机材料。当然,在另外一些实施例中,像素定义层14亦可掺杂有无机材料,例如,氧化锡、氮化矽和/或氮氧化锡。在实际制作过程中,封装层可能会与像素定义层14相接触,因此,像素定义层14中掺杂无机材料可增加其与封装层下层的无机材料层的接合力,从而在一定程度上避免例如阴极的剥离,提高显示面板的可靠性。
有机发光单元至少包括有机发光材料层。一些实施例中,有机发光单元可以具有多层结构,例如,除了有机发光材料层之外,还可包括平衡电子和空穴的电子传输层和空穴传输层,以及用于增强电子和空穴的注入的电子注入层和空穴注入层。阴极形成于有机发光单元背离阵列基板12的一侧,一些实施例中,阴极覆盖显示基板10的整层,也就是说,阴极覆盖像素定义层14,且填充于像素定义层14形成的像素定义口内,以与有机发光单元相接。
封装层设置于有机发光单元背离阵列基板12的一侧。由于有机发光材料层对水汽和氧气等外部环境十分敏感,如果将显示面板中的有机发光材料层暴露在有水汽或氧气的环境中,会造成显示面板的性能急剧下降或者完全损坏。封装层能够为有机发光单元阻挡空气及水汽,从而保证显示面板的可靠性。
封装层可以是一层或多层结构,可以是有机膜层或无机膜层,亦可是有机膜层和无机膜层的叠层结构。例如,一些实施例中,封装层可包括两层无机膜层及一层位于两层无机膜层之间的有机膜层。
请继续参阅附图1,本申请实施例中的显示基板10还包括至少一个形成于像素定义层14的凹槽16。每一个凹槽16围绕多个子像素区域11中的一个子像素区域11设置。
当显示面板多次弯曲或承受跌落撞击时,封装层将沿着作用力方向向下弯曲,进而弯曲力或撞击力被传递至支撑层、阴极、像素定义层14等膜层。从现有的显示基板10上的像素排列结构及形式来看,占据显示基板10空间的因素,除了有机发光单元以外,像素定义层14占据的空间最多。
一般地,像素定义层14主要由有机材料制成,例如,聚酰亚胺、聚酰胺、苯并环丁烯、亚克力树脂或酚醛树脂等,通过跌落撞击试验,32.65g的落球(直 径为20mm的钢球;跌落高度2cm-62.5cm)击中显示面板时,由于像素定义层14占据空间较大,撞击应力传导至像素定义层14后,应力主要集中在像素定义层14,且无法分散并造成像素定义层14膨胀,进而挤压OLED器件,导致OLED器件失效。
在像素定义层14围绕子像素区域11形成凹槽16,当显示面板承受跌落撞击时,撞击力传递至像素定义层14,像素定义层14向其延展方向发生膨胀。凹槽16围绕子像素区域11设置,类似于围墙状结构,可起到释放应力的作用,减小像素定义层14的膨胀,从而有效避免像素定义层14挤压OLED器件而导致其失效。此外,当上述显示面板为柔性显示面板时,凹槽16的设置还能够更好的提升柔性显示面板的可挠曲性。
这样,提高了显示面板的抗弯曲强度和承受跌落撞击强度。
由于设有凹槽16,在后续沉积形成阴极时,阴极可填充于凹槽16内,亦可不填充于凹槽16。例如,为避免阴极填充于凹槽16内,阴极的沉积速度应当越快越好。
一些实施例中,可在每一个子像素区域11周围均围绕设置一个或多个前述的凹槽16;另一些实施例中,亦可仅在部分子像素区域11周围设置一个或多个前述的凹槽16,在此不作限定。其中,多个是指大于等于两个。
围绕每个子像素区域11的凹槽16个数可相同,亦可不同,在此不作限定。以承受跌落撞击为例,在跌落撞击试验中,落球容易击中显示面板的有效显示区域中间位置,则位于有效显示区域中间位置的子像素区域11周围的凹槽16数量较多,而在有效显示区域靠近边框区域的子像素区域11周围的凹槽16数量可适当减少。以多次弯曲为例,在弯曲区域的子像素区域11周围的凹槽16数量较多,在非弯曲区域的子像素区域11周围的凹槽16数量可适当减少。
每一凹槽16围绕一个子像素区域11设置,该凹槽16可为一连续形成的凹槽16,亦可包括沿子像素区域11的周向间断设置的多个子凹槽,能实现减少像素定义层14承受撞击产生的膨胀的目的即可,在此不作限定。
本申请一些实施例中,设置有多个围绕于子像素区域11的凹槽16,相邻的凹槽16之间彼此间隔设置。凹槽16数量越多,其所能释放的应力程度越大, 像素定义层14固化后的膨胀率越低。然而,当凹槽16数量越多,构图工艺难度大,且像素定义层14的刚度减小,承受跌落撞击的强度降低。当凹槽16数量增加到一定程度,落球跌落高度超过10cm时,显示面板仍然极易受到损伤。
当围绕多个子像素区域11中的一个子像素区域11的凹槽16数量为2~5个时,像素定义层14的刚度不会受到太大影响,且膨胀率降低,有效避免像素定义层14挤压OLED器件而导致其失效,进而提高了显示面板的抗弯曲强度和承受跌落撞击强度。作为较佳地实施方式,围绕每一子像素区域11的凹槽16的数量为3个。这样,便于加工,且在保证像素定义层14的刚度的前提下,降低了像素定义层14的膨胀率。
凹槽16的数量越多,凹槽16的宽度越大,则像素定义层14受力膨胀的程度越小,但相邻的子像素区域11之间的像素定义层14空间有限。只有当围绕每一子像素区域11的凹槽16的数量处于一个范围内,且凹槽16的宽度处于一个合理的范围内,才能保证像素定义层14的刚度,并降低像素定义层14受力膨胀的膨胀率。具体到实施例中,该凹槽16的宽度为2μm~10μm,方可达到前述的效果。
本申请一些实施例中,凹槽16在垂直于阵列基板12的方向上贯穿像素定义层14。在封装层承受跌落撞击后,其将沿着作用力方向向下弯曲,进而将弯曲力或撞击力向下传递。像素定义层14的下层的膨胀对OLED器件的影响较大。因此,作为较佳的实施例,该凹槽16应贯穿该像素定义层14,或者凹槽16的深度略小于像素定义层14,以降低像素定义层14膨胀挤压OLED器件造成的损伤。
图3为本申请另一实施例中的显示基板的结构示意图。
参阅附图3,本申请的一些实施例中,该显示基板10还包括位于凹槽16中的遮光部19。现有设计中的OLED像素结构中,存在相邻的两个像素之间存在横向漏光的漏光问题。通过在凹槽16中设置遮光部19,可以一定程度上避免横向漏光,且对像素定义层14的像素定义开口18的开口率无影响。
该遮光部19可在每一凹槽16中设置,也可仅在部分凹槽16中设置,在此不作限定。由于遮光部19的材料的膨胀性能等因素的限制,若在每一凹槽16 中均设有遮光部19,则可能影响像素定义层14的受力膨胀性,因此,针对于柔性显示面板,作为较佳的实施例方式中,遮光部19存在于部分凹槽16内。例如,一些实施例中,围绕每一像素区域设置有多个凹槽16,遮光部19仅形成于之间间隔有凹槽16的两个凹槽16内,具体的说,例如以子像素区域11为基准,遮光部19自内向外形成于第一圈的凹槽16及第三圈的凹槽16内。
具体到一些实施例中,该遮光部19可为阴极材料,即在有机发光单元背离阵列基板12的一侧沉积阴极层时,同时在凹槽16内沉积形成遮光部19。另一些实施例中,该遮光部19亦可为色阻材料,例如,红光色阻材料、蓝光色阻材料及绿光色阻材料等。为降低像素定义层14的受力膨胀率,该遮光部19的材料应当为受力膨胀率相对较低的材料,且遮光部19的厚度与有机发光单元的厚度相同或小于有机发光单元的厚度均可。
本申请的一些实施例中,沿垂直于阵列基板12的方向,凹槽16的截面尺寸随着朝向衬底基板逐渐减小。例如,具体到如图1所示的实施例中,该凹槽16的截面形状呈倒梯形,凹槽16的截面尺寸自上端至下端逐渐减小。这样,降低了像素定义层14的下层的膨胀对OLED器件的影响较大,进一步地提高了显示面板的抗弯曲强度和承受跌落撞击强度。
前述的凹槽16形成于像素定义层14,可采用构图工艺对像素定义层14进行图案化得到。例如,一些实施例中,可通过掩膜曝光然后显影像素定义层14,从而形成凹槽16;当然,在另一些实施例中,亦可采用干法刻蚀来形成凹槽16。相比于干法刻蚀工艺,采用掩膜曝光显影的半色调工艺,工艺简单且凹槽16深度更容易控制。
像素定义层14主要由有机材料形成,故在完成构图工艺后还需要对其进行固化处理。由于凹槽16的设置,固化后的像素定义层14相较于未设置的凹槽16的像素定义层14的膨胀率低。这样,亦有效避免像素定义层14承受撞击力后挤压OLED器件而导致其失效。
为便于进一步理解本申请的技术方案,本申请的实施例还提供一种显示基板10的制作方法。
图4示出了本申请一实施例中的显示基板10的制作方法的流程框图;
参阅附图,本申请一实施例中的显示基板10的制作方法,包括:
步骤S110:提供一阵列基板12。
阵列基板12包括衬底基板、薄膜晶体管、以及设置于薄膜晶体管上的阳极。
以柔性显示面板为例,衬底基板形成于承载基板上。衬底基板为可弯曲基板,可选地为有机聚合物、氮化硅及氧化硅形成,例如,有机聚合物可以为聚酰亚胺基板、聚酰胺基板、聚碳酸酯基板、聚苯醚砜基板等中的一种。在一些实施例中,衬底基板可通过在承载基板上涂覆聚酰亚胺胶液,之后对聚酰亚胺进行固化得到。
薄膜晶体管形成于衬底基板上,一些实施例中,可以在形成薄膜晶体管之前,在衬底基板上形成诸如缓冲层的另外的层。缓冲层可以形成在衬底基板整个表面上,也可以通过图案化来形成。
缓冲层可以具有包括PET、PEN聚丙烯酸酯和/或聚酰亚胺等材料中合适的材料,以单层或多层堆叠的形式形成层状结构。缓冲层还可以由氧化硅或氮化硅形成,或者可以包括有机材料层和/或无机材料的复合层。
薄膜晶体管可以控制每个子像素的发射,或者可以控制每个子像素发射时发射的量。薄膜晶体管可以包括半导体层、栅电极、源电极和漏电极。半导体层可以由非晶硅层、金属氧化物或多晶硅层形成,或者可以由有机半导体材料形成。一些实施例中,半导体层包括沟道区和掺杂有掺杂剂的源区和漏区。
可以利用栅极绝缘层覆盖半导体层,栅电极可以设置栅极绝缘层上。大体上,栅极绝缘层可以覆盖衬底基板的整个表面。一些实施例中,可以通过图案化形成栅极绝缘层。考虑到与相邻层的粘合、堆叠目标层的可成形性和表面平整性,栅极绝缘层可以由氧化硅、氮化硅或其他绝缘有机或无机材料形成。栅电极可以被由氧化硅、氮化硅和/或其他合适的绝缘有机或无机材料形成的层间绝缘层覆盖。可以去除栅极绝缘层和层间绝缘层的一部分,在去除之后形成接触孔以暴露半导体层的预定区域。源电极和漏电极可以经由接触孔接触半导体层。
由于薄膜晶体管具有复杂的层结构,因此,其顶表面可能是不是平坦的, 一些实施例中,薄膜晶体管还包括平坦化层,以形成足够平坦的顶表面。在形成平坦化层之后,可以在平坦化层中形成通孔,以暴露薄膜晶体管的源电极和漏电极。
阳极为像素电极,像素电极包括与子像素区域11对应的子像素电极,多个子像素电极形成于平坦化层上。容易理解的是,多个子像素电极通过前述的通孔电连接到薄膜晶体管。
S120:在阵列基板12上形成像素定义层14,并图案化像素定义层14,以形成至少一个凹槽16;每一凹槽16围绕多个子像素区域11中的一个子像素区域11设置。
像素定义层14可以由有机材料形成,例如,聚酰亚胺、聚酰胺、笨丙环丁烯、亚克力树脂或酚醛树脂等。当然,在另外一些实施例中,像素定义层14亦可掺杂无机材料,例如,氧化锡、氮化矽和/或氮氧化锡等。
采用构图工艺对像素定义层14进行图案化得到凹槽16,例如,一些实施例中,可通过掩膜曝光然后显影像素定义层14,从而形成凹槽16,在另一些实施例中,可采用刻蚀工艺形成凹槽16。可以理解,构图工艺还可为其他形式,包括但不限于上述举例的两种形式。
在像素定义层14围绕子像素区域11形成凹槽16,当显示面板承受跌落撞击时,撞击力传递至像素定义层14,像素定义层14向其延展方向发生膨胀。凹槽16围绕子像素区域11设置,类似于围墙状结构,可起到释放应力的作用,减小像素定义层14的膨胀,从而有效避免像素定义层14挤压OLED器件而导致其失效。此外,当上述显示面板为柔性显示面板时,凹槽16的设置还能够更好的提升柔性显示面板的可挠曲性。
这样,提高了显示面板的抗弯曲强度和承受跌落撞击强度。
一些实施例中,像素定义层14为聚酰亚胺类材料层,通过固化形成;像素定义层14的固化时间为30分钟~60分钟;像素定义层14的固化温度为230℃~270℃。像素定义层14主要由有机材料形成,不同的温度条件下,以及不同的固化时间,有机材料固化后受力的膨胀系数不同。
当显示面板多次弯曲或承受跌落撞击时,封装层将沿着作用力方向向下弯 曲,进而将弯曲力或撞击力传递至像素定义层14,像素定义层14具有较好的强度且膨胀率越低,则其对OLED器件的挤压造成损伤的风险越低。当像素定义层14的固化温度为230℃~270℃,固化时间为30分钟~60分钟,则可使像素定义层14固化后,具有较佳的机械强度且膨胀率较低,从而有效避免像素定义层14挤压OLED器件而导致其失效。
像素定义层14中亦可以掺杂无机材料,例如,氧化锡、氮化矽和/或氮氧化锡,或者掺杂一些纳米无机粒子。如此,一方面可降低像素定义层14的膨胀系数,另一方面可增加其与封装层下层的无机材料层的接合力,从而在一定程度上避免例如阴极的剥离,提高显示面板的可靠性。而无机材料在升温与降温过程中会产生体积膨胀或者收缩。其中,如果原子的表面活动能力差,则最终形成较为疏松的结构,如果原子在生长膜面上还未调整到能量最低位置时就被后续的膜层所埋没,则原子的激活能增大,同样产生结构缺陷。因此,像素定义层14中可能存在大量的结构缺陷(如空位、空位群等),这些结构缺陷形成的无序层成为了像素定义层14的张应力或者压应力的起源。由于无序层本身结构不稳定,因此,如果随后受到热激活(如来自沉积原子的动能传递和凝聚热的释放等),则会产生原子的重排,并向更致密的低能态结构转变,产生横向收缩。
当像素定义层14的固化时间为30分钟~60分钟,固化温度为230℃~270℃,还可降低像素定义层14内的结构缺陷的形成,且降低残余应力的存在。这样,进一步地提高了像素定义层14的力学性能,降低了像素定义层14的膨胀率,有效避免像素定义层14挤压OLED器件而导致其失效。
基于上述的显示面板,本申请的实施例还提供一种显示装置,一些实施例中,该显示装置可为显示终端,例如平板电脑,在另一些实施例中,该显示装置亦可为移动通信终端,例如手机终端。
一些实施例中,该显示装置包括显示面板及控制单元,该控制单元用于向显示面板传输显示信号。
综上所述,在像素定义层14围绕子像素区域11形成凹槽16,当显示面板 承受跌落撞击时,撞击力传递至像素定义层14,像素定义层14向其延展方向发生膨胀。凹槽16围绕子像素区域11设置,类似于围墙状结构,可起到释放应力的作用,减小像素定义层14的膨胀,从而有效避免像素定义层14挤压OLED器件而导致其失效。此外,当上述显示面板为柔性显示面板时,凹槽16的设置还能够更好的提升柔性显示面板的可挠曲性。
这样,提高了显示面板的抗弯曲强度和承受跌落撞击强度。
以上所述实施例的各技术特征可以进行任意的组合,为使描述简洁,未对上述实施例中的各个技术特征所有可能的组合都进行描述,然而,只要这些技术特征的组合不存在矛盾,都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本申请的几种实施方式,其描述较为具体和详细,但并不能因此而理解为对申请专利范围的限制。应当指出的是,对于本领域的普通技术人员来说,在不脱离本申请构思的前提下,还可以做出若干变形和改进,这些都属于本申请的保护范围。因此,本申请专利的保护范围应以所附权利要求为准。
Claims (19)
- 一种显示基板,包括:阵列基板;像素定义层,形成于所述阵列基板,所述像素定义层界定若干子像素区域;其中,所述显示基板还包括至少一个形成于所述像素定义层的凹槽,每一所述凹槽围绕所述多个子像素区域中的一个子像素区域设置。
- 根据权利要求1所述的显示基板,其中,在每一个所述子像素区域周围均围绕设置至少一个所述凹槽。
- 根据权利要求1所述的显示基板,其中,围绕每一所述子像素区域设置有多个所述凹槽。
- 根据权利要求3所述的显示基板,其中,围绕每一所述子像素区域设置有2~5个所述凹槽。
- 根据权利要求1所述的显示基板,其中,每一所述凹槽包括沿所述子像素区域周向间断设置的多个子凹槽。
- 根据权利要求1所述的显示基板,其中,每一所述凹槽的宽度为2μm~10μm。
- 根据权利要求1所述的显示基板,其中,所述凹槽在垂直于所述阵列基板的方向上贯穿所述像素定义层。
- 根据权利要求1所述的显示基板,其中,所述像素定义层的材料包括有机材料,并掺杂有无机材料。
- 根据权利要求1所述的显示基板,其中,所述显示基板还包括设置于所述凹槽中的遮光部。
- 根据权利要求9所述的显示基板,其中,所述遮光部设置于部分所述凹槽中。
- 根据权利要求9所述的显示基板,其中,所述遮光部为阴极材料或色阻材料。
- 根据权利要求9所述的显示基板,其中,围绕每一像素区域设置有多个所述凹槽,所述遮光部仅形成于之间间隔有凹槽的另两个凹槽内。
- 根据权利要求1所述的显示基板,其中,沿垂直于所述阵列基板的方向,所述凹槽的截面尺寸随着朝向所述衬底基板逐渐减小。
- 一种显示面板,包括显示基板、有机发光单元及封装层;所述显示基板包括:阵列基板;像素定义层,形成于所述阵列基板上,所述像素定义层界定多个子像素区域;所述显示基板还包括至少一个形成于所述像素定义层的凹槽,每一所述凹槽围绕所述多个子像素区域中的一个子像素区域设置;所述有机发光单元形成于所述子像素区域,所述封装层形成于所述有机发光单元背离所述阵列基板的一侧。
- 根据权利要求14所述的显示面板,其中,位于所述显示面板的有效显示区域中部的所述子像素区域周围的所述凹槽的数量多于位于所述显示面板的有效显示区域的靠近边框的部分的所述子像素区域周围的所述凹槽的数量。
- 一种显示基板的制作方法,包括:提供一阵列基板;在所述阵列基板上形成像素定义层,并图案化所述像素定义层,以形成至少一个凹槽;其中,每一所述凹槽围绕所述多个子像素区域中的一个子像素区域设置。
- 根据权利要求16所述的显示基板的制作方法,其中,图案化所述像素定义层,以形成至少一个凹槽包括:通过掩膜曝光然后显影所述像素定义层,从而形成所述凹槽。
- 根据权利要求16所述的显示基板的制作方法,其中,在图案化所述像素定义层,以形成至少一个凹槽之后,还包括:在所述凹槽中形成遮光部。
- 根据权利要求16所述的显示基板的制作方法,其中,所述像素定义层为聚酰亚胺类材料层;所述像素定义层通过固化形成;所述像素定义层的固化时间为30分钟~60分钟;所述像素定义层的固化温度为230℃~270℃。
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