WO2019218993A1 - Oled显示基板及其制作方法、显示装置 - Google Patents

Oled显示基板及其制作方法、显示装置 Download PDF

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Publication number
WO2019218993A1
WO2019218993A1 PCT/CN2019/086780 CN2019086780W WO2019218993A1 WO 2019218993 A1 WO2019218993 A1 WO 2019218993A1 CN 2019086780 W CN2019086780 W CN 2019086780W WO 2019218993 A1 WO2019218993 A1 WO 2019218993A1
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Prior art keywords
capacitor electrode
oled display
insulating layer
electrode
display substrate
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PCT/CN2019/086780
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English (en)
French (fr)
Inventor
张金玲
邓飞
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京东方科技集团股份有限公司
北京京东方显示技术有限公司
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Application filed by 京东方科技集团股份有限公司, 北京京东方显示技术有限公司 filed Critical 京东方科技集团股份有限公司
Priority to EP19804297.0A priority Critical patent/EP3796391A4/en
Priority to KR1020207017631A priority patent/KR102571091B1/ko
Priority to JP2019558491A priority patent/JP7331318B2/ja
Priority to US16/611,717 priority patent/US11348987B2/en
Publication of WO2019218993A1 publication Critical patent/WO2019218993A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1216—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/81—Anodes
    • H—ELECTRICITY
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    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
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    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/126—Shielding, e.g. light-blocking means over the TFTs
    • H—ELECTRICITY
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    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes

Definitions

  • the present disclosure relates to the field of display technologies, and in particular to an OLED display substrate, a method of fabricating the same, and a display device.
  • AMOLED Active-matrix organic light emitting diode
  • a bottom-emitting organic light-emitting diode OLED display device is mainly used for a large-sized display such as an OLED television.
  • large-size OLED displays have always had a problem of low aperture ratio.
  • the present disclosure provides an OLED display substrate, a method of fabricating the same, and a display device.
  • the present disclosure provides an organic light emitting diode OLED display substrate.
  • the OLED display substrate includes: a plurality of open regions arranged in an array on the base substrate; and a plurality of storage capacitors on the base substrate, wherein each of the plurality of storage capacitors is in the lining
  • An orthographic projection on the base substrate has an overlapping area with an orthographic projection of an opening region corresponding to the storage capacitor in the plurality of opening regions on the base substrate.
  • a transmittance of each of the plurality of storage capacitors is greater than a preset threshold, and an orthographic projection of the storage capacitor on the substrate substrate falls into the open region on the base substrate Inside the orthographic projection.
  • the storage capacitor includes a first capacitor electrode, a first insulating layer disposed on the first capacitor electrode, a second capacitor electrode disposed on the first insulating layer, and disposed at the second a second insulating layer on the capacitor electrode, a third capacitor electrode disposed on the second insulating layer, and the third capacitor electrode is electrically connected to the first capacitor electrode.
  • the first capacitor electrode is a conductive active layer; the second capacitor electrode is a transparent electrode; and the third capacitor electrode is an anode of the OLED display substrate.
  • the transparent electrode is made of one of ITO, graphene, and MoTi.
  • the preset threshold is 80% or more.
  • the first insulating layer is an interlayer insulating layer
  • the second insulating layer is a passivation layer
  • the OLED display substrate further includes a gate insulating layer, a gate electrode, and a gate line between the first capacitor electrode and the first insulating layer.
  • the OLED display substrate further includes: a source electrode, a drain electrode, and a data line that are in the same layer as the second capacitor electrode.
  • the OLED display substrate further includes: a light shielding metal layer under the first capacitor electrode; and a buffer layer between the light shielding metal layer and the first capacitor electrode.
  • the present disclosure provides a display device.
  • the display device includes the OLED display substrate as described in the first aspect.
  • the present disclosure provides a method for fabricating an OLED display substrate, the OLED display substrate including a plurality of open regions arranged in an array on a substrate, the manufacturing method comprising: fabricating on the substrate a plurality of storage capacitors, an orthographic projection of each of the plurality of storage capacitors on the base substrate and an opening region corresponding to the storage capacitor in the plurality of opening regions on the base substrate The orthographic projection on the top has overlapping areas.
  • a plurality of storage capacitors are formed on the base substrate, and an orthographic projection of each of the plurality of storage capacitors on the base substrate and the plurality of open regions are And an orthographic projection of the opening area corresponding to the storage capacitor on the substrate substrate has an overlapping area, comprising: forming, on the base substrate, the storage capacitor having a light transmittance greater than a preset threshold, wherein the storage capacitor is in the An orthographic projection on the substrate substrate falls within the orthographic projection of the open region on the substrate.
  • fabricating a storage capacitor on the base substrate includes: forming a first capacitor electrode on the base substrate; fabricating a first insulating layer on the first capacitor electrode; Forming a second capacitor electrode on the insulating layer; forming a second insulating layer on the second capacitor electrode; forming a third capacitor electrode on the second insulating layer, the third capacitor electrode and the first capacitor The electrodes are electrically connected.
  • the fabricating the first capacitor electrode comprises: forming the first capacitor electrode by using a conductive active layer; and fabricating the second capacitor electrode comprises: forming the second capacitor electrode by using a transparent conductive material;
  • the third capacitor electrode includes an anode using the OLED display substrate as the third capacitor electrode.
  • the transparent electrode is made of one of ITO, graphene, and MoTi.
  • the preset threshold is 80% or more.
  • fabricating the first insulating layer on the first capacitor electrode comprises: forming an interlayer insulating layer on the first capacitor electrode; and forming a second insulating layer on the second capacitor electrode
  • the method includes: fabricating a passivation layer on the second capacitor electrode.
  • the manufacturing method further includes: creating the first capacitor a gate insulating layer, a gate electrode, and a gate line on the capacitor electrode.
  • the manufacturing method further includes: The source electrode, the drain electrode, and the data line are formed in the layer where the capacitor electrode is located.
  • the manufacturing method further includes: forming a light shielding metal layer on the base substrate; and forming a buffer layer on the light shielding metal layer.
  • the gate insulating layer, the gate electrode, and the gate line on the first capacitor electrode are fabricated, forming the first capacitor electrode by using the conductive active layer, including: performing the gate insulating layer Patterning to form a via hole penetrating the gate insulating layer; ion-implanting a portion of the active layer that needs to be conductive through the via hole to form a conductive active layer as the first Capacitor electrode.
  • FIG. 1 is a schematic diagram showing a positional relationship between an opening area of an associated OLED display substrate and a storage capacitor
  • FIG. 2 is a schematic diagram of a pixel structure of a related OLED display substrate
  • FIG. 3 is a schematic structural diagram of a storage capacitor of an OLED display substrate of the present disclosure.
  • FIG. 4 is a schematic diagram showing a positional relationship between an open area of an OLED display substrate and a storage capacitor according to some embodiments of the present disclosure
  • FIG. 5 is a schematic diagram of a specific structure of a storage capacitor of an OLED display substrate according to some embodiments of the present disclosure.
  • the related OLED display substrate separates the open area from the storage capacitor, and the storage capacitor area cannot pass the light, thereby reducing the aperture ratio of the OLED display substrate.
  • FIG. 1 is a schematic diagram showing the positional relationship between the opening area of the related OLED display substrate and the storage capacitor
  • FIG. 2 is the pixel of the related OLED display substrate. Schematic. It can be seen that in the related OLED display substrate, the opening region B and the storage capacitor A are separately designed, and the storage capacitor region cannot pass the light, thereby reducing the aperture ratio of the OLED display substrate. Moreover, since the pixel structure is concentrated in a small space of the pixel, it is easy to cause electrical defects in the backplane process, which is one of the reasons why the yield of the product in the production of the OLED display substrate has been difficult to improve.
  • the embodiments of the present disclosure are directed to the above problems, and provide an OLED display substrate, a manufacturing method thereof, and a display device capable of improving an aperture ratio of an OLED display substrate.
  • the OLED display substrate includes: a plurality of open regions B arranged in an array on the base substrate, and a plurality of storage capacitors A, wherein each of the plurality of storage capacitors A is stored
  • An orthographic projection of the capacitor on the base substrate 21 has an overlapping area with an orthographic projection of an opening region corresponding to the storage capacitor in the plurality of opening regions B on the base substrate.
  • the transmittance of each of the plurality of storage capacitors A is greater than a preset threshold, such as 80% or more, for example, 90%, 95%, or the like.
  • the transmittance of the storage capacitor is greater than a predetermined threshold
  • the orthogonal projection of the storage capacitor on the substrate substrate and the orthographic projection of the open region on the substrate substrate are designed to increase the area of the storage capacitor.
  • the area of the opening area of the pixel is increased, so that the aperture ratio of the OLED display substrate can be improved; and at the same time, the line density is significantly decreased due to the increase in the space occupied by the pixel structure, which is also advantageous for improving the yield of the product.
  • the electrode of the storage capacitor can be made of a transparent conductive material.
  • the transmittance of the storage capacitor can be made 80% or more, so that the storage capacitor can be designed in the open area, thereby increasing the area of the open area of the pixel, thereby improving the OLED display.
  • the aperture ratio of the substrate can be made of 80% or more, so that the storage capacitor can be designed in the open area, thereby increasing the area of the open area of the pixel, thereby improving the OLED display.
  • an orthographic projection of the storage capacitor A (inside the dotted line frame) on the base substrate falls within an orthographic projection of the open area B on the base substrate.
  • the storage capacitor A does not occupy other regions than the opening region B, so that it is not necessary to reserve a region outside the opening region to place the storage capacitor, and the area of the opening region can be maximized.
  • the storage capacitor includes a first capacitor electrode 24, a first insulating layer 25 disposed on the first capacitor electrode 24, and disposed on the first insulating layer 25. a second capacitor electrode 26, a second insulating layer 27 disposed on the second capacitor electrode 26, a third capacitor electrode 28 disposed on the second insulating layer 27, and the third capacitor electrode 28 and The first capacitor electrode 24 is electrically connected.
  • the first capacitor electrode 24 and the second capacitor electrode 26 provide a first capacitor C1, the second capacitor electrode and the third capacitor electrode provide a second capacitor C2, and the two capacitors are substantially electrically connected in parallel (parallel), and thus, the storage
  • the capacitance of the capacitor is the sum of the capacitance values of the two capacitors.
  • the first capacitor electrode 24 can be made of a conductive active layer
  • the second capacitor electrode 26 can be made of a transparent electrode
  • the third capacitor electrode 28 can be an anode of the OLED display substrate. production.
  • the present example utilizes the high transmittance of the transparent electrode to form a storage capacitor with the conductive active layer and the anode, and uses the storage capacitor as an opening area of the pixel, thereby increasing the opening area of the pixel. The area increases the area of the storage capacitor, and the capacitance formed increases accordingly.
  • the anode of the OLED display substrate is also made of a transparent conductive material, so that the two capacitor electrodes of the storage capacitor are transparent.
  • the transparent electrode may be one of ITO, graphene, and MoTi.
  • the material of the transparent electrode is not limited to the use of ITO, graphene and MoTi, and other transparent conductive materials having high light transmittance and excellent electrical conductivity can be used.
  • the OLED display substrate includes an interlayer insulating layer 25 disposed between the first capacitor electrode 24 and the second capacitor electrode 26 and a passivation disposed between the second capacitor electrode 26 and the third capacitor electrode 28 Layer 27.
  • the OLED display substrate includes a gate insulating layer, a gate electrode, and a gate line between the first capacitor electrode 24 and the interlayer insulating layer 25.
  • the OLED display substrate includes a source electrode, a drain electrode, and a data line that are in the same layer as the second capacitor electrode 26.
  • the OLED display substrate comprises a light shielding metal layer 22 under the first capacitor electrode 24 and a buffer layer 23 between the light shielding metal layer 22 and the first capacitor electrode 24.
  • the light-shielding metal layer 22 may be a metal such as Cu, Al, Ag, Mo, Cr, Nd, Ni, Mn, Ti, Ta, W, and an alloy of these metals.
  • the buffer layer 23 may be selected from an oxide, a nitride or an oxynitride.
  • Some embodiments of the present disclosure also provide a display device comprising the OLED display substrate as described above.
  • the display device may be any product or component having a display function, such as a television, a display, a digital photo frame, a mobile phone, a tablet computer, etc., wherein the display device further includes a flexible circuit board, a printed circuit board, and a backboard.
  • the transmittance of the storage capacitor is greater than a preset threshold, and the orthographic projection of the storage capacitor on the substrate substrate and the orthographic projection of the open region corresponding to the storage capacitor on the substrate substrate have overlapping regions.
  • the area of the storage capacitor can be increased, and the area of the opening area of the pixel is increased, so that the aperture ratio of the OLED display substrate can be improved; and the line density is significantly reduced due to the increase in the space occupied by the pixel structure, which is also advantageous for the product. Increase in yield.
  • Some embodiments of the present disclosure further provide a method for fabricating an OLED display substrate, the OLED display substrate including a plurality of open regions arranged in an array, and the manufacturing method includes the step S1.
  • S1 fabricating a plurality of storage capacitors on the base substrate, and an orthographic projection of each of the plurality of storage capacitors on the base substrate corresponds to the storage capacitor in the plurality of open regions
  • the orthographic projection of the open area on the base substrate has an overlapping area.
  • the transmittance of each of the plurality of storage capacitors A is greater than a preset threshold, such as 80% or more, for example, 90%, 95%, or the like.
  • a storage capacitor having a light transmittance greater than a predetermined threshold is formed on the base substrate, and an orthographic projection of the storage capacitor on the base substrate and an orthographic projection of the open region on the base substrate are overlapped, so that Increasing the area of the storage capacitor increases the area of the open area of the pixel, thereby increasing the aperture ratio of the OLED display substrate.
  • the line density is significantly decreased due to the increase in the space occupied by the pixel structure, which is also advantageous for the yield of the product. Upgrade.
  • the electrode of the storage capacitor can be made of a transparent conductive material, and by selecting the electrode material of the storage capacitor and the thickness of the electrode, the transmittance of the storage capacitor can be more than 80%, so that the storage capacitor can be designed in the opening region, thereby The area of the opening area of the pixel can be increased, and the aperture ratio of the OLED display substrate can be improved.
  • an orthographic projection of each of the plurality of storage capacitors on the base substrate and an opening region corresponding to the storage capacitor in the plurality of opening regions are on the base substrate
  • the orthographic projection has overlapping regions, including:
  • the storage capacitor does not occupy other areas than the open area, so that it is not necessary to reserve a area outside the open area to place the storage capacitor, and the area of the open area can be maximized.
  • fabricating the storage capacitor includes the following sub-steps S11-S15.
  • the first capacitor electrode and the second capacitor electrode provide a first capacitor
  • the second capacitor electrode and the third capacitor electrode provide a second capacitor
  • the two capacitors are substantially electrically connected in parallel, and therefore, the capacitance value of the storage capacitor is the two The sum of the capacitance values of the capacitors.
  • the sub-step S11 of fabricating the first capacitor electrode comprises: fabricating the first capacitor electrode with a conductive active layer.
  • Sub-step S13 of forming the second capacitor electrode on the first insulating layer includes: fabricating the second capacitor electrode with a transparent conductive material.
  • the sub-step S15 of forming the third capacitor electrode in the second insulating layer comprises: using an anode of the OLED display substrate as the third capacitor electrode.
  • the present example utilizes the high transmittance of the transparent electrode to form a storage capacitor with the conductive active layer and the anode, and uses the storage capacitor as an opening area of the pixel, thereby increasing the opening area of the pixel.
  • the area increases the area of the storage capacitor, and the capacitance formed increases accordingly.
  • the line density is significantly reduced, which is favorable for the improvement of the product yield.
  • the anode of the OLED display substrate is also made of a transparent conductive material, so that the two capacitor electrodes of the storage capacitor are transparent, which can ensure the transmittance of the storage capacitor is relatively high.
  • the method for fabricating the display substrate of the present disclosure is described in detail below with reference to the accompanying drawings and specific examples.
  • the manufacturing method of the display substrate of this example includes the following steps:
  • Step 1 providing a substrate substrate 21, forming a light-shielding metal layer 22 on the substrate substrate 21;
  • the base substrate 21 may be a glass substrate or a quartz substrate. Specifically, the deposition thickness on the completed substrate 21 can be about to be performed by sputtering or thermal evaporation.
  • the light-shielding metal layer 22, the light-shielding metal layer 22 may be a metal such as Cu, Al, Ag, Mo, Cr, Nd, Ni, Mn, Ti, Ta, W, and an alloy of these metals. Since the active layer of the OLED display substrate of the present example is made of a metal oxide semiconductor, and the performance of the metal oxide semiconductor is easily changed after receiving the light, it is necessary to form the light shielding metal layer 22 on the base substrate 21 to shield the light.
  • the metal layer 22 can shield the active layer made of a metal oxide semiconductor from being exposed to light.
  • Step 2 on the substrate substrate 21 through the step 1 to form a buffer layer 23;
  • a buffer layer 23 may be deposited on the substrate 1 on which the step 1 is completed by a plasma enhanced chemical vapor deposition (PECVD) method, and the buffer layer 23 may be an oxide, a nitride or an oxynitride.
  • PECVD plasma enhanced chemical vapor deposition
  • Step 3 forming an active layer 24 on the substrate 21 through the step 2;
  • a thickness can be deposited on the substrate substrate 21 that has passed through step 2
  • the IGZO is used as the active layer 24, and a photoresist is coated on the IGZO, and the photoresist is exposed by using a mask to form a photoresist unretained region and a photoresist retention region, wherein
  • the photoresist retention area corresponds to the area of the pattern of the active layer 24, and the photoresist unretained area corresponds to the area other than the above-mentioned pattern; the development process, the photoresist in the unreserved area of the photoresist is completely removed, and the photolithography is completely removed.
  • the thickness of the photoresist in the glue-retained area remains unchanged; the IGZO of the unretained area of the photoresist is completely etched away by an etching process, and the remaining photoresist is stripped to form a pattern of the active layer 24.
  • Step 4 forming a gate insulating layer and a gate electrode and a gate line on the base substrate 21 passing through the step 3;
  • a thickness can be deposited on the base substrate 21 of the step 3 by using a plasma enhanced chemical vapor deposition (PECVD) method.
  • the gate insulating layer may be an oxide, a nitride or an oxynitride compound, and the corresponding reaction gas is SiH 4 , NH 3 , N 2 or SiH 2 Cl 2 , NH 3 , N 2 .
  • the thickness of the gate insulating layer can be deposited by sputtering or thermal evaporation.
  • the gate metal layer, the gate metal layer may be a metal such as Cu, Al, Ag, Mo, Cr, Nd, Ni, Mn, Ti, Ta, W, and an alloy of these metals, and the gate metal layer may be a single layer structure or multiple layers. Structure, multilayer structure such as Cu ⁇ Mo, Ti ⁇ Cu ⁇ Ti, Mo ⁇ Al ⁇ Mo, etc.
  • a photoresist is coated on the gate metal layer, and the photoresist is exposed by using a mask to form a photoresist unretained region and a photoresist retention region, wherein the photoresist retention region corresponds to In the region where the pattern of the gate line and the gate electrode is located, the unretained area of the photoresist corresponds to the area other than the above-mentioned pattern; the development process is performed, the photoresist in the unretained area of the photoresist is completely removed, and the light in the photoresist retention area is removed.
  • the thickness of the engraved adhesive remains unchanged; the gate metal film of the unretained region of the photoresist is completely etched away by the etching process, and the remaining photoresist is stripped to form a pattern of the gate line and the gate electrode.
  • the gate insulating layer is dry etched, and the active layer 24 to be conductorized is implanted with H ions through the via hole penetrating the gate insulating layer, so that the active layer 24 is conductorized, and the conductive active layer 24 is stored.
  • the first capacitor electrode of the capacitor is
  • Step 5 forming an interlayer insulating layer 25 on the substrate substrate 21 through the step 4;
  • the interlayer insulating layer 25 may be deposited on the base substrate 21 of the step 4 by using a plasma enhanced chemical vapor deposition method.
  • the interlayer insulating layer 25 may be an oxide, a nitride or an oxynitride compound. The etch forms a via penetrating through the interlayer insulating layer 25.
  • Step 6 forming a transparent electrode 26 on the substrate substrate 21 through the step 5;
  • a transparent conductive layer is formed on the base substrate 21 through the step 5.
  • the transparent conductive layer may be made of ITO, graphene, MoTi, etc., and a layer of photoresist is coated on the transparent conductive layer, and the mask is used to align the light.
  • the photoresist is exposed to form a photoresist unretained region and a photoresist-retained region, wherein the photoresist-retained region corresponds to a region of the pattern of the transparent electrode 26, and the photoresist-unretained region corresponds to the above-mentioned pattern Outside the area; the development process, the photoresist in the unretained area of the photoresist is completely removed, the thickness of the photoresist in the photoresist remaining area remains unchanged; the unretained area of the photoresist is completely etched away by the etching process a transparent conductive layer film, which peels off the remaining photoresist to form a pattern of transparent electrodes 26, wherein the transparent electrode 26 is connected to the S pole of the T1 tube (ie, point P in FIG. 2) in the pixel structure shown in FIG. A second capacitor electrode of the storage capacitor.
  • Step 7 Form a pattern of the data line, the source electrode, and the drain electrode on the base substrate 21 that has passed through step 6;
  • a thickness of about one layer may be deposited on the base substrate 21 on which the step 6 is completed by magnetron sputtering, thermal evaporation or other film formation methods.
  • the source/drain metal layer, the source/drain metal layer may be a metal such as Cu, Al, Ag, Mo, Cr, Nd, Ni, Mn, Ti, Ta, W, and an alloy of these metals.
  • the source/drain metal layer may be a single layer structure or a multilayer structure such as Cu ⁇ Mo, Ti ⁇ Cu ⁇ Ti, Mo ⁇ Al ⁇ Mo or the like.
  • a photoresist is coated on the source/drain metal layer, and the photoresist is exposed by using a mask to form a photoresist unretained region and a photoresist retention region, wherein the photoresist retention region Corresponding to the region where the pattern of the source electrode, the drain electrode and the data line is located, the photoresist unretained region corresponds to the region other than the above-mentioned pattern; the development process, the photoresist in the unreserved region of the photoresist is completely removed, and the photoresist is completely removed.
  • the thickness of the photoresist in the remaining area remains unchanged; the source and drain metal layers of the unretained region of the photoresist are completely etched away by the etching process, and the remaining photoresist is stripped to form a drain electrode, a source electrode, and a data line.
  • Step 8 forming a passivation layer 27 on the substrate substrate 21 through the step 7;
  • the thickness can be deposited by using magnetron sputtering, thermal evaporation, PECVD or other film formation methods on the base substrate 21 on which the step 7 is completed.
  • the passivation layer may be an oxide, a nitride or an oxynitride compound.
  • the passivation layer material may be SiNx, SiOx or Si(ON)x, and the passivation layer may also use Al 2 O 3 .
  • the passivation layer may be a single layer structure or a two layer structure composed of silicon nitride and silicon oxide.
  • the reaction gas corresponding to the oxide of silicon may be SiH 4 , N 2 O; the corresponding gas of the nitride or the oxynitride may be SiH 4 , NH 3 , N 2 or SiH 2 Cl 2 , NH 3 , N 2 .
  • a pattern of the passivation layer 27 including via holes is formed by a patterning process.
  • Step 9 forming an anode 28 on the substrate substrate 21 through the step 8;
  • a transparent conductive layer is formed on the base substrate 21 through the step 8.
  • the transparent conductive layer may be made of ITO, a photoresist is coated on the transparent conductive layer, and the photoresist is exposed by using a mask.
  • the photoresist forms a photoresist unretained region and a photoresist-retained region, wherein the photoresist-retained region corresponds to a region where the pattern of the anode 28 is located, and the photoresist-unretained region corresponds to a region other than the above-mentioned pattern;
  • the photoresist in the unreserved area of the photoresist is completely removed, and the thickness of the photoresist in the photoresist remaining area remains unchanged;
  • the transparent conductive layer film of the unretained area of the photoresist is completely etched by the etching process, and stripped
  • the remaining photoresist forms a pattern of the anode 28, wherein the anode 28 is connected to the
  • the storage capacitor of the OLED display substrate can be fabricated.
  • the structure of the storage capacitor is as shown in FIG. 4, wherein the conductive active layer 24, the transparent electrode 26 and the anode 28 serve as capacitor electrodes of the storage capacitor.
  • the storage capacitor of the present example has a high light transmittance, and thus can be designed in the opening region, so that the area of the opening region of the pixel is increased, and the area of the storage capacitor is increased, and the capacitance formed is correspondingly increased.
  • the transmittance of the storage capacitor is greater than a preset threshold, and the orthogonal projection of the storage capacitor on the substrate substrate and the orthographic projection of the open region on the substrate substrate are designed to increase the area of the storage capacitor. Moreover, the area of the opening area of the pixel is increased, so that the aperture ratio of the OLED display substrate can be improved; and at the same time, the line density is significantly decreased due to the increase in the space occupied by the pixel structure, which is also advantageous for improving the yield of the product.
  • sequence numbers of the steps are not used to limit the sequence of the steps.
  • the steps of the steps are changed without any creative work. It is also within the scope of the disclosure.

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Abstract

一种OLED显示基板及其制作方法、显示装置。OLED显示基板包括衬底基板（21）上阵列排布的多个开口区域（B）；以及位于衬底基板（21）上的多个存储电容（A），其中，每个存储电容（A）在衬底基板（21）上的正投影与多个开口区域（B）中与该存储电容（A）对应的开口区域（B）在衬底基板（21）上的正投影具有重叠区域。

Description

OLED显示基板及其制作方法、显示装置
相关申请的交叉引用
本申请主张在2018年5月16日在中国提交的中国专利申请号No.201810469781.7的优先权，其全部内容通过引用包含于此。
技术领域
本公开涉及显示技术领域，特别是指一种OLED显示基板及其制作方法、显示装置。
背景技术
有源矩阵有机发光二极管(Active-matrix organic light emitting diode，AMOLED)显示器具有广阔的市场应用。相关技术中，底发光有机发光二极管OLED显示器件主要用于大尺寸显示，例如OLED电视。但是大尺寸OLED显示器一直存在开口率低的问题。
发明内容
本公开提供一种OLED显示基板及其制作方法、显示装置。
第一方面，本公开提供一种有机发光二极管OLED显示基板。该OLED显示基板包括：衬底基板上阵列排布的多个开口区域；以及位于所述衬底基板上的多个存储电容，其中，所述多个存储电容中每个存储电容在所述衬底基板上的正投影与所述多个开口区域中与所述存储电容对应的开口区域在所述衬底基板上的正投影具有重叠区域。
可选地，所述多个存储电容中每个存储电容的透光率大于预设阈值，所述存储电容在所述衬底基板上的正投影落入所述开口区域在所述衬底基板上的正投影内。
可选地，所述存储电容包括第一电容电极、设置在所述第一电容电极上的第一绝缘层、设置在所述第一绝缘层上的第二电容电极、设置在所述第二 电容电极上的第二绝缘层、设置在所述第二绝缘层上的第三电容电极，且所述第三电容电极与所述第一电容电极电性连接。
可选地，所述第一电容电极是导体化的有源层；所述第二电容电极是透明电极；所述第三电容电极是所述OLED显示基板的阳极。
可选地，所述透明电极采用ITO、石墨烯和MoTi中的一种制成。
可选地，所述预设阈值是80％以上。
可选地，所述第一绝缘层是层间绝缘层，所述第二绝缘层是钝化层。
可选地，所述OLED显示基板进一步包括位于所述第一电容电极和所述第一绝缘层之间的栅绝缘层、栅电极和栅线。
可选地，所述OLED显示基板进一步包括：与所述第二电容电极位于同一层的源电极、漏电极和数据线。
可选地，所述OLED显示基板进一步包括：位于所述第一电容电极下方的遮光金属层；和位于所述遮光金属层和所述第一电容电极之间的缓冲层。
第二方面，本公开提供一种显示装置。该显示装置包括如第一方面所述的OLED显示基板。
第三方面，本公开提供一种OLED显示基板的制作方法，所述OLED显示基板包括在衬底基板上阵列排布的多个开口区域，所述制作方法包括：在所述衬底基板上制作多个存储电容，所述多个存储电容中的每个存储电容在所述衬底基板上的正投影与所述多个开口区域中与所述存储电容对应的开口区域在所述衬底基板上的正投影具有重叠区域。
可选地，在所述衬底基板上制作多个存储电容，所述多个存储电容中的每个存储电容在所述衬底基板上的正投影与所述多个开口区域中与所述存储电容对应的开口区域在所述衬底基板上的正投影具有重叠区域，包括：在所述衬底基板上制作透光率大于预设阈值的所述存储电容，所述存储电容在所述衬底基板上的正投影落入所述开口区域在所述衬底基板上的正投影内。
可选地，在所述衬底基板上制作存储电容，包括：在所述衬底基板上制作第一电容电极；制作位于所述第一电容电极上的第一绝缘层；在所述第一绝缘层上制作第二电容电极；制作位于所述第二电容电极上的第二绝缘层； 在所述第二绝缘层上制作第三电容电极，所述第三电容电极与所述第一电容电极电性连接。
可选地，制作所述第一电容电极包括采用导体化的有源层制作所述第一电容电极；制作所述第二电容电极包括采用透明导电材料制作所述第二电容电极；制作所述第三电容电极包括采用所述OLED显示基板的阳极作为所述第三电容电极。
可选地，所述透明电极采用ITO、石墨烯和MoTi中的一种制成。
可选地，所述预设阈值是80％以上。
可选地，制作位于所述第一电容电极上的第一绝缘层，包括：制作位于所述第一电容电极上的层间绝缘层；制作位于所述第二电容电极上的第二绝缘层，包括：制作位于所述第二电容电极上的钝化层。
可选地，在所述衬底基板上制作所述第一电容电极以后，在制作位于所述第一电容电极上的第一绝缘层以前，所述制作方法进一步包括：制作位于所述第一电容电极上的栅绝缘层、栅电极和栅线。
可选地，在所述第一绝缘层上制作所述第二电容电极以后，在制作位于所述第二电容电极上的第二绝缘层以前，所述制作方法进一步包括：在所述第二电容电极所在的层制作源电极、漏电极和数据线。
可选地，在所述衬底基板上制作第一电容电极以前，所述制作方法进一步包括：在所述衬底基板上制作遮光金属层；以及在所述遮光金属层上制作缓冲层。
可选地，在制作位于所述第一电容电极上的栅绝缘层、栅电极和栅线以后，采用导体化的有源层制作所述第一电容电极，包括：对所述栅绝缘层进行图案化，以形成贯穿所述栅绝缘层的过孔；通过所述过孔对所述有源层的需要进行导体化的部分进行离子注入，以形成导体化的有源层作为所述第一电容电极。
附图说明
图1为相关的OLED显示基板的开口区域与存储电容的位置关系示意图；
图2为相关的OLED显示基板的像素结构示意图；
图3为本公开的OLED显示基板的存储电容的结构示意图；
图4为本公开的一些实施例OLED显示基板的开口区域与存储电容的位置关系示意图；以及
图5为本公开的一些实施例的OLED显示基板的存储电容的具体结构示意图。
附图标记
A 存储电容
B 开口区域
21 衬底基板
22 遮光金属层
23 缓冲层
24 第一电容电极或有源层
25 层间绝缘层
26 第二电容电极或透明电极
27 钝化层
28 第三电容电极或阳极
具体实施方式
为使本公开要解决的技术问题、技术方案和优点更加清楚，下面将结合附图及具体实施例进行详细描述。
相关的OLED显示基板将开口区域和存储电容分开设计，存储电容区域无法使光线通过，从而降低了OLED显示基板的开口率。
相关的采用3T1C像素结构的OLED显示器的开口率大概在20％～30％之间，图1为相关的OLED显示基板的开口区域与存储电容的位置关系示意图，图2为相关OLED显示基板的像素结构示意图。可以看出，相关的OLED显示基板中，将开口区域B和存储电容A分开设计，存储电容区域无法使光线通过，从而降低了OLED显示基板的开口率。而且因像素结构集中于像素的 一个狭小的空间内，很容易在背板工艺中造成电性不良，这也是OLED显示基板生产中产品良率一直很难提高的原因之一。
本公开的实施例针对上述问题，提供一种OLED显示基板及其制作方法、显示装置，能够提高OLED显示基板的开口率。
本公开的一些实施例提供一种OLED显示基板。参考图3和图5，该OLED显示基板包括：位于衬底基板上的阵列排布的多个开口区域B，和多个存储电容A，其中，所述多个存储电容A中的每个存储电容在所述衬底基板21上的正投影与所述多个开口区域B中与所述存储电容对应的开口区域在所述衬底基板上的正投影具有重叠区域。
可选地，所述多个存储电容A中的每个存储电容的透光率大于预设阈值，例如80％以上，例如90％、95％等。
本实例中，存储电容的透光率大于预设阈值，并设计存储电容在衬底基板上的正投影与开口区域在衬底基板上的正投影具有重叠区域，这样可以增大存储电容的面积，又增大了像素的开口区域的面积，从而能够提高OLED显示基板的开口率；同时由于像素结构所占空间增大，线密度显著下降，还有利于产品良率的提升。
其中，存储电容的电极可以采用透明导电材料制成。通过选择存储电容的电极材料以及电极的厚度，可以使得存储电容的透光率达到80％以上，这样可以将存储电容设计在开口区域，从而能够增加像素的开口区域的面积，进而能够提高OLED显示基板的开口率。
可选地，如图4所示，所述存储电容A(虚线框内部分)在所述衬底基板上的正投影落入所述开口区域B在所述衬底基板上的正投影内，这样存储电容A不占用开口区域B之外的其他区域，从而无需在开口区域之外预留区域来放置存储电容，能够使得开口区域的面积最大化。
在具体实例中，参考图3和图5，所述存储电容包括第一电容电极24、设置在所述第一电容电极24上的第一绝缘层25、设置在所述第一绝缘层25上的第二电容电极26、设置在所述第二电容电极26上的第二绝缘层27、设置在所述第二绝缘层27上的第三电容电极28，且所述第三电容电极28与所 述第一电容电极24电性连接。该第一电容电极24与第二电容电极26提供第一电容C1，第二电容电极与第三电容电极提供第二电容C2，且该两个电容大致并行电连接(并联)，因此，该存储电容的电容值为该两个电容的电容值之和。
其中，所述第一电容电极24可以采用导体化的有源层制成，所述第二电容电极26可以采用透明电极制成；所述第三电容电极28可以采用所述OLED显示基板的阳极制成。本实例利用透明电极高透光率的特点，使之与经过导体化的有源层以及阳极之间形成存储电容，并将此存储电容作为像素的开口区域，这样即增大了像素的开口区域的面积，又增大了存储电容的面积，形成的电容也相应的增大，同时由于像素结构被大大简化，线密度显著下降，有利于产品良率的提升。一般情况下，OLED显示基板的阳极也是采用透明导电材料制成，这样存储电容的两个电容电极均为透明的。
可选地，所述透明电极可以采用ITO、石墨烯和MoTi中的一种。当然，透明电极的材料并不局限于采用ITO、石墨烯和MoTi，还可以采用其他透光率高且导电性能优良的透明导电材料。
可选地，所述OLED显示基板包括设置于第一电容电极24和第二电容电极26之间的层间绝缘层25和设置于第二电容电极26和第三电容电极28之间的钝化层27。
可选地，所述OLED显示基板包括位于所述第一电容电极24和所述层间绝缘层25之间的栅绝缘层、栅电极和栅线。
可选地，所述OLED显示基板包括与所述第二电容电极26位于同一层的源电极、漏电极和数据线。
可选地，所述OLED显示基板包括位于所述第一电容电极24下方的遮光金属层22和位于所述遮光金属层22和所述第一电容电极24之间的缓冲层23。遮光金属层22可以是Cu，Al，Ag，Mo，Cr，Nd，Ni，Mn，Ti，Ta，W等金属以及这些金属的合金。缓冲层23可以选用氧化物、氮化物或者氧氮化合物。
本公开的一些实施例还提供了一种显示装置，包括如上所述的OLED显 示基板。所述显示装置可以为：电视、显示器、数码相框、手机、平板电脑等任何具有显示功能的产品或部件，其中，所述显示装置还包括柔性电路板、印刷电路板和背板。
本实例的显示装置中，存储电容的透光率大于预设阈值，并设计存储电容在衬底基板上的正投影与与该存储电容对应的开口区域在衬底基板上的正投影具有重叠区域，这样可以增大存储电容的面积，又增大了像素的开口区域的面积，从而能够提高OLED显示基板的开口率；同时由于像素结构所占空间增大，线密度显著下降，还有利于产品良率的提升。
本公开的一些实施例还提供了一种OLED显示基板的制作方法，所述OLED显示基板包括阵列排布的多个开口区域，所述制作方法包括步骤S1。
S1:在衬底基板上制作多个存储电容，并且所述多个存储电容中的每个存储电容在所述衬底基板上的正投影与所述多个开口区域中与所述存储电容对应的开口区域在所述衬底基板上的正投影具有重叠区域。
可选地，所述多个存储电容A中的每个存储电容的透光率大于预设阈值，例如80％以上，例如90％、95％等。
本实例中，在衬底基板上制作透光率大于预设阈值的存储电容，并设计存储电容在衬底基板上的正投影与开口区域在衬底基板上的正投影具有重叠区域，这样可以增大存储电容的面积，又增大了像素的开口区域的面积，从而能够提高OLED显示基板的开口率；同时由于像素结构所占空间增大，线密度显著下降，还有利于产品良率的提升。
其中，存储电容的电极可以采用透明导电材料制成，通过选择存储电容的电极材料以及电极的厚度，可以使得存储电容的透光率达到80％以上，这样可以将存储电容设计在开口区域，从而能够增加像素的开口区域的面积，进而能够提高OLED显示基板的开口率。
可选地，所述多个存储电容中的每个存储电容在所述衬底基板上的正投影与所述多个开口区域中与所述存储电容对应的开口区域在所述衬底基板上的正投影具有重叠区域，具体包括：
所述多个存储电容中的每个存储电容在所述衬底基板上的正投影落入所 述多个开口区域中与所述存储电容对应的开口区域在所述衬底基板上的正投影以内。
这样，存储电容不占用开口区域之外的其他区域，从而无需在开口区域之外预留区域来放置存储电容，能够使得开口区域的面积最大化。
具体地，制作所述存储电容包括以下子步骤S11-S15。
S11：制作第一电容电极；
S12：制作位于所述第一电容电极上的第一绝缘层；
S13：在所述第一绝缘层上制作第二电容电极；
S14：制作位于所述第二电容电极上的第二绝缘层；
S15：在所述第二绝缘层上制作第三电容电极，所述第三电容电极与所述第一电容电极电性连接。
该第一电容电极与第二电容电极提供第一电容，第二电容电极与第三电容电极提供第二电容，且这两个电容大致并行电连接，因此，该存储电容的电容值为该两个电容的电容值之和。
可选地，制作所述第一电容电极的子步骤S11包括：采用导体化的有源层制作所述第一电容电极。
在所述第一绝缘层上制作所述第二电容电极的子步骤S13包括：采用透明导电材料制作所述第二电容电极。
可选地，在所述第二绝缘层制作所述第三电容电极的子步骤S15包括：采用所述OLED显示基板的阳极作为所述第三电容电极。
本实例利用透明电极高透光率的特点，使之与经过导体化的有源层以及阳极之间形成存储电容，并将此存储电容作为像素的开口区域，这样即增大了像素的开口区域的面积，又增大了存储电容的面积，形成的电容也相应的增大。同时由于像素结构被大大简化，线密度显著下降，有利于产品良率的提升。一般情况下，OLED显示基板的阳极也是采用透明导电材料制成，这样存储电容的两个电容电极均为透明的，能够保证存储电容的透光率比较高。
下面结合附图以及具体的实例对本公开的显示基板的制作方法进行详细介绍，本实例的显示基板的制作方法包括以下步骤：
步骤1、提供衬底基板21，在衬底基板21上形成遮光金属层22；
其中，衬底基板21可为玻璃基板或石英基板。具体地，可以采用溅射或热蒸发的方法在完成衬底基板21上沉积厚度约为
Figure PCTCN2019086780-appb-000001
的遮光金属层22，遮光金属层22可以是Cu，Al，Ag，Mo，Cr，Nd，Ni，Mn，Ti，Ta，W等金属以及这些金属的合金。由于本实例的OLED显示基板的有源层采用金属氧化物半导体制成，而金属氧化物半导体在接收到光照后性能容易发生变化，因此，需要在衬底基板21上形成遮光金属层22，遮光金属层22可以遮挡金属氧化物半导体制成的有源层，避免有源层受到光照。
步骤2、在经过步骤1的衬底基板21上制作缓冲层23；
具体地，可以采用等离子体增强化学气相沉积(PECVD)方法在完成步骤1的衬底基板1上沉积缓冲层23，缓冲层23可以选用氧化物、氮化物或者氧氮化合物。
步骤3、在经过步骤2的衬底基板21上形成有源层24；
具体地，可以在经过步骤2的衬底基板21上沉积厚度为
Figure PCTCN2019086780-appb-000002
的IGZO作为有源层24，在IGZO上涂覆一层光刻胶，采用掩膜板对光刻胶进行曝光，使光刻胶形成光刻胶未保留区域和光刻胶保留区域，其中，光刻胶保留区域对应于有源层24的图形所在区域，光刻胶未保留区域对应于上述图形以外的区域；进行显影处理，光刻胶未保留区域的光刻胶被完全去除，光刻胶保留区域的光刻胶厚度保持不变；通过刻蚀工艺完全刻蚀掉光刻胶未保留区域的IGZO，剥离剩余的光刻胶，形成有源层24的图形。
步骤4、在经过步骤3的衬底基板21上形成栅绝缘层和栅电极、栅线；
具体地，可以采用等离子体增强化学气相沉积(PECVD)方法在完成步骤3的衬底基板21上沉积厚度为
Figure PCTCN2019086780-appb-000003
的栅绝缘层，栅绝缘层可以选用氧化物、氮化物或者氧氮化合物，对应的反应气体是SiH 4、NH 3、N 2或SiH 2Cl 2、NH 3、N 2。
可以采用溅射或热蒸发的方法在栅绝缘层上沉积厚度约为
Figure PCTCN2019086780-appb-000004
的栅金属层，栅金属层可以是Cu，Al，Ag，Mo，Cr，Nd，Ni，Mn，Ti，Ta，W等金属以及这些金属的合金，栅金属层可以为单层结构或者多层结构，多 层结构比如Cu\Mo,Ti\Cu\Ti，Mo\Al\Mo等。在栅金属层上涂覆一层光刻胶，采用掩膜板对光刻胶进行曝光，使光刻胶形成光刻胶未保留区域和光刻胶保留区域，其中，光刻胶保留区域对应于栅线和栅电极的图形所在区域，光刻胶未保留区域对应于上述图形以外的区域；进行显影处理，光刻胶未保留区域的光刻胶被完全去除，光刻胶保留区域的光刻胶厚度保持不变；通过刻蚀工艺完全刻蚀掉光刻胶未保留区域的栅金属薄膜，剥离剩余的光刻胶，形成栅线和栅电极的图形。
之后干法刻蚀栅绝缘层，通过贯穿栅绝缘层的过孔对需要进行导体化的有源层24进行H离子的注入，使得有源层24导体化，导体化的有源层24作为存储电容的第一电容电极。
步骤5、在经过步骤4的衬底基板21上形成层间绝缘层25；
具体地，可以采用等离子体增强化学气相沉积方法在完成步骤4的衬底基板21上沉积层间绝缘层25，层间绝缘层25可以选用氧化物、氮化物或者氧氮化合物，利用干法刻蚀形成贯穿层间绝缘层25的过孔。
步骤6、在经过步骤5的衬底基板21上形成透明电极26；
具体地，在经过步骤5的衬底基板21上形成透明导电层，透明导电层可以采用ITO、石墨烯、MoTi等，在透明导电层上涂覆一层光刻胶，采用掩膜板对光刻胶进行曝光，使光刻胶形成光刻胶未保留区域和光刻胶保留区域，其中，光刻胶保留区域对应于透明电极26的图形所在区域，光刻胶未保留区域对应于上述图形以外的区域；进行显影处理，光刻胶未保留区域的光刻胶被完全去除，光刻胶保留区域的光刻胶厚度保持不变；通过刻蚀工艺完全刻蚀掉光刻胶未保留区域的透明导电层薄膜，剥离剩余的光刻胶，形成透明电极26的图形，其中，透明电极26与图2所示像素结构中T1管的S极(即图2中的P点)相连，作为存储电容的第二电容电极。
步骤7、在经过步骤6的衬底基板21上形成数据线、源电极和漏电极的图形；
具体地，可以在完成步骤6的衬底基板21上采用磁控溅射、热蒸发或其它成膜方法沉积一层厚度约为
Figure PCTCN2019086780-appb-000005
的源漏金属层，源漏金属层可以 是Cu，Al，Ag，Mo，Cr，Nd，Ni，Mn，Ti，Ta，W等金属以及这些金属的合金。源漏金属层可以是单层结构或者多层结构，多层结构比如Cu\Mo，Ti\Cu\Ti，Mo\Al\Mo等。在源漏金属层上涂覆一层光刻胶，采用掩膜板对光刻胶进行曝光，使光刻胶形成光刻胶未保留区域和光刻胶保留区域，其中，光刻胶保留区域对应于源电极、漏电极和数据线的图形所在区域，光刻胶未保留区域对应于上述图形以外的区域；进行显影处理，光刻胶未保留区域的光刻胶被完全去除，光刻胶保留区域的光刻胶厚度保持不变；通过刻蚀工艺完全刻蚀掉光刻胶未保留区域的源漏金属层，剥离剩余的光刻胶，形成漏电极、源电极以及数据线。
步骤8、在经过步骤7的衬底基板21上形成钝化层27；
具体地，可以在完成步骤7的衬底基板21上采用磁控溅射、热蒸发、PECVD或其它成膜方法沉积厚度为
Figure PCTCN2019086780-appb-000006
的钝化层，钝化层可以选用氧化物、氮化物或者氧氮化合物，具体地，钝化层材料可以是SiNx，SiOx或Si(ON)x，钝化层还可以使用Al 2O 3。钝化层可以是单层结构，也可以是采用氮化硅和氧化硅构成的两层结构。其中，硅的氧化物对应的反应气体可以为SiH 4，N 2O；氮化物或者氧氮化合物对应气体可以是SiH 4，NH 3，N 2或SiH 2Cl 2，NH 3，N 2。通过构图工艺形成包括有过孔的钝化层27的图形。
步骤9、在经过步骤8的衬底基板21上形成阳极28；
具体地，在经过步骤8的衬底基板21上形成透明导电层，透明导电层可以采用ITO，在透明导电层上涂覆一层光刻胶，采用掩膜板对光刻胶进行曝光，使光刻胶形成光刻胶未保留区域和光刻胶保留区域，其中，光刻胶保留区域对应于阳极28的图形所在区域，光刻胶未保留区域对应于上述图形以外的区域；进行显影处理，光刻胶未保留区域的光刻胶被完全去除，光刻胶保留区域的光刻胶厚度保持不变；通过刻蚀工艺完全刻蚀掉光刻胶未保留区域的透明导电层薄膜，剥离剩余的光刻胶，形成阳极28的图形，其中，阳极28与图2所示像素结构中T2管的S极(图2中的节点U)相连，作为存储电容的第三电容电极。
经过上述步骤即可制作得到OLED显示基板的存储电容，存储电容的结 构如图4所示，其中，导体化的有源层24、透明电极26和阳极28作为存储电容的电容电极。本实例的存储电容具有较高的透光率，因此可以设计在开口区域，这样即增大了像素的开口区域的面积，又增大了存储电容的面积，形成的电容也相应的增大。
上述方案中，存储电容的透光率大于预设阈值，并设计存储电容在衬底基板上的正投影与开口区域在衬底基板上的正投影具有重叠区域，这样可以增大存储电容的面积，又增大了像素的开口区域的面积，从而能够提高OLED显示基板的开口率；同时由于像素结构所占空间增大，线密度显著下降，还有利于产品良率的提升。
在本公开的方法实施例中，所述各步骤的序号并不能用于限定各步骤的先后顺序，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，对各步骤的先后变化也在本公开的保护范围之内。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
可以理解，当诸如层、膜、区域或基板之类的元件被称作位于另一元件“上”或“下”时，该元件可以“直接”位于另一元件“上”或“下”，或者可以存在中间元件。
以上所述是本公开的可选实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本公开所述原理的前提下，还可以作出若干改进和润饰，这些改进和润饰也应视为本公开的保护范围。

Claims (22)

  1. 一种有机发光二极管OLED显示基板，包括：
    衬底基板上阵列排布的多个开口区域；以及
    位于所述衬底基板上的多个存储电容，
    其中，所述多个存储电容中每个存储电容在所述衬底基板上的正投影与所述多个开口区域中与所述存储电容对应的开口区域在所述衬底基板上的正投影具有重叠区域。
  2. 根据权利要求1所述的OLED显示基板，其中，所述多个存储电容中每个存储电容的透光率大于预设阈值，所述存储电容在所述衬底基板上的正投影落入所述开口区域在所述衬底基板上的正投影内。
  3. 根据权利要求2所述的OLED显示基板，其中，所述存储电容包括第一电容电极、设置在所述第一电容电极上的第一绝缘层、设置在所述第一绝缘层上的第二电容电极、设置在所述第二电容电极上的第二绝缘层、设置在所述第二绝缘层上的第三电容电极，且所述第三电容电极与所述第一电容电极电性连接。
  4. 根据权利要求3所述的OLED显示基板，其中，
    所述第一电容电极是导体化的有源层；
    所述第二电容电极是透明电极；
    所述第三电容电极是所述OLED显示基板的阳极。
  5. 根据权利要求4所述的OLED显示基板，其中，
    所述透明电极采用ITO、石墨烯和MoTi中的一种制成。
  6. 根据权利要求2-5中任一项所述的OLED显示基板，其中，所述预设阈值是80％以上。
  7. 根据权利要求3-5中任一项所述的OLED显示基板，其中，
    所述第一绝缘层是层间绝缘层，所述第二绝缘层是钝化层。
  8. 根据权利要求3-5中任一项所述的OLED显示基板，进一步包括：
    位于所述第一电容电极和所述第一绝缘层之间的栅绝缘层、栅电极和栅 线。
  9. 根据权利要求3-5、7-8中任一项所述的OLED显示基板，进一步包括：
    与所述第二电容电极位于同一层的源电极、漏电极和数据线。
  10. 根据权利要求3-5、7-9中任一项所述的OLED显示基板，进一步包括：
    位于所述第一电容电极下方的遮光金属层；和
    位于所述遮光金属层和所述第一电容电极之间的缓冲层。
  11. 一种显示装置，包括：
    如权利要求1-10中任一项所述的OLED显示基板。
  12. 一种OLED显示基板的制作方法，所述OLED显示基板包括在衬底基板上阵列排布的多个开口区域，所述制作方法包括：
    在所述衬底基板上制作多个存储电容，所述多个存储电容中的每个存储电容在所述衬底基板上的正投影与所述多个开口区域中与所述存储电容对应的开口区域在所述衬底基板上的正投影具有重叠区域。
  13. 根据权利要求12所述的OLED显示基板的制作方法，其中，在所述衬底基板上制作多个存储电容，所述多个存储电容中的每个存储电容在所述衬底基板上的正投影与所述多个开口区域中与所述存储电容对应的开口区域在所述衬底基板上的正投影具有重叠区域，包括：
    在所述衬底基板上制作透光率大于预设阈值的所述存储电容，所述存储电容在所述衬底基板上的正投影落入所述开口区域在所述衬底基板上的正投影内。
  14. 根据权利要求13所述的OLED显示基板的制作方法，其中，在所述衬底基板上制作存储电容，包括：
    在所述衬底基板上制作第一电容电极；
    制作位于所述第一电容电极上的第一绝缘层；
    在所述第一绝缘层上制作第二电容电极；
    制作位于所述第二电容电极上的第二绝缘层；
    在所述第二绝缘层上制作第三电容电极，所述第三电容电极与所述第一 电容电极电性连接。
  15. 根据权利要求14所述的OLED显示基板的制作方法，其中，
    制作所述第一电容电极包括采用导体化的有源层制作所述第一电容电极；
    制作所述第二电容电极包括采用透明导电材料制作所述第二电容电极；
    制作所述第三电容电极包括采用所述OLED显示基板的阳极作为所述第三电容电极。
  16. 根据权利要求14所述的OLED显示基板的制作方法，其中，所述透明电极采用ITO、石墨烯和MoTi中的一种制成。
  17. 根据权利要求13所述的OLED显示基板的制作方法，其中，所述预设阈值是80％以上。
  18. 根据权利要求14-16中任一项所述的OLED显示基板的制作方法，其中，制作位于所述第一电容电极上的第一绝缘层，包括：制作位于所述第一电容电极上的层间绝缘层；
    制作位于所述第二电容电极上的第二绝缘层，包括：制作位于所述第二电容电极上的钝化层。
  19. 根据权利要求15所述的OLED显示基板的制作方法，其中，在所述衬底基板上制作所述第一电容电极以后，在制作位于所述第一电容电极上的第一绝缘层以前，所述制作方法进一步包括：
    制作位于所述第一电容电极上的栅绝缘层、栅电极和栅线。
  20. 根据权利要求14-16中任一项所述的OLED显示基板的制作方法，其中，在所述第一绝缘层上制作所述第二电容电极以后，在制作位于所述第二电容电极上的第二绝缘层以前，所述制作方法进一步包括：
    在所述第二电容电极所在的层制作源电极、漏电极和数据线。
  21. 根据权利要求14-16中任一项所述的OLED显示基板的制作方法，其中，在所述衬底基板上制作第一电容电极以前，所述制作方法进一步包括：
    在所述衬底基板上制作遮光金属层；以及
    在所述遮光金属层上制作缓冲层。
  22. 根据权利要求19所述的所述的OLED显示基板的制作方法，其中， 在制作位于所述第一电容电极上的栅绝缘层、栅电极和栅线以后，采用导体化的有源层制作所述第一电容电极，包括：
    对所述栅绝缘层进行图案化，以形成贯穿所述栅绝缘层的过孔；
    通过所述过孔对所述有源层的需要进行导体化的部分进行离子注入，以形成导体化的有源层作为所述第一电容电极。
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