WO2019072090A1 - Support de carte de circuit imprimé de module ci à contact, module ci fabriqué à partir dudit support et procédé de fabrication - Google Patents

Support de carte de circuit imprimé de module ci à contact, module ci fabriqué à partir dudit support et procédé de fabrication Download PDF

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Publication number
WO2019072090A1
WO2019072090A1 PCT/CN2018/107848 CN2018107848W WO2019072090A1 WO 2019072090 A1 WO2019072090 A1 WO 2019072090A1 CN 2018107848 W CN2018107848 W CN 2018107848W WO 2019072090 A1 WO2019072090 A1 WO 2019072090A1
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WO
WIPO (PCT)
Prior art keywords
segment
circuit
carrier
termination point
integrated circuit
Prior art date
Application number
PCT/CN2018/107848
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English (en)
Chinese (zh)
Inventor
吴小星
Original Assignee
爱创达应用卡工程有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 爱创达应用卡工程有限公司 filed Critical 爱创达应用卡工程有限公司
Publication of WO2019072090A1 publication Critical patent/WO2019072090A1/fr

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components

Definitions

  • the invention relates to the field of a printed circuit board (PCB) printed circuit board (PCB) carrier board, and particularly relates to a contact IC module PCB carrier board, an IC module made thereof and a manufacturing method thereof. Process.
  • PCB printed circuit board
  • PCB printed circuit board
  • the contact IC module was born in the early 1990s and is a new technology developed in the world in recent years.
  • the contact IC module is the abbreviation of the integrated circuit module and is a breakthrough in the field of electronic devices.
  • contact IC modules are mainly used to produce financial IC cards for SIM, GSM, CDMA mobile phone communication, and also in various fields of production and life such as access control, transportation, social security, identity verification and electronic wallet.
  • the contact IC module itself is a passive body.
  • the signal sent by the reader is composed of two parts: a part is a power signal, and the signal is directly supplied to the chip power supply. The other part is to combine the data signal, the command chip to complete the data, modification and storage, and return to the reader.
  • the contact IC module PCB board process in the prior art is complicated, and after the field product is produced, since the conventional carrier board is a single-sided copper clad board, the back pad is fixed in position and dispersed in position, and the interval is long, in subsequent production. In the process of the process, the distance is long, the use of the gold wire is more, the efficiency is lower, and the cost is higher.
  • the present invention provides the following technical solutions.
  • the object of the present invention is to overcome the deficiencies of the prior art, and provide a contact type IC module PCB carrier board, an IC module manufactured thereby, and a manufacturing process.
  • an integrated circuit module printed circuit carrier comprising a substrate having opposing first and second major surfaces, the first major surface and the second major surface Each of the first main surface and the second main surface is electrically connected to each other by a layer of copper and a first electrical conductive segment and a second electrical conductive segment extending through the substrate, wherein the first a first circuit segment electrically conductive and a second circuit segment electrically conductive, a first end of the first circuit segment being connected to the first electrical conduction segment a second end of the first circuit segment terminates at a first termination point, a first end of the second circuit segment is coupled to the second electrical conduction segment, and a second end of the second circuit segment terminates a second termination point, and wherein the first termination point and the second termination point are both located on a same side of a center point of the substrate, or the first termination point is more than the first electrical conduction section Near the center point of the substrate.
  • an integrated circuit module comprising a carrier, the carrier comprising a substrate having opposing first and second major surfaces, the first major surface and the The second main surface is covered with a layer of copper, and the first electrical conductive portion and the second electrical conductive portion penetrating the substrate are electrically connected to the first main surface and the second main surface.
  • the first main surface has an electrically conductive first circuit line segment and an electrically conductive second circuit line segment, and the first end of the first circuit segment is connected to the first electrical conduction segment And the second end of the first circuit segment terminates at a first termination point, the first end of the second circuit segment is connected to the second electrical conduction segment, and the second circuit segment is The two ends terminate at a second termination point, and wherein the first termination point and the second termination point are both located on a same side of a center point of the substrate, or the first termination point is greater than the first electrical point
  • the conductive segment is closer to a center point of the substrate, and has at least a first solder joint and a second solder An integrated circuit chip of a contact, wherein the first solder joint of the integrated circuit wafer is electrically connected to the first termination point of the first circuit segment of the carrier, and the integrated circuit wafer The second solder joint is electrically connected to the second termination point of the second circuit segment of the carrier.
  • a method of fabricating an integrated circuit module printed circuit carrier comprising the steps of (a) providing a substrate having opposing first major surfaces and second major surfaces, said first The main surface is covered with a first layer of copper, and the second main surface is covered with a second layer of copper, (b) forming a first hole and a second hole penetrating the substrate, and (c) filling the first portion with copper a hole to form a first electrical conductive segment to electrically connect the first major surface and the second major surface, (d) filling the second hole with copper to form a second electrical conduction a segment electrically connecting the first major surface and the second major surface, and (e) forming a first circuit segment electrically conductive on the first major surface and a second circuit segment electrically conducting The first end of the first circuit segment is connected to the first electrical conduction segment, and the second end of the first circuit segment terminates at a first termination point, and the second circuit segment The first end of the second circuit segment is connected to the second
  • a method of fabricating an integrated circuit module comprising the steps of: (f) fabricating an integrated circuit module printed circuit carrier, comprising the steps of (a) providing a substrate having opposing first mains a surface and a second major surface, the first major surface is covered with a first layer of copper, and the second major surface is covered with a second layer of copper, (b) forming a first hole and a second hole through the substrate (c) filling the first hole with copper to form a first electrical conductive segment to electrically connect the first major surface and the second major surface, (d) filling the copper with the a second hole to form a second electrical conductive segment to electrically connect the first major surface and the second major surface, and (e) to form a first electrical circuit electrically conductive on the first major surface a second circuit segment of the line segment and the electrical conduction, wherein the first end of the first circuit segment is connected to the first electrical conduction segment, and the second end of the first circuit segment is terminated
  • the present invention has the following beneficial effects compared with the prior art: the manufacturing process of the contact type IC module PCB carrier board of the invention is relatively simple, and the invention replaces the traditional single-sided copper-clad board with the double-sided copper-clad board. Therefore, the circuit can also be designed on the back side, and the via hole and the pad are connected through the circuit, so that the pad can be concentratedly distributed to the position close to the solder joint of the wafer, thereby reducing the thread of the wire bonding process and greatly reducing the gold wire. The dosage greatly improves the efficiency, reduces the cost, and helps to improve the market competitiveness of the present invention.
  • FIG. 1 through 10 illustrate a method of fabricating a printed circuit board of a contact integrated circuit module in accordance with an embodiment of the present invention
  • Figure 11 shows a partial cutaway view of a contact integrated circuit module in accordance with one embodiment of the present invention
  • FIG. 12 through 16 illustrate a method of fabricating a contact integrated circuit module in accordance with one embodiment of the present invention.
  • a large FR4 two opposing major surfaces, which are covered with a layer of copper, are cut to a suitable working size for use as the substrate 12.
  • the opposite upper major surface 14a and lower surface 14b of the substrate 12 are also covered with a layer of copper.
  • the substrate 12 is also referred to herein as a "Flexible Circuit Board” (FCB).
  • FCB Flexible Circuit Board
  • at least two holes 16 penetrating the substrate 12 are formed on the substrate 12 (eg, by drilling).
  • the electroplating tank includes the following raw materials: 70 g per liter of copper sulfate, grams per litre, 50 PPM parts, and 5 ml per liter (millilitres per litre) ), electroplating tin, stannous sulfate 30 grams per liter (grams per litre), sulfuric acid 200 grams per liter (grams per litre), and tin light agent 20 milliliters per liter (millilitres per litre).
  • the holes 16 are filled with copper to form electrical conductive segments 18 that electrically connect the upper major surface 14a and the lower major surface 14b of the substrate 12.
  • the copper of some of the electrically conductive segments 18 protrudes above the copper of the major surfaces 14a, 14b of the substrate 12.
  • the copper of the copper layer protruding from the two main surfaces 14a, 14b of the substrate 12 is smoothed by the ceramic grinder 20 to flatten the two main surfaces 14a, 14b of the substrate 12, as shown in FIG. 6 is shown.
  • the photosensitive material is applied to the lower surface 14b of the substrate 12 to form a pre-designed wiring pattern using the working principle of the photographic film.
  • a copper layer is formed on the formed wiring pattern by electroplating chemistry, and excess copper is removed by the copper etching solution to obtain a final desired line.
  • the electroplating etching has an operating temperature of 0 ° C to 45 ° C and a time of approximately 2 hours.
  • the electroplating tank includes the following raw materials: tin-light agent 20 ml per liter (millilitres per litre), sulfuric acid 180 g per liter (grams per litre), copper light agent 5 ml per liter (millitres per litre), copper sulfate 70 g per liter (grams per litre), chlorides 50 PPM (parts per million), electroplated tin 30 g per liter (grams per litre), and stannous sulfate 30 g per gram (grams per litre); copper solution from copper chloride and ammonia Made by mixing.
  • the copper layers of the upper and lower main surfaces 14a, 14b of the substrate 12 are surface-treated, and then the upper and lower sides of the substrate 12 are passed by the method of Electroless Nickel Immersion Gold (ENIG).
  • ENIG Electroless Nickel Immersion Gold
  • a layer of nickel 22 and a layer of gold 24 are deposited on each of the copper layers of surfaces 14a, 14b.
  • the raw materials of the Shenjin tank include: 4.6 grams per litre of nickel ions, 100 ml per liter of gold opener (millitres per litre), 0.8 g per liter of gold salt, and 3 g of palladium ions. Per gram per litre.
  • the working temperature of the immersion gold is 0 ° C to 95 ° C, and the time is approximately 2 hours.
  • a nickel layer 22 is deposited over the copper layers of the upper and lower major surfaces 14a, 14b of the substrate 12, while a gold layer 24 is deposited over the nickel layer 22.
  • Figure 8 shows an integrated circuit module printed circuit carrier 25 made in accordance with the present invention having an upper major surface 27a having five exposed contact points A1, B1, C1 extending through the electrical conductive segments 18 of the carrier 25. , D1 and E1.
  • FIG. 9 shows the lower main surface 27b of the carrier 25 shown in FIG.
  • A1, B1, C1, D1 and E1 are exposed contact points on the lower main surface 27b of the five electrical penetration sections 18 of the through-board 25, respectively corresponding to the carrier 25 shown in FIG.
  • Contact points A1, B1, C1, D1 and E1 of the upper main surface 27a are exposed contact points on the lower main surface 27b of the five electrical penetration sections 18 of the through-board 25, respectively corresponding to the carrier 25 shown in FIG.
  • the contact point A1 is physically and electrically connected (for example, by soldering) to one of the circuit segments 26 of the line formed on the lower main surface 27b of the carrier 25, and the other end of the circuit segment 26 is terminated.
  • the contact point B1 is physically and electrically connected (eg, by soldering) to one of the circuit segments 28 of the line formed on the lower major surface 27b of the carrier 25, and the other end of the circuit segment 28 terminates at B2;
  • the point C1 is physically and electrically connected (for example, by soldering) to one of the circuit segments 30 of the line formed on the lower main surface 27b of the carrier 25, and the other end of the circuit segment 30 terminates at C2;
  • the contact point D1 is formed One of the circuit segments 32 of the line of the lower major surface 27b of the carrier 25 is physically and electrically connected (e.g., by soldering), the other end of the circuit segment 32 terminates at D2; and the contact point E1 is formed on the carrier One of the circuit segments 34 of the
  • the contact points A2, B2, C2, D2, and E2 are all located on the same side of the center point of the carrier 25. Taking FIG. 9 as an example, the contact points A2, B2, C2, D2, and E2 are both located on the left side of the center point of the carrier 25.
  • an integrated circuit (IC) chip 36 is mounted over the lower major surface 27b of the carrier 12 to form an integrated circuit module (IC module) 37, particularly a contact IC module, particularly suitable for For the production of SIM cards.
  • the integrated circuit chip 36 has five solder joints, which are electrically connected to the contact points A2, B2, C2, D2 and E2 by gold wires 38, respectively. Since the contact points A2, B2, C2, D2 and E2 are all located on the same side of the integrated circuit chip 36 (also on the same side of the center point of the lower main surface 27b of the carrier 27), especially on the left side, especially in the integrated circuit One side of the solder joint of the wafer 36, thereby reducing the overall length of the desired gold wire 38, thereby reducing cost.
  • FIG 10 shows another possible arrangement of the lower major surface 27b of the carrier 25 shown in Figure 8.
  • the contact point A1 is physically and electrically connected (for example, by soldering) to one of the circuit segments 40 of the line formed on the lower main surface 27b of the carrier 25, and the other end of the circuit segment 40 terminates at A2;
  • the contact point B1 and One of the circuit segments 42 formed on the line of the lower main surface 27b of the carrier 25 is physically and electrically connected (for example, by soldering), the other end of the circuit segment 42 is terminated at B2;
  • the contact point C1 is formed on the carrier
  • One of the circuit segments 44 of the line of the lower major surface 27b of 25 is physically and electrically connected (e.g., by soldering), the other end of the circuit segment 44 terminates at C2;
  • the contact point D1 is formed with the lower host formed on the carrier 25.
  • One of the circuit segments 46 of the line of surface 27b is physically and electrically connected (e.g., by soldering), the other end of circuit segment 46 terminates at D2; and contact point E1 is formed with the lower major surface 27b of carrier 25
  • One of the circuit segments 48 of the line is physically and electrically connected (e.g., by soldering) and the other end of the circuit segment 48 terminates at E2.
  • A2 is closer to the center point of the lower main surface 14b of the substrate 12 than A1 (also the center point of the lower main surface 27b of the carrier 27); B2 is closer to the center point of the lower main surface 14b of the substrate 12 than B1.
  • the total length of the gold wires 50 for electrically connecting the five pads and the contact points A2, B2, C2, D2, and E2 on the integrated circuit chip 26 can also be reduced, thereby reducing the cost.
  • Figure 11 shows a partial cutaway view of the IC module 37 showing two exposed contact points A1 of the electrical conduction section 18, one above the upper surface 27a of the carrier 25 and the other on the carrier 25 Above the lower surface 27b.
  • Figure 11 also shows a contact point A2 above the lower surface 27b of the carrier 25 which is electrically connected to the contact point A1 above the lower surface 27b of the carrier 25 by circuit segments 26/40.
  • the contact point A2 of the IC chip 36 with the lower surface 27b of the carrier 25 is electrically connected by a gold wire 38/50.
  • the contact point A2 on the lower surface 27b of the carrier 25, the circuit segment 26/40, the contact point A1 above the lower surface 27b of the carrier 25, and the electrical conduction segment 18 The associated pads on the IC wafer 36 are electrically connected to the contact point A1 above the upper surface 27a of the carrier 25.
  • an adhesive 60 is provided at a central portion of the lower surface 27b of the carrier 25, and then the IC wafer 36 is placed to be fixed to the lower surface 27b of the carrier 25, and then The gold wires 38/50 are joined between the solder joints of the contact point A2 and the IC wafer 36 (e.g., by soldering) to provide an electrically conductive adhesive 62 to make the connections more secure.
  • a protective agent 64 is provided to form a protective layer 66 to protect the entire IC wafer 36.
  • the manufacturing process of the contact IC module PCB carrier board and the contact IC module of the present invention is relatively simple, and the present invention uses a double-sided copper clad board to replace the traditional single-sided copper clad board, so the back side (the lower main table)
  • the electrical conduction section 18 and the pads i.e., the contact points A2, B2, C2, D2, and E2 above the lower surface 27b of the carrier 25
  • the pads can be concentratedly distributed to the position close to the solder joint of the integrated circuit chip 36, thereby reducing the threading process, greatly reducing the amount of the gold wire, greatly improving the efficiency, reducing the cost, and improving the market competitiveness of the present invention.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

L'invention concerne un support de circuit imprimé de module de circuit intégré à contact (25), comprenant un substrat (12) qui présente une surface principale supérieure (14a) et une surface principale inférieure (14b) opposée à la surface principale supérieure (14a), les surfaces principales supérieure et inférieure étant recouvertes d'une couche de cuivre. Une section de conduction électrique (18) pénétrant dans le substrat connecte électriquement les surfaces principales supérieure et inférieure. Des segments de circuit (26, 28, 30, 32, 34, 40, 42, 44, 46, 48) sont électroconducteurs sur la surface principale inférieure. Des premières extrémités des segments de circuit sont connectées à un segment de conduction électrique. Des secondes extrémités des segments de circuit se terminent au niveau de points de terminaison (A2, B2, C2, D2, E3) de chaque segment de circuit, les points de terminaison étant tous situés sur un même côté du point central du substrat ou étant plus proches du centre du substrat que les segments électroconducteurs auxquels les points de terminaison sont connectés.
PCT/CN2018/107848 2017-10-11 2018-09-27 Support de carte de circuit imprimé de module ci à contact, module ci fabriqué à partir dudit support et procédé de fabrication WO2019072090A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201710941946.1A CN109661103A (zh) 2017-10-11 2017-10-11 接触式ic模块pcb载板、以之制成的ic模块及制作工艺
CN201710941946.1 2017-10-11

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Publication Number Publication Date
WO2019072090A1 true WO2019072090A1 (fr) 2019-04-18

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PCT/CN2018/107848 WO2019072090A1 (fr) 2017-10-11 2018-09-27 Support de carte de circuit imprimé de module ci à contact, module ci fabriqué à partir dudit support et procédé de fabrication

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CN (1) CN109661103A (fr)
WO (1) WO2019072090A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112788836A (zh) * 2019-11-08 2021-05-11 隆达电子股份有限公司 具有多层桥接结构的电路集成装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6467947A (en) * 1987-09-08 1989-03-14 Nec Corp Ic package substrate
CN1519920A (zh) * 2003-01-31 2004-08-11 株式会社东芝 半导体器件和半导体器件的制造方法
JP2004253554A (ja) * 2003-02-19 2004-09-09 Shinko Electric Ind Co Ltd 配線基板の製造方法
CN1722938A (zh) * 2001-04-10 2006-01-18 日本电气株式会社 电路基板及其安装方法、以及使用该电路基板的电子设备
CN201000885Y (zh) * 2006-12-25 2008-01-02 南通大学 一种无引线集成电路芯片封装

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6467947A (en) * 1987-09-08 1989-03-14 Nec Corp Ic package substrate
CN1722938A (zh) * 2001-04-10 2006-01-18 日本电气株式会社 电路基板及其安装方法、以及使用该电路基板的电子设备
CN1519920A (zh) * 2003-01-31 2004-08-11 株式会社东芝 半导体器件和半导体器件的制造方法
JP2004253554A (ja) * 2003-02-19 2004-09-09 Shinko Electric Ind Co Ltd 配線基板の製造方法
CN201000885Y (zh) * 2006-12-25 2008-01-02 南通大学 一种无引线集成电路芯片封装

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112788836A (zh) * 2019-11-08 2021-05-11 隆达电子股份有限公司 具有多层桥接结构的电路集成装置
CN112788836B (zh) * 2019-11-08 2022-11-15 隆达电子股份有限公司 具有多层桥接结构的电路集成装置

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