WO2019063533A1 - Composant et son procédé de production - Google Patents

Composant et son procédé de production Download PDF

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Publication number
WO2019063533A1
WO2019063533A1 PCT/EP2018/075933 EP2018075933W WO2019063533A1 WO 2019063533 A1 WO2019063533 A1 WO 2019063533A1 EP 2018075933 W EP2018075933 W EP 2018075933W WO 2019063533 A1 WO2019063533 A1 WO 2019063533A1
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WIPO (PCT)
Prior art keywords
semiconductor chip
carrier substrate
cooling structure
partial surface
electrical connector
Prior art date
Application number
PCT/EP2018/075933
Other languages
German (de)
English (en)
Inventor
Bernd Eckardt
Maximilian Hofmann
Thomas MENRATH
Thomas Schriefer
Original Assignee
Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.
Friedrich-Alexander-Universität Erlangen-Nürnberg
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Publication date
Application filed by Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V., Friedrich-Alexander-Universität Erlangen-Nürnberg filed Critical Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.
Publication of WO2019063533A1 publication Critical patent/WO2019063533A1/fr

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    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]

Definitions

  • the invention relates to a component having at least one carrier substrate with a first side and an opposite second side and with at least one first semiconductor chip having a first side and an opposite second side, wherein the first side of the semiconductor chip is ⁇ arranged on the second side of the carrier substrate ,
  • the component has at least ⁇ an electrical connector to which is fastened to a contact of the semiconductor chips.
  • the invention relates to a method for producing such a component.
  • Components of this kind can be
  • the at least one semiconductor chip may comprise a field-effect or bipolar transistor or an IGBT
  • the included at least a half ⁇ conductor chip freewheeling diodes or other snubber.
  • the ceramic substrate may eventually provided with at ⁇ connection contacts and installed in a housing.
  • the housing can be attached to a heat sink, in order in this way in the operation in Semiconductor chip resulting power loss as heat
  • a semiconductor module with a metallized substrate is known.
  • a semiconductor chip is mounted on the metallized first side of the substrate.
  • a plurality of cooling structures are welded.
  • Each of the cooling structures includes a plurality of weld beads stacked and extending away from the substrate.
  • DE 10 2014 203 309 A1 shows a method for producing an electronic module having at least the following steps: providing a printed circuit board provided with a first electrically conductive structuring, attaching at least one electronic component to the first electrically conductive structuring and pure additives thereon
  • a semiconductor module having a first surface, a second surface opposite the first surface, and edge sides extending between the first surface and the second surface Extend surface.
  • a package assembly is at least partially made by a 3D printing process.
  • JP 2004-363 295 A shows a semiconductor device with high heat dissipation and high reliability.
  • the semiconductor component is heated via its connection contacts.
  • the invention is therefore based on the object to provide a component and a method for its production, which allows a more efficient cooling of the semiconductor chip.
  • a component with at least one carrier substrate is proposed.
  • the carrier substrate is in the Generally planar design with a first side and an opposite second side.
  • the carrier substrate in some embodiments of the invention, may include a metal, an alloy, a ceramic, diamond, or a plastic.
  • the carrier substrate can be composed of a plurality of individual layers, which in turn contain or consist of different materials.
  • a ceramic or a plastic may be filled with conductive particles in order to realize in this way predefinable electrical or thermal properties, in particular by a predefinable
  • the carrier substrate may in some embodiments of the invention have a thickness between about 0.1 mm and about 1 mm. In other embodiments of the invention, the carrier substrate may have a thickness between about 0.2 mm and about 0.6 mm.
  • At least one semiconductor chip is arranged on the carrier substrate.
  • the semiconductor chip is flat and has a first side and an opposite second side.
  • the semiconductor chip may in some embodiments of the invention consist of SiC, GaN, GaAs or an element semiconductor such as silicon or germanium.
  • the semiconductor chip may be composed of a plurality of individual layers and have, for example partial areas on ⁇ which are provided with a metallization.
  • the semiconductor chip can be a lateral
  • the volume of the semiconductor chip is divided into different subregions with different ⁇ Licher doping and / or chemical composition to realize in this way per se known electronic components.
  • these devices may or may not include power semiconductors such as bipolar or field effect transistors consist.
  • power semiconductors such as bipolar or field effect transistors consist.
  • the semiconductor substrate protection elements such as free-wheeling diode ⁇ .
  • the first side of the semiconductor chip is arranged on the second side of the carrier substrate. For this purpose can
  • a solder connection or a sintered connection or an adhesive connection can be used.
  • an electrical insulation layer or else at least one electrical conductor for electrically contacting the semiconductor chip may be arranged between the carrier substrate and the semiconductor chip. The invention does not require that the carrier substrate and the semiconductor chip are directly connected to each other.
  • the carrier substrate with the semiconductor chip arranged thereon can, in a manner known per se, be encased in a housing
  • the device further comprises at least one electrical connector on, for example, a bonding wire or a structured metal layer which electrical contact areas of the semiconductor chip with the connection ⁇ contacts the housing and / or connecting contacts on the carrier substrate and / or terminal contacts connects on another semiconductor chip.
  • the electrical connectors may also contain a metal or alloy for this purpose. In some embodiments, this alloy may include or consist of gold and / or silver and / or copper.
  • Temperature can switch a higher electrical load.
  • the switching frequency can be increased, which also results in a higher thermal load, which can be dissipated by the cooling structures according to the invention.
  • the cooling of the semiconductor chip over its second side can thus lead in some embodiments to the fact that the
  • the cooling structure according to the invention is produced in a generative or additive manufacturing process.
  • a generative or additive manufacturing process For the purposes of the present description is under such
  • Production method understood a method in which in a plurality of process steps each one
  • preparation may be by a powder bed process.
  • a powder bed process may be selected from selective laser melting, selective laser sintering or electron beam melting.
  • a free space method may be used, for example
  • the cooling structures of the invention can also be generated by 3D-screen printing or hold such a process step ⁇ ent. Due to the generative production method, the cooling structure according to the invention avoids additional heat transfer. reference resistance between the carrier substrate and the cooling ⁇ structure or between the semiconductor chip and the cooling structure. Due to the direct, cohesive connection of the cooling structure with the heat source results in an increased compared to the prior art heat dissipation, so that a higher thermal power can be dissipated from the semiconductor chip. In addition, the pre ⁇ troubled additive manufacturing process also allows the generation of very small or very complex cooling structure so that partial areas of the semiconductor chips and / or the carrier substrate can be used for heat dissipation, which were not previously available.
  • the cooling structure may include a base plate having ribs disposed thereon.
  • the base plate serves the uniform distribution of heat to the individual, arranged thereon ribs.
  • the ribs themselves can be arranged approximately perpendicular to the base plate and serve to increase the surface area, so that the heat can be released to a surrounding fluid with high efficiency.
  • the ribs themselves may be subdivided again, so that the optical
  • the base plate can be produced cohesively directly on the surface to be heat-treated, so that heat transfer resistances are minimized.
  • the ribs or fingers can be cohesively arranged on the base plate and in this way have low heat transfer resistance.
  • the cooling structure is produced by melting a powder, which is a metal or a
  • the melting of the powder can be carried out in some embodiments of the invention by laser radiation and / or by an electron beam.
  • the cooling structures are produced layer by layer from a powder bed.
  • the powder is melted at predetermined locations by laser radiation and subsequently applied to a further layer of the powder, which in turn
  • the powder may contain or consist of aluminum and / or copper and / or ceramic and / or titanium and / or silver
  • materials have a sufficiently low melting point, so that the production of the cooling structure is possible in a simple manner.
  • these materials show a good thermal conductivity, which ensures effective cooling of the semiconductor chip.
  • At least a partial surface of the second side of the semiconductor chip ⁇ be applied a metallization, on which the cooling structure is firmly bonded.
  • Metallization can be produced by conventional methods of semiconductor fabrication. For this purpose, for example, the surface of the semiconductor chip by sputtering and / or vapor deposition and / or galvanically provided with a full-surface metal layer, which is subsequently removed by structuring with a resist mask and subsequent etching in some sub-areas again.
  • Such metallizations are known to produce terminal contacts and / or electrical traces on semiconductor devices. According to the invention, such
  • Metallizations which will anyway need as a terminal contact and / or electrical trace on the semiconductor chip, in addition to be provided with a cooling structure and to use in this way in addition to the heat dissipation.
  • the production by means of an additive manufacturing ⁇ method allows it to produce instead of a large, full ⁇ area cooling structure on the second side of the semiconductor chip in a simple manner, a plurality of individual, smaller cooling structures. These can be so far apart that electrical short circuits between adjacent tracks are prevented.
  • At least one second semiconductor chip may be arranged on the first side of the carrier substrate.
  • the carrier substrate can be provided on both sides with semiconductor chips. As a result, the packing density of electrical
  • the cooling structure may be materially bonded to at least one electrical connector. This makes it possible to dissipate heat via the terminal contact of the semiconductor chip in the electrical connector and from there via a cooling structure to the environment. Since the electrical connectors usually have a greater distance from the semiconductor chip, can on the electrical connectors a larger area for Are available, which allows larger cooling structures, which in turn can dissipate a larger amount of heat to the environment.
  • Fig. 1 shows a first embodiment of a device according to the invention.
  • Fig. 2 shows a second embodiment of the inventive ⁇ component.
  • Fig. 3 shows a third embodiment of the device according to Inventive ⁇ .
  • Fig. 4 shows a fourth embodiment of the device according to Inventive ⁇ .
  • Fig. 5 shows a fifth embodiment of the device according to Inventive ⁇ .
  • Fig. 6 shows a sixth embodiment of the device according to Inventive ⁇ .
  • the construction ⁇ element 1 has a support substrate. 2
  • the carrier substrate 2 may in some embodiments of the invention consist of or contain a metal, an alloy, a ceramic or diamond.
  • a ceramic can be any suitable material.
  • the carrier substrate 2 has a first side 21 and an opposite second side 22.
  • the carrier substrate 2 serves for the mechanical fastening of the semiconductor chips 3 arranged thereon.
  • the carrier substrate 2 can have connection contacts, which are connected to associated connection contacts on the semiconductor chip 3 by electrical connectors 4. These can be connected or contacted with a bond 6.
  • the first side 21 of the carrier substrate 2 is provided with an optional metallization 43.
  • the metallization 43 can, for example, by sputtering, vapor deposition, in a thick-film process or by electroless or
  • the metallization 43 on the first side 21 may for example serve to elec trical contact ⁇ or current carrying or
  • Base plate 8 to be performed a soldering or sintering or adhesive connection. Such a solder joint provides a
  • Cohesive connection which is a mechanically robust connection between the carrier substrate 2 and the base plate 8 and allows low pressure undergraduategangswider ⁇ stands.
  • a first half ⁇ semiconductor chip 3 is disposed on the second side 22 of the carrier substrate. 2
  • the semiconductor chip 3 has
  • the second side 32 of the semiconductor chip 3 has a metallization 43, which may form, for example electrical An ⁇ circuit contacts and / or electrical conductor tracks.
  • the metallization 43 is after her
  • Deposition has been structured by known lithographic processes.
  • semiconductor chip may be present, which is arranged on the second side 32 of the first semiconductor chip 3. This can be done for example by a solder or sintered connection or by other methods known per se, such as flip-chip bonding.
  • the semiconductor chip 3 may be a power semiconductor in some embodiments of the invention, i. by lateral structuring and doping are on the semiconductor chip 3 devices such as bipolar or
  • the semiconductor chip 3 may also contain at least one logic chip, for example a microprocessor or a microcontroller or an FPGA, which also generate heat during operation due to electrical power loss, which must be dissipated.
  • a logic chip for example a microprocessor or a microcontroller or an FPGA, which also generate heat during operation due to electrical power loss, which must be dissipated.
  • FIG. 1 also shows an electrical connector 4, which has a metallization 43, which is used as an electrical connection. is formed on the carrier substrate 2 with an associated electrical connector with the semiconductor chip 3.
  • the electrical connector 4 can be connected, for example, by soldering, welding or bonding with the connection contacts or the metallization 43.
  • the cooling structure 5 includes a plurality of ribs or fingers 52
  • Heat exchange increases with the surrounding fluid surface available, so that the semiconductor chip 3 can be more reliably cooled.
  • the cooling structure 5 can be arranged directly under the contact points of the connector 4 with the metallization 43 or the connection contacts. In some embodiments of the invention, the cooling structure 5 may additionally be arranged in some longitudinal sections of the electrical connector 4.
  • the cooling structure 5 is produced in the illustrated embodiment by an additive manufacturing process from a powder bed. As a result of the cooling structure according to the invention, the second side 32 of the semiconductor chips 3 facing away from the carrier substrate 2 is also available for dissipating heat. Due to the improved cooling, higher
  • the second embodiment also has a carrier substrate 2.
  • the carrier substrate is provided on both sides with semiconductor chips.
  • the second side 22 of the carrier substrate 2 to a first half ⁇ semiconductor chip 3 which is connected with its first side 31 by means of a solder joint 33 on the carrier substrate.
  • a second semiconductor chip 35 On the opposite first side 21 of the carrier substrate 2 is a second semiconductor chip 35, which is also connected to the carrier substrate 2 with a solder joint 33.
  • the third embodiment has a similar structure as that explained with reference to FIG. 1 first embodiment.
  • the cooling structures 5 are not disposed on the electrical connector 4, but directly on the semiconductor chip 3.
  • the second side of the semicon ⁇ conductor chip 3 have partial surfaces, which with a
  • Metallization are provided. On this metallization can be at least one cooling structure 5 by a generative
  • Manufacturing process can be generated directly. As a result, high heat transfer resistance can be avoided.
  • Fig. 3 shows cooling structures 55, which are arranged on the metallization 431, which via the solder ⁇ point 33, the connection between the support substrate 2 and conveys the semiconductor chip 3. This can heat from the carrier substrate 2 facing side of the semiconductor chip 3 are reliably dissipated.
  • Fig. 4 shows a fourth embodiment of the present invention.
  • the fourth embodiment also connects a carrier substrate 2.
  • a cooling structure 5 has been produced by a generative manufacturing method.
  • the cooling structure 5 is on a
  • Metallization 42 has been deposited on the carrier substrate 2 beforehand, for example, by galvanic or electroless plating, by a thick film process, a DCB / DAB process, or by vacuum deposition.
  • the cooling structure 5 has a base plate 51 on which a plurality of ribs 52 is arranged. Also between base plate 51 and the ribs 52 is a cohesive
  • the opposite second side 22 of the carrier substrate is provided with a metallization 42, on which at least one semiconductor chip 3 is arranged.
  • the carrier substrate 2 is made of an electrically and thermally conductive material.
  • the metallization of a ceramic carrier substrate shown in Fig. 4 can be omitted.
  • the cooling structure 5 can be produced directly on the first side 21 of the metallic carrier substrate 2 by additive manufacturing methods.
  • the solder joint 33 for attaching at least one semiconductor chip 3 can be performed directly on the metallic carrier substrate, so that 22 additional metallizations can be omitted on the second side.
  • FIG. 6 shows a sixth embodiment of the present invention.
  • the sixth embodiment again uses a carrier substrate 2 made of a plastic or a ceramic, which has been provided at least partially with a metallization 42.
  • On the first side 21 is a second semiconductor chip 35.
  • On the second side 22 of the carrier substrate 2 is a first semiconductor chip 3.
  • the semiconductor chips can be
  • the two semiconductor chips 3 and 35 are offset from each other in the lateral direction
  • each opposite a cooling ⁇ structure 5 can be arranged.
  • the cooling structure 5 is located on a metallization 42, each of which is below the respective

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

L'invention concerne un composant (1) comprenant au moins un substrat porteur (2) ayant un premier côté (21) et un deuxième côté (22) opposé, et comprenant au moins une première puce en semiconducteur (3) ayant un premier côté (31) et un deuxième côté (32) opposé, le premier côté (31) de la première puce en semiconducteur (3) étant disposé sur le deuxième côté (22) du substrat porteur (2), et comprenant au moins un connecteur électrique (4) qui est fixé à un contact de la puce en semiconducteur (3). Au moins une structure de refroidissement (5), qui a été produite par fusion d'une poudre qui contient un métal ou un alliage ou qui s'en compose, est disposée sur au moins une surface partielle du connecteur électrique (4) et/ou sur au moins une surface partielle du deuxième côté (32) de la puce en semiconducteur (3) et/ou sur au moins une surface partielle du substrat porteur (2). L'invention concerne en outre un procédé de fabrication d'un tel composant.
PCT/EP2018/075933 2017-09-29 2018-09-25 Composant et son procédé de production WO2019063533A1 (fr)

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DE102017217406.4A DE102017217406A1 (de) 2017-09-29 2017-09-29 Bauelement und Verfahren zu dessen Herstellung

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DE102021214136A1 (de) 2021-12-10 2023-06-15 Vitesco Technologies GmbH Flüssigkeitsgekühltes elektronisches Bauelement

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JP2004363295A (ja) 2003-06-04 2004-12-24 Mitsubishi Electric Corp 半導体装置
JP2010219419A (ja) * 2009-03-18 2010-09-30 Fuji Electric Systems Co Ltd 半導体装置およびその製造方法
JP2010045399A (ja) * 2009-11-17 2010-02-25 Mitsubishi Electric Corp パワー半導体装置
DE102010029650A1 (de) * 2010-06-02 2011-12-08 Rwth Aachen Halbleiterbauelement und Verfahren zur Herstellung desselben
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