WO2019063533A1 - Component, and method for the production thereof - Google Patents

Component, and method for the production thereof Download PDF

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Publication number
WO2019063533A1
WO2019063533A1 PCT/EP2018/075933 EP2018075933W WO2019063533A1 WO 2019063533 A1 WO2019063533 A1 WO 2019063533A1 EP 2018075933 W EP2018075933 W EP 2018075933W WO 2019063533 A1 WO2019063533 A1 WO 2019063533A1
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WO
WIPO (PCT)
Prior art keywords
semiconductor chip
carrier substrate
cooling structure
partial surface
electrical connector
Prior art date
Application number
PCT/EP2018/075933
Other languages
German (de)
French (fr)
Inventor
Bernd Eckardt
Maximilian Hofmann
Thomas MENRATH
Thomas Schriefer
Original Assignee
Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.
Friedrich-Alexander-Universität Erlangen-Nürnberg
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V., Friedrich-Alexander-Universität Erlangen-Nürnberg filed Critical Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.
Publication of WO2019063533A1 publication Critical patent/WO2019063533A1/en

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    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]

Definitions

  • the invention relates to a component having at least one carrier substrate with a first side and an opposite second side and with at least one first semiconductor chip having a first side and an opposite second side, wherein the first side of the semiconductor chip is ⁇ arranged on the second side of the carrier substrate ,
  • the component has at least ⁇ an electrical connector to which is fastened to a contact of the semiconductor chips.
  • the invention relates to a method for producing such a component.
  • Components of this kind can be
  • the at least one semiconductor chip may comprise a field-effect or bipolar transistor or an IGBT
  • the included at least a half ⁇ conductor chip freewheeling diodes or other snubber.
  • the ceramic substrate may eventually provided with at ⁇ connection contacts and installed in a housing.
  • the housing can be attached to a heat sink, in order in this way in the operation in Semiconductor chip resulting power loss as heat
  • a semiconductor module with a metallized substrate is known.
  • a semiconductor chip is mounted on the metallized first side of the substrate.
  • a plurality of cooling structures are welded.
  • Each of the cooling structures includes a plurality of weld beads stacked and extending away from the substrate.
  • DE 10 2014 203 309 A1 shows a method for producing an electronic module having at least the following steps: providing a printed circuit board provided with a first electrically conductive structuring, attaching at least one electronic component to the first electrically conductive structuring and pure additives thereon
  • a semiconductor module having a first surface, a second surface opposite the first surface, and edge sides extending between the first surface and the second surface Extend surface.
  • a package assembly is at least partially made by a 3D printing process.
  • JP 2004-363 295 A shows a semiconductor device with high heat dissipation and high reliability.
  • the semiconductor component is heated via its connection contacts.
  • the invention is therefore based on the object to provide a component and a method for its production, which allows a more efficient cooling of the semiconductor chip.
  • a component with at least one carrier substrate is proposed.
  • the carrier substrate is in the Generally planar design with a first side and an opposite second side.
  • the carrier substrate in some embodiments of the invention, may include a metal, an alloy, a ceramic, diamond, or a plastic.
  • the carrier substrate can be composed of a plurality of individual layers, which in turn contain or consist of different materials.
  • a ceramic or a plastic may be filled with conductive particles in order to realize in this way predefinable electrical or thermal properties, in particular by a predefinable
  • the carrier substrate may in some embodiments of the invention have a thickness between about 0.1 mm and about 1 mm. In other embodiments of the invention, the carrier substrate may have a thickness between about 0.2 mm and about 0.6 mm.
  • At least one semiconductor chip is arranged on the carrier substrate.
  • the semiconductor chip is flat and has a first side and an opposite second side.
  • the semiconductor chip may in some embodiments of the invention consist of SiC, GaN, GaAs or an element semiconductor such as silicon or germanium.
  • the semiconductor chip may be composed of a plurality of individual layers and have, for example partial areas on ⁇ which are provided with a metallization.
  • the semiconductor chip can be a lateral
  • the volume of the semiconductor chip is divided into different subregions with different ⁇ Licher doping and / or chemical composition to realize in this way per se known electronic components.
  • these devices may or may not include power semiconductors such as bipolar or field effect transistors consist.
  • power semiconductors such as bipolar or field effect transistors consist.
  • the semiconductor substrate protection elements such as free-wheeling diode ⁇ .
  • the first side of the semiconductor chip is arranged on the second side of the carrier substrate. For this purpose can
  • a solder connection or a sintered connection or an adhesive connection can be used.
  • an electrical insulation layer or else at least one electrical conductor for electrically contacting the semiconductor chip may be arranged between the carrier substrate and the semiconductor chip. The invention does not require that the carrier substrate and the semiconductor chip are directly connected to each other.
  • the carrier substrate with the semiconductor chip arranged thereon can, in a manner known per se, be encased in a housing
  • the device further comprises at least one electrical connector on, for example, a bonding wire or a structured metal layer which electrical contact areas of the semiconductor chip with the connection ⁇ contacts the housing and / or connecting contacts on the carrier substrate and / or terminal contacts connects on another semiconductor chip.
  • the electrical connectors may also contain a metal or alloy for this purpose. In some embodiments, this alloy may include or consist of gold and / or silver and / or copper.
  • Temperature can switch a higher electrical load.
  • the switching frequency can be increased, which also results in a higher thermal load, which can be dissipated by the cooling structures according to the invention.
  • the cooling of the semiconductor chip over its second side can thus lead in some embodiments to the fact that the
  • the cooling structure according to the invention is produced in a generative or additive manufacturing process.
  • a generative or additive manufacturing process For the purposes of the present description is under such
  • Production method understood a method in which in a plurality of process steps each one
  • preparation may be by a powder bed process.
  • a powder bed process may be selected from selective laser melting, selective laser sintering or electron beam melting.
  • a free space method may be used, for example
  • the cooling structures of the invention can also be generated by 3D-screen printing or hold such a process step ⁇ ent. Due to the generative production method, the cooling structure according to the invention avoids additional heat transfer. reference resistance between the carrier substrate and the cooling ⁇ structure or between the semiconductor chip and the cooling structure. Due to the direct, cohesive connection of the cooling structure with the heat source results in an increased compared to the prior art heat dissipation, so that a higher thermal power can be dissipated from the semiconductor chip. In addition, the pre ⁇ troubled additive manufacturing process also allows the generation of very small or very complex cooling structure so that partial areas of the semiconductor chips and / or the carrier substrate can be used for heat dissipation, which were not previously available.
  • the cooling structure may include a base plate having ribs disposed thereon.
  • the base plate serves the uniform distribution of heat to the individual, arranged thereon ribs.
  • the ribs themselves can be arranged approximately perpendicular to the base plate and serve to increase the surface area, so that the heat can be released to a surrounding fluid with high efficiency.
  • the ribs themselves may be subdivided again, so that the optical
  • the base plate can be produced cohesively directly on the surface to be heat-treated, so that heat transfer resistances are minimized.
  • the ribs or fingers can be cohesively arranged on the base plate and in this way have low heat transfer resistance.
  • the cooling structure is produced by melting a powder, which is a metal or a
  • the melting of the powder can be carried out in some embodiments of the invention by laser radiation and / or by an electron beam.
  • the cooling structures are produced layer by layer from a powder bed.
  • the powder is melted at predetermined locations by laser radiation and subsequently applied to a further layer of the powder, which in turn
  • the powder may contain or consist of aluminum and / or copper and / or ceramic and / or titanium and / or silver
  • materials have a sufficiently low melting point, so that the production of the cooling structure is possible in a simple manner.
  • these materials show a good thermal conductivity, which ensures effective cooling of the semiconductor chip.
  • At least a partial surface of the second side of the semiconductor chip ⁇ be applied a metallization, on which the cooling structure is firmly bonded.
  • Metallization can be produced by conventional methods of semiconductor fabrication. For this purpose, for example, the surface of the semiconductor chip by sputtering and / or vapor deposition and / or galvanically provided with a full-surface metal layer, which is subsequently removed by structuring with a resist mask and subsequent etching in some sub-areas again.
  • Such metallizations are known to produce terminal contacts and / or electrical traces on semiconductor devices. According to the invention, such
  • Metallizations which will anyway need as a terminal contact and / or electrical trace on the semiconductor chip, in addition to be provided with a cooling structure and to use in this way in addition to the heat dissipation.
  • the production by means of an additive manufacturing ⁇ method allows it to produce instead of a large, full ⁇ area cooling structure on the second side of the semiconductor chip in a simple manner, a plurality of individual, smaller cooling structures. These can be so far apart that electrical short circuits between adjacent tracks are prevented.
  • At least one second semiconductor chip may be arranged on the first side of the carrier substrate.
  • the carrier substrate can be provided on both sides with semiconductor chips. As a result, the packing density of electrical
  • the cooling structure may be materially bonded to at least one electrical connector. This makes it possible to dissipate heat via the terminal contact of the semiconductor chip in the electrical connector and from there via a cooling structure to the environment. Since the electrical connectors usually have a greater distance from the semiconductor chip, can on the electrical connectors a larger area for Are available, which allows larger cooling structures, which in turn can dissipate a larger amount of heat to the environment.
  • Fig. 1 shows a first embodiment of a device according to the invention.
  • Fig. 2 shows a second embodiment of the inventive ⁇ component.
  • Fig. 3 shows a third embodiment of the device according to Inventive ⁇ .
  • Fig. 4 shows a fourth embodiment of the device according to Inventive ⁇ .
  • Fig. 5 shows a fifth embodiment of the device according to Inventive ⁇ .
  • Fig. 6 shows a sixth embodiment of the device according to Inventive ⁇ .
  • the construction ⁇ element 1 has a support substrate. 2
  • the carrier substrate 2 may in some embodiments of the invention consist of or contain a metal, an alloy, a ceramic or diamond.
  • a ceramic can be any suitable material.
  • the carrier substrate 2 has a first side 21 and an opposite second side 22.
  • the carrier substrate 2 serves for the mechanical fastening of the semiconductor chips 3 arranged thereon.
  • the carrier substrate 2 can have connection contacts, which are connected to associated connection contacts on the semiconductor chip 3 by electrical connectors 4. These can be connected or contacted with a bond 6.
  • the first side 21 of the carrier substrate 2 is provided with an optional metallization 43.
  • the metallization 43 can, for example, by sputtering, vapor deposition, in a thick-film process or by electroless or
  • the metallization 43 on the first side 21 may for example serve to elec trical contact ⁇ or current carrying or
  • Base plate 8 to be performed a soldering or sintering or adhesive connection. Such a solder joint provides a
  • Cohesive connection which is a mechanically robust connection between the carrier substrate 2 and the base plate 8 and allows low pressure undergraduategangswider ⁇ stands.
  • a first half ⁇ semiconductor chip 3 is disposed on the second side 22 of the carrier substrate. 2
  • the semiconductor chip 3 has
  • the second side 32 of the semiconductor chip 3 has a metallization 43, which may form, for example electrical An ⁇ circuit contacts and / or electrical conductor tracks.
  • the metallization 43 is after her
  • Deposition has been structured by known lithographic processes.
  • semiconductor chip may be present, which is arranged on the second side 32 of the first semiconductor chip 3. This can be done for example by a solder or sintered connection or by other methods known per se, such as flip-chip bonding.
  • the semiconductor chip 3 may be a power semiconductor in some embodiments of the invention, i. by lateral structuring and doping are on the semiconductor chip 3 devices such as bipolar or
  • the semiconductor chip 3 may also contain at least one logic chip, for example a microprocessor or a microcontroller or an FPGA, which also generate heat during operation due to electrical power loss, which must be dissipated.
  • a logic chip for example a microprocessor or a microcontroller or an FPGA, which also generate heat during operation due to electrical power loss, which must be dissipated.
  • FIG. 1 also shows an electrical connector 4, which has a metallization 43, which is used as an electrical connection. is formed on the carrier substrate 2 with an associated electrical connector with the semiconductor chip 3.
  • the electrical connector 4 can be connected, for example, by soldering, welding or bonding with the connection contacts or the metallization 43.
  • the cooling structure 5 includes a plurality of ribs or fingers 52
  • Heat exchange increases with the surrounding fluid surface available, so that the semiconductor chip 3 can be more reliably cooled.
  • the cooling structure 5 can be arranged directly under the contact points of the connector 4 with the metallization 43 or the connection contacts. In some embodiments of the invention, the cooling structure 5 may additionally be arranged in some longitudinal sections of the electrical connector 4.
  • the cooling structure 5 is produced in the illustrated embodiment by an additive manufacturing process from a powder bed. As a result of the cooling structure according to the invention, the second side 32 of the semiconductor chips 3 facing away from the carrier substrate 2 is also available for dissipating heat. Due to the improved cooling, higher
  • the second embodiment also has a carrier substrate 2.
  • the carrier substrate is provided on both sides with semiconductor chips.
  • the second side 22 of the carrier substrate 2 to a first half ⁇ semiconductor chip 3 which is connected with its first side 31 by means of a solder joint 33 on the carrier substrate.
  • a second semiconductor chip 35 On the opposite first side 21 of the carrier substrate 2 is a second semiconductor chip 35, which is also connected to the carrier substrate 2 with a solder joint 33.
  • the third embodiment has a similar structure as that explained with reference to FIG. 1 first embodiment.
  • the cooling structures 5 are not disposed on the electrical connector 4, but directly on the semiconductor chip 3.
  • the second side of the semicon ⁇ conductor chip 3 have partial surfaces, which with a
  • Metallization are provided. On this metallization can be at least one cooling structure 5 by a generative
  • Manufacturing process can be generated directly. As a result, high heat transfer resistance can be avoided.
  • Fig. 3 shows cooling structures 55, which are arranged on the metallization 431, which via the solder ⁇ point 33, the connection between the support substrate 2 and conveys the semiconductor chip 3. This can heat from the carrier substrate 2 facing side of the semiconductor chip 3 are reliably dissipated.
  • Fig. 4 shows a fourth embodiment of the present invention.
  • the fourth embodiment also connects a carrier substrate 2.
  • a cooling structure 5 has been produced by a generative manufacturing method.
  • the cooling structure 5 is on a
  • Metallization 42 has been deposited on the carrier substrate 2 beforehand, for example, by galvanic or electroless plating, by a thick film process, a DCB / DAB process, or by vacuum deposition.
  • the cooling structure 5 has a base plate 51 on which a plurality of ribs 52 is arranged. Also between base plate 51 and the ribs 52 is a cohesive
  • the opposite second side 22 of the carrier substrate is provided with a metallization 42, on which at least one semiconductor chip 3 is arranged.
  • the carrier substrate 2 is made of an electrically and thermally conductive material.
  • the metallization of a ceramic carrier substrate shown in Fig. 4 can be omitted.
  • the cooling structure 5 can be produced directly on the first side 21 of the metallic carrier substrate 2 by additive manufacturing methods.
  • the solder joint 33 for attaching at least one semiconductor chip 3 can be performed directly on the metallic carrier substrate, so that 22 additional metallizations can be omitted on the second side.
  • FIG. 6 shows a sixth embodiment of the present invention.
  • the sixth embodiment again uses a carrier substrate 2 made of a plastic or a ceramic, which has been provided at least partially with a metallization 42.
  • On the first side 21 is a second semiconductor chip 35.
  • On the second side 22 of the carrier substrate 2 is a first semiconductor chip 3.
  • the semiconductor chips can be
  • the two semiconductor chips 3 and 35 are offset from each other in the lateral direction
  • each opposite a cooling ⁇ structure 5 can be arranged.
  • the cooling structure 5 is located on a metallization 42, each of which is below the respective

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

The invention relates to a component (1) having: at least one support substrate (2) with a first face (21) and an opposite second face (22); at least one first semiconductor chip (3) with a first face (31) and an opposite second face (32), the first face (31) of the semiconductor chip (3) being arranged on the second face (22) of the support substrate (2); and at least one electrical connector (4) which is fastened to a contact of the semiconductor chip (3), wherein at least one cooling structure (5) is situated on at least one portion of the electrical connector (4) and/or on at least one portion of the second face (32) of the semiconductor chip (3) and/or on at least one portion of the support substrate (2), said cooling structure having been produced by melting a powder which contains or consists of a metal or an alloy. The invention also relates to a method for producing such a component.

Description

Bauelement und Verfahren zu dessen Herstellung  Component and method for its production
Die Erfindung betrifft ein Bauelement mit zumindest einem Trägersubstrat mit einer ersten Seite und einer gegenüberliegenden zweiten Seite und mit zumindest einem ersten Halbleiterchip mit einer ersten Seite und einer gegenüberliegenden zweiten Seite, wobei die erste Seite des Halb¬ leiterchips auf der zweiten Seite des Trägersubstrates angeordnet ist. Darüber hinaus weist das Bauelement zumin¬ dest einen elektrischen Verbinder auf, welcher an einem Kontakt des Halbleiterchips befestigt ist. Weiterhin The invention relates to a component having at least one carrier substrate with a first side and an opposite second side and with at least one first semiconductor chip having a first side and an opposite second side, wherein the first side of the semiconductor chip is ¬ arranged on the second side of the carrier substrate , In addition, the component has at least ¬ an electrical connector to which is fastened to a contact of the semiconductor chips. Farther
betrifft die Erfindung ein Verfahren zur Herstellung eines solchen Bauelementes. Bauelemente dieser Art können The invention relates to a method for producing such a component. Components of this kind can
beispielsweise in der Leistungselektronik verwendet werden. Dementsprechend kann der zumindest eine Halbleiterchip einen Feldeffekt- oder Bipolartransistor oder einen IGBT be used for example in power electronics. Accordingly, the at least one semiconductor chip may comprise a field-effect or bipolar transistor or an IGBT
enthalten. Darüber hinaus kann der zumindest eine Halb¬ leiterchip Freilaufdioden oder andere Beschaltungselemente enthalten . contain. Moreover, the included at least a half ¬ conductor chip freewheeling diodes or other snubber.
Aus der Praxis ist bekannt, Leistungshalbleiter wie From practice it is known power semiconductors such
beispielsweise Transistoren in großer Zahl auf einem Halb- leiterwafer herzustellen und nachfolgend zu vereinzeln. Die so erhaltenen Halbleiterchips werden gewöhnlich auf For example, produce transistors in large numbers on a semiconductor wafer and then to separate. The semiconductor chips thus obtained usually become
metallisierten Keramiksubstraten durch Löten oder Sintern befestigt. Das Keramiksubstrat kann schließlich mit An¬ schlusskontakten versehen und in ein Gehäuse eingebaut werden. Beim Aufbau einer elektronischen Schaltung mit diesem Bauelement kann das Gehäuse an einem Kühlkörper befestigt werden, um auf diese Weise die im Betrieb im Halbleiterchip entstehende Verlustleistung als Wärme metallized ceramic substrates attached by soldering or sintering. The ceramic substrate may eventually provided with at ¬ connection contacts and installed in a housing. When building an electronic circuit with this device, the housing can be attached to a heat sink, in order in this way in the operation in Semiconductor chip resulting power loss as heat
abzuführen . dissipate.
Diese bekannten Bauelemente weisen jedoch den Nachteil auf, dass die im Halbleiterchip entstehende Wärme zunächst an das Trägersubstrat abgegeben werden muss. Auch zwischen Trägersubstrat und Kühlkörper entstehen weitere Wärmeübergangs¬ widerstände. Die Oberseite des Halbleitersubstrates wird innerhalb des Gehäuses nicht nennenswert entwärmt. Hierdurch kann die entstehende Verlustleistung nur unzulänglich abgeführt werden, was die mit dem Bauelement schaltbare elektrische Leistung begrenzt. However, these known components have the disadvantage that the heat generated in the semiconductor chip must first be delivered to the carrier substrate. Also between the carrier substrate and the heat sink arise more heat transfer ¬ resistances. The top of the semiconductor substrate is not appreciably cooled within the housing. As a result, the resulting power loss can be dissipated only inadequate, which limits the switchable with the device electrical power.
Aus der DE 10 2014 105 727 AI ist ein Halbleitermodul mit einem metallisierten Substrat bekannt. Auf der metallisierten ersten Seite des Substrats ist ein Halbleiterchip angebracht. An der metallisierten zweiten Seite des Substrats sind mehrere Kühlstrukturen angeschweißt. Jede der Kühlstrukturen enthält eine Vielzahl von Schweißperlen, die gestapelt angeordnet sind und die sich vom Substrat weg erstrecken . From DE 10 2014 105 727 Al a semiconductor module with a metallized substrate is known. On the metallized first side of the substrate, a semiconductor chip is mounted. On the metallized second side of the substrate, a plurality of cooling structures are welded. Each of the cooling structures includes a plurality of weld beads stacked and extending away from the substrate.
Die DE 10 2014 203 309 AI zeigt ein Verfahren zum Herstellen eines Elektronikmoduls mit mindestens folgenden Schritten: Bereitstellen einer mit einer ersten elektrisch leitfähigen Strukturierung versehenen Leiterplatte, Anbringen mindestens eines elektronischen Bauelements an der ersten elektrisch leitfähigen Strukturierung und darauf rein additives DE 10 2014 203 309 A1 shows a method for producing an electronic module having at least the following steps: providing a printed circuit board provided with a first electrically conductive structuring, attaching at least one electronic component to the first electrically conductive structuring and pure additives thereon
Herstellen einer isolierenden und einer zweiten elektrisch leitfähigen Strukturierung. Producing an insulating and a second electrically conductive structuring.
Die DE 10 2015 102 884 AI offenbart ein Verfahren zum Packen eines Halbleitermoduls die Bereitstellung eines DE 10 2015 102 884 AI discloses a method for packaging a semiconductor module providing a
Halbleitermoduls mit einer ersten Oberfläche, einer zweiten Oberfläche gegenüber der ersten Oberfläche und Kantenseiten, die sich zwischen der ersten Oberfläche und der zweiten Oberfläche erstrecken. Eine Packungsbaugruppe wird zumindest teilweise durch ein 3D-Druckverfahren hergestellt. A semiconductor module having a first surface, a second surface opposite the first surface, and edge sides extending between the first surface and the second surface Extend surface. A package assembly is at least partially made by a 3D printing process.
Die DE 10 2015 108 131 AI betrifft ein Verfahren sowie eine Vorrichtung zum Herstellen eines metallischen Formkörpers mittels eines additiv-generativen Verfahrens. Dabei werden die Prozessparameter mittels entsprechender Sensoren DE 10 2015 108 131 A1 relates to a method and an apparatus for producing a metallic shaped body by means of an additive-additive method. The process parameters are determined by means of appropriate sensors
überwacht und basierend auf diesen Prozessparametern sowie den für die Fertigung des Formkörpers zugrundeliegenden Geometriebeschreibungsdaten Regelparameter während der monitored and based on these process parameters and the underlying for the production of the molding geometry description data control parameters during the
Fertigung angepasst. Production adapted.
Die JP 2004- 363 295 A zeigt ein Halbleiterbauelement mit hoher Wärmeableitung und hoher Zuverlässigkeit. Dazu wird das Halbleiterbauelement über seine Anschlusskontakte entwärmt . JP 2004-363 295 A shows a semiconductor device with high heat dissipation and high reliability. For this purpose, the semiconductor component is heated via its connection contacts.
Aus der DE 10 2014 110 845 AI ist eine Vorrichtung bekannt, welche ein Substrat umfasst mit einem elektrisch From DE 10 2014 110 845 AI a device is known which comprises a substrate with an electric
isolierenden Kern, einem ersten elektrisch leitenden insulating core, a first electrically conductive
Material, das über einer ersten Hauptfläche des Substrats angeordnet ist, und einem zweiten elektrisch leitenden Material disposed over a first major surface of the substrate, and a second electrically conductive
Material, das über einer zweiten Hauptfläche des Substrats gegenüber der ersten Hauptfläche angeordnet ist. Material disposed over a second major surface of the substrate opposite the first major surface.
Ausgehend vom Stand der Technik liegt der Erfindung somit die Aufgabe zugrunde, ein Bauelement und ein Verfahren zu dessen Herstellung anzugeben, welches eine effizientere Entwärmung des Halbleiterchips ermöglicht. Starting from the prior art, the invention is therefore based on the object to provide a component and a method for its production, which allows a more efficient cooling of the semiconductor chip.
Die Aufgabe wird erfindungsgemäß durch eine Vorrichtung gemäß Anspruch 1 und ein Verfahren nach Anspruch 8 gelöst. Vorteilhafte Weiterbildungen der Erfindung finden sich in den Unteransprüchen. The object is achieved by a device according to claim 1 and a method according to claim 8. Advantageous developments of the invention can be found in the subclaims.
Erfindungsgemäß wird ein Bauelement mit zumindest einem Trägersubstrat vorgeschlagen. Das Trägersubstrat ist in der Regel flächig ausgebildet mit einer ersten Seite und einer gegenüberliegenden zweiten Seite. Das Trägersubstrat kann in einigen Ausführungsformen der Erfindung ein Metall, eine Legierung, eine Keramik, Diamant oder einen Kunststoff enthalten. Das Trägersubstrat kann aus einer Mehrzahl von Einzelschichten zusammengesetzt sein, welche ihrerseits wieder unterschiedliche Materialien enthalten oder daraus bestehen. Eine Keramik oder ein Kunststoff können mit leitfähigen Partikeln gefüllt sein, um auf diese Weise vorgebbare elektrische oder thermische Eigenschaften zu realisieren, insbesondere um eine vorgebbare According to the invention, a component with at least one carrier substrate is proposed. The carrier substrate is in the Generally planar design with a first side and an opposite second side. The carrier substrate, in some embodiments of the invention, may include a metal, an alloy, a ceramic, diamond, or a plastic. The carrier substrate can be composed of a plurality of individual layers, which in turn contain or consist of different materials. A ceramic or a plastic may be filled with conductive particles in order to realize in this way predefinable electrical or thermal properties, in particular by a predefinable
Wärmeleitfähigkeit bzw. einen gewünschten Thermal conductivity or a desired
Wärmeübergangswiderstand des Trägersubstrates zu erzielen.  To achieve heat transfer resistance of the carrier substrate.
Das Trägersubstrat kann in einigen Ausführungsformen der Erfindung eine Dicke zwischen etwa 0,1 mm und etwa 1 mm aufweisen. In anderen Ausführungsformen der Erfindung kann das Trägersubstrat eine Dicke zwischen etwa 0,2 mm und etwa 0,6 mm aufweisen. The carrier substrate may in some embodiments of the invention have a thickness between about 0.1 mm and about 1 mm. In other embodiments of the invention, the carrier substrate may have a thickness between about 0.2 mm and about 0.6 mm.
Auf dem Trägersubstrat ist zumindest ein Halbleiterchip angeordnet. Auch der Halbleiterchip ist flächig ausgebildet und weist eine erste Seite und eine gegenüberliegende zweite Seite auf. Der Halbleiterchip kann in einigen Ausführungsformen der Erfindung aus SiC, GaN, GaAs oder einem Elementhalbleiter wie Silizium oder Germanium bestehen. Auch der Halbleiterchip kann aus einer Mehrzahl von Einzelschichten zusammengesetzt sein und beispielsweise Teilflächen auf¬ weisen, welche mit einer Metallisierung versehen sind. At least one semiconductor chip is arranged on the carrier substrate. Also, the semiconductor chip is flat and has a first side and an opposite second side. The semiconductor chip may in some embodiments of the invention consist of SiC, GaN, GaAs or an element semiconductor such as silicon or germanium. Also, the semiconductor chip may be composed of a plurality of individual layers and have, for example partial areas on ¬ which are provided with a metallization.
Darüber hinaus kann der Halbleiterchip eine laterale In addition, the semiconductor chip can be a lateral
Strukturierung aufweisen, d.h. das Volumen des Halbleiterchips ist in unterschiedliche Teilbereiche mit unterschied¬ licher Dotierung und/oder chemischer Zusammensetzung unterteilt, um auf diese Weise an sich bekannte elektronische Bauelemente zu realisieren. In einigen Ausführungsformen der Erfindung können diese Bauelemente Leistungshalbleiter wie Bipolar- oder Feldeffekttransistoren enthalten oder daraus bestehen. Darüber hinaus können auf dem Halbleitersubstrat Schutzelemente integriert sein, beispielsweise Freilauf¬ dioden . Have structuring, ie, the volume of the semiconductor chip is divided into different subregions with different ¬ Licher doping and / or chemical composition to realize in this way per se known electronic components. In some embodiments of the invention, these devices may or may not include power semiconductors such as bipolar or field effect transistors consist. In addition, may be integrated on the semiconductor substrate protection elements, such as free-wheeling diode ¬.
Die erste Seite des Halbleiterchips ist auf der zweiten Seite des Trägersubstrates angeordnet. Hierzu kann The first side of the semiconductor chip is arranged on the second side of the carrier substrate. For this purpose can
beispielsweise eine Lötverbindung oder eine Sinterverbindung oder eine Klebeverbindung verwendet werden. Optional kann zwischen dem Trägersubstrat und dem Halbleiterchip eine elektrische Isolationsschicht oder auch zumindest eine elektrische Leiterbahn zur elektrischen Kontaktierung des Halbleiterchips angeordnet sein. Die Erfindung fordert nicht, dass das Trägersubstrat und der Halbleiterchip unmittelbar miteinander verbunden sind. For example, a solder connection or a sintered connection or an adhesive connection can be used. Optionally, an electrical insulation layer or else at least one electrical conductor for electrically contacting the semiconductor chip may be arranged between the carrier substrate and the semiconductor chip. The invention does not require that the carrier substrate and the semiconductor chip are directly connected to each other.
Das Trägersubstrat mit dem darauf angeordneten Halbleiter¬ chip kann in an sich bekannter Weise in ein Gehäuse The carrier substrate with the semiconductor chip arranged thereon can, in a manner known per se, be encased in a housing
eingesetzt werden, welches die mechanische Befestigung des Bauelementes auf einer Leiterplatte und die elektrische Kontaktierung des Halbleiterchips ermöglicht. can be used, which allows the mechanical attachment of the device on a circuit board and the electrical contacting of the semiconductor chip.
Hierzu weist das Bauelement weiterhin zumindest einen elektrischen Verbinder auf, beispielsweise einen Bonddraht oder eine strukturierte Metallschicht, welche elektrische Kontaktflächen des Halbleiterchips mit den Anschluss¬ kontakten des Gehäuses und/oder Anschlusskontakten auf dem Trägersubstrat und/oder Anschlusskontakten auf weiteren Halbleiterchips verbindet. Die elektrischen Verbinder können hierzu ebenfalls ein Metall oder eine Legierung enthalten. In einigen Ausführungsformen kann diese Legierung Gold und/oder Silber und/oder Kupfer enthalten oder daraus bestehen . For this purpose, the device further comprises at least one electrical connector on, for example, a bonding wire or a structured metal layer which electrical contact areas of the semiconductor chip with the connection ¬ contacts the housing and / or connecting contacts on the carrier substrate and / or terminal contacts connects on another semiconductor chip. The electrical connectors may also contain a metal or alloy for this purpose. In some embodiments, this alloy may include or consist of gold and / or silver and / or copper.
Erfindungsgemäß wird nun vorgeschlagen, dass auf zumindest einer Teilfläche des elektrischen Verbinders und/oder zumindest einer Teilfläche der zweiten Seite des Halbleiter¬ chips und/oder auf zumindest einer Teilfläche der ersten Seite des Trägersubstrats zumindest eine Kühlstruktur angeordnet ist, welche durch additives Fertigungsverfahren erzeugt wurde. Hierdurch steht nicht nur die dem Träger¬ substrat zugewandte erste Seite des Halbleiterchips zur Entwärmung zur Verfügung. Vielmehr wird über die erfindungsgemäße Kühlstruktur auch über die dem Trägersubstrat abge¬ wandte zweite Seite des Halbleiterchips Wärme abgeführt, so dass der Halbleiterchip bei gleichen Betriebsparametern eine niedrigere Temperatur aufweist oder aber bei gleicher According to the invention, it is now proposed that on at least one partial surface of the electrical connector and / or at least one partial surface of the second side of the semiconductor chip and / or on at least one partial surface of the first Side of the carrier substrate at least one cooling structure is arranged, which was produced by additive manufacturing process. As a result, not only is the substrate ¬ facing the first side of the semiconductor chip for cooling available. Rather is the invention cooling structure using the abge the carrier substrate ¬ turned second side of the semiconductor chip heat dissipated so that the semiconductor chip has a lower temperature under the same operating parameters, or at the same
Temperatur eine höhere elektrische Last schalten kann. Im Falle von Logikschaltungen oder Mikroprozessoren kann die Schaltfrequenz erhöht sein, wodurch ebenfalls eine höhere thermische Last entsteht, welche durch die erfindungsgemäßen Kühlstrukturen abgeführt werden kann. Die Entwärmung des Halbleiterchips über dessen zweite Seite kann somit in einigen Ausführungsformen dazu führen, dass die Temperature can switch a higher electrical load. In the case of logic circuits or microprocessors, the switching frequency can be increased, which also results in a higher thermal load, which can be dissipated by the cooling structures according to the invention. The cooling of the semiconductor chip over its second side can thus lead in some embodiments to the fact that the
Leistungsfähigkeit des Bauelementes erhöht wird. Performance of the device is increased.
Die erfindungsgemäße Kühlstruktur wird in einem generativen bzw. additiven Herstellungsverfahren erzeugt. Für die Zwecke der vorliegenden Beschreibung wird unter einem solchen The cooling structure according to the invention is produced in a generative or additive manufacturing process. For the purposes of the present description is under such
Herstellungsverfahren ein Verfahren verstanden, bei welchem in einer Mehrzahl von Verfahrensschritten jeweils eine Production method understood a method in which in a plurality of process steps each one
Materialmenge zu dem im vorherigen Verfahrensschritt Quantity of material to that in the previous process step
entstandenen Halbzeug hinzugefügt wird. Beispielsweise kann die Herstellung in einigen Ausführungsformen der Erfindung durch ein Pulverbettverfahren erfolgen. Ein Pulverbettverfahren kann ausgewählt sein aus selektivem Laserschmelzen, selektivem Lasersintern oder Elektronenstrahlschmelzen. In anderen Ausführungsformen der Erfindung kann ein Freiraumverfahren verwendet werden, beispielsweise added semifinished product is added. For example, in some embodiments of the invention, preparation may be by a powder bed process. A powder bed process may be selected from selective laser melting, selective laser sintering or electron beam melting. In other embodiments of the invention, a free space method may be used, for example
Electron-Beam-Welding, Kaltgasspritzen oder Auftragschweißen. In einigen Ausführungsformen der Erfindung können die erfindungsgemäßen Kühlstrukturen auch durch 3D-Siebdruck erzeugt werden oder einen solchen Verfahrensschritt ent¬ halten. Durch das generative Fertigungsverfahren vermeidet die erfindungsgemäße Kühlstruktur zusätzliche Wärmeüber- gangswiderstände zwischen dem Trägersubstrat und der Kühl¬ struktur bzw. zwischen dem Halbleiterchip und der Kühlstruktur. Durch die unmittelbare, Stoffschlüssige Verbindung der Kühlstruktur mit der Wärmequelle ergibt sich ein im Vergleich zum Stand der Technik erhöhter Wärmeabfluss , so dass eine höhere thermische Leistung vom Halbleiterchip abgeführt werden kann. Darüber hinaus erlaubt das vorge¬ schlagene additive Fertigungsverfahren auch das Erzeugen sehr kleiner oder sehr komplexer Kühlstrukturen, so dass Teilflächen des Halbleiterchips und/oder des Trägersubstrates zur Entwärmung verwendet werden können, welche bislang nicht nutzbar waren. Electron-beam welding, cold gas spraying or build-up welding. In some embodiments of the invention, the cooling structures of the invention can also be generated by 3D-screen printing or hold such a process step ¬ ent. Due to the generative production method, the cooling structure according to the invention avoids additional heat transfer. reference resistance between the carrier substrate and the cooling ¬ structure or between the semiconductor chip and the cooling structure. Due to the direct, cohesive connection of the cooling structure with the heat source results in an increased compared to the prior art heat dissipation, so that a higher thermal power can be dissipated from the semiconductor chip. In addition, the pre ¬ troubled additive manufacturing process also allows the generation of very small or very complex cooling structure so that partial areas of the semiconductor chips and / or the carrier substrate can be used for heat dissipation, which were not previously available.
In einigen Ausführungsformen der Erfindung kann die Kühlstruktur eine Grundplatte mit darauf angeordneten Rippen aufweisen. Die Grundplatte dient dabei der gleichmäßigen Verteilung der Wärme auf die einzelnen, darauf angeordneten Rippen. Die Rippen selbst können in etwa senkrecht auf der Grundplatte angeordnet sein und dienen der Oberflächenvergrößerung, so dass die Wärme mit hoher Effizienz an ein umgebendes Fluid abgegeben werden kann. In einigen Ausführungsformen der Erfindung können die Rippen selbst nochmals unterteilt sein, so dass sich das optische In some embodiments of the invention, the cooling structure may include a base plate having ribs disposed thereon. The base plate serves the uniform distribution of heat to the individual, arranged thereon ribs. The ribs themselves can be arranged approximately perpendicular to the base plate and serve to increase the surface area, so that the heat can be released to a surrounding fluid with high efficiency. In some embodiments of the invention, the ribs themselves may be subdivided again, so that the optical
Erscheinungsbild einzelner Stifte oder Finger ergibt, welche auf der Grundplatte angeordnet sind. Die Grundplatte kann Stoffschlüssig unmittelbar auf der zu entwärmenden Oberfläche erzeugt werden, so dass Wärmeübergangswiderstände minimiert sind. Auch die Rippen bzw. Finger können stoffschlüssig auf der Grundplatte angeordnet sein und auf diese Weise geringe Wärmeübergangswiderstände aufweisen. Appearance of individual pins or fingers results, which are arranged on the base plate. The base plate can be produced cohesively directly on the surface to be heat-treated, so that heat transfer resistances are minimized. The ribs or fingers can be cohesively arranged on the base plate and in this way have low heat transfer resistance.
Gemäß der Erfindung wird die Kühlstruktur durch Aufschmelzen eines Pulvers erzeugt, welches ein Metall oder eine According to the invention, the cooling structure is produced by melting a powder, which is a metal or a
Legierung enthält oder daraus besteht. Das Aufschmelzen des Pulvers kann in einigen Ausführungsformen der Erfindung durch Laserstrahlung und/oder durch einen Elektronenstrahl erfolgen. Hierdurch können die erfindungsgemäßen Kühl- strukturen Schicht für Schicht aus einem Pulverbett erzeugt werden. Hierzu wird das Pulver an vorgebbaren Stellen durch Laserstrahlung aufgeschmolzen und nachfolgend eine weitere Schicht des Pulvers aufgetragen, welche wiederum an Contains or consists of alloy. The melting of the powder can be carried out in some embodiments of the invention by laser radiation and / or by an electron beam. As a result, the cooling structures are produced layer by layer from a powder bed. For this purpose, the powder is melted at predetermined locations by laser radiation and subsequently applied to a further layer of the powder, which in turn
vorgebbaren Stellen durch Punkt-zu-Punkt-Belichten predefinable points by point-to-point exposure
aufgeschmolzen wird. is melted.
In einigen Ausführungsformen der Erfindung kann das Pulver Aluminium und/oder Kupfer und/oder Keramik und/oder Titan und/oder Silber enthalten oder daraus bestehen, diese In some embodiments of the invention, the powder may contain or consist of aluminum and / or copper and / or ceramic and / or titanium and / or silver
Materialien weisen einerseits einen hinreichend niedrigen Schmelzpunkt auf, so dass die Fertigung der Kühlstruktur in einfacher Weise möglich ist. Darüber hinaus zeigen diese Materialien eine gute Wärmeleitfähigkeit, welche für eine effektive Entwärmung des Halbleiterchips sorgt. On the one hand materials have a sufficiently low melting point, so that the production of the cooling structure is possible in a simple manner. In addition, these materials show a good thermal conductivity, which ensures effective cooling of the semiconductor chip.
In einigen Ausführungsformen der Erfindung kann auf In some embodiments of the invention can
zumindest einer Teilfläche der zweiten Seite des Halbleiter¬ chips eine Metallisierung aufgebracht sein, auf welcher die Kühlstruktur stoffschlüssig befestigt ist. Eine solche At least a partial surface of the second side of the semiconductor chip ¬ be applied a metallization, on which the cooling structure is firmly bonded. Such
Metallisierung kann mit an sich bekannten Verfahren der Halbleiterfertigung erzeugt werden. Hierzu kann beispielsweise die Oberfläche des Halbleiterchips durch Sputtern und/oder Aufdampfen und/oder galvanisch mit einer vollflächigen Metallschicht versehen werden, welche nachfolgend durch Strukturieren mit einer Lackmaske und nachfolgendes Ätzen in einigen Teilflächen wieder entfernt wird. Solche Metallisierungen sind bekannt, um Anschlusskontakte und/oder elektrische Leiterbahnen auf Halbleiterbauelementen zu erzeugen. Erfindungsgemäß wird vorgeschlagen, solche Metallization can be produced by conventional methods of semiconductor fabrication. For this purpose, for example, the surface of the semiconductor chip by sputtering and / or vapor deposition and / or galvanically provided with a full-surface metal layer, which is subsequently removed by structuring with a resist mask and subsequent etching in some sub-areas again. Such metallizations are known to produce terminal contacts and / or electrical traces on semiconductor devices. According to the invention, such
Metallisierungen auch an Teilflächen anzubringen, welche aufgrund elektrischer Leistungsspitzen eine erhöhte Metallizations also to install on surfaces, which increased due to electrical power peaks
Temperatur aufweisen, sogenannte Hotspots. Aufgrund ihres Herstellungsverfahrens sind solche Metallisierungen Temperature have, so-called hotspots. Due to their manufacturing process, such metallizations are
stoffschlüssig an den Halbleiterchip angebunden, so dass sich ein geringer Wärmeübergangswiderstand zwischen dem Halbleitermaterial und der Metallisierung ausbildet. Auf die Metallisierung kann schließlich durch additive Fertigung eine Kühlstruktur ebenfalls stoffschlüssig aufgebracht werden . cohesively connected to the semiconductor chip, so that forms a low heat transfer resistance between the semiconductor material and the metallization. On the Metallization can finally be applied by additive manufacturing a cooling structure also cohesively.
Darüber hinaus ist es selbstverständlich möglich, In addition, it is of course possible
Metallisierungen, welche ohnehin als Anschlusskontakt und/oder elektrische Leiterbahn auf dem Halbleiterchip benötigen werden, zusätzlich mit einer Kühlstruktur zu versehen und auf diese Weise zusätzlich zur Entwärmung zu nutzen. Die Fertigung mittels eines additiven Fertigungs¬ verfahrens erlaubt es dabei, statt einer großen, voll¬ flächigen Kühlstruktur auf der zweiten Seite des Halbleiterchips in einfacher Weise eine Vielzahl einzelner, kleinerer Kühlstrukturen zu erzeugen. Diese können so weit voneinander beabstandet sein, dass elektrische Kurzschlüsse zwischen benachbarten Leiterbahnen verhindert werden. Metallizations, which will anyway need as a terminal contact and / or electrical trace on the semiconductor chip, in addition to be provided with a cooling structure and to use in this way in addition to the heat dissipation. The production by means of an additive manufacturing ¬ method allows it to produce instead of a large, full ¬ area cooling structure on the second side of the semiconductor chip in a simple manner, a plurality of individual, smaller cooling structures. These can be so far apart that electrical short circuits between adjacent tracks are prevented.
In einigen Ausführungsformen der Erfindung kann auf der ersten Seite des Trägersubstrates zumindest ein zweiter Halbleiterchip angeordnet sein. Auf diese Weise kann das Trägersubstrat beidseitig mit Halbleiterchips versehen werden. Hierdurch kann die Packungsdichte elektrischer In some embodiments of the invention, at least one second semiconductor chip may be arranged on the first side of the carrier substrate. In this way, the carrier substrate can be provided on both sides with semiconductor chips. As a result, the packing density of electrical
Bauelemente und damit der Platzbedarf der hiermit aufge¬ bauten Schaltungen reduziert werden. Durch die erfindungsgemäßen Kühlstrukturen, welche eine Entwärmung über die dem Trägersubstrat abgewandte Seite der Halbleiterchips Components and thus the space requirement of the hereby ¬ built circuits can be reduced. By the cooling structures according to the invention, which heat dissipation over the side facing away from the carrier substrate side of the semiconductor chips
ermöglichen, können solche Bauelemente trotz erhöhter allow such devices despite increased
Packungsdichte zuverlässig entwärmt werden. Packing reliably be cooled.
In einigen Ausführungsformen der Erfindung kann die Kühlstruktur stoffschlüssig mit zumindest einem elektrischen Verbinder verbunden sein. Dies ermöglicht es, Wärme über den Anschlusskontakt des Halbleiterchips in den elektrischen Verbinder abzuführen und von dort über eine Kühlstruktur an die Umgebung abzugeben. Da die elektrischen Verbinder in der Regel einen größeren Abstand zum Halbleiterchip aufweisen, kann auf den elektrischen Verbindern eine größere Fläche zur Verfügung stehen, welche größere Kühlstrukturen erlaubt, welche wiederum einen größere Wärmemenge an die Umgebung abführen können. In some embodiments of the invention, the cooling structure may be materially bonded to at least one electrical connector. This makes it possible to dissipate heat via the terminal contact of the semiconductor chip in the electrical connector and from there via a cooling structure to the environment. Since the electrical connectors usually have a greater distance from the semiconductor chip, can on the electrical connectors a larger area for Are available, which allows larger cooling structures, which in turn can dissipate a larger amount of heat to the environment.
Nachfolgend soll die Erfindung anhand von Figuren ohne The invention is based on figures without
Beschränkung des allgemeinen Erfindungsgedankens näher erläutert werden. Dabei zeigt Restriction of the general inventive concept will be explained in more detail. It shows
Fig. 1 eine erste Ausführungsform eines erfindungsgemäßen Bauelementes . Fig. 1 shows a first embodiment of a device according to the invention.
Fig. 2 zeigt eine zweite Ausführungsform des erfindungs¬ gemäßen Bauelementes. Fig. 2 shows a second embodiment of the inventive ¬ component.
Fig. 3 zeigt eine dritte Ausführungsform des erfindungs¬ gemäßen Bauelementes. Fig. 3 shows a third embodiment of the device according to Inventive ¬.
Fig. 4 zeigt eine vierte Ausführungsform des erfindungs¬ gemäßen Bauelementes. Fig. 4 shows a fourth embodiment of the device according to Inventive ¬.
Fig. 5 zeigt eine fünfte Ausführungsform des erfindungs¬ gemäßen Bauelementes. Fig. 5 shows a fifth embodiment of the device according to Inventive ¬.
Fig. 6 zeigt eine sechste Ausführungsform des erfindungs¬ gemäßen Bauelementes. Fig. 6 shows a sixth embodiment of the device according to Inventive ¬.
Anhand von Fig. 1 wird eine erste Ausführungsform eines erfindungsgemäßen Bauelementes näher erläutert. Das Bau¬ element 1 weist ein Trägersubstrat 2 auf. Das Trägersubstrat 2 kann in einigen Ausführungsformen der Erfindung aus einem Metall, einer Legierung, einer Keramik oder Diamant bestehen bzw. diese Materialien enthalten. Eine Keramik kann A first embodiment of a component according to the invention will be explained in more detail with reference to FIG. 1. The construction ¬ element 1 has a support substrate. 2 The carrier substrate 2 may in some embodiments of the invention consist of or contain a metal, an alloy, a ceramic or diamond. A ceramic can
beispielsweise ein Oxid, ein Nitrid oder ein Oxynitrid enthalten. In einigen Ausführungsformen der Erfindung kann AIO2, S1O2, S13N4 und/oder SiOxNy verwendet werden. Das Trägersubstrat 2 weist eine erste Seite 21 und eine gegenüberliegende zweite Seite 22 auf. Das Trägersubstrat 2 dient einerseits der mechanischen Befestigung der darauf angeordneten Halbleiterchips 3. Darüber hinaus kann das Trägersubstrat 2 Anschlusskontakte aufweisen, welche mit zugeordneten Anschlusskontakten auf dem Halbleiterchip 3 durch elektrische Verbinder 4 verbunden werden. Diese können mit einen Bond 6 verbunden bzw. kontaktiert sein. For example, an oxide, a nitride or an oxynitride. In some embodiments of the invention, AIO 2 , S1O 2 , S1 3 N 4, and / or SiO x N y may be used. The carrier substrate 2 has a first side 21 and an opposite second side 22. On the one hand, the carrier substrate 2 serves for the mechanical fastening of the semiconductor chips 3 arranged thereon. In addition, the carrier substrate 2 can have connection contacts, which are connected to associated connection contacts on the semiconductor chip 3 by electrical connectors 4. These can be connected or contacted with a bond 6.
Die erste Seite 21 des Trägersubstrates 2 ist mit einer optionalen Metallisierung 43 versehen. Die Metallisierung 43 kann beispielsweise durch Sputtern, Aufdampfen, in einem Dickschichtprozess oder durch außenstromloses oder The first side 21 of the carrier substrate 2 is provided with an optional metallization 43. The metallization 43 can, for example, by sputtering, vapor deposition, in a thick-film process or by electroless or
galvanisches Abscheiden erzeugt werden. Die Metallisierung 43 auf der ersten Seite 21 kann beispielsweise zur elek¬ trischen Kontaktierung oder Stromführung dienen oder galvanic deposition are generated. The metallization 43 on the first side 21 may for example serve to elec trical contact ¬ or current carrying or
lediglich zur mechanischen Befestigung des Trägersubstrates 2 auf der zweiten Seite 82 einer optionalen Grundplatte 8. Hierzu kann zwischen der Metallisierung 43 der ersten Seite 21 des Trägersubstrates 2 und der zweiten Seite 82 der merely for the mechanical fastening of the carrier substrate 2 on the second side 82 of an optional base plate 8. For this purpose, between the metallization 43 of the first side 21 of the carrier substrate 2 and the second side 82 of
Grundplatte 8 eine Löt- oder Sinter- oder Klebeverbindung ausgeführt sein. Eine solche Lötverbindung stellt eine Base plate 8 to be performed a soldering or sintering or adhesive connection. Such a solder joint provides a
Stoffschlüssige Verbindung dar, welche eine mechanisch robuste Verbindung zwischen dem Trägersubstrat 2 und der Grundplatte 8 darstellt und niedrige Wärmeübergangswider¬ stände ermöglicht. Cohesive connection, which is a mechanically robust connection between the carrier substrate 2 and the base plate 8 and allows low Wärmeübergangswider ¬ stands.
Im dargestellten ersten Ausführungsbeispiel ist auf der zweiten Seite 22 des Trägersubstrates 2 ein erster Halb¬ leiterchip 3 angeordnet. Der Halbleiterchip 3 weist In the illustrated first embodiment, a first half ¬ semiconductor chip 3 is disposed on the second side 22 of the carrier substrate. 2 The semiconductor chip 3 has
ebenfalls eine erste Seite 31 und eine gegenüberliegende zweite Seite 32 auf. Zwischen der ersten Seite 31 des Halb¬ leiterchips 3 und der zweiten Seite 22 des Trägersubstrates 2 kann ebenfalls eine Lötverbindung 33 ausgeführt sein. In anderen Ausführungsformen kann auch eine Klebeverbindung oder eine Sinterverbindung verwendet werden. Auch die zweite Seite 32 des Halbleiterchips 3 weist eine Metallisierung 43 auf, welche beispielsweise elektrische An¬ schlusskontakte und/oder elektrische Leiterbahnen bilden kann. Hierzu ist die Metallisierung 43 nach ihrer also a first side 31 and an opposite second side 32. Between the first side 31 of the semicon ¬ conductor chip 3 and the second side 22 of the carrier substrate 2 may also be performed a solder joint 33. In other embodiments, an adhesive bond or a sintered bond may also be used. Also, the second side 32 of the semiconductor chip 3 has a metallization 43, which may form, for example electrical An ¬ circuit contacts and / or electrical conductor tracks. For this purpose, the metallization 43 is after her
Abscheidung durch an sich bekannte, lithographische Verfahren strukturiert worden. Deposition has been structured by known lithographic processes.
In einigen Ausführungsformen kann darüber hinaus ein In some embodiments, moreover, a
weiterer, in den Figuren nicht dargestellter Halbleiterchip vorhanden sein, welcher auf der zweiten Seite 32 des ersten Halbleiterchips 3 angeordnet ist. Dies kann beispielsweise durch eine Löt- oder Sinterverbindung erfolgen oder auch durch andere, an sich bekannte Verfahren wie beispielsweise Flip-Chip-Bonden . further, not shown in the figures semiconductor chip may be present, which is arranged on the second side 32 of the first semiconductor chip 3. This can be done for example by a solder or sintered connection or by other methods known per se, such as flip-chip bonding.
Es ist darauf hinzuweisen, dass der weitere Halbleiterchip nicht in jeder Ausführungsform der Erfindung vorhanden sein muss. Die Erfindung lehrt nicht die Verwendung eines It should be noted that the further semiconductor chip need not be present in every embodiment of the invention. The invention does not teach the use of a
speziellen Bauelementes als Lösungsprinzip. special component as a solution principle.
Der Halbleiterchip 3 kann in einigen Ausführungsformen der Erfindung ein Leistungshalbleiter sein, d.h. durch laterales Strukturieren und Dotieren werden auf den Halbleiterchip 3 Bauelemente wie beispielsweise Bipolar- oder The semiconductor chip 3 may be a power semiconductor in some embodiments of the invention, i. by lateral structuring and doping are on the semiconductor chip 3 devices such as bipolar or
Feldeffekttransistoren, Dioden und/oder IGBTs erzeugt, welche zum Schalten größerer Lasten geeignet sind. Field effect transistors, diodes and / or IGBTs generated, which are suitable for switching larger loads.
Beispielsweise können solche Leistungshalbleiter in der Energietechnik und/oder zur Ansteuerung elektrischer For example, such power semiconductors in power engineering and / or for driving electrical
Maschinen verwendet werden. In anderen Ausführungsformen der Erfindung kann der Halbleiterchip 3 auch zumindest einen Logikchip enthalten, beispielsweise einen Mikroprozessor oder einen MikroController oder ein FPGA, welche ebenfalls im Betrieb aufgrund elektrischer Verlustleistung Wärme erzeugen, welche abgeführt werden muss. Machines are used. In other embodiments of the invention, the semiconductor chip 3 may also contain at least one logic chip, for example a microprocessor or a microcontroller or an FPGA, which also generate heat during operation due to electrical power loss, which must be dissipated.
In Fig. 1 ist weiter ein elektrischer Verbinder 4 erkennbar, welcher eine Metallisierung 43, welche als elektrischer An- schlusskontakt ausgebildet ist, auf dem Trägersubstrat 2 mit einem zugeordneten elektrischen Verbinder mit dem Halbleiterchip 3 verbindet. Der elektrische Verbinder 4 kann beispielsweise durch Löten, Schweißen oder Bonden mit den Anschlusskontakten bzw. der Metallisierung 43 verbunden werden . FIG. 1 also shows an electrical connector 4, which has a metallization 43, which is used as an electrical connection. is formed on the carrier substrate 2 with an associated electrical connector with the semiconductor chip 3. The electrical connector 4 can be connected, for example, by soldering, welding or bonding with the connection contacts or the metallization 43.
Erfindungsgemäß wird nun vorgeschlagen, auf zumindest einer Teilfläche des elektrischen Verbinders 4 eine Kühlstruktur 5 zu erzeugen. Die Kühlstruktur 5 enthält eine Mehrzahl von Rippen bzw. Fingern 52. Hierdurch wird die zum According to the invention, it is now proposed to produce a cooling structure 5 on at least one partial surface of the electrical connector 4. The cooling structure 5 includes a plurality of ribs or fingers 52
Wärmeaustausch mit dem umgebenden Fluid zur Verfügung stehende Oberfläche vergrößert, so dass der Halbleiterchip 3 zuverlässiger entwärmt werden kann. Heat exchange increases with the surrounding fluid surface available, so that the semiconductor chip 3 can be more reliably cooled.
Die Kühlstruktur 5 kann unmittelbar unter den Kontaktstellen des Verbinders 4 mit der Metallisierung 43 bzw. den Anschlusskontakten angeordnet sein. In einigen Ausführungsformen der Erfindung kann die Kühlstruktur 5 zusätzlich in einigen Längsabschnitten des elektrischen Verbinders 4 angeordnet sein. Die Kühlstruktur 5 wird im dargestellten Ausführungsbeispiel durch ein additives Fertigungsverfahren aus einem Pulverbett erzeugt. Durch die erfindungsgemäße Kühlstruktur steht auch die dem Trägersubstrat 2 abgewandte zweite Seite 32 der Halbleiterchips 3 zur Wärmeabgabe zur Verfügung. Durch die verbesserte Kühlung können höhere The cooling structure 5 can be arranged directly under the contact points of the connector 4 with the metallization 43 or the connection contacts. In some embodiments of the invention, the cooling structure 5 may additionally be arranged in some longitudinal sections of the electrical connector 4. The cooling structure 5 is produced in the illustrated embodiment by an additive manufacturing process from a powder bed. As a result of the cooling structure according to the invention, the second side 32 of the semiconductor chips 3 facing away from the carrier substrate 2 is also available for dissipating heat. Due to the improved cooling, higher
Verlustleistungen abgeführt werden, so dass der Halbleiterchip aufgrund niedrigerer Temperaturen eine längere Power losses are dissipated, so that the semiconductor chip due to lower temperatures a longer
Lebensdauer erreicht oder bei gleicher Lebensdauer höhere Leistungen umgesetzt werden können. Lifespan achieved or higher performance can be implemented for the same service life.
Anhand von Fig. 2 wird eine zweite Ausführungsform des erfindungsgemäßen Bauelementes erläutert. Gleiche Bestand¬ teile der Erfindung sind mit gleichen Bezugszeichen versehen, so dass sich die nachfolgende Beschreibung auf die wesentlichen Unterschiede beschränkt. Wie in Fig. 2 ersichtlich ist, weist auch die zweite Aus¬ führungsform ein Trägersubstrat 2 auf. Das Trägersubstrat ist beidseitig mit Halbleiterchips versehen. So weist die zweite Seite 22 des Trägersubstrates 2 einen ersten Halb¬ leiterchip 3 auf, welcher mit seiner ersten Seite 31 mittels einer Lötverbindung 33 auf dem Trägersubstrat 2 verbunden ist. Auf der gegenüberliegenden ersten Seite 21 des Trägersubstrats 2 befindet sich ein zweiter Halbleiterchip 35, welcher ebenfalls mit einer Lötverbindung 33 mit dem Trägersubstrat 2 verbunden ist. Bekannte Bauelemente würden bei einem solchen Aufbau unter mangelnder Entwärmung leiden, da die Verlustleistung eines Halbleiterchips zusätzlich zur Erwärmung des gegenüberliegenden zweiten Halbleiterchips 35 führen würde. Aufgrund der erfindungsgemäßen Kühlstrukturen 5 können jedoch beide Halbleiterchips 3 und 35 entwärmt werden, so dass die zweite Ausführungsform gemäß Fig. 2 eine höhere Packungsdichte ermöglicht als bisher bekannte Based on Fig. 2, a second embodiment of the device according to the invention will be explained. ¬ like constituent parts of the invention are provided with the same reference numerals, so that the following description is limited to the essential differences. As can be seen in FIG. 2, the second embodiment also has a carrier substrate 2. The carrier substrate is provided on both sides with semiconductor chips. Thus, the second side 22 of the carrier substrate 2 to a first half ¬ semiconductor chip 3 which is connected with its first side 31 by means of a solder joint 33 on the carrier substrate. 2 On the opposite first side 21 of the carrier substrate 2 is a second semiconductor chip 35, which is also connected to the carrier substrate 2 with a solder joint 33. Known components would suffer from lack of cooling in such a structure, since the power loss of a semiconductor chip in addition to the heating of the opposite second semiconductor chip 35 would result. Because of the cooling structures 5 according to the invention, however, both semiconductor chips 3 and 35 can be cooled, so that the second embodiment according to FIG. 2 enables a higher packing density than previously known
Bauelemente . Components.
Anhand von Fig. 3 wird eine dritte Ausführungsform der With reference to FIG. 3, a third embodiment of the
Erfindung erläutert. Die dritte Ausführungsform weist einen ähnlichen strukturellen Aufbau auf wie die anhand von Fig. 1 erläuterte erste Ausführungsform. Wie jedoch aus Fig. 3 ersichtlich ist, sind die Kühlstrukturen 5 nicht auf dem elektrischen Verbinder 4 angeordnet, sondern unmittelbar auf dem Halbleiterchip 3. Hierzu kann die zweite Seite des Halb¬ leiterchips 3 Teilflächen aufweisen, welche mit einer Invention explained. The third embodiment has a similar structure as that explained with reference to FIG. 1 first embodiment. However, as can be seen from Fig. 3, the cooling structures 5 are not disposed on the electrical connector 4, but directly on the semiconductor chip 3. For this purpose, the second side of the semicon ¬ conductor chip 3 have partial surfaces, which with a
Metallisierung versehen sind. Auf dieser Metallisierung kann zumindest eine Kühlstruktur 5 durch ein generatives Metallization are provided. On this metallization can be at least one cooling structure 5 by a generative
Fertigungsverfahren unmittelbar erzeugt werden. Hierdurch werden hohe Wärmeübergangswiderstände vermieden. Manufacturing process can be generated directly. As a result, high heat transfer resistance can be avoided.
Weiterhin zeigt Fig. 3 Kühlstrukturen 55, welche auf der Metallisierung 431 angeordnet sind, welche über die Löt¬ stelle 33 die Verbindung zwischen dem Trägersubstrat 2 und dem Halbleiterchip 3 vermittelt. Hierdurch kann Wärme von der dem Trägersubstrat 2 zugewandten Seite des Halbleiterchips 3 zuverlässig abgeführt werden. Furthermore, Fig. 3 shows cooling structures 55, which are arranged on the metallization 431, which via the solder ¬ point 33, the connection between the support substrate 2 and conveys the semiconductor chip 3. This can heat from the carrier substrate 2 facing side of the semiconductor chip 3 are reliably dissipated.
Fig. 4 zeigt eine vierte Ausführungsform der vorliegenden Erfindung. Auch die vierte Ausführungsform verbindet ein Trägersubstrat 2. Auf der ersten Seite 21 ist durch ein generatives Herstellungsverfahren eine Kühlstruktur 5 erzeugt worden. Die Kühlstruktur 5 ist auf einer Fig. 4 shows a fourth embodiment of the present invention. The fourth embodiment also connects a carrier substrate 2. On the first side 21, a cooling structure 5 has been produced by a generative manufacturing method. The cooling structure 5 is on a
Metallisierung 42 stoffschlüssig angeordnet. Die Metallization 42 cohesively arranged. The
Metallisierung 42 wurde auf dem Trägersubstrat 2 vorher beispielsweise durch galvanisches oder außenstromloses Abscheiden, durch einen Dickschichtprozess , einen DCB/DAB- Prozess oder durch Vakuumdeposition abgeschieden. Metallization 42 has been deposited on the carrier substrate 2 beforehand, for example, by galvanic or electroless plating, by a thick film process, a DCB / DAB process, or by vacuum deposition.
Aus Fig. 4 ist weiterhin ersichtlich, dass die Kühlstruktur 5 eine Grundplatte 51 aufweist, auf welcher eine Mehrzahl von Rippen 52 angeordnet ist. Auch zwischen Grundplatte 51 und den Rippen 52 befindet sich eine Stoffschlüssige From Fig. 4 it is further apparent that the cooling structure 5 has a base plate 51 on which a plurality of ribs 52 is arranged. Also between base plate 51 and the ribs 52 is a cohesive
Verbindung, so dass die Kühlstruktur 5 mit geringen Connection, so that the cooling structure 5 with low
Wärmeübergangswiderständen an das Trägersubstrat 2 Heat transfer resistances to the carrier substrate. 2
angeordnet ist. is arranged.
Die gegenüberliegende zweite Seite 22 des Trägersubstrats ist mit einer Metallisierung 42 versehen, auf welcher zumindest ein Halbleiterchip 3 angeordnet ist. The opposite second side 22 of the carrier substrate is provided with a metallization 42, on which at least one semiconductor chip 3 is arranged.
Anhand von Fig. 5 wird eine fünfte Ausführungsform der Referring to Fig. 5, a fifth embodiment of
Erfindung erläutert. Die fünfte Ausführungsform Invention explained. The fifth embodiment
unterscheidet sich von vorher beschriebenen vierten Ausführungsform dadurch, dass das Trägersubstrat 2 aus einem elektrisch und thermisch leitfähigen Material hergestellt ist. Somit kann die in Fig. 4 dargestellte Metallisierung eines keramischen Trägersubstrates entfallen. Die Kühlstruktur 5 kann durch additive Herstellverfahren unmittelbar auf der ersten Seite 21 des metallischen Trägersubstrates 2 erzeugt werden. Auch die Lötverbindung 33 zur Befestigung zumindest eines Halbleiterchips 3 kann unmittelbar auf dem metallischen Trägersubstrat ausgeführt werden, so dass auch auf der zweiten Seite 22 zusätzliche Metallisierungen entfallen können . differs from previously described fourth embodiment in that the carrier substrate 2 is made of an electrically and thermally conductive material. Thus, the metallization of a ceramic carrier substrate shown in Fig. 4 can be omitted. The cooling structure 5 can be produced directly on the first side 21 of the metallic carrier substrate 2 by additive manufacturing methods. Also, the solder joint 33 for attaching at least one semiconductor chip 3 can be performed directly on the metallic carrier substrate, so that 22 additional metallizations can be omitted on the second side.
Fig. 6 zeigt schließlich eine sechste Ausführungsform der vorliegenden Erfindung. Auch die sechste Ausführungsform verwendet wiederum ein Trägersubstrat 2 aus einem Kunststoff oder einer Keramik, welches zumindest teilweise mit einer Metallisierung 42 versehen worden ist. Auf der ersten Seite 21 befindet sich ein zweiter Halbleiterchip 35. Auf der zweiten Seite 22 des Trägersubstrates 2 befindet sich ein erster Halbleiterchip 3. Die Halbleiterchips können Finally, Fig. 6 shows a sixth embodiment of the present invention. The sixth embodiment again uses a carrier substrate 2 made of a plastic or a ceramic, which has been provided at least partially with a metallization 42. On the first side 21 is a second semiconductor chip 35. On the second side 22 of the carrier substrate 2 is a first semiconductor chip 3. The semiconductor chips can
beispielsweise einen Mikrocontroller oder einen Mikroprozessor enthalten. Die beiden Halbleiterchips 3 und 35 sind in lateraler Richtung gegeneinander versetzt For example, contain a microcontroller or a microprocessor. The two semiconductor chips 3 and 35 are offset from each other in the lateral direction
angeordnet, so dass jeweils gegenüberliegend eine Kühl¬ struktur 5 angeordnet werden kann. arranged so that each opposite a cooling ¬ structure 5 can be arranged.
Die Kühlstruktur 5 befindet sich auf einer Metallisierung 42, welche sich jeweils bis unterhalb der jeweiligen The cooling structure 5 is located on a metallization 42, each of which is below the respective
Halbleiterbauelemente 3 bzw. 35 erstreckt. Somit kann Wärme von der Rückseite des ersten Halbleiterbauelementes 3 durch das Trägersubstrat 2 hindurch zur gegenüberliegenden Kühlstruktur 55 abgeführt werden. Darüber hinaus kann die Wärme jedoch auch entlang der Metallisierung 42 zur Kühlstruktur 5 abgeführt werden. Für den zweiten Halbleiterchip 35 gilt dieser Sachverhalt mutatis mutandis . Der erfindungsgemäße Aufbau eines Bauelementes 1 gemäß der sechsten Ausführungs¬ form der Erfindung ermöglicht somit hohe Packungsdichte und gleichwohl eine zuverlässige Entwärmung. Semiconductor devices 3 and 35 extends. Thus, heat can be dissipated from the back side of the first semiconductor device 3 through the carrier substrate 2 to the opposite cooling structure 55. In addition, however, the heat can also be dissipated along the metallization 42 to the cooling structure 5. For the second semiconductor chip 35, this situation applies mutatis mutandis. The inventive structure of a device 1 according to the sixth embodiment ¬ form of the invention thus enables high packing density and nevertheless a reliable cooling.
Selbstverständlich ist die Erfindung nicht auf die dargestellten Ausführungsformen beschränkt. Die vorstehende Be¬ schreibung ist daher nicht als beschränkend, sondern als erläuternd anzusehen. Die nachfolgenden Ansprüche sind so zu verstehen, dass ein genanntes Merkmal in zumindest einer Ausführungsform der Erfindung vorhanden ist. Dies schließt die Anwesenheit weiterer Merkmale nicht aus. Sofern die Ansprüche und die vorstehende Beschreibung „erste" und „zweite" Ausführungsformen definieren, so dient diese Bezeichnung der Unterscheidung zweier gleichartiger Ausführungsformen, ohne eine Rangfolge festzulegen. Of course, the invention is not limited to the illustrated embodiments. The foregoing Be ¬ scription is therefore not to be considered as limiting, but as illustrative. The following claims are so to understand that a named feature is present in at least one embodiment of the invention. This does not exclude the presence of further features. As long as the claims and the above description define "first" and "second" embodiments, this designation serves to distinguish two similar embodiments without prioritizing them.

Claims

Ansprüche claims
1. Bauelement (1) mit zumindest einem Trägersubstrat (2), mit einer ersten Seite (21) und einer gegenüberliegenden zweiten Seite (22) und mit zumindest einem ersten Halb¬ leiterchip (3) mit einer ersten Seite (31) und einer gegenüberliegenden zweiten Seite (32), wobei die erste Seite (31) des Halbleiterchips (3) auf der zweiten Seite (22) des Trägersubstrates (2) angeordnet ist und mit zumindest einem elektrischen Verbinder (4), welcher an einem Kontakt des Halbleiterchips (3) befestigt ist, wobei 1. component (1) with at least one carrier substrate (2), with a first side (21) and an opposite second side (22) and with at least a first semiconductor chip ¬ (3) with a first side (31) and an opposite second side (32), wherein the first side (31) of the semiconductor chip (3) on the second side (22) of the carrier substrate (2) is arranged and with at least one electrical connector (4) which at a contact of the semiconductor chip (3 ), wherein
auf zumindest einer Teilfläche des elektrischen  on at least a partial surface of the electrical
Verbinders (4) und/oder  Connector (4) and / or
auf zumindest einer Teilfläche der zweiten Seite (32) des Halbleiterchips (3) und/oder  on at least a partial surface of the second side (32) of the semiconductor chip (3) and / or
auf zumindest einer Teilfläche des Trägersubstrates (2) zumindest eine Kühlstruktur (5) angeordnet ist, welche durch Aufschmelzen eines Pulvers erzeugt wurde, welches ein Metall oder eine Legierung enthält oder daraus besteht .  on at least one partial surface of the carrier substrate (2) at least one cooling structure (5) is arranged, which was produced by melting a powder containing or consisting of a metal or an alloy.
2. Bauelement nach Anspruch 1, dadurch gekennzeichnet, dass die Kühlstruktur (5) eine Grundplatte (51) mit darauf angeordneten Rippen (52) aufweist. 2. The component according to claim 1, characterized in that the cooling structure (5) has a base plate (51) arranged thereon with ribs (52).
3. Bauelement nach Anspruch 1 oder 2, dadurch gekennzeichnet, dass das Pulver Aluminium und/oder Kupfer und/oder Keramik und/oder Titan und/oder Silber enthält oder daraus besteht. 3. The component according to claim 1 or 2, characterized in that the powder contains aluminum and / or copper and / or ceramic and / or titanium and / or silver or consists thereof.
4. Bauelement nach einem der Ansprüche 1 bis 3, dadurch ge¬ kennzeichnet, dass auf zumindest einer Teilfläche der zweiten Seite (32) des Halbleiterchips (3) eine 4. The component according to one of claims 1 to 3, characterized ge ¬ indicates that on at least a partial surface of the second side (32) of the semiconductor chip (3) has a
Metallisierung aufgebracht ist, auf welcher die Kühlstruktur (5) stoffschlüssig befestigt ist. Metallization is applied, on which the cooling structure (5) is firmly bonded.
5. Bauelement nach einem der Ansprüche 1 bis 4, dadurch ge¬ kennzeichnet, dass auf der ersten Seite (21) des Träger¬ substrates (2) zumindest ein zweiter Halbleiterchip (35) angeordnet ist. 5. The component according to one of claims 1 to 4, characterized ge ¬ indicates that on the first side (21) of the carrier ¬ substrates (2) at least a second semiconductor chip (35) is arranged.
6. Bauelement nach einem der Ansprüche 1 bis 4, dadurch ge¬ kennzeichnet, dass die Kühlstruktur (5) Stoffschlüssig mit dem elektrischen Verbinder (4) verbunden ist und/oder dass die Kühlstruktur (5) Stoffschlüssig mit der ersten Seite (21) des Trägersubstrates (2) verbunden ist. 6. The component according to one of claims 1 to 4, characterized ge ¬ indicates that the cooling structure (5) is materially connected to the electrical connector (4) and / or that the cooling structure (5) cohesively with the first side (21) of the Carrier substrate (2) is connected.
7. Bauelement nach einem der Ansprüche 1 bis 6, dadurch ge¬ kennzeichnet, dass das Trägersubstrat (2) zumindest ein Metall und/oder zumindest eine Legierung und/oder 7. The component according to one of claims 1 to 6, characterized ge ¬ indicates that the carrier substrate (2) at least one metal and / or at least one alloy and / or
zumindest eine Keramik und/oder Diamant und/oder einen Kunststoff enthält oder daraus besteht.  contains or consists of at least one ceramic and / or diamond and / or a plastic.
8. Verfahren zur Herstellung eines Bauelementes (1) mit 8. A method for producing a component (1) with
folgenden Schritten:  following steps:
Bereitstellen von zumindest einem Trägersubstrat (2), mit einer ersten Seite (21) und einer gegenüberliegenden zweiten Seite (22)  Providing at least one carrier substrate (2), with a first side (21) and an opposite second side (22)
Bereitstellen von zumindest einem ersten Halbleiterchip Providing at least a first semiconductor chip
(3) mit einer ersten Seite (31) und einer gegenüberliegenden zweiten Seite (32) (3) having a first side (31) and an opposite second side (32)
Fügen der ersten Seite (31) des Halbleiterchips (3) auf der zweiten Seite (22) des Trägersubstrates (2)  Joining the first side (31) of the semiconductor chip (3) on the second side (22) of the carrier substrate (2)
Herstellen von zumindest einem elektrischen Verbinder Producing at least one electrical connector
(4) , welcher an einem Kontakt (35) des Halbleiterchips (3) befestigt ist, (4) which is fixed to a contact (35) of the semiconductor chip (3),
Herstellen einer Kühlstruktur (5) durch ein additives Herstellungsverfahren auf zumindest einer Teilfläche des elektrischen Verbinders (4) und/oder  Producing a cooling structure (5) by an additive manufacturing method on at least a partial surface of the electrical connector (4) and / or
auf zumindest einer Teilfläche der zweiten Seite (32) des Halbleiterchips (3) und/oder  on at least a partial surface of the second side (32) of the semiconductor chip (3) and / or
auf zumindest einer Teilfläche der ersten Seite (21) des Trägersubstrates (2), wobei die Kühlstruktur (5) durch Aufschmelzen eines Pulvers erzeugt wird, welches ein Metall oder eine Legierung enthält oder daraus besteht. on at least a partial surface of the first side (21) of the carrier substrate (2), wherein the cooling structure (5) by Melting of a powder is generated which contains or consists of a metal or an alloy.
9. Verfahren nach Anspruch 8, dadurch gekennzeichnet, dass das Aufschmelzen des Pulvers durch Punkt-zu-Punkt 9. The method according to claim 8, characterized in that the melting of the powder by point-to-point
Belichten mit einem Laserstrahl erfolgt.  Exposure is done with a laser beam.
10. Verfahren nach einem der Ansprüche 8 oder 9, dadurch gekennzeichnet, dass das Pulver Aluminium und/oder Kupfer und/oder Keramik und/oder Titan und/oder Silber enthält oder daraus besteht. 10. The method according to any one of claims 8 or 9, characterized in that the powder contains aluminum and / or copper and / or ceramic and / or titanium and / or silver or consists thereof.
11. Verfahren nach einem der Ansprüche 8 bis 10, dadurch gekennzeichnet, dass die Kühlstruktur (5) eine Grundplatte (51) mit darauf angeordneten Rippen (52) aufweist und der schichtweise Aufbau entlang der Längserstreckung der Rippen (52) erfolgt. 11. The method according to any one of claims 8 to 10, characterized in that the cooling structure (5) has a base plate (51) arranged thereon with ribs (52) and the layered structure along the longitudinal extent of the ribs (52).
12. Verfahren nach einem der Ansprüche 8 bis 11, dadurch gekennzeichnet, dass zumindest einer Teilfläche der zweiten Seite (32) des Halbleiterchips (3) und/oder auf der ersten Seite des Trägersubstrates (2) eine Metallisierung aufgebracht ist, auf welcher die Kühlstruktur (5) stoffschlüssig befestigt ist. 12. The method according to any one of claims 8 to 11, characterized in that at least a partial surface of the second side (32) of the semiconductor chip (3) and / or on the first side of the carrier substrate (2) a metallization is applied, on which the cooling structure (5) is firmly bonded.
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