JP2010219419A - Semiconductor device and method of manufacturing the same - Google Patents

Semiconductor device and method of manufacturing the same Download PDF

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JP2010219419A
JP2010219419A JP2009066420A JP2009066420A JP2010219419A JP 2010219419 A JP2010219419 A JP 2010219419A JP 2009066420 A JP2009066420 A JP 2009066420A JP 2009066420 A JP2009066420 A JP 2009066420A JP 2010219419 A JP2010219419 A JP 2010219419A
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connection conductor
semiconductor device
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resin
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JP5369798B2 (en
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Keiichi Higuchi
恵一 樋口
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Fuji Electric Co Ltd
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device reducing the width of a lead frame by efficiently cooling the lead frame, and reducing an occupation area by miniaturizing a semiconductor chip; and to provide a method of manufacturing the same. <P>SOLUTION: Semiconductor chips 7, 8, a first connection conductor 9 and a second connection conductor 13 having fins 17 are housed in a terminal case 10 having a groove part 20 (not shown) on a sidewall; an epoxy resin 12 is filled to expose the upper part of the first connection conductor 9; and a lid 16 having a partition plate 17 is put on the epoxy resin 12 with a space 18. The first and second connection conductors 9, 13 formed of lead frames are efficiently cooled by introducing outside air 24 into the terminal case 10 from the groove part 20. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

この発明は、ＩＧＢＴなどの半導体チップを内部に備えたパワー半導体モジュールなどの半導体装置およびその製造方法に関する。   The present invention relates to a semiconductor device such as a power semiconductor module having a semiconductor chip such as an IGBT therein and a method for manufacturing the same.

インバータ装置，無停電電源装置，工作機械，産業用ロボットおよび車載用電力変換装置などでは、その本体装置とは独立してパッケージ化されたパワー半導体モジュールなどの半導体装置が用いられている。このパワー半導体モジュールは、電力変換回路を構成する絶縁ゲート型バイポーラトランジスタ（Ｉｎｓｕｌａｔｅｄ Ｇａｔｅ Ｂｉｐｏｌａｒ Ｔｒａｎｓｉｓｔｏｒ：以下「ＩＧＢＴ」と表記する）などの各種のパワー半導体素子が実装された半導体チップを内蔵し、本体装置を制御する所定の制御回路基板に実装される（例えば、特許文献１参照）。   In an inverter device, an uninterruptible power supply device, a machine tool, an industrial robot, an in-vehicle power converter, and the like, a semiconductor device such as a power semiconductor module packaged independently of the main body device is used. This power semiconductor module incorporates a semiconductor chip on which various power semiconductor elements such as an insulated gate bipolar transistor (hereinafter referred to as “IGBT”) constituting a power conversion circuit are mounted. It is mounted on a predetermined control circuit board that controls (for example, see Patent Document 1).

このようなパワー半導体モジュールは、一般に、半導体チップを絶縁回路基板にはんだ付けによって固着し、制御回路基板に接続される外部導出端子とその半導体チップとを金属ワイヤを用いてワイヤボンディングし、これを樹脂ケースにモールドすることによりパッケージングされる。また、樹脂ケースの外部導出端子の実装部とは反対側に設けられた放熱面が放熱フィン等に当接することにより、パワー半導体素子での発生熱を外部に放熱できるようになっている。   In such power semiconductor modules, generally, a semiconductor chip is fixed to an insulating circuit board by soldering, and an external lead-out terminal connected to the control circuit board and the semiconductor chip are wire-bonded using a metal wire. Packaging is performed by molding in a resin case. Further, the heat radiation surface provided on the side opposite to the mounting portion of the external lead-out terminal of the resin case comes into contact with the heat radiation fin or the like, so that the heat generated in the power semiconductor element can be radiated to the outside.

しかしながら、上述したパワー半導体モジュールにおいては、外部導出端子と半導体チップとを接続する金属ワイヤの断面積が比較的小さいため、その金属ワイヤ１本あたりの電流容量に限界があった。この場合、太い金属ワイヤを用いることも考えられるが、超音波接合あるいは溶接によるワイヤボンディングが難しくなる。
また、このパワー半導体モジュールの製造工程においては、絶縁回路基板に半導体チップをはんだ付け後、さらにワイヤボンディングを行うため、二工程を要する。また、ワイヤボンディングは金属ワイヤ１本ごとに行われるが、通常、パワー半導体モジュールの製造においては２００本〜５００本の金属ワイヤが用いられるため、処理工程に長時間を要するといった問題があった。 However, in the power semiconductor module described above, since the cross-sectional area of the metal wire connecting the external lead-out terminal and the semiconductor chip is relatively small, the current capacity per metal wire is limited. In this case, a thick metal wire may be used, but wire bonding by ultrasonic bonding or welding becomes difficult.
Further, in the manufacturing process of the power semiconductor module, two steps are required because wire bonding is performed after the semiconductor chip is soldered to the insulating circuit board. Further, although wire bonding is performed for each metal wire, normally, 200 to 500 metal wires are used in the manufacture of a power semiconductor module, and thus there is a problem that a long process time is required.

これらの問題を解決するために、効率よく製造できるパワー半導体モジュールおよびその製造方法が、例えば特許文献２に開示されている。
図７および図８は、従来のパワー半導体モジュールの構成図であり、図７は要部断面図、図８は要部平面図である。
このパワー半導体モジュールは、セラミックス４(絶縁基板)とこのセラミックス４の裏側に形成された裏面銅箔３とセラミックス４の表側に形成された回路パターン５からなる絶縁回路基板と、裏面銅箔３とはんだ２で接合する銅ベース１と、回路パターン５とはんだ６で接合、固着する半導体チップ７,８とからなる。 In order to solve these problems, for example, Patent Document 2 discloses a power semiconductor module that can be efficiently manufactured and a manufacturing method thereof.
7 and 8 are configuration diagrams of a conventional power semiconductor module. FIG. 7 is a cross-sectional view of a main part, and FIG. 8 is a plan view of the main part.
This power semiconductor module includes a ceramic 4 (insulating substrate), a backside copper foil 3 formed on the back side of the ceramic 4, an insulating circuit board formed of a circuit pattern 5 formed on the front side of the ceramic 4, a backside copper foil 3, It consists of a copper base 1 to be joined by solder 2 and semiconductor chips 7 and 8 to be joined and fixed by circuit pattern 5 and solder 6.

また、図示しないはんだで半導体チップ７，８に接合するΩ形状の接続導体である第１接続導体９ａと、第１接続導体９ａ上にはんだ接合１５で固着するリードフレームで形成された第２接続導体３０と、第２接続導体３０とはんだ接合１５で固着する外部導出端子１１ａ、１１ｂ、１１ｃ、１１ｄと、外部導出端子１１ａ等がインサートされ絶縁回路基板を収納する端子ケース１０とからなる。   Further, a first connection conductor 9a which is an Ω-shaped connection conductor bonded to the semiconductor chips 7 and 8 by solder (not shown), and a second connection formed by a lead frame fixed by solder bonding 15 on the first connection conductor 9a. The conductor 30, the external lead-out terminals 11 a, 11 b, 11 c, and 11 d that are fixed to the second connection conductor 30 by the solder joint 15, and the terminal case 10 in which the external lead-out terminal 11 a and the like are inserted and the insulated circuit board is accommodated.

さらに、端子ケース１０内の第１接続導体９ａと第２接続導体３０を被覆するエポキシ樹脂３１（熱硬化性樹脂）と、エポキシ樹脂３１上に配置される半導体チップ７を制御する制御基板１９とで構成される。
尚、図８の符号で２１は制御信号用の制御ピン、２２は外部配線取り付け用のネジ穴、２３は銅ベース１を冷却体に取り付けるために必要な取り付け用貫通孔である。 Furthermore, an epoxy resin 31 (thermosetting resin) that covers the first connection conductor 9a and the second connection conductor 30 in the terminal case 10, and a control board 19 that controls the semiconductor chip 7 disposed on the epoxy resin 31; Consists of.
In FIG. 8, reference numeral 21 denotes a control pin for a control signal, 22 denotes a screw hole for attaching an external wiring, and 23 denotes an attaching through hole necessary for attaching the copper base 1 to the cooling body.

このリードフレーム（接続導体）を用いる組み立て方法は、本体装置の小型、軽量化のために、特に車載用電力変換装置に用いられるパワー半導体モジュールに採用されている。
また、特許文献３には、金属板、シート状の伝熱層、そこに一部以上を埋め込んだリードフレームからなる熱伝導基板と、プリント配線板をリード線と接続してなるモジュールにおいて、前記リードフレームの一部を、伝熱層から引き剥がし、リードフィンとすることで、熱伝導基板の放熱性を高めることができると共に、他のプリント配線板と組み合わせた場合での煙突効果も併用しながら回路モジュールの冷却効果を向上させることが開示されている。 This assembly method using a lead frame (connection conductor) is employed in a power semiconductor module particularly used in an in-vehicle power conversion device in order to reduce the size and weight of the main unit.
Patent Document 3 discloses a module in which a metal plate, a sheet-like heat transfer layer, a heat conductive substrate composed of a lead frame embedded in a part or more thereof, and a printed wiring board connected to a lead wire, By removing a part of the lead frame from the heat transfer layer and using it as a lead fin, it is possible to improve the heat dissipation of the heat conduction board and also use the chimney effect when combined with other printed wiring boards. However, improving the cooling effect of the circuit module is disclosed.

特開２００２−５０７２２号公報（図１，図２等）Japanese Patent Laid-Open No. 2002-50722 (FIGS. 1 and 2 etc.) 特開２００６−９３２５５号公報JP 2006-93255 A 特開２００８−１９２７８７号公報JP 2008-192787 A

しかし、図７および図８の従来のパワー半導体モジュールでは、リードフレーム（第２接続導体３０）を被覆するようにエポキシ樹脂３１が充填されており、リードフレームによる放熱効率は良くない。また、特許文献３では、リードフレームを外気で冷却することについては記載されているが、しきり板のある蓋をリードフレーム上に被せ、このしきり板で仕切られたリードフレームに外気を効率よく当ててリードフレームを効率的に冷却することについては記載されていない。   However, in the conventional power semiconductor modules of FIGS. 7 and 8, the epoxy resin 31 is filled so as to cover the lead frame (second connection conductor 30), and the heat dissipation efficiency by the lead frame is not good. Patent Document 3 describes cooling the lead frame with outside air, but covers the lead frame with a lid with a threshold plate, and efficiently applies the outside air to the lead frame partitioned by the threshold plate. There is no description about efficient cooling of the lead frame.

この発明の目的は、前記の課題を解決して、リードフレームを効率的に冷却することで、リードフレームを細線化し、半導体チップの小型化により占有面積の縮小化を図ることができる半導体装置およびその製造方法を提供することにある。   An object of the present invention is to solve the above-mentioned problems and to efficiently cool the lead frame, thereby thinning the lead frame and reducing the occupied area by downsizing the semiconductor chip and It is in providing the manufacturing method.

前記の目的を達成するために、特許請求の範囲の請求項１記載の発明によれば、複数の半導体チップが固着した絶縁回路基板と、該絶縁回路基板を収納し、外部導出端子がインサート成形された端子ケースと、前記複数の半導体チップと固着した第１接続導体と、該第１接続導体の一の主面と前記外部導出端子の一の主面とに固着した第２接続導体と、前記半導体チップを被覆し、第１接続導体の上部を露出して充填された樹脂と、該樹脂の一の面と離間して前記端子ケースに固定され、樹脂の一の面と端子ケースの側壁で画定される空間を区画するしきり部が形成された蓋と、を具備する構成とする。   In order to achieve the above object, according to the first aspect of the present invention, an insulated circuit board to which a plurality of semiconductor chips are fixed, the insulated circuit board are accommodated, and an external lead-out terminal is insert-molded. A terminal case, a first connection conductor fixed to the plurality of semiconductor chips, a second connection conductor fixed to one main surface of the first connection conductor and one main surface of the external lead terminal, A resin that covers the semiconductor chip and exposes and fills an upper portion of the first connection conductor, and is fixed to the terminal case at a distance from one surface of the resin, and the one surface of the resin and a side wall of the terminal case And a lid on which a threshold is defined to divide the space defined by.

特許請求の範囲の請求項２記載の発明によれば、請求項１記載の発明において、前記第１接続導体、第２接続導体と外部導出端子を夫々複数備え、前記しきり部が複数の第２接続導体の間を隔てているとよい。
特許請求の範囲の請求項３記載の発明によれば、請求項１記載の発明において、前記端子ケースの対向する側壁に、前記空間に外気を導入する開口部が形成されているとよい。 According to a second aspect of the present invention, in the first aspect of the present invention, the first connection conductor, the second connection conductor, and a plurality of external lead-out terminals are provided, and the threshold portion is a plurality of second portions. The connection conductors may be separated.
According to the invention described in claim 3 of the claims, in the invention described in claim 1, an opening for introducing outside air into the space may be formed in the opposing side wall of the terminal case.

特許請求の範囲の請求項４記載の発明によれば、請求項１記載の発明において、前記半導体チップを制御する制御基板が前記蓋に隣接して配置されているとよい。
特許請求の範囲の請求項５記載の発明によれば、請求項１記載の発明において、前記第１接続導体、第２接続導体と外部導出端子がリードフレームであるとよい。
特許請求の範囲の請求項６記載の発明によれば、請求項１記載の発明において、前記樹脂がエポキシ樹脂であるとよい。 According to a fourth aspect of the present invention, in the first aspect of the present invention, a control board for controlling the semiconductor chip may be disposed adjacent to the lid.
According to the invention described in claim 5, it is preferable that in the invention described in claim 1, the first connection conductor, the second connection conductor, and the external lead-out terminal are lead frames.
According to the invention described in claim 6 of the claims, in the invention described in claim 1, the resin may be an epoxy resin.

特許請求の範囲の請求項７記載の発明によれば、請求項１記載の発明において、前記しきり部と蓋が樹脂からなるとよい。
特許請求の範囲の請求項８記載の発明によれば、請求項２記載の発明において、前記しきり部で第２接続導体の間を電気的に絶縁しているとよい。
特許請求の範囲の請求項９記載の発明によれば、請求項１記載の発明において、前記第２接続導体が第１接続導体および外部導出端子とはんだ接合もしくはレーザ接合で固着されているとよい。 According to the seventh aspect of the present invention, in the first aspect of the present invention, the threshold and the lid may be made of resin.
According to the invention described in claim 8 of the claims, in the invention described in claim 2, it is preferable that the second connecting conductor is electrically insulated by the threshold portion.
According to the ninth aspect of the present invention, in the first aspect, the second connection conductor may be fixed to the first connection conductor and the external lead-out terminal by solder bonding or laser bonding. .

特許請求の範囲の請求項１０記載の発明によれば、絶縁基板と、その一の主面に形成された銅箔およびその他の主面に形成された回路パターンとを有する絶縁回路基板を用意し、前記銅箔に銅ベースを固着し、前記回路パターンに半導体チップを固着し、さらに、前記半導体チップに第１接続導体を固着する工程１と、外部導出端子がインサート成形されるとともに、その側壁に開口部が形成された端子ケースを用意し、該端子ケースに前記銅ベースを固着し、前記半導体チップを被覆するとともに第１接続導体の上部を露出させるように樹脂を充填する工程２と、一の主面にフィンを有する第２接続導体を用意し、該第２接続導体の他の主面の一方の端と他方の端を夫々前記第１接続導体と外部導出端子に固着する工程３と、樹脂の一の面と端子ケースの側壁で画定される空間を区画するしきり部が形成された蓋を用意し、該蓋を前記第２接続導体の上に被せて固定する工程４と、を含む製造方法とする。   According to the invention of claim 10, an insulating circuit board having an insulating substrate, a copper foil formed on one main surface thereof, and a circuit pattern formed on the other main surface is prepared. A step of fixing a copper base to the copper foil, a semiconductor chip to the circuit pattern, and a first connection conductor to the semiconductor chip; and an external lead terminal being insert-molded and its side wall Preparing a terminal case having an opening formed therein, fixing the copper base to the terminal case, covering the semiconductor chip and filling a resin so as to expose an upper portion of the first connection conductor; Step 3 of preparing a second connection conductor having fins on one main surface and fixing one end and the other end of the other main surface of the second connection conductor to the first connection conductor and the external lead-out terminal, respectively. And one side of the resin Providing a lid partition portion is formed for partitioning a space defined by the side wall of the terminal case, a step 4 for fixing covered with a lid on top of the second connecting conductor, the manufacturing method comprising.

特許請求の範囲の請求項１１記載の発明によれば、請求項１０記載の発明において、前記第１接続導体、第２接続導体と外部導出端子を夫々複数備えるとともに、前記工程４において前記しきり部が複数の第２接続導体の間を隔てるように蓋を固定する製造方法とするとよい。
特許請求の範囲の請求項１２記載の発明によれば、請求項１０記載の発明において、さらに、制御基板を前記蓋の上に配置し、前記樹脂ケースに固定するとよい。 According to the invention of claim 11 of the claims, in the invention of claim 10, the first connection conductor, the second connection conductor, and a plurality of external lead-out terminals are provided, and in the step 4, the threshold portion is provided. It is good to set it as the manufacturing method which fixes a lid | cover so that it may separate between several 2nd connection conductors.
According to the twelfth aspect of the present invention, in the tenth aspect of the present invention, the control board may be further disposed on the lid and fixed to the resin case.

特許請求の範囲の請求項１３記載の発明によれば、請求項１０記載の発明において、前記開口部が前記端子ケースの対向する側壁に形成されているとよい。   According to a thirteenth aspect of the present invention, in the tenth aspect, the opening may be formed in the opposing side wall of the terminal case.

この発明によれば、端子ケースに充填した樹脂の上に接続端子を露出させ、その上に空間を設け、その空間に外気を導入し流すので、接続端子を、露出させない場合に比べて、効率的に冷却することができ、結果としてその断面積を小さくすることができる。
また、しきり部を設けた蓋で上部を覆うことで、半導体装置内の外気の流れがよくなり、接続端子に形成されたフィンとの接触機会も増加して冷却効率を高めることができる。 According to the present invention, the connection terminal is exposed on the resin filled in the terminal case, a space is provided on the resin, and external air is introduced into the space, so that the connection terminal is more efficient than the case where the connection terminal is not exposed. Can be cooled automatically, and as a result, the cross-sectional area can be reduced.
Further, by covering the upper portion with a lid provided with a squeezed portion, the flow of outside air in the semiconductor device is improved, and the chance of contact with the fins formed on the connection terminals is increased, so that the cooling efficiency can be improved.

また同時に、しきり部を接続端子間に挿入、配置することで、端子間に充填される樹脂が無い場合でも、その互いの電気的絶縁性を高めることができる。
また、前記したように、銅ベース経由に加え、接続端子側からも効果的に放熱できるため、半導体チップを小型化することができる。さらに、半導体装置の小型化も図ることができる。 At the same time, by inserting and arranging the threshold portion between the connection terminals, even when there is no resin filled between the terminals, it is possible to enhance the electrical insulation between them.
Further, as described above, since the heat can be effectively radiated from the connection terminal side in addition to the copper base, the semiconductor chip can be reduced in size. Further, the semiconductor device can be downsized.

この発明の第１実施例の半導体装置の要部断面図である。It is principal part sectional drawing of the semiconductor device of 1st Example of this invention. この発明の第１実施例の半導体装置の要部平面図とその側面図である。1 is a plan view of a main part of a semiconductor device according to a first embodiment of the invention and a side view thereof; この発明の第１実施例の半導体装置の第２接続導体のフィン部の配置図である。FIG. 6 is an arrangement view of fin portions of a second connection conductor of the semiconductor device according to the first embodiment of the present invention. この発明の第１実施例の半導体装置のしきり板が付いた蓋の構成図であり、（ａ）は要部平面図、（ｂ）は（ａ）のＹ−Ｙで切断した要部断面図である。BRIEF DESCRIPTION OF THE DRAWINGS It is a block diagram of the lid | cover with the threshold plate of the semiconductor device of 1st Example of this invention, (a) is a principal part top view, (b) is principal part sectional drawing cut | disconnected by YY of (a). It is. この発明の第１実施例の半導体装置のしきり板と第２接続導体の配置を示す要部平面図である。It is a principal part top view which shows arrangement | positioning of the threshold plate and 2nd connection conductor of the semiconductor device of 1st Example of this invention. この発明の第２実施例の半導体装置の要部断面図である。It is principal part sectional drawing of the semiconductor device of 2nd Example of this invention. 従来のパワー半導体モジュールの要部断面図である。It is principal part sectional drawing of the conventional power semiconductor module. 従来のパワー半導体モジュールの要部平面図である。It is a principal part top view of the conventional power semiconductor module.

実施の形態を以下の実施例で説明する。以下の説明で、従来構造と同一部位には同一の符号を付した。   Embodiments will be described in the following examples. In the following description, the same parts as those in the conventional structure are denoted by the same reference numerals.

図１〜図５は、この発明の第１実施例の半導体装置の構成図であり、図１は要部断面図、図２は要部平面図とその側面図、図３は第２接続導体のフィン部の配置図、図４はしきり板が付いた蓋の構成図、図５はしきり板と第２接続導体の配置を示す要部平面図である。図４（ａ）は要部平面図、図４（ｂ）は図４（ａ）のＹ−Ｙで切断した要部断面図である。ここでは半導体装置としてパワー半導体モジュールを例として挙げた。   1 to 5 are block diagrams of a semiconductor device according to a first embodiment of the present invention. FIG. 1 is a cross-sectional view of the main part, FIG. 2 is a plan view of the main part and its side view, and FIG. FIG. 4 is a configuration diagram of a lid with a threshold plate, and FIG. 5 is a plan view of an essential part showing the layout of the threshold plate and the second connection conductor. 4A is a plan view of the main part, and FIG. 4B is a cross-sectional view of the main part cut along YY in FIG. 4A. Here, a power semiconductor module is taken as an example of the semiconductor device.

図１において、このパワー半導体モジュールは、セラミックス４(絶縁基板)と、このセラミックス４の一の主面である裏側に形成された裏面銅箔３およびセラミックス４の他の主面である表側に形成された回路パターン５とからなる絶縁回路基板と、この裏面銅箔３にはんだ２で接合された銅ベース１とを備える。
また、絶縁回路基板に固着された複数の半導体チップ７，８と、半導体チップ７，８の組ごとに接合された第１接続導体９ａと、回路パターン５および第２接続導体１３ｂ、１３ｃに固着された第３接続導体９ｂとを備える。半導体チップ７，８は夫々ＩＧＢＴとＦＷＤ（Free Wheeling Diode）である。これらの半導体チップ７，８は夫々の裏面がはんだ６により回路パターン５と接合、固着されている。第１接続導体９ａは、Ω形状の接続導体であるリードフレームであり、図示しないはんだによりその脚部が夫々半導体チップ７、８の表（おもて）面側のエミッタ電極、アノード電極に接合されている。第３接続導体９ｂは、Ｕ字状の接続導体であるリードフレームであり、図示しないはんだによりその両端が夫々回路パターン５および第２接続導体１３ｂ、１３ｃに接合されている。 In FIG. 1, the power semiconductor module is formed on a ceramic 4 (insulating substrate), a back copper foil 3 formed on the back side which is one main surface of the ceramic 4, and a front side which is the other main surface of the ceramic 4. And an insulating circuit board made of the circuit pattern 5 and a copper base 1 joined to the back copper foil 3 with solder 2.
Also, a plurality of semiconductor chips 7 and 8 fixed to the insulating circuit board, a first connection conductor 9a bonded to each set of the semiconductor chips 7 and 8, and a circuit pattern 5 and second connection conductors 13b and 13c are fixed. Third connection conductor 9b. The semiconductor chips 7 and 8 are IGBT and FWD (Free Wheeling Diode), respectively. The back surfaces of these semiconductor chips 7 and 8 are bonded and fixed to the circuit pattern 5 by solder 6. The first connection conductor 9a is a lead frame which is an Ω-shaped connection conductor, and its legs are joined to the emitter electrode and the anode electrode on the front surface side of the semiconductor chips 7 and 8 by solder (not shown), respectively. Has been. The third connection conductor 9b is a lead frame that is a U-shaped connection conductor, and both ends thereof are joined to the circuit pattern 5 and the second connection conductors 13b and 13c by solder (not shown).

また、これらの第１接続導体９ａおよび第３接続導体９ｂ上に夫々はんだ接合１５により固着された第２接続導体１３ａ、１３ｂ、１３ｃと、はんだ接合１５により第２接続導体１３ａ等と固着された外部導出端子１１ａ、１１ｂ、１１ｃ、１１ｄと、外部導出端子１１ａ等がインサート成形されるとともに絶縁回路基板を収納する端子ケース１０とを備える。一組の半導体チップ７および半導体チップ８は逆並列接続しており、この組を２つ直列接続して一相分の上下アームを構成している。第２接続導体１３ａ等は、板状のリードフレームを加工した部材であり、一の主面にフィンが形成されている。そして第２接続導体１３ａ等は、その他の主面が第１接続導体９ａ等と固着し、そのフィンが一の主面側の上方に突出するよう配置されている。端子ケース１０は、平面視した際の形状が略Ｏ字形状であり、その対向する側壁にモジュール内外へ開口し、外気の導入口と放出口になる溝部２０を有する（図２参照）。   Further, the second connection conductors 13a, 13b, and 13c fixed on the first connection conductor 9a and the third connection conductor 9b by the solder joint 15 and the second connection conductor 13a and the like by the solder joint 15, respectively. External lead-out terminals 11a, 11b, 11c, and 11d, and a terminal case 10 in which the external lead-out terminals 11a and the like are insert-molded and an insulating circuit board is accommodated. One set of semiconductor chips 7 and 8 are connected in reverse parallel, and two sets of these sets are connected in series to form upper and lower arms for one phase. The second connection conductor 13a and the like are members obtained by processing a plate-like lead frame, and fins are formed on one main surface. The second connecting conductor 13a and the like are arranged such that the other main surface is fixed to the first connecting conductor 9a and the like, and the fin protrudes upward on one main surface side. The terminal case 10 is substantially O-shaped when seen in a plan view, and has a groove portion 20 that opens into and out of the module on the opposite side wall and serves as an outside air inlet and outlet (see FIG. 2).

また、端子ケース１０内に充填されたエポキシ樹脂１２（熱硬化性樹脂）と、エポキシ樹脂１２の表面と空間１８を空けながら離間して、第２接続導体１３ａ等の上部を覆う蓋１６とを備える。エポキシ樹脂１２は、半導体チップ７，８を被覆し、第１接続導体９ａおよび第３接続導体９ｂの一部と第２接続導体１３ａ等が露出するように充填される。蓋１６は、エポキシ樹脂１２の表面と端子ケース１０の側壁で画定される空間１８を区画するとともに、第２接続導体１３ａ、１３ｃと第２接続導体１３ｂとの間を隔てるしきり板１７を有している。端子ケース１０に形成された溝部２０は、その組ごとに区画された空間１８に連通するよう夫々配置されている。溝部２０を介して外部から取り込まれた外気は第１接続導体９ａ、第３接続導体９ｂと第２接続導体１３の周囲にしきり板１７により誘導され、送り込まれる。蓋１６としきり板１７は電気的に絶縁性のある材料、例えば樹脂で形成されるとよい。   In addition, an epoxy resin 12 (thermosetting resin) filled in the terminal case 10 and a lid 16 that covers the upper surface of the second connection conductor 13a and the like are spaced apart from the surface of the epoxy resin 12 while leaving a space 18 therebetween. Prepare. The epoxy resin 12 covers the semiconductor chips 7 and 8 and is filled so that a part of the first connection conductor 9a and the third connection conductor 9b, the second connection conductor 13a, and the like are exposed. The lid 16 defines a space 18 defined by the surface of the epoxy resin 12 and the side wall of the terminal case 10, and includes a threshold plate 17 that separates the second connection conductors 13 a and 13 c from the second connection conductor 13 b. ing. The groove portions 20 formed in the terminal case 10 are respectively arranged so as to communicate with the spaces 18 partitioned for each set. The outside air taken in from the outside through the groove portion 20 is guided and fed into the periphery of the first connection conductor 9a, the third connection conductor 9b, and the second connection conductor 13 by the slit plate 17. The lid 16 and the slit plate 17 are preferably formed of an electrically insulating material such as a resin.

さらに、本実施例のパワー半導体モジュールは、蓋１６上に配置され、半導体チップ７を制御する制御基板１９を備える。
尚、第１接続導体９ａ、第３接続導体９ｂはジャンパー端子ともいう。またＵ字状接続導体である第３接続導体９ｂは、図１に示すようにバネ作用を発揮するようＵ字を横にした状態で配置され、第２接続導体１３ｂ、１３ｃと密着し良好にはんだ接合されている。 Furthermore, the power semiconductor module of this embodiment includes a control board 19 that is disposed on the lid 16 and controls the semiconductor chip 7.
The first connection conductor 9a and the third connection conductor 9b are also called jumper terminals. Further, the third connection conductor 9b, which is a U-shaped connection conductor, is arranged with the U-shape lying so as to exert a spring action as shown in FIG. 1, and is in close contact with the second connection conductors 13b and 13c. Soldered.

また、図２において、符号の２１は制御信号用の制御ピン、２２は外部配線取り付け用のネジ穴、２３は銅ベース１を介してモジュールを冷却体に取り付けるために必要な取り付け用貫通孔である。制御基板１９は制御ピン２１に接続され、蓋１６に隣接して固定されている。
つぎに、第１実施例の半導体装置の製造方法を工程順に説明する。
（工程１）
まず、セラミックス４(絶縁基板)、このセラミックス４の裏側に形成された裏面銅箔３およびセラミックス４の表側に形成された回路パターン５を有する絶縁回路基板と、銅ベース１と、２組の半導体チップ（ＩＧＢＴ）７、半導体チップ（ＦＷＤ）８と、Ω形状の第１接続導体９ａおよびＵ字状の第３接続導体９ｂとを用意する。そして、絶縁回路基板と銅ベース１を対向するよう配置し、裏面銅箔３に銅ベース１をはんだ２により接合、固着する。また、半導体チップ７、８を、その裏面が絶縁回路基板と対向するよう配置し、回路パターン５に半導体チップ７、８をはんだ６で固着する。さらに、半導体チップ７表（おもて）面のエミッタ電極および半導体チップ８表（おもて）面のアノード電極（ともに図示せず）の夫々に第１接続導体９ａの脚部をはんだ６で固着し、同時に、第３接続導体９ｂの脚部を回路パターン５にはんだにより接合、固着する。 In FIG. 2, reference numeral 21 is a control pin for a control signal, 22 is a screw hole for attaching an external wiring, and 23 is a mounting through hole necessary for attaching the module to the cooling body via the copper base 1. is there. The control board 19 is connected to the control pin 21 and is fixed adjacent to the lid 16.
Next, the manufacturing method of the semiconductor device of the first embodiment will be described in the order of steps.
(Process 1)
First, a ceramic 4 (insulating substrate), a back surface copper foil 3 formed on the back side of the ceramic 4, an insulating circuit substrate having a circuit pattern 5 formed on the front side of the ceramic 4, a copper base 1, and two sets of semiconductors A chip (IGBT) 7, a semiconductor chip (FWD) 8, and an Ω-shaped first connection conductor 9a and a U-shaped third connection conductor 9b are prepared. Then, the insulating circuit board and the copper base 1 are arranged so as to face each other, and the copper base 1 is joined and fixed to the back surface copper foil 3 by the solder 2. Further, the semiconductor chips 7 and 8 are arranged so that the back surfaces thereof face the insulating circuit substrate, and the semiconductor chips 7 and 8 are fixed to the circuit pattern 5 with solder 6. Further, the legs of the first connection conductor 9a are soldered to the emitter electrode on the front surface of the semiconductor chip 7 and the anode electrode (both not shown) on the front surface of the semiconductor chip 8 with solder 6. At the same time, the legs of the third connection conductor 9b are joined and fixed to the circuit pattern 5 with solder.

なお、エミッタ電極等と第１接続導体９ａを、はんだに代えて、レーザ溶接、超音波接合または銀ペーストなどで接合する場合には、回路パターン５に半導体チップ７，８をはんだ６で固着した後に行う。
（工程２）
つぎに、複数の外部導出端子１１ａ、１１ｂ、１１ｃ、１１ｄがインサート成形されるとともに、その側壁に溝部２０を備える略Ｏ字形状の端子ケース１０を用意し、その底部に銅ベース１の外周を図示しないシリコーン系接着剤にて加熱接着し、固着する。この後、第１接続導体９ａおよび第３接続導体９ｂの上部が夫々露出するようにエポキシ樹脂１２を充填し、硬化する。
（工程３）
つぎに、フィン１４を有する複数の第２接続導体１３ａ，１３ｂ、１３ｃを用意する。エポキシ樹脂１２から露出する２つの第１接続導体９ａの上部に、第２接続導体１３ａ、１３ｂのフィン１４を有さない面の一方の端を夫々はんだ接合１５により固着する。このとき第２接続導体１３ｂを第３接続導体９ｂを介して回路パターン５にはんだ接合１５により固着し、同様に第２接続導体１３ｃも回路パターン５に固着する。さらに、第２接続導体１３ａ，１３ｂ、１３ｃの夫々の他方の端を外部導出端子１１ａ、１１ｂ、１１ｃにはんだ接合１５により固着する。
（工程４）
その後、図４で示すしきり板１７を備える蓋１６を用意し、この蓋１６を、エポキシ樹脂１２の表面上および第２接続導体１３ａ等のフィン１４の周囲に空間１８ができるよう、かつ、端子ケース１０の溝部２０から導入される外気２４（図３）をしきり板１７が遮らないように被せ、端子ケース１０の上部に固定する。このときしきり板１７の下部がエポキシ樹脂１２に接するように蓋１６を配置する。このようにして第２接続導体１３ａ等は、しきり板１７と端子ケース１０で囲まれた空間１８に露出し、さらにしきり板１７によって隔てられる。続いて、制御基板１９を蓋１６の上に配置し、端子ケース１０から突出する制御ピン２１と接続する。 When the emitter electrode or the like and the first connection conductor 9a are joined by laser welding, ultrasonic joining or silver paste instead of solder, the semiconductor chips 7 and 8 are fixed to the circuit pattern 5 with the solder 6. To do later.
(Process 2)
Next, a plurality of external lead-out terminals 11a, 11b, 11c, and 11d are insert-molded, and a substantially O-shaped terminal case 10 having a groove portion 20 on its side wall is prepared, and the outer periphery of the copper base 1 is provided at the bottom. Heat-bonded with a silicone adhesive (not shown) and fixed. Thereafter, the epoxy resin 12 is filled and cured so that the upper portions of the first connection conductor 9a and the third connection conductor 9b are exposed.
(Process 3)
Next, a plurality of second connection conductors 13a, 13b, 13c having fins 14 are prepared. One end of the surface of the second connection conductors 13a and 13b that does not have the fins 14 is fixed to the upper portions of the two first connection conductors 9a exposed from the epoxy resin 12 by solder joints 15, respectively. At this time, the second connection conductor 13b is fixed to the circuit pattern 5 via the third connection conductor 9b by the solder joint 15, and similarly, the second connection conductor 13c is also fixed to the circuit pattern 5. Furthermore, the other end of each of the second connection conductors 13a, 13b, and 13c is fixed to the external lead-out terminals 11a, 11b, and 11c by the solder joint 15.
(Process 4)
Thereafter, a lid 16 provided with a squeezing plate 17 shown in FIG. 4 is prepared, and this lid 16 is provided with a space 18 on the surface of the epoxy resin 12 and around the fins 14 such as the second connection conductors 13a, and terminals. The outside air 24 (FIG. 3) introduced from the groove 20 of the case 10 is covered so as not to be blocked by the squeezing plate 17, and fixed to the upper part of the terminal case 10. At this time, the lid 16 is arranged so that the lower portion of the threshold plate 17 is in contact with the epoxy resin 12. In this way, the second connection conductor 13 a and the like are exposed to the space 18 surrounded by the threshold plate 17 and the terminal case 10, and further separated by the threshold plate 17. Subsequently, the control board 19 is disposed on the lid 16 and connected to the control pins 21 protruding from the terminal case 10.

以上の工程１〜４を含む製造方法により本実施例のモジュールが製造される。
図３に示すように、このモジュールは溝部２０を介して外気２４を取り入れ、また放出する。外気２４は自動車の走行中に取り入れられたり、ファンによる送風により取り入れられる。溝部２０から入った外気２４はフィン１４の間を通過するときに、フィン１４を通して第２接続導体１３ａ等から熱を奪う。そして、第２接続導体１３ａ等に固着された第１接続導体９ａ、第３接続導体９ｂと、さらに第１接続導体９ａ等に固着された半導体チップ７，８を冷却する。 The module of the present embodiment is manufactured by the manufacturing method including the steps 1 to 4 described above.
As shown in FIG. 3, the module takes in and discharges outside air 24 through the groove 20. The outside air 24 is taken in while the automobile is running or is taken in by blowing air from a fan. When the outside air 24 that has entered from the groove 20 passes between the fins 14, it takes heat away from the second connection conductors 13 a and the like through the fins 14. Then, the first connection conductor 9a and the third connection conductor 9b fixed to the second connection conductor 13a and the semiconductor chips 7 and 8 fixed to the first connection conductor 9a and the like are cooled.

また、第２接続導体１３ａ等が備えるフィン１４は板状であり、外気２４の流れを遮らないよう、しきり板１７と略平行に配置されるので、その冷却効果は大きい。
さらに、第１、第２、第３接続導体９ａ、１３ａ、９ｂ等を効率的に冷却できるので、これらの接続導体自体の断面積を小さくし、細線化できる。また、効率的に接続導体から放熱されるので半導体チップ７，８の面積を小さくできる。その結果、半導体装置を小型化できる。 In addition, the fins 14 included in the second connection conductors 13a and the like are plate-shaped, and are arranged substantially in parallel with the threshold plate 17 so as not to block the flow of the outside air 24. Therefore, the cooling effect is great.
Furthermore, since the first, second, and third connection conductors 9a, 13a, and 9b can be efficiently cooled, the cross-sectional areas of these connection conductors themselves can be reduced and thinned. Further, since the heat is efficiently radiated from the connection conductor, the area of the semiconductor chips 7 and 8 can be reduced. As a result, the semiconductor device can be reduced in size.

なお、、半導体チップのサイズが小さくなり、隣接する接続導体間の間隔が狭くなると、接続導体間の絶縁性が低下することがある。このような場合には、例えば、図５の点線で示す追加のしきり板２５を蓋１６に形成し、その接続導体間に配置するとよい。しきり板２５の位置、形状は、外気２４の流れをできるだけ滑らかにするようなものとする。図５は、三角形のしきり板２５を配置した場合であり、外気２４に垂直なしきり板を配置する場合に比べて、点線２４ａで示すように外気２４の流れは滑らかになる。   Note that when the size of the semiconductor chip is reduced and the interval between adjacent connection conductors is reduced, the insulation between the connection conductors may be lowered. In such a case, for example, an additional threshold plate 25 indicated by a dotted line in FIG. 5 may be formed on the lid 16 and disposed between the connection conductors. The position and shape of the threshold plate 25 are designed to make the flow of the outside air 24 as smooth as possible. FIG. 5 shows a case where a triangular threshold plate 25 is arranged, and the flow of the outside air 24 becomes smoother as shown by a dotted line 24a than in the case where a vertical threshold plate is arranged in the outside air 24. FIG.

図６は、この発明の第２実施例の半導体装置の要部断面図である。第１実施例との違いは、はんだ接合１５に代えレーザー接合２６により、第２接続導体１３ａ、１３ｂ、１３ｃを、第１接続導体９ａ、第３接続導体９ｂおよび外部導出端子１１ａ、１１ｂ、１１ｃに夫々固着する点である。この場合も第１実施例と同様の効果がある。
また、レーザ接合２６は、エポキシ樹脂１２を充填した後、樹脂１２から露出した第１接続導体９ａおよび第３接続導体９ｂの上部と、第２接続導体１３ａ、外部導出端子１１ａ等を対象に行なう。エポキシ樹脂１２で半導体チップ７，８や回路パターン５は覆われているので、レーザを照射した際の溶接スパッタによる半導体チップ７，８面の損傷や回路パターン５の短絡は発生しない。 FIG. 6 is a cross-sectional view of the main part of the semiconductor device according to the second embodiment of the present invention. The difference from the first embodiment is that the second connection conductors 13a, 13b and 13c are replaced by the first connection conductor 9a, the third connection conductor 9b and the external lead terminals 11a, 11b and 11c by laser bonding 26 instead of the solder bonding 15. It is the point which adheres to each. This case also has the same effect as the first embodiment.
The laser bonding 26 is performed on the upper portions of the first connection conductor 9a and the third connection conductor 9b exposed from the resin 12, the second connection conductor 13a, the external lead-out terminal 11a, and the like after the epoxy resin 12 is filled. . Since the semiconductor chips 7, 8 and the circuit pattern 5 are covered with the epoxy resin 12, damage to the surfaces of the semiconductor chips 7, 8 due to welding sputtering and short circuit of the circuit pattern 5 do not occur.

１ 銅ベース
２、６ はんだ
３ 裏面銅箔
４ セラミックス
５ 回路パターン
７ 半導体チップ（ＩＧＢＴ）
８ 半導体チップ（ＦＷＤ）
９ａ 第１接続導体
９ｂ 第３接続導体
１０ 端子ケース
１１ａ〜１１ｄ 外部導出端子
１２ エポキシ樹脂
１３ａ、１３ｂ、１３ｃ 第２接続導体
１４ フィン
１５ はんだ接合
１６ 蓋
１７、２５ しきり板
１８ 空間
１９ 制御基板
２０ 溝部
２１ 制御ピン
２２ ネジ穴
２３ 取り付け用貫通孔
２４ 外気
２４ａ 点線
２６ レーザ接合
DESCRIPTION OF SYMBOLS 1 Copper base 2, 6 Solder 3 Back surface copper foil 4 Ceramics 5 Circuit pattern 7 Semiconductor chip (IGBT)
8 Semiconductor chip (FWD)
9a 1st connection conductor 9b 3rd connection conductor 10 Terminal case 11a-11d External lead-out terminal 12 Epoxy resin 13a, 13b, 13c 2nd connection conductor 14 Fin 15 Solder joint 16 Lid | 17,25 Clearing board 18 Space 19 Control board 20 Groove part 21 control pin 22 screw hole 23 through hole 24 for mounting 24 outside air 24a dotted line 26 laser bonding

Claims (13)

複数の半導体チップが固着した絶縁回路基板と、該絶縁回路基板を収納し、外部導出端子がインサート成形された端子ケースと、前記複数の半導体チップと固着した第１接続導体と、該第１接続導体の一の主面と前記外部導出端子の一の主面とに固着した第２接続導体と、前記半導体チップを被覆し、第１接続導体の上部を露出して充填された樹脂と、該樹脂の一の面と離間して前記端子ケースに固定され、樹脂の一の面と端子ケースの側壁で画定される空間を区画するしきり部が形成された蓋と、を具備することを特徴とする半導体装置。 An insulated circuit board to which a plurality of semiconductor chips are fixed, a terminal case in which the insulated circuit board is accommodated and an external lead-out terminal is insert-molded, a first connection conductor fixed to the plurality of semiconductor chips, and the first connection A second connection conductor fixed to one main surface of the conductor and one main surface of the external lead-out terminal; a resin that covers the semiconductor chip and is exposed to expose an upper portion of the first connection conductor; and A lid that is fixed to the terminal case so as to be spaced apart from one surface of the resin, and that is formed with a threshold portion that divides a space defined by the one surface of the resin and a side wall of the terminal case. Semiconductor device. 前記第１接続導体、第２接続導体と外部導出端子を夫々複数備え、前記しきり部が複数の第２接続導体の間を隔てていることを特徴とする請求項１に記載の半導体装置。 2. The semiconductor device according to claim 1, wherein a plurality of the first connection conductors, the second connection conductors, and the external lead-out terminals are provided, and the threshold portion separates the plurality of second connection conductors. 前記端子ケースの対向する側壁に、前記空間に外気を導入する開口部が形成されていることを特徴とする請求項１に記載の半導体装置。 2. The semiconductor device according to claim 1, wherein an opening for introducing outside air into the space is formed on opposing side walls of the terminal case. 前記半導体チップを制御する制御基板が前記蓋に隣接して配置されていることを特徴とする請求項１に記載の半導体装置。 The semiconductor device according to claim 1, wherein a control board for controlling the semiconductor chip is disposed adjacent to the lid. 前記第１接続導体、第２接続導体と外部導出端子がリードフレームであることを特徴とする請求項１に記載の半導体装置。 The semiconductor device according to claim 1, wherein the first connection conductor, the second connection conductor, and the external lead-out terminal are lead frames. 前記樹脂がエポキシ樹脂であることを特徴とする請求項１に記載の半導体装置。 The semiconductor device according to claim 1, wherein the resin is an epoxy resin. 前記しきり部と蓋が樹脂からなることを特徴とする請求項１に記載の半導体装置。 The semiconductor device according to claim 1, wherein the threshold part and the lid are made of resin. 前記しきり部で第２接続導体の間を電気的に絶縁していることを特徴とする請求項２に記載の半導体装置。 The semiconductor device according to claim 2, wherein the second connection conductor is electrically insulated at the threshold portion. 前記第２接続導体が第１接続導体および外部導出端子とはんだ接合もしくはレーザ接合で固着されていることを特徴とする請求項１に記載の半導体装置。 The semiconductor device according to claim 1, wherein the second connection conductor is fixed to the first connection conductor and the external lead-out terminal by solder bonding or laser bonding. 絶縁基板と、その一の主面に形成された銅箔およびその他の主面に形成された回路パターンとを有する絶縁回路基板を用意し、前記銅箔に銅ベースを固着し、前記回路パターンに半導体チップを固着し、さらに、前記半導体チップに第１接続導体を固着する工程１と、
外部導出端子がインサート成形されるとともに、その側壁に開口部が形成された端子ケースを用意し、該端子ケースに前記銅ベースを固着し、前記半導体チップを被覆するとともに第１接続導体の上部を露出させるように樹脂を充填する工程２と、
一の主面にフィンを有する第２接続導体を用意し、該第２接続導体の他の主面の一方の端と他方の端を夫々前記第１接続導体と外部導出端子に固着する工程３と、
樹脂の一の面と端子ケースの側壁で画定される空間を区画するしきり部が形成された蓋を用意し、該蓋を前記第２接続導体の上に被せて固定する工程４と、を含むことを特徴とする半導体装置の製造方法。 An insulating circuit board having an insulating substrate, a copper foil formed on one main surface of the insulating substrate, and a circuit pattern formed on the other main surface is prepared, and a copper base is fixed to the copper foil. Fixing the semiconductor chip, and further fixing the first connection conductor to the semiconductor chip; and
An external lead-out terminal is insert-molded, and a terminal case having an opening formed in the side wall thereof is prepared, the copper base is fixed to the terminal case, the semiconductor chip is covered, and the upper portion of the first connection conductor is covered Step 2 of filling the resin so as to be exposed,
Step 3 of preparing a second connection conductor having fins on one main surface and fixing one end and the other end of the other main surface of the second connection conductor to the first connection conductor and the external lead-out terminal, respectively. When,
Preparing a lid formed with a threshold that defines a space defined by one surface of the resin and the side wall of the terminal case, and covering and fixing the lid on the second connection conductor. A method for manufacturing a semiconductor device. 前記第１接続導体、第２接続導体と外部導出端子を夫々複数備えるとともに、前記工程４において前記しきり部が複数の第２接続導体の間を隔てるように蓋を固定することを特徴とする請求項１０に記載の半導体装置の製造方法。 A plurality of the first connection conductors, the second connection conductors, and a plurality of external lead-out terminals are provided, and a lid is fixed in the step 4 so that the threshold portion separates the plurality of second connection conductors. Item 11. A method for manufacturing a semiconductor device according to Item 10. さらに、制御基板を前記蓋の上に配置し、前記樹脂ケースに固定することを特徴とする請求項１０に記載の半導体装置の製造方法。 The method of manufacturing a semiconductor device according to claim 10, further comprising a control board disposed on the lid and fixed to the resin case. 前記開口部が前記端子ケースの対向する側壁に形成されていることを特徴とする請求項１０に記載の半導体装置の製造方法。
The method of manufacturing a semiconductor device according to claim 10, wherein the opening is formed on a side wall of the terminal case that faces the opening.
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