WO2019041662A1 - Dram测试装置及方法 - Google Patents

Dram测试装置及方法 Download PDF

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Publication number
WO2019041662A1
WO2019041662A1 PCT/CN2017/117226 CN2017117226W WO2019041662A1 WO 2019041662 A1 WO2019041662 A1 WO 2019041662A1 CN 2017117226 W CN2017117226 W CN 2017117226W WO 2019041662 A1 WO2019041662 A1 WO 2019041662A1
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test
dram
module
current
program
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PCT/CN2017/117226
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English (en)
French (fr)
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龙红卫
卢浩
李志雄
肖浩
吴方
胡宏辉
邓恩华
谭康强
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深圳市江波龙电子有限公司
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Publication of WO2019041662A1 publication Critical patent/WO2019041662A1/zh

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor

Definitions

  • the present application belongs to the field of memory device testing, and in particular, to a low power consumption DRAM testing device and method.
  • DRAM Dynamic Random Access
  • dynamic random access memory test mainly relies on the machine for testing, including T5588 and T5503A machines, and related parameters test for LPDDR2/3. These machines can be tested at high temperature of 88 °C. It can be used for 128 to 256 shots at a time. The robot can be used to grab chips and sort, but the machine test method is costly and inflexible.
  • the DRAM test stand is directly added to the original solder DRAM package on the whole machine to achieve the test purpose.
  • the complete test solution installs a complete DRAM test stand on this module.
  • the module for adding test parameters including current test module, serial communication module, etc., forms a DRAM test stand through the combination of these modules, but the current test method of the whole machine is unstable, and some parameters cannot be tested separately.
  • the purpose of the present application is to provide a platform-based DRAM test apparatus and method, which aims to solve the problem that the test method existing in the conventional technical solution has high cost and cannot individually test specific parameters.
  • a DRAM test apparatus includes a test rack for inserting a test DRAM, a program storage module for storing a test program, a current test module connected to the test stand, and a test control module, the test control module and the test The rack, the program storage module and the current test module are connected; the test control module receives the test switch command to perform current test and function test on the test DRAM and upload the test result, wherein:
  • the current test includes: controlling the current test module to supply a voltage to the DRAM to be tested while detecting an operating current of the DRAM to be tested;
  • the function test comprises: performing a write-reading procedure on the test DRAM according to the test program of the program storage module, comparing whether the read and write programs are consistent and obtaining a comparison result.
  • DRAM test method including:
  • the current test includes: supplying a voltage to the DRAM to be tested while detecting an operating current of the DRAM to be tested;
  • the function test comprises: performing a write-reading procedure on the test DRAM according to the test program of the program storage module, comparing whether the read and write programs are consistent and obtaining a comparison result.
  • an embodiment of the present application provides an electronic device, where the electronic device includes:
  • At least one processor and,
  • the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to enable the at least one processor to perform the method described above.
  • embodiments of the present application provide a non-transitory computer readable storage medium storing computer-executable instructions that, when executed by an electronic device, cause the electronic The device performs the above method.
  • the above DRAM test device and method are evolved through the whole machine (mobile phone or tablet) through the DRAM test stand, the test control module is set, the pre-stored test program is read to perform the function test on the DRAM, and the current test module can also be controlled to the DRAM.
  • Load voltage for current test, test DRAM by setting low-cost independent module, select defective products to achieve maximum efficiency, and test the working current and function test under different working conditions separately.
  • FIG. 1 is a schematic structural diagram of a DRAM test apparatus according to a preferred embodiment of the present application.
  • FIG. 2 is a schematic circuit diagram of an example of a master mold in the current test module shown in FIG. 1;
  • FIG. 3 is a schematic circuit diagram of an example of a first voltage output unit in the current test module shown in FIG. 1;
  • FIG. 4 is a schematic circuit diagram of an example of a second voltage output unit in the current test module shown in FIG. 1;
  • FIG. 5 is a schematic circuit diagram of an example of a level conversion unit in the current test module shown in FIG. 1;
  • FIG. 6 is a schematic circuit diagram of an example of a sampling unit in the current testing module shown in FIG. 1;
  • FIG. 7 is a specific flowchart of a DRAM test method according to a preferred embodiment of the present application.
  • FIG. 8 is a schematic diagram showing the hardware structure of an electronic device of a DRAM test method according to an embodiment of the present application.
  • the DRAM testing device includes a test rack 101 for inserting a test DRAM, a program storage module 102 for storing test programs and system programs, a current test module 103 connected to the test rack 101, and a test control module. 104.
  • the test control module 104 is connected to the test rack 101, the program storage module 102, and the current test module 103.
  • the test control module 104 receives the test switch command to perform current test and function test on the test DRAM, and uploads test results, wherein: the current test includes: The control current test module 103 supplies a voltage to the DRAM to be tested while detecting the operating current of the DRAM to be tested; the functional test includes: performing a write-reading procedure on the test DRAM according to the test program of the program storage module, and comparing whether the read and write programs are consistent and obtained compare results.
  • serial port module 105 is further configured to communicate with the host computer 200 (such as a personal computer) to upload test results.
  • the test stand 101 has a card holder. At the beginning of the test, the DRAM is made into a part of the system through contact with the card holder, and then handshake communication is performed. After the test is finished, the machine then removes the tested DRAM for classification.
  • the program storage module 102 includes an EMMC (Embedded Multi Media Card) or a separate memory card slot for mounting a removable memory card.
  • the platform chip of the test control module 104 is a low cost MTK chip.
  • the DRAM test device includes a switch control module 106 coupled to the test control module 104 for receiving an external control to send a test switch command to the test control module 104 to control the start and stop and switch test modes.
  • the switch control module 106 includes a plurality of trigger switch buttons; in other embodiments, the switch control module 106 can use the host computer 200 to issue test switch commands through the serial port module 105.
  • the DRAM test device also has a system test function, including a display module 107 connected to the test control module 104.
  • the test control module 107 is further configured to load the system program into the DRAM to be tested and control the display module 107 to display the loading condition.
  • the display module 107 can be an LCD (Liquid Crystal Display).
  • the reliability of the DRAM is verified by running the system (such as running the android system and doing the booting step).
  • the reliability of the system requires multiple modules to cooperate, including the LCD and the test control module 104.
  • the function of the LCD module is to display the system test and increase the test load.
  • the test control module 104 functions: occupying a certain amount of memory, performing random tests on the DRAM, and the like.
  • the current test module 103 includes a main controller (see FIG. 2), a first voltage output unit that supplies 1.8V (see FIG. 3), a second output unit that supplies 1.2V (see FIG. 4), and is used for level shifting.
  • the level shifting unit see Figure 5) and the sampling unit that samples the DRAM operating current (see Figure 6).
  • Read and write current and standby current test The standby current has a very important impact on the standby time of the whole machine.
  • the size of the read and write current also plays an important role in the power consumption of the whole machine during use.
  • Test the current of the DRAM before packaging which can more effectively distinguish the product usage level.
  • the external power supply is supplied through the current test module 103, and the DRAM is loaded with 1.2V voltage and 1.8V voltage for external power supply, and then the DRAM is read by software instructions. , write and standby status. In the process of these states, the magnitude of the current is detected, including the data written to the DRAM, the read data, and the current during standby. Then, the tested current value is fed back to the upper computer 200 through the serial port module 105.
  • the test process the test is divided into Type0-Type5, a total of 6 types, each Type has different write data and read data.
  • the Type0-Type5 is automatically tested in order after starting.
  • the DRAM test device is cheaper based on the platform chip, and can complete the read/write current test, the standby current test, the function test, and the system test, and has very good effects on the parameter test and troubleshooting of the Mobile DRAM.
  • a DRAM test method including:
  • Step S110 pre-storing the test program
  • Step S120 receiving a test switch command to perform current test and function test on the test DRAM and upload the test result.
  • the current test comprises: providing a voltage to the DRAM to be tested while detecting the working current of the DRAM to be tested;
  • the functional test comprises: performing a write and read procedure on the test DRAM according to the test program of the program storage module, comparing whether the read and write programs are consistent and obtain Compare the results.
  • system program is stored while the test program is pre-stored; the system program is loaded into the DRAM to be tested and the loading condition is displayed to complete the system test.
  • the test switch command includes controlling the test start and stop and the test mode switching.
  • the operating current includes writing data to the DRAM to be tested, reading data, and current during standby. Upload test results to the host computer through the serial port.
  • FIG. 8 is a schematic diagram showing the hardware structure of an electronic device according to the DRAM testing method provided by the embodiment of the present application. As shown in FIG. 8, the electronic device 800 includes:
  • processors 81 and a memory 82 are exemplified by a processor 81 in FIG.
  • the processor 81 and the memory 82 can be connected by a bus or other means, as exemplified by a bus connection in FIG.
  • the memory 82 is a non-volatile computer readable storage medium, and can be used for storing a non-volatile software program, a non-volatile computer-executable program, and a module, such as a program instruction corresponding to the DRAM test method in the embodiment of the present application. /module/unit.
  • the processor 81 executes various functional applications and data processing by executing non-volatile software programs, instructions, and modules stored in the memory 82, that is, implementing the above-described method embodiments DRAM test method.
  • the memory 82 may include a storage program area that stores an operating system, an application required for at least one function, and a storage data area that stores data created according to the use of the DRAM test method, and the like.
  • memory 82 can include high speed random access memory, and can also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid state storage device.
  • memory 82 can optionally include memory remotely located relative to processor 81, which can be connected to the electronic device over a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.
  • the one or more modules or units are stored in the memory 82 and, when executed by the one or more processors 81, perform the DRAM test method of any of the above method embodiments.
  • the embodiment of the present application provides a non-transitory computer readable storage medium storing computer-executable instructions that are executed by one or more processors, such as in FIG.
  • a processor 81 can cause the one or more processors to perform the DRAM test method in any of the above method embodiments.
  • the device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separate, and the components displayed as units may or may not be physical units, ie may be located A place, or it can be distributed to multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the embodiment.
  • the various embodiments can be implemented by means of software plus a general hardware platform, and of course, by hardware.
  • a person skilled in the art can understand that all or part of the process of implementing the above embodiments can be completed by a computer program to instruct related hardware, and the program can be stored in a computer readable storage medium. When executed, the flow of an embodiment of the methods as described above may be included.
  • the storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM), or a random access memory (Random Access Memory). RAM) and so on.

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Abstract

一种DRAM测试装置，包括用于插接待测试DRAM的测试架（101）、用于存储测试程序的程序储存模块（102）、电流测试模块（103）以及测试控制模块（104），所述测试控制模块（104）接收测试开关命令对待测试DRAM进行电流测试和功能测试并上传测试结果（S120），通过设置测试控制模块（104），读取预存的测试程序对DRAM完成功能测试，也可以控制电流测试模块（103）对DRAM加载电压进行电流测试，通过设置低成本的独立模块对DRAM进行测试，将不良品挑选出来，达到最大的使用效率。

Description

DRAM测试装置及方法 技术领域
本申请属于存储器器件测试领域，尤其涉及一种低功耗的DRAM测试装置及方法。
 背景技术
目前，DRAM（Dynamic Random Access Memory，动态随机存取存储器）的测试主要依靠机台进行测试，包含T5588和T5503A等机台，对LPDDR2/3进行相关的参数测试，这些机台能在高温88℃条件下进行测试，进料可一次进128颗至256颗不等，用机械手进行抓取芯片及分类，但机台测试方法成本高，不灵活。
除了机台测试还有整机测试方案，在整机上原焊接DRAM封装处直接添加DRAM测试座，以达到测试的目的。整机测试方案将完整的DRAM测试座安装在这个模块上。并添加测试参数的模块，包含电流测试模块、串口通信模块等，通过这些模块的组合形成一个DRAM测试架，但目前的整机测试方法不稳定，且不能单独对一些参数进行测试。
发明内容
本申请的目的在于提供一种以平台为基础的DRAM测试装置及方法，旨在解决传统的技术方案中存在的测试方法存在成本高，不能单独测试具体参数的问题。
为解决这个问题，我们设计了以平台为基础的DRAM测试架。
一种DRAM测试装置，包括用于插接待测试DRAM的测试架、用于存储测试程序的程序储存模块、与所述测试架连接电流测试模块以及测试控制模块，所述测试控制模块与所述测试架、所述程序储存模块和所述电流测试模块连接；所述测试控制模块接收测试开关命令对待测试DRAM进行电流测试和功能测试并上传测试结果，其中：
所述电流测试包括：控制所述电流测试模块向待测试DRAM提供电压同时检测待测试DRAM的工作电流；
所述功能测试包括：根据所述程序存储模块的测试程序对待测试DRAM进行写读程序，对比读与写的程序是否一致并得出对比结果。
此外，还提供了一种DRAM测试方法，包括：
预存储测试程序；
接收测试开关命令对待测试DRAM进行电流测试和功能测试并上传测试结果，其中：
所述电流测试包括：向待测试DRAM提供电压同时检测待测试DRAM的工作电流；
所述功能测试包括：根据所述程序存储模块的测试程序对待测试DRAM进行写读程序，对比读与写的程序是否一致并得出对比结果。
此外，本申请实施例提供一种电子设备，所述电子设备包括：
至少一个处理器；以及，
与所述至少一个处理器通信连接的存储器；其中，
所述存储器存储有可被所述至少一个处理器执行的指令，所述指令被所述至少一个处理器执行，以使所述至少一个处理器能够执行上述方法。
此外，本申请实施例提供一种非易失性计算机可读存储介质，所述计算机可读存储介质存储有计算机可执行指令，当所述计算机可执行指令被电子设备执行时，使所述电子设备执行上述方法。
上述的DRAM测试装置及方法通过DRAM测试架是通过整机（手机或者平板）演变而来的，设置测试控制模块，读取预存的测试程序对DRAM完成功能测试，也可以控制电流测试模块对DRAM加载电压进行电流测试，通过设置低成本的独立模块对DRAM进行测试，将不良品挑选出来，达到最大的使用效率，并且可以单独测试不同工况下的工作电流和功能测试。
 附图说明
一个或多个实施例通过与之对应的附图中的图片进行示例性说明，这些示例性说明并不构成对实施例的限定，附图中具有相同参考数字标号的元件表示为类似的元件，除非有特别申明，附图中的图不构成比例限制。
图1为本申请较佳实施例提供的DRAM测试装置结构示意图；
图2为图1所示的电流测试模块中主控模器的示例电路原理图；
图3为图1所示的电流测试模块中第一电压输出单元的示例电路原理图；
图4为图1所示的电流测试模块中第二电压输出单元的示例电路原理图；
图5为图1所示的电流测试模块中电平转换单元的示例电路原理图；
图6为图1所示的电流测试模块中采样单元的示例电路原理图；
图7为本申请较佳实施例提供的DRAM测试方法的具体流程图；
图8是本申请实施例提供的DRAM测试方法的电子设备的硬件结构示意图。
具体实施方式
为了使本申请的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本申请进行进一步详细说明。应当理解，此处所描述的具体实施例仅仅用以解释本申请，并不用于限定本申请。
请参阅图1。本申请较佳实施例提供的DRAM测试装置包括用于插接待测试DRAM的测试架101、用于存储测试程序和系统程序的程序储存模块102、与测试架101连接电流测试模块103以及测试控制模块104，测试控制模块104与测试架101、程序储存模块102和电流测试模块103连接；测试控制模块104接收测试开关命令对待测试DRAM进行电流测试和功能测试并上传测试结果，其中：电流测试包括：控制电流测试模块103向待测试DRAM提供电压同时检测待测试DRAM的工作电流；功能测试包括：根据程序存储模块的测试程序对待测试DRAM进行写读程序，对比读与写的程序是否一致并得出对比结果。
进一步地，还包括串口模块105，串口模块105用于与上位机200（如个人计算机）通讯，上传测试结果。
其中，测试架101具有卡座，测试开始时，DRAM通过和卡座的接触使之成为系统的一部分，再进行握手通信，当测试结束后，机器再将测试完的DRAM移开进行分类。程序储存模块102包括EMMC（Embedded Multi Media Card，内嵌式存储器），或设置独立的存储卡槽，用以安装可拔插存储卡。测试控制模块104的平台芯片为低成本的MTK芯片。
在进一步的实施方式中，DRAM测试装置包括开关控制模块106，开关控制模块106与测试控制模块104连接，用于接收外部控制向测试控制模块104发送控制启停和切换测试模式的测试开关命令。具体地，开关控制模块106包括多个触发开关按键；在其他实施方式中，开关控制模块106可以使用上位机200通过串口模块105发出测试开关命令。
进一部地，DRAM测试装置还具有系统测试功能，包括与测试控制模块104连接的显示模块107，测试控制模块107还用于将系统程序加载到待测试DRAM并控制显示模块107显示加载情况。显示模块107可以为LCD（Liquid Crystal Display，液晶显示器）。
为模拟客户的使用坏境，通过跑系统的方式（如跑android系统，做开机步骤）进行验证DRAM的可靠性。此系统可靠性需多个模块进行配合，包括LCD、测试控制模块104，其中，LCD模块作用：对系统测试进行显示作用，且增加测试负载。测试控制模块104作用：占用一定的内存的，对DRAM进行随机的测试等。
电流测试模块103包括主控制器（参阅图2）、提供1.8V电压的第一电压输出单元（参阅图3）、提供1.2V电压的第二输出单元（参阅图4）、用于电平转换的电平转换单元（参阅图5）和对DRAM工作电流进行采样的采样单元（参阅图6）。
读写电流及待机电流测试：待机电流的大小对整机的待机时间起到非常重要的影响。读写电流大小对整机在使用过程中的耗电量也起到很重要的影响。在封装前测试DRAM的电流大小，能更有效的区分产品使用等级，通过电流测试模块103外供电源，对DRAM加载1.2V电压和1.8V电压进行外部供电，再通过软件指令分别对DRAM进行读、写及待机状态。在这些状态的过程中去检测其电流的大小，具体包括向DRAM写数据、读数据及待机时的电流。然后再通过串口模块105将测试出来的电流值反馈到上位机200。
具体地，测试过程：测试分为Type0-Type5共6个type，每个Type有不同的写入数据及读出数据。再开关控制模块106上按开始后Type0-Type5自动按顺序测试。电流大小计算方法：电流测试模块103检测DRAM 的供电电压后，再通过采样电阻，通过I=U/R，计算出电流值。
功能测试：为保障DRAM的正常使用，就需对DRAM进行功能测试，把坏的DRAM挑选出来。通过将EMMC中事先烧录好的程序加载到DRAM后，对在卡座端的DRAM进行扫描测试。再通过串口模块105反馈到上位机200进行分类。此功能测试是对DRAM内部全部地址进行写和读操作，然后再进行对比写进去的和读出来的是否一致。具体在读写的时候出现概率性出错，从而检查内部阵列是否存在信号不好；是否存在不能进行高低电平转换，从而检查是否存在坏块等问题。
本DRAM测试装置基于平台的芯片价格较为便宜，可完成读写电流测试、待机电流测试、功能测试、系统测试，对Mobile DRAM的参数测试和故障排除都有非常好的效果。
此外，请参阅图7，还公开了一种DRAM测试方法，包括：
步骤S110，预存储测试程序；
步骤S120，接收测试开关命令对待测试DRAM进行电流测试和功能测试并上传测试结果。
其中：电流测试包括：向待测试DRAM提供电压同时检测待测试DRAM的工作电流；功能测试包括：根据程序存储模块的测试程序对待测试DRAM进行写读程序，对比读与写的程序是否一致并得出对比结果。
具体地，在预存储测试程序的同时存储系统程序；将系统程序加载到待测试DRAM并显示加载情况，以完成系统测试。
具体地，测试开关命令包括控制测试启停和测试模式切换。
具体地，工作电流包括向待测试DRAM写数据、读数据及待机时的电流。通过串口上传测试结果至上位机。
图8是本申请实施例提供的DRAM测试方法的电子设备的硬件结构示意图，如图8所示，该电子设备800包括：
一个或多个处理器81以及存储器82，图8中以一个处理器81为例。
处理器81和存储器82可以通过总线或者其他方式连接，图8中以通过总线连接为例。
存储器82作为一种非易失性计算机可读存储介质，可用于存储非易失性软件程序、非易失性计算机可执行程序以及模块，如本申请实施例中的DRAM测试方法对应的程序指令/模块/单元。处理器81通过运行存储在存储器82中的非易失性软件程序、指令以及模块，从而执行各种功能应用以及数据处理，即实现上述方法实施例DRAM测试方法。
存储器82可以包括存储程序区和存储数据区，其中，存储程序区可存储操作系统、至少一个功能所需要的应用程序；存储数据区可存储根据DRAM测试方法的使用所创建的数据等。此外，存储器82可以包括高速随机存取存储器，还可以包括非易失性存储器，例如至少一个磁盘存储器件、闪存器件、或其他非易失性固态存储器件。在一些实施例中，存储器82可选包括相对于处理器81远程设置的存储器，这些远程存储器可以通过网络连接至电子设备。上述网络的实例包括但不限于互联网、企业内部网、局域网、移动通信网及其组合。
所述一个或者多个模块或单元存储在所述存储器82中，当被所述一个或者多个处理器81执行时，执行上述任意方法实施例中的DRAM测试方法。
上述产品可执行本申请实施例所提供的方法，具备执行方法相应的功能模块和有益效果。未在本实施例中详尽描述的技术细节，可参见本申请实施例所提供的方法。
本申请实施例提供了一种非易失性计算机可读存储介质，所述计算机可读存储介质存储有计算机可执行指令，该计算机可执行指令被一个或多个处理器执行，例如图8中的一个处理器81，可使得上述一个或多个处理器可执行上述任意方法实施例中的DRAM测试方法。
以上所描述的装置实施例仅仅是示意性的，其中所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部模块来实现本实施例方案的目的。
通过以上的实施方式的描述，本领域普通技术人员可以清楚地了解到各实施方式可借助软件加通用硬件平台的方式来实现，当然也可以通过硬件。本领域普通技术人员可以理解实现上述实施例方法中的全部或部分流程是可以通过计算机程序来指令相关的硬件来完成，所述的程序可存储于一计算机可读取存储介质中，该程序在执行时，可包括如上述各方法的实施例的流程。其中，所述的存储介质可为磁碟、光盘、只读存储记忆体(Read-Only Memory, ROM)或随机存储记忆体(Random Access Memory, RAM)等。
以上仅所述为本申请的较佳实施例而已，并不用以限制本申请，凡在本申请的精神和原则之内所作的任何修改、等同替换和改进等，均应包含在本申请的保护范围之内。

Claims (10)

  1. 一种DRAM测试装置，其特征在于，包括用于插接待测试DRAM的测试架、用于存储测试程序的程序储存模块、与所述测试架连接电流测试模块以及测试控制模块，所述测试控制模块与所述测试架、所述程序储存模块和所述电流测试模块连接；所述测试控制模块接收测试开关命令对待测试DRAM进行电流测试和功能测试并上传测试结果，其中：
    所述电流测试包括：控制所述电流测试模块向待测试DRAM提供电压同时检测待测试DRAM的工作电流；
    所述功能测试包括：根据所述程序存储模块的测试程序对待测试DRAM进行写读程序，对比读与写的程序是否一致并得出对比结果。
  2. 如权利要求1所述的DRAM测试装置，其特征在于，还包括与所述测试控制模块连接的显示模块，所述程序储存模块还预存储系统程序；
    所述测试控制模块还用于将所述系统程序加载到待测试DRAM并控制所述显示模块显示加载情况。
  3. 如权利要求2所述的DRAM测试装置，其特征在于，还包括开关控制模块，所述开关控制模块与所述测试控制模块连接，用于接收外部控制向所述测试控制模块发送控制启停和切换测试模式的测试开关命令。
  4. 如权利要求1所述的DRAM测试装置，其特征在于，所述工作电流包括向待测试DRAM写数据、读数据及待机时的电流。
  5. 如权利要求1所述的DRAM测试装置，其特征在于，还包括串口模块，所述串口模块用于与上位机通讯，上传所述测试结果。
  6. 一种DRAM测试方法，其特征在于，包括：
    预存储测试程序；
    接收测试开关命令对待测试DRAM进行电流测试和功能测试并上传测试结果，其中：
    所述电流测试包括：向待测试DRAM提供电压同时检测待测试DRAM的工作电流；
    所述功能测试包括：根据所述程序存储模块的测试程序对待测试DRAM进行写读程序，对比读与写的程序是否一致并得出对比结果。
  7. 如权利要求6所述的DRAM测试方法，其特征在于，还包括：
    在预存储测试程序的同时存储系统程序；
    将系统程序加载到待测试DRAM并显示加载情况。
  8. 如权利要求6所述的DRAM测试方法，其特征在于，所述测试开关命令包括控制测试启停和测试模式切换。
  9. 如权利要求1所述的DRAM测试方法，其特征在于，所述工作电流包括向待测试DRAM写数据、读数据及待机时的电流。
  10. 如权利要求1所述的DRAM测试方法，其特征在于，通过串口上传所述测试结果至上位机。
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